Abstract: A caller authentication system that may enable a called party to be provided with identification information of a caller may be provided. The caller authentication system, including: a communication system to transmit, when a call request signal is received from a calling terminal of a caller, network information and a telephone number of the calling terminal to a certificate authority server, and to request identification of the caller, the network information and the telephone number being included in the call request signal, to transmit, when identification information of the caller is received from the certificate authority server in response to the identification request, the identification information to a called terminal of a called party, and to enable the identification information to be displayed on the called terminal.

Abstract: A dome sheet structure of a mobile communication terminal may include: a metal dome covering a contact point printed on a printed circuit board; and a light guide film disposed on the metal dome. The light guide film may be bonded with the metal dome in a bonding area, and the bonding area may be an area between two concentric circles having different diameters and centered at a center of the metal dome.

Abstract: A method for fabricating a semiconductor device includes providing a substrate having a bulb-type recessed region, forming a gate insulating layer over the bulb-type recessed region and the substrate, and forming a gate conductive layer over the gate insulating layer. The gate conductive layer fills the bulb-type recessed region. The gate conductive layer includes two or more conductive layers and a discontinuous interface between the conductive layers.

Abstract: Disclosed is a method and device for controlling a power saving mode for applying the sleep mode for saving power consumption to the mobility of subscriber stations in a mobile communication network and a wireless Internet system. Subscriber stations entering the sleep mode are constantly grouped, listening intervals of the subscriber stations for each group are not superimposed, the existence state of traffic in the subscriber stations is independently notified for each group, and the overhead of signaling messages is minimized when the traffic is notified to the subscriber station in the sleep mode.

Abstract: A semiconductor device includes a first conductive layer, a first intermediate structure over the first conductive layer, a second intermediate structure over the first intermediate structure, and a second conductive layer over the second intermediate structure. The first intermediate structure includes a metal silicide layer and a nitrogen containing metal layer. The second intermediate structure includes at least a nitrogen containing metal silicide layer.

Abstract: The present invention describes methods for programming trigger time of a projectile (60) based on remaining flight time to a target (P) after the projectile (60) is airborne. The actual muzzle (Vo) and flight speeds (V1, V2, etc.) are independently determined and compared to those used by the ballistic computer (30), and a better estimate of trigger time is accordingly used to activate detonation of the projectile (60). In one embodiment, a Kalman algorithm is used to provide a better estimate of the projectile's flight speeds obtained by independent methods to provide the better estimate of the trigger time.

Abstract: A gate structure of a semiconductor device includes an intermediate structure, wherein the intermediate structure includes a titanium layer and a tungsten silicide layer. A method for forming a gate structure of a semiconductor device includes forming a polysilicon-based electrode. An intermediate structure, which includes a titanium layer and a tungsten silicide layer, is formed over the polysilicon-based electrode. A metal electrode is formed over the intermediate structure.

Abstract: Disclosed are user equipment and a base station in a carrier aggregation system, and a call admission method thereof. The user equipment includes a plurality of physical layers, and the base station provides multiple component carriers. When messages for connection setup are transmitted and received between the user equipment and base station, the messages include information about what component carriers are selected by the physical layers, information about what component carriers are selectable by the physical layers, and information about calculations for uplink timing alignment, and call admission control and load balancing is performed based on the information included in the messages. Accordingly, in the carrier aggregation system, quicker call admission and load balancing are achieved.

Abstract: A method for fabricating a semiconductor device includes providing a substrate having a bulb-type recessed region, forming a gate insulating layer over the bulb-type recessed region and the substrate, and forming a gate conductive layer over the gate insulating layer. The gate conductive layer fills the bulb-type recessed region. The gate conductive layer includes two or more conductive layers and a discontinuous interface between the conductive layers.

Abstract: A method for fabricating a semiconductor device includes forming a pattern including a first layer including tungsten, performing a gas flowing process on the pattern in a gas ambience including nitrogen, and forming a second layer over the pattern using a source gas including nitrogen, wherein the purge is performed at a given temperature for a given period of time in a manner that a reaction between the first layer and the nitrogen used when forming the second layer is controlled.

Abstract: Methods of characterizing a mechanical stress level in a stressed layer of a transistor and a mechanical stress characterizing test structure are disclosed. In one embodiment, the test structure includes a first test transistor including a first stress level; and at least one second test transistor having a substantially different second stress level. A testing circuit can then be used to characterize the mechanical stress level by comparing performance of the first test transistor and the at least one second test transistor. The type of test structure depends on the integration scheme used. In one embodiment, at least one second test transistor is provided with a substantially neutral stress level and/or an opposite stress level from the first stress level. The substantially neutral stress level may be provided by either rotating the transistor, removing the stressed layer causing the stress level or de-stressing the stressed layer causing the stress layer.

Abstract: Disclosed is a method and device for requesting and reporting channel quality information in a mobile communication system. A base station a locates a dedicated feedback channel for channel quality information report to an uplink radio resource, transmits the allocation information to subscriber stations, and generates a CQI report message to request channel quality information from the subscriber stations. The subscriber stations receive the CQI report message from the base station, measures a radio channel quality for communication with the base station, generates channel quality information, generates a CQI response message including the channel quality information, and transmit—the CQI response message to the base station through a dedicates feedback channel designated in the allocation information.

Abstract: The present invention relates to a semiconductor device and a method of manufacture thereof, being capable of improving the high integration by increasing a cell region while securing the reliability of device and the process margin through forming a cell region and a core region with the stacking structure.

Abstract: In a double data rate (DDR) counter and counting method used in, for example, an analog-to-digital conversion in, for example, a CMOS image sensor and method, a first stage of the counter generates a least significant bit (LSB) of the value in the counter. The counter includes at least one second stage for generating another bit of the value in the counter. An input clock signal is applied to a data input of the first stage and a clock input of the second stage.

Abstract: In a high speed vertical channel transistor, a pillar structure is formed over a substrate, a gate electrode surrounds an outer wall of a lower portion of the pillar structure; and a word line extends in a direction to partially contact an outer wall of the gate electrode. The word line shifts toward a side of the pillar structure resulting in increased transistor speed.

Abstract: A gate structure of a semiconductor device includes an intermediate structure, wherein the intermediate structure includes a titanium layer and a tungsten silicide layer. A method for forming a gate structure of a semiconductor device includes forming a polysilicon-based electrode. An intermediate structure, which includes a titanium layer and a tungsten silicide layer, is formed over the polysilicon-based electrode. A metal electrode is formed over the intermediate structure.

Abstract: In a double data rate (DDR) counter and counting method used in, for example, an analog-to-digital conversion in, for example, a CMOS image sensor and method, a first stage of the counter generates a least significant bit (LSB) of the value in the counter. The first stage includes a first clock input and is edge-triggered on one of the rising and falling edges of a signal applied at the first clock input. The counter includes at least one second stage for generating another bit of the value in the counter. The second stage includes a second clock input and is edge-triggered on the other of the rising and falling edges of a signal applied at the second clock input.

Abstract: A ramp generator includes a row decoder, a column decoder, a current cell matrix and a current-voltage converter. The row decoder generates row selection signals, and the column decoder generates column selection signals. Each of current cells included in the current cell matrix is turned on to provide a unit current if a corresponding row selection signal and a corresponding column selection signal are activated. Each of the current cells is maintained to be turned on even if the corresponding row selection signal or the corresponding column selection signal is deactivated. The current cell matrix outputs an output current by summing unit currents provided from the current cells that are turned on. The current-voltage converter converts the output current of the current cell matrix into a ramp voltage. Therefore, the ramp generator may have a small size and prevent a glitch.

Abstract: Disclosed is a power saving mode control system (200) and method in a wireless portable Internet system. Stations in the sleep mode are grouped by aligning listening intervals of the stations which enter the sleep mode in the power saving management system wherein the sleep interval for receiving no traffic data is exponentially increased. Therefore, the sleep mode of the grouped subscriber stations are easily managed, and power saving efficiency is enhanced and system complexity is lowered by easily and quickly detecting data states provided to the corresponding stations.

Abstract: A dielectric structure in a nonvolatile memory device and a method for fabricating the same are provided. The dielectric structure includes: a first oxide layer; a first high-k dielectric film formed on the first oxide layer, wherein the first high-k dielectric film includes one selected from materials with a dielectric constant of approximately 9 or higher and a compound of at least two of the materials; and a second oxide layer formed on the first high-k dielectric film.