Patents by Inventor Yong Lim

Yong Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7752519
    Abstract: Provided is a method for generating a feedback message for ARQ including recording an ACK type in a first field; estimating the last block sequence number of successively ACKed blocks and recording the estimated last block sequence number in a second field; recording the number of groups of successively ACKed blocks after the estimated last block sequence number as the number of ACK MAPs in a third field; recording the startblock sequence number of the respective ACK MAPs in a fourth field; recording the lengths of the respective ACK MAPs in a fifth field corresponding to the recorded start block sequence number; and sending a feedback message including information on the first to the fifth fields.
    Type: Grant
    Filed: December 29, 2004
    Date of Patent: July 6, 2010
    Assignees: Electronics and Telecommunications Research Institute, Samsung Electronics Co., Ltd., KT Corporation, SK Telecom Co., Ltd., KTFreetel Co., Ltd., Hanaro Telecom., Inc.
    Inventors: Kun-Min Yeo, Chul-Sik Yoon, Jae-Heung Kim, Soon-Yong Lim, Byung-Han Ryu
  • Publication number: 20100159822
    Abstract: Provided is an apparatus and method for providing a Multimedia Broadcast and Multicast Service (MBMS) in a wireless communication system, e.g., a 3rd-Generation Partnership Project (3GPP) Long-Term Evolution (LTE)-Advanced mobile communication system. The method for providing an MBMS in a mobile communication system includes: multiplexing MBMS traffic channels providing MBMS traffic data and an MBMS control channel proving control information of MBMS into a downlink-shared channel; processing and transmitting data of the downlink-shared channel to be transmitted through a physical downlink-shared channel of a physical channel; and generating and transmitting a physical downlink control channel which includes identifiers for indicating MBMS data and information to designate a receiving terminal of data transmitted through the physical downlink-shared channel.
    Type: Application
    Filed: September 8, 2009
    Publication date: June 24, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Soon-Yong LIM, Ae-Soon PARK
  • Patent number: 7741170
    Abstract: A dielectric structure in a nonvolatile memory device and a method for fabricating the same are provided. The dielectric structure includes: a first oxide layer; a first high-k dielectric film formed on the first oxide layer, wherein the first high-k dielectric film includes one selected from materials with a dielectric constant of approximately 9 or higher and a compound of at least two of the materials; and a second oxide layer formed on the first high-k dielectric film.
    Type: Grant
    Filed: November 2, 2005
    Date of Patent: June 22, 2010
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Kwon Hong, Kwan-Yong Lim
  • Publication number: 20100150082
    Abstract: Provided is a buffer status reporting method of a terminal device in a mobile communication system. The buffer status reporting method includes obtaining a radio resource allocation for a plurality of component carriers from a base station, configuring a plurality of medium access control-protocol data units (MAC-PDUs) including buffer status information corresponding to the plurality of component carriers, the plurality of MAC-PDUs including generated sequence numbers (SNs), and transmitting the plurality of MAC-PDUs to the base station through the plurality of component carriers.
    Type: Application
    Filed: July 23, 2009
    Publication date: June 17, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Jae Wook SHIN, Kwang Ryul Jung, Soon Yong Lim, Ae-soon Park
  • Publication number: 20100148042
    Abstract: A sensor for angle measurement of a joint is disclosed. The sensor comprises a code strip, a linear encoder configured to detect relative movement between the linear encoder and the code strip, and a microcontroller configured to compute angular rotation of the joint from linear displacement obtained by the relative movement. The relative movement corresponds to rotation of the joint. A corresponding method and system are also disclosed.
    Type: Application
    Filed: January 18, 2008
    Publication date: June 17, 2010
    Applicant: Nanyang Technological University
    Inventors: I-Ming Chen, Kwang Yong Lim, Young Koon Goh, Song Huat Yeo, Been-Lim Duh
  • Publication number: 20100136987
    Abstract: The present invention relates to a wireless communication system having protocol architecture for reducing latency of a cellular system. In the protocol architecture of the wireless communication system in the cellular system, a physical layer supports wireless transmission of the cellular system and estimates a radio channel condition. A data link layer determines a data transmission mode based on a QoS of user data and the radio channel condition estimated by the physical layer and performs segmentation and assembly of the packet data, and a network layer establishes and releases a radio bearer for transmitting packet data transmitted from the data link layer and a control command. A control service access point is provided for control information transmission between the data link layer and the physical layer.
    Type: Application
    Filed: June 15, 2006
    Publication date: June 3, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Kang-Hee Kim, Soo-Jung Jung, Geon-Min Yeo, Soon-Yong Lim, Kyung-Seok Lee, Jae-Heung Kim, Il-Soon Jang, Hyun-Hwa Seo, Jung-Im Kim, Mu-Yong Shin, Byung-Han Ryu
  • Publication number: 20100133619
    Abstract: A fin transistor includes fin active region, an isolation layer covering both sidewalls of a lower portion of the fin active region, a gate insulation layer disposed over a surface of the fin active region, and a gate electrode disposed over the gate insulation layer and the isolation layer, and having a work function ranging from approximately 4.4 eV to approximately 4.8 eV.
    Type: Application
    Filed: February 2, 2010
    Publication date: June 3, 2010
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Se-Aug JANG, Heung-Jae CHO, Kwan-Yong LIM, Tae-Yoon KIM
  • Publication number: 20100120431
    Abstract: Provided are an inter-carrier member handover apparatus and method. In the inter-carrier member handover apparatus and method, data is transmitted or received by allocating a plurality of carriers to a single mobile terminal, a carrier aggregation, which includes a plurality of carrier members that process the allocated carriers, is managed, and a handover between the carrier members in the managed carrier aggregation is processed when the handover is required. Therefore, an intra-base station handover can be performed when a mobile terminal and a base station exchange data using a plurality of carrier frequency bands.
    Type: Application
    Filed: September 18, 2009
    Publication date: May 13, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: You-sun HWANG, Soon-yong LIM, Ae-soon PARK
  • Patent number: 7713823
    Abstract: In a high speed vertical channel transistor, a pillar structure is formed over a substrate, a gate electrode surrounds an outer wall of a lower portion of the pillar structure; and a word line extends in a direction to partially contact an outer wall of the gate electrode. The word line shifts toward a side of the pillar structure resulting in increased transistor speed.
    Type: Grant
    Filed: June 29, 2008
    Date of Patent: May 11, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Min-Gyu Sung, Heung-Jae Cho, Yong-Soo Kim, Kwan-Yong Lim, Se-Aug Jang
  • Publication number: 20100084714
    Abstract: A dual polysilicon gate of a semiconductor device includes a substrate having a first region, a second region, and a third region, a channel region with a recessed structure formed in the first region of the substrate, a gate insulating layer formed over the substrate, a first polysilicon layer filled into the channel region, and formed over the gate insulating layer of the first and second regions, a second polysilicon layer formed over the gate insulating layer of the third region, and an insulating layer doped with an impurity, and disposed inside the first polysilicon layer in the channel region.
    Type: Application
    Filed: December 7, 2009
    Publication date: April 8, 2010
    Applicant: Hynix Semiconductor Inc.
    Inventors: Kwan-Yong LIM, Heung-Jae CHO, Min-Gyu SUNG
  • Publication number: 20100085211
    Abstract: A self-powered in-pipe fluid meter to be mounted inside of a pipe carrying a fluid therein. The fluid meter comprises at least one sensing unit capable of measuring one or more parameters of the fluid inside of the pipe; a telemetric data transmission unit capable of telemetrically transmitting data including a measured fluid parameter to a host terminal and/or another fluid meter; and at least one fluid-driven power source unit capable of generating power from the fluid flow within the pipe and supplying power to the sensing unit and/or the transmission unit.
    Type: Application
    Filed: August 6, 2007
    Publication date: April 8, 2010
    Applicant: Agency for Science, Technology and Research
    Inventors: Zhenfeng Wang, Ser Yong Lim, Wei Fan, Danhong Zhang
  • Patent number: 7687389
    Abstract: A method for fabricating a semiconductor device includes forming a gate insulation layer over a substrate, forming a first gate conductive layer over the gate insulation layer, forming a barrier metal over the first gate conductive layer, sequentially forming a second gate conductive layer and a gate hard mask over the barrier metal, patterning the gate hard mask, the second gate conductive layer, the barrier metal, the first gate conductive layer, and the gate insulation layer to form a gate pattern, and performing a plasma selective gate re-oxidation process on the gate pattern.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: March 30, 2010
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Kwan-Yong Lim, Min-Gyu Sung, Heung-Jae Cho, Hong-Seon Yang
  • Patent number: 7682911
    Abstract: A fin transistor includes fin active region, an isolation layer covering both sidewalls of a lower portion of the fin active region, a gate insulation layer disposed over a surface of the fin active region, and a gate electrode disposed over the gate insulation layer and the isolation layer, and having a work function ranging from approximately 4.4 eV to approximately 4.8 eV.
    Type: Grant
    Filed: December 27, 2007
    Date of Patent: March 23, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Se-Aug Jang, Heung-Jae Cho, Kwan-Yong Lim, Tae-Yoon Kim
  • Publication number: 20100070644
    Abstract: Provided are a time shift service apparatus and method based on multimedia information, and a multimedia reproducing apparatus using the same. The timeshift service apparatus includes: a timeshift buffering unit for storing a multimedia stream according a timeshift service requested from an outside device; a time obtaining unit for obtaining time information about times of starting and ending a timeshift service according to the timeshift service request; a memory managing unit for storing a multimedia stream, which is serviced based on the obtained time information by the time obtaining unit, in the timeshift buffering unit; and an information generating unit for generating detailed information for the multimedia stream stored in the timeshift buffering unit.
    Type: Application
    Filed: December 3, 2007
    Publication date: March 18, 2010
    Inventors: Seong-Yong Lim, Ji-Hoon Choi, Hyun-Cheol Kim, Joo-Myoung Seok, Han-Kyu Lee, Jin-Woo Hong
  • Publication number: 20100059831
    Abstract: A first example embodiment provides a method of removing first spacers from gates and incorporating a low-k material into the ILD layer to increase device performance. A second example embodiment comprises replacing the first spacers after silicidation with low-k spacers. This serves to reduce the parasitic capacitances. Also, by implementing the low-k spacers only after silicidation, the embodiments' low-k spacers are not compromised by multiple high dose ion implantations and resist strip steps. The example embodiments can improve device performance, such as the performance of a rim oscillator.
    Type: Application
    Filed: November 6, 2009
    Publication date: March 11, 2010
    Applicant: CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
    Inventors: Yong Meng Lee, Young Way Teh, Chung Woh Lai, Wenhe Lin, Khee Yong Lim, Wee Leng Tan, Hui Peng Koh, John Sudijono, Liang Choo Hsia
  • Patent number: 7667253
    Abstract: The present invention relates to a non-volatile memory device having conductive sidewall spacers and a method for fabricating the same. The non-volatile memory device includes: a substrate; a gate insulation layer formed on the substrate; a gate structure formed on the gate insulation layer; a pair of sidewall spacers formed on sidewalls of the gate structure; a pair of conductive sidewall spacers for trapping/detrapping charges formed on the pair of sidewall spacers; a pair of lightly doped drain regions formed in the substrate disposed beneath the sidewalls of the gate structure; and a pair of source/drain regions formed in the substrate disposed beneath edge portions of the pair of conductive sidewall spacers.
    Type: Grant
    Filed: April 30, 2007
    Date of Patent: February 23, 2010
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Kwan-Yong Lim, Heung-Jae Cho, Yong-Soo Kim, Se-Aug Jang, Hyun-Chul Sohn
  • Patent number: 7666785
    Abstract: A method for fabricating a semiconductor memory device includes forming a first layer, injecting a tungsten source gas and a silicon source gas simultaneously to form a tungsten silicide layer over the first layer, forming a tungsten nitride layer over the tungsten silicide layer without a post purge process of additionally supplying the silicon source gas, and forming a second layer over the tungsten nitride layer.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: February 23, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Min-Gyu Sung, Yong-Soo Kim, Kwan-Yong Lim
  • Publication number: 20100041242
    Abstract: A method for forming a device with both PFET and NFET transistors using a PFET compressive etch stop liner and a NFET tensile etch stop liner and two anneals in a deuterium containing atmosphere. The method comprises: providing a NFET transistor in a NFET region and a PFET transistor in a PFET region. We form a NFET tensile contact etch-stop liner over the NFET region. Then we perform a first deuterium anneal. We form a PFET compressive etch stop liner over the PFET region. We form a (ILD) dielectric layer with contact openings over the substrate. We perform a second deuterium anneal. The temperature of the second deuterium anneal is less than the temperature of the first deuterium anneal.
    Type: Application
    Filed: October 19, 2009
    Publication date: February 18, 2010
    Applicants: INTERNATIONAL BUSINESS MACHINES CORPORATION, CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
    Inventors: Khee Yong LIM, Victor CHAN, Eng Hua LIM, Wenhe LIN, Jamin F. FEN
  • Publication number: 20100007778
    Abstract: A method and apparatus subsampling a plurality of signals from one frame of a pixel array, pixels within the pixel array belonging to one of at least two sets, each set configured to sense values of a same image parameter, includes controlling integration times for first and second signals for each set output from the pixel array, controlling including using a first integration time for the first signal of the set and using a second integration time, different than the first integration time, for the second signal of the set, and calculating a synthesized value for each set using the first and second signals having different integration times.
    Type: Application
    Filed: May 7, 2009
    Publication date: January 14, 2010
    Inventor: Yong Lim
  • Publication number: 20090309991
    Abstract: A method of k*k subsampling, where k is an integer greater than one, a full frame readout on a plurality of pixels arranged in rows and columns, each pixel belonging to one of at least two sets, a first set configured to sense a first value of an image parameter and a second set configured to sense a second value of the image parameter, the method including sampling signals of k pixels of at least one set in a first row to output subsampled signals, converting the subsampled signals into digital signals having a lower resolution than the full frame readout, repeating sampling and converting for k rows, and adding digital signals for the first to kth rows within the at least one set.
    Type: Application
    Filed: May 29, 2009
    Publication date: December 17, 2009
    Inventors: Yong Lim, Kyoung Min Koh, Soo Youn Kim