Process tube for manufacturing semiconductor wafers or the like
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The broken line showing in the figures is for illustrative purposes only and forms no part of the claimed design.
Claims
The ornamental design for a process tube for manufacturing semiconductor wafers or the like, as shown and described.
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Type: Grant
Filed: Aug 18, 2006
Date of Patent: Apr 14, 2009
Assignee: Tokyo Electron Limited (Tokyo)
Inventor: Hirofumi Kaneko (Tokyo)
Primary Examiner: Selina Sikder
Attorney: Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
Application Number: 29/264,779