Abstract: A device for heat treating (annealing) a III-V semiconductor wafer comprises at least one wafer support unit which is dimensioned such that a cover provided above the wafer surface is either spaced without any distance or with a distance of maximally about 2 mm to the wafer surface. A process for heat treating III-V semiconductor wafers having diameters larger than 100 mm and a dislocation density below 1×104 cm?2 is carried out in the device of the invention. SI GaAs wafers produced have an at least 25% increased characteristic fracture strength (Weibull distribution), an improved radial macroscopic and mesoscopic homogeneity and an improved quality of the mechano-chemically polished surface. The characteristic fracture strength is higher than 1900 MPa.

Abstract: A method for eliminating precipitates contained in an II-VI solid semiconductor material, in which the solid semiconductor material is a congruent sublimation solid semiconductor material, the method including: providing an inert gas flow; heating the solid semiconductor material under the inert gas flow up to a temperature T, between a first temperature T1, corresponding to compound II-VI/element VI eutectic, and a second temperature T2, corresponding to maximum congruent sublimation temperature; maintaining the solid semiconductor material at this temperature T under a neutral gas flow for a time period sufficient to eliminate the precipitates; cooling the solid semiconductor material under the inert gas flow from temperature T to ambient temperature, at a rate such that, during the cooling, the solid semiconductor material merges with its congruent sublimation line; and recovering a precipitate-free solid semiconductor material.

Abstract: A method for preparing film oxides deposited on a substrate with a resulting grain boundary junction that is atomistically straight. A bicrystal substrate having a straight grain boundary is prepared as a template. The Miller indices h1, k1, h2, k2 of the two grains of the substrate are chosen such that the misorientation angle of the film is equal to arctan k1/h1+arctan k2/h2. The film is grown on the substrate using a layer-by-layer growth mode.

Abstract: A vapor phase epitaxial growth method using a vapor phase epitaxy apparatus having a chamber, a support structure holding thereon a substrate in the chamber, a first flow path supplying a reactant gas for film formation on the substrate and a second flow path for exhaust of the gas, said method includes rotating the substrate, supplying the reactant gas and a carrier gas to thereby perform vapor-phase epitaxial growth of a semiconductor film on the substrate, and during the vapor-phase epitaxial growth of the semiconductor film on the substrate, controlling process parameters to make said semiconductor film uniform in thickness, said process parameters including flow rates and concentrations of the reactant gas and the carrier gas, a degree of vacuum within said chamber, a temperature of the substrate, and a rotation speed of said substrate.

Abstract: Certain embodiments provide a crystal growth method for nitride semiconductors, including: growing a first semiconductor layer containing InxGa1-xN (0<x?1) on a substrate at a first growth temperature, with the use of a first carrier gas formed with an inert gas; growing a second semiconductor layer containing InyGa1-yN (0?y<1, y<x) on the first semiconductor layer at a second growth temperature higher than the first growth temperature, with the use of a second carrier gas containing the inert gas and H2 gas, an amount of the H2 gas being smaller than an amount of the inert gas; and growing a third semiconductor layer containing InzGa1-zN (0?z<1, z<x) on the second semiconductor layer at the second growth temperature, with the use of a third carrier gas containing the inert gas and H2 gas, an amount of the H2 gas in the third carrier gas being a smaller than the amount of H2 gas in the second carrier gas.

Abstract: An epitaxial growth process for producing a thick III-N layer, wherein III denotes at least one element of group III of the periodic table of elements, is disclosed, wherein a thick III-N layer is deposited above a foreign substrate. The epitaxial growth process preferably is carried out by HVPE. The substrate can also be a template comprising the foreign substrate and at least one thin III-N intermediate layer. The surface quality is improved by providing a slight intentional misorientation of the substrate, and/or a reduction of the N/III ratio and/or the reactor pressure towards the end of the epitaxial growth process. Substrates and semiconductor devices with such improved III-N layers are also disclosed.

Abstract: A film formation apparatus for a semiconductor process includes a source gas supply circuit to supply into a process container a source gas for depositing a thin film on target substrates, and a mixture gas supply circuit to supply into the process container a mixture gas containing a doping gas for doping the thin film with an impurity and a dilution gas for diluting the doping gas. The mixture gas supply circuit includes a gas mixture tank disposed outside the process container to mix the doping gas with the dilution gas to form the mixture gas, a mixture gas supply line to supply the mixture gas from the gas mixture tank into the process container, a doping gas supply circuit to supply the doping gas into the gas mixture tank, and a dilution gas supply circuit to supply the dilution gas into the gas mixture tank.

Abstract: A method for producing a semiconductor wafer, including epitaxially growing a Si1-XGeX layer (0<X?1) on a surface of a silicon single crystal wafer to be a bond wafer; implanting at least one kind of a hydrogen ion or a rare gas ion through the Si1-XGeX layer and forming an ion-implanted layer inside the bond wafer; contacting and bonding a surface of the Si1-XGeX layer and a surface of a base wafer through an insulator film; then performing delamination at the ion-implanted layer; performing a bonding heat treatment of binding the bonded surfaces; and then removing a Si layer of a delaminated layer transferred to a side of the base wafer by the delamination. Thereby, the method does not cause lattice relaxation in the SiGe layer. Therefore, the method is suitable for production of a semiconductor wafer for high-speed semiconductor devices.

Abstract: A diamond single crystal substrate obtained by a vapor-phase growth method, wherein the diamond intrinsic Raman shift of the diamond single crystal substrate surface measured by microscopic Raman spectroscopy with a focused beam spot diameter of excitation light of 2 ?m is deviated by +0.5 cm?1 or more to +3.0 cm?1 or less from the standard Raman shift quantity of strain-free diamond, in a region (region A) which is more than 0% to not more than 25% of the surface, and is deviated by ?1.0 cm?1 or more to less than +0.5 cm?1 from the standard Raman shift quantity of strain-free diamond, in a region (region B) of the surface other than the region A. The diamond single crystal substrate can be obtained with a large size and high-quality without cracking and is suitable for semiconductor materials, electronic components, and optical components or the like.

Abstract: In one embodiment the present invention provides for a method for depositing a thin film layer onto a composite tape 16, that comprises depositing at least one thin film layer of physically enhancing material 30 onto at least one portion of the composite tape. The depositing is accomplished by atomic layer epitaxy and the thin film layer is approximately 1-10 molecules thick.

Abstract: A method of making a metal nitride is provided. The method may include introducing a metal in a chamber. A nitrogen-containing material may be flowed into the chamber. Further, a hydrogen halide may be introduced. The nitrogen-containing material may react with the metal in the chamber to form the metal nitride.

Abstract: The invention provides systems and methods for the deposition of an improved diamond-like carbon material, particularly for the production of magnetic recording media. The diamond-like carbon material of the present invention is highly tetrahedral, that is, it features a large number of the sp3 carbon-carbon bonds which are found within a diamond crystal lattice. The material is also amorphous, providing a combination of short-range order with long-range disorder, and can be deposited as films which are ultrasmooth and continuous at thicknesses substantially lower than known amorphous carbon coating materials. The carbon protective coatings of the present invention will often be hydrogenated. In a preferred method for depositing of these materials, capacitive coupling forms a highly uniform, selectively energized stream of ions from a dense, inductively ionized plasma.

Abstract: In the batch production of high purity polycrystalline silicon, in which a U-shaped silicon carrier body is fastened in an open deposition reactor, the deposition reactor is hermetically sealed, the U-shaped carrier body is heated electrical current, a silicon-containing reaction gas and hydrogen are introduced into the reactor through a supply line so that silicon from the reaction gas is deposited on the carrier body, the diameter of the carrier body increases and a waste gas formed is removed from the deposition reactor through a discharge line, and, after a desired diameter of the polysilicon rod is reached, deposition is terminated, the carrier body is cooled to room temperature, the reactor is opened, the carrier body is removed from the reactor and a second U-shaped silicon carrier body made of silicon is fastened in the deposition reactor, an inert gas is fed through the supply and discharge lines into the open reactor from at least the time when the reactor is opened to extract the first carrier body

Abstract: In the production process of the present invention for high purity polycrystal silicon, using a vertical reactor having a silicon chloride gas-feeding nozzle and a reducing agent gas-feeding nozzle which are disposed at an upper part and a waste gas discharge pipe, a silicon chloride gas and a reducing agent gas are fed into the reactor to form polycrystal silicon at a tip part of the silicon chloride gas-feeding nozzle by the reaction of the silicon chloride gas with the reducing agent gas, and the polycrystal silicon is allowed to grow from the tip part of the silicon chloride gas-feeding nozzle toward a lower part thereof.

Abstract: A method for the production of a plurality of optoelectronic semiconductor chips each having a plurality of structural elements with respectively at least one semiconductor layer. The method involves providing a chip composite base having a substrate and a growth surface. A non-closed mask material layer is grown onto the growth surface in such a way that the mask material layer has a plurality of statistically distributed windows having varying forms and/or opening areas, a mask material being chosen in such a way that a semiconductor material of the semiconductor layer that is to be grown in a later method step essentially cannot grow on said mask material or can grow in a substantially worse manner in comparison with the growth surface. Subsequently, semiconductor layers are deposited essentially simultaneously onto regions of the growth surface that lie within the windows. A further method step is singulation of the chip composite base with applied material to form semiconductor chips.

Abstract: In a method of producing a semiconductor element in a substrate, a plurality of carbide precipitates is formed in the substrate, doping atoms are implanted into the substrate, thereby forming crystal defects in the substrate, the substrate is heated, such that at least a part of the crystal defects is eliminated using the carbide precipitates, and the semiconductor element is formed using the doping atoms.

Abstract: The present invention relates to a method for increasing the conversion of group III metal to group III nitride in a fused metal containing group III elements, with the introduction of nitrogen into the fused metal containing group III, at temperatures?1100° C. and at pressures of below 1×108 Pa, wherein a solvent adjunct is added to the fused metal containing group III elements, which is at least one element of the following elements C, Si, Ge, Fe, and/or at least one element of the rare earths, or an alloy or a compound of these elements, in particular their nitrides.

Abstract: In an insulating film formation method, a cycle A in which O3 at a low flow rate is supplied onto a substrate and then O3 supplied is allowed to react with Hf on the substrate in a non-equilibrium state to form a hafnium oxide film is carried out M times (M?1), and a cycle B in which O3 at a high flow rate is supplied onto the substrate and then O3 supplied is allowed to react with Hf on the substrate in an equilibrium state to form a hafnium oxide film is carried out N times (N?1). These insulating film formation cycles are defined as one sequence. This sequence is repeated until a desired thickness is obtained, thereby forming a target insulating film.

Abstract: Synthetic monocrystalline diamond compositions having one or more monocrystalline diamond layers formed by chemical vapor deposition, the layers including one or more layers having an increased concentration of one or more impurities (such as boron and/or isotopes of carbon), as compared to other layers or comparable layers without such impurities. Such compositions provide an improved combination of properties, including color, strength, velocity of sound, electrical conductivity, and control of defects. A related method for preparing such a composition is also described, as well as a system for use in performing such a method, and articles incorporating such a composition.

Abstract: A method of forming a planar waveguide structure, comprising forming a first graded layer on a substrate, wherein the first graded layer comprises a first and a second optical material, wherein the concentration of the first optical material increases with the height of the first graded layer; forming a second graded layer on the first graded layer, the second graded layer comprising the first and second optical materials wherein the concentration of the first optical material decreases with the height of the second graded layer. The method further including forming a uniform layer on the first graded layer, the uniform layer containing first and second optical materials wherein the first optical material concentration is constant.

Abstract: GaN is grown by creating a Ga vapor from a powder, and using an inert purge gas from a source to transport the vapor to a growth site where the GaN growth takes place. In one embodiment, the inert gas is N2, and the powder source is GaN powder that is loaded into source chambers. The GaN powder is congruently evaporated into Ga and N2 vapors at temperatures between approximately 1000 and 1200° C. The formation of Ga liquid in the powder is suppressed by the purging of an inert gas through the powder. The poser may also be isolated from a nitride containing gas provided at the growth cite. In one embodiment, the inert gas is flowed through the powder.

Abstract: A nitride crystal is characterized in that, in connection with plane spacing of arbitrary specific parallel crystal lattice planes of the nitride crystal obtained from X-ray diffraction measurement performed with variation of X-ray penetration depth from a surface of the crystal while X-ray diffraction conditions of the specific parallel crystal lattice planes are satisfied, a uniform distortion at a surface layer of the crystal represented by a value of |d1-d2|/d2 obtained from the plane spacing d1 at the X-ray penetration depth of 0.3 ?m and the plane spacing d2 at the X-ray penetration depth of 5 ?m is equal to or lower than 2.1×10?3.

Abstract: A method of growing a thin film on a substrate by pulsing vapor-phase precursors material into a reaction chamber according to the ALD method. The method comprises vaporizing at least one precursor from a source material container maintained at a vaporising temperature, repeatedly feeding pulses of the vaporized precursor via a feed line into the reaction chamber at a first pressure, and subsequently purging the reaction chamber with pulses of inactive gas fed via the feed line at a second pressure. The second pressure is maintained at the same as or a higher level than the first pressure for separating successive pulses of said vaporized precursor from each other.

Abstract: Processes for forming quantum well structures which are characterized by controllable nitride content are provided, as well as superlattice structures, optical devices and optical communication systems based thereon.

Abstract: A method which has a step of growing a thermostable-state ZnO-based single crystal on a ZnO single crystal substrate at a growth temperature that is equal to or greater than 600° C. and less than 900° C. by using a metalorganic compound containing no oxygen and water vapor based on an MOCVD method.

Abstract: An object of the invention is to calibrate an upper pyrometer for indirectly measuring a substrate temperature at the time of epitaxial growth in a comparatively short time and with accuracy to thereby improve the quality of an epitaxial substrate. After calibrating an upper pyrometer by a thermocouple mounted to a temperature calibrating susceptor, a measured value of a lower pyrometer is adjusted to a calibrated value of the upper pyrometer. Then, a correlation line between substrate temperature indirectly measured by the upper pyrometer at the time of epitaxial growth onto a sample substrate and haze of a sample substrate measured immediately after epitaxial growth is set to indirectly measure a substrate temperature by the upper pyrometer at the time of epitaxial growth onto a mass-production substrate.

Abstract: The invention relates to inter-level realignment after a stage of epitaxy on a face (31) of a substrate (30), comprising the production of at least one initial guide mark (32) on the face of the substrate, this initial guide mark being designed so as to be transferred, during epitaxy, onto the surface of the epitaxied layer (36). The initial guide mark (32) is produced in such a way that, during epitaxy, its edges create growth defects that propagate as far as the surface of the epitaxied layer (36) to provide a transferred guide mark (37) on the surface of the epitaxied layer (36) reproducing the shape of the initial guide mark (32) and in alignment with the initial guide mark.

Abstract: Process for producing silicon oxide containing thin films on a growth substrate by the ALCVD method. In the process, a vaporisable silicon compound is bonded to the growth substrate, and the bonded silicon compound is converted to silicon dioxide. The invention comprises using a silicon compound which contains at least one organic ligand and the bonded silicon compound is converted to silicon dioxide by contacting it with a vaporised, reactive oxygen source, in particular with ozone. The present invention provides a controlled process for growing controlling thin films containing SiO2, with sufficiently short reaction times.

Abstract: A method for manufacturing a silicon wafer includes a step of annealing a silicon wafer which is sliced from a silicon single crystal ingot, thereby forming a DZ layer in a first surface and in a second surface of the silicon wafer and a step of removing either a portion of the DZ layer in the first surface or a portion of the DZ layer in the second surface.

Abstract: A synthesis route to grow textured thin film of gallium nitride on amorphous quartz substrates and on single crystalline substrates such as c-sapphire and polycrystalline substrates such as pyrolytic boron nitride (PBN), alumina and quartz using the dissolution of atomic nitrogen rather than molecular nitrogen to allow for growth at subatmospheric pressure.

Abstract: Provided are a thin film transistor and method of fabricating the same, in which an amorphous silicon layer is formed on a substrate, a capping layer containing a metal catalyst having a different concentration according to its thickness is formed on the amorphous silicon layer, the capping layer is patterned to form a capping layer pattern, and the amorphous silicon layer is crystallized, such that the density and position of seeds formed at an interface between the amorphous silicon layer and the capping layer pattern is controlled, thereby improving the size and uniformity of grains, and in which polycrystalline silicon of desired size and uniformity is selectively formed at a desired position by one crystallization process, resulting in a thin film transistor having excellent and desired properties.

Abstract: A wafer having a silicon layer that is strained is used to form transistors. The silicon layer is formed by first forming a silicon germanium (SiGe) layer of at least 30 percent germanium that has relaxed strain on a donor wafer. A thin silicon layer is epitaxially grown to have tensile strain on the relaxed SiGe layer. The amount tensile strain is related to the germanium concentration. A high temperature oxide (HTO) layer is formed on the thin silicon layer by reacting dichlorosilane and nitrous oxide at a temperature of preferably between 800 and 850 degrees Celsius. A handle wafer is provided with a supporting substrate and an oxide layer that is then bonded to the HTO layer. The HTO layer, being high density, is able to hold the tensile strain of the thin silicon layer. The relaxed SiGe layer is cleaved then etched away to expose the thin silicon layer.

Abstract: The invention provides an epitaxial growth method which is a single wafer processing epitaxial growth method by which at least a single crystal substrate is placed in a reaction chamber with an upper wall having a downward convexity and an epitaxial layer is deposited on the single crystal substrate by introducing raw material gas and carrier gas into the reaction chamber through a gas feed port, in which, after any one of the radius of curvature of the upper wall of the reaction chamber and a difference between an upper end of the gas feed port and a lower end of the upper wall of the reaction chamber in the height direction or both are adjusted in accordance with the flow rate of the carrier gas which is introduced into the reaction chamber through the gas feed port, an epitaxial layer is deposited on the single crystal substrate.

Abstract: A method for manufacturing a diamond single crystal substrate, in which a single crystal is grown from a diamond single crystal serving as a seed substrate by vapor phase synthesis, said method comprising: preparing a diamond single crystal seed substrate which has a main surface whose planar orientation falls within an inclination range of not more than 8 degrees relative to a {100} plane or a {111} plane, as a seed substrate; forming a plurality of planes of different orientation which are inclined in the outer peripheral direction of the main surface relative to the main surface on one side of this seed substrate, by machining; and then growing a diamond single crystal by vapor phase synthesis.

Abstract: A manufacturing method of a group III nitride semiconductor comprising: preparing a substrate including a buffer layer; forming a first layer on the buffer layer from a group III nitride semiconductor by MOCVD while doping an anti-surfactant, wherein a thickness of the first layer is equal to or thinner than 2 ?m; forming a second layer on the first layer from a group III nitride semiconductor by MOCVD while doping at least one of surfactant and an anti-surfactant; and controlling a crystalline quality and a surface flatness of the second layer by adjusting an amount of the anti-surfactant and the surfactant doped during the formation of the second layer.

Abstract: A substrate is provided including a growth surface that is offcut relative to a plane defined by a crystallographic orientation of the substrate at an offcut angle of about 5 degrees to about 45 degrees. A thermoelectric film is epitaxially grown on the growth surface. A crystallographic orientation of the thermoelectric film may be tilted about 5 degrees to about 30 degrees relative to the growth surface. The growth surface of the substrate may also be patterned to define a plurality of mesas protruding therefrom prior to epitaxial growth of the thermoelectric film. Related methods and thermoelectric devices are also discussed.

Abstract: A patterned layer is formed by removing nanoscale passivating particle from a first plurality of nanoscale structural particles or by adding nanoscale passivating particles to the first plurality of nanoscale structural particles. Each of a second plurality of nanoscale structural particles is deposited on each of corresponding ones of the first plurality of nanoscale structural particles that is not passivated by one of the plurality of nanoscale passivating particles.

Abstract: Method of manufacturing a semiconductor device, in which on a region of silicon oxide (5) situated next to a region of monocrystalline silicon (4) at the surface (3) of a semiconductor body (1), a non-monocrystalline auxiliary layer (8) is formed. The auxiliary layer is formed in two steps. In the first step, the silicon body is heated in an atmosphere comprising a gaseous arsenic compound; in the second step it is heated in an atmosphere comprising a gaseous silicon compound instead of said arsenic compound. Thus, the regions of silicon oxide are provided with an amorphous or polycrystalline silicon seed layer in a self-aligned manner.

Abstract: Systems and methods for local synthesis of silicon nanowires and carbon nanotubes, as well as electric field assisted self-assembly of silicon nanowires and carbon nanotubes, are described. By employing localized heating in the growth of the nanowires or nanotubes, the structures can be synthesized on a device in a room temperature chamber without the device being subjected to overall heating. The method is localized and selective, and provides for a suspended microstructure to achieve the thermal requirement for vapor deposition synthesis, while the remainder of the chip or substrate remains at room temperature. Furthermore, by employing electric field assisted self-assembly techniques according to the present invention, it is not necessary to grow the nanotubes and nanowires and separately connect them to a device. Instead, the present invention provides for self-assembly of the nanotubes and nanowires on the devices themselves, thus providing for nano- to micro-integration.

Abstract: Pile ups of threading dislocations in thick graded buffer layer are reduced by enhancing dislocation gliding. During formation of a graded SiGe buffer layer, deposition of SiGe from a silicon precursor and a germanium precursor is interrupted one or more times with periods in which the flow of the silicon precursor to the substrate is stopped while the flow of the germanium precursor to the substrate is maintained.

Abstract: The invention concerns a monocrystalline coating crack-free coating of gallium nitride or mixed gallium nitride and another metal, on a substrate likely to cause extensive stresses in the coating, said substrate being coated with a buffer layer, wherein: at least a monocrystalline layer of a material having a thickness ranging between 100 and 300 nm, preferably between 200 and 250 nm, and whereof crystal lattice parameter is less than the crystal lattice parameter of the gallium nitride or of the mixed gallium nitride with another metal, is inserted in the coating of gallium nitride or mixed gallium nitride with another metal. The invention also concerns the method for preparing said coating. The invention further concerns electronic and optoelectronic devices comprising said coating.

Abstract: Apparatus and method for growing and observing the growth of epitaxial layers on a wafer. The apparatus includes: epitaxial growth apparatus; a source of light mounted to illuminate an entire surface of the wafer in the apparatus during growth of the epitaxial layer on the entire surface of the wafer; and apparatus for observing scattering of the light from the entire surface of the wafer during growth of the epitaxial layer on the entire surface of the wafer. The method includes growing the epitaxial layer on a surface of the wafer and observing scattering of the light from the entire surface of the wafer during growth of the epitaxial layer on the entire surface of the wafer. The growing process is varied in accordance with the observation. With an epitaxial layer of gallium nitride (GaN) the entire surface of the wafer is observed for balls of gallium.

Abstract: Process for producing silicon oxide containing thin films on a growth substrate by the ALCVD method. In the process, a vaporisable silicon compound is bonded to the growth substrate, and the bonded silicon compound is converted to silicon dioxide. The invention comprises using a silicon compound which contains at least one organic ligand and the bonded silicon compound is converted to silicon dioxide by contacting it with a vaporised, reactive oxygen source, in particular with ozone. The present invention provides a controlled process for growing controlling thin films containing SiO2 with sufficiently short reaction times.

Abstract: Process for producing silicon oxide containing thin films on a growth substrate by the ALCVD method. In the process, a vaporizable silicon compound is bonded to the growth substrate, and the bonded silicon compound is converted to silicon dioxide. The invention comprises using a silicon compound which contains at least one organic ligand and the bonded silicon compound is converted to silicon dioxide by contacting it with a vaporized, reactive oxygen source, in particular with ozone. The present invention provides a controlled process for growing controlling thin films containing SiO2, with sufficiently short reaction times.

Abstract: A nitride semiconductor crystal substrate is produced by forming a network mask repeating a closed loop unit shape upon an undersubstrate, growing a nitride semiconductor crystal in vapor phase, producing convex facet hills covered with facets on exposed parts ?, forming outlining concavities on mask-covered parts , not burying the facets, maintaining the convex facet hills on ? and the network concavities on , excluding dislocations in the facet hills down to the outlining concavities on , forming a defect accumulating region H on , decreasing dislocations in the facet hills and improving the facet hills to low defect density single crystal regions Z, producing a rugged nitride crystal, and slicing and polishing the nitride crystal into mirror nitride crystal wafers. After the fabrication of devices on the nitride wafer, dry-etching or wet etching of hot KOH or NaOH divides the device-carrying wafer into chips by corroding the network defect accumulating region H.

Abstract: The present invention provides free-standing heterostructures including a layer of BiFeO3 and a layer comprising a perovskite over which the BiFeO3 is epitaxially grown. The layer comprising the perovskite has been released from a substrate upon which it was originally grown. Also provided are methods for forming the free-standing heterostructures, which may include transferring the free-standing heterostructures to other host substrates.

Abstract: A method for manufacturing Group III nitride crystals with high quality is provided. By the method, a crystal raw material solution and gas containing nitrogen are introduced into a reactor vessel, which is heated, and crystals are grown in an atmosphere of pressure applied thereto. The gas is introduced from a gas supplying device to the reactor vessel through a gas inlet of the reactor vessel, and then is exhausted to the inside of a pressure-resistant vessel through a gas outlet of the reactor vessel. Since the gas is introduced directly to the reactor vessel, impurities attached to the pressure-resistant vessel and the like into the crystal growing site can be prevented. Further, the gas flows through the reactor vessel, to suppress aggregation of an evaporating alkali metal, etc., at the gas inlet and reduce flow of the metal vapor into the gas supplying device.

Abstract: A deposition station allows atomic layer deposition (ALD) of films onto a substrate. The station comprises an upper and a lower substantially flat part between which a substrate is accommodated. The parts are positioned opposite each other and parallel to the substrate during processing. At least one of the parts is provided with a plurality of gas channels that allow at least two mutually reactive reactants to be discharged out of that part to the substrate. The discharge is configured to occur in a sequence of alternating, separated pulses for ALD. In addition, each part is preferably configured to be about 1 mm or less from the substrate to minimize the volume of the reaction chamber to increase the efficiency with which gases are purged from the chamber. Also, for each reactant, the upper and lower parts are preferably kept at a temperature outside of the window in which optimal ALD of that reactant occurs, thereby minimizing deposition of that reactant on deposition station surfaces.

Abstract: A method for producing a single crystals by preferential epitaxial growth of {100} face, comprising the steps of (1) growing the crystal on a single crystal {100} substrate; (2) forming on the side of the grown crystal a surface parallel to a {100} face different from the {100}face in the growth direction, and (3) growing the crystal on the formed {100} surface; and the steps (2) and (3) being performed once or more than once. A method for producing a single-crystal diamond using a metallic holder for the single-crystal diamond having a crystal holding portion which is raised above an outer peripheral portion of the holder, is part from the outer peripheral portion of the holder, and has a recessed shape. The methods enable the production of a large single-crystal diamond in a comparatively short time at low cost.

Abstract: Embodiments of the invention contemplate the formation of a low cost solar cell using a novel electroplating apparatus and method to form a metal contact structure having metal lines formed using an electrochemical plating process. The apparatus and methods described herein remove the need to perform the often costly processing steps of performing a mask preparation and formation steps, such as screen printing, lithographic steps and inkjet printing steps, to form a contact structure. The resistance of interconnects formed in a solar cell device greatly affects the efficiency of the solar cell. It is thus desirable to form a solar cell device that has a low resistance connection that is reliable and cost effective. Therefore, one or more embodiments of the invention described herein are adapted to form a low cost and reliable interconnecting layer using an electrochemical plating process containing a common metal, such as copper.