With Workpiece Support Patents (Class 156/345.51)
  • Patent number: 8920665
    Abstract: In a plasma processing apparatus including a processing room disposed in a vacuum vessel, a sample stage located in the processing room, a dielectric film disposed on the top surface of the sample stage and serving as the sample mounting surface of the sample stage, and a plurality of electrodes embedded in the dielectric film for chucking the sample to the dielectric film when supplied with electric power, a part of the sample is chucked by supplying electric power to at least one of the electrodes while the sample is mounted on the sample stage; the sample is heated up to a predetermined temperature; a larger part of the sample is chucked by supplying electric power to the other of the electrodes; and the processing of the sample using the plasma is initiated.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: December 30, 2014
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Kohei Sato, Kazunori Nakamoto, Yutaka Omoto
  • Publication number: 20140367047
    Abstract: An edge ring assembly used in a plasma etching chamber includes a dielectric coupling ring and a conductive edge ring. In one embodiment, the dielectric coupling ring has an annular projection extending axially upward from its inner periphery. The dielectric coupling ring is adapted to surround a substrate support in a plasma etching chamber. The conductive edge ring is adapted to surround the annular projection of the dielectric coupling ring. A substrate supported on the substrate support overhangs the substrate support and overlies the annular projection of the dielectric coupling ring and a portion of the conductive edge ring. In another embodiment, the dielectric coupling ring has a rectangular cross section. The dielectric coupling ring and the conductive edge ring are adapted to surround a substrate support in a plasma etching chamber. A substrate supported on the substrate support overhangs the substrate support and overlies a portion of the conductive edge ring.
    Type: Application
    Filed: August 27, 2014
    Publication date: December 18, 2014
    Inventors: Michael S. Kang, Michael C. Kellogg, Miguel A. Saldana, Travis R. Taylor
  • Patent number: 8911589
    Abstract: An edge ring assembly surrounds a substrate support surface in a plasma etching chamber. The edge ring assembly comprises an edge ring and a dielectric spacer ring. The dielectric spacer ring, which surrounds the substrate support surface and which is surrounded by the edge ring in the radial direction, is configured to insulate the edge ring from the baseplate. Incorporation of the edge ring assembly around the substrate support surface can decrease the buildup of polymer at the underside and along the edge of a substrate and increase plasma etching uniformity of the substrate.
    Type: Grant
    Filed: July 2, 2013
    Date of Patent: December 16, 2014
    Assignee: Lam Research Corporation
    Inventors: Jeremy Chang, Andreas Fischer, Babak Kadkhodayan
  • Patent number: 8911554
    Abstract: A method and apparatus for processing multiple substrates simultaneously is provided. Each substrate may have two major active surfaces to be processed. The apparatus has a substrate handling module and a substrate processing module. The substrate handling module has a loader assembly, a flipper assembly, and a factory interface. Substrates are disposed on a substrate carrier at the loader assembly. The flipper assembly is used to flip all the substrates on a substrate carrier in the event two-sided processing is required. The factory interface positions substrate carriers holding substrates for entry into and exit from the substrate processing module. The substrate processing module comprises a load-lock, a transfer chamber, and a plurality of processing chambers, each configured to process multiple substrates disposed on a substrate carrier.
    Type: Grant
    Filed: January 4, 2011
    Date of Patent: December 16, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Steven Verhaverbeke, Jose Antonio Marin
  • Patent number: 8904957
    Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.
    Type: Grant
    Filed: March 4, 2013
    Date of Patent: December 9, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Akihiro Kikuchi, Satoshi Kayamori, Shinya Shima, Yuichiro Sakamoto, Kimihiro Higuchi, Kaoru Oohashi, Takehiro Ueda, Munehiro Shibuya, Tadashi Gondai
  • Patent number: 8906161
    Abstract: A tubular electrode (215) and a tubular magnet (216) are installed on an external section of a processing furnace (202) for an MMT device. A susceptor (217) for holding a wafer (200) is installed inside a processing chamber (201) of the processing furnace. A gate valve (244) for conveying the wafer into and out of the processing chamber; and a shower head (236) for spraying processing gas in a shower onto the wafer, are installed inside the processing furnace. A high frequency electrode (2) and a heater (3) are installed inside the susceptor (217) with a clearance between them and the walls forming the space. The clearances formed between the walls forming the space in the susceptor and the high frequency electrode and the heater prevent damage to the high frequency electrode and the heater even if a thermal expansion differential occurs between the high frequency electrode, the heater and the susceptor.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: December 9, 2014
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Katsuhisa Kasanami, Toshimitsu Miyata, Mitsunori Ishisaka
  • Patent number: 8894768
    Abstract: A substrate processing apparatus that simultaneously forms thin films on a plurality of substrates and performs heat treatment includes: a plurality of substrate holders, each including a substrate support that supports a substrate and a first gas pipe having one or a plurality of injection holes; a boat where the plurality of substrate holders are stacked and including a second gas pipe connected with the first gas pipe of each of the substrate holders; a process chamber providing a space in which the substrates stacked in the boat are processed; a conveying unit that carries the boat into/out of the process chamber; a first heating unit disposed outside the process chamber; and a gas supply unit including a third gas pipe connected with the second gas pipe and supplying a heated or cooled gas into the second gas pipe.
    Type: Grant
    Filed: January 6, 2011
    Date of Patent: November 25, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon Park, Ki-Yong Lee, Jin-Wook Seo, Min-Jae Jeong, Jong-Won Hong, Heung-Yeol Na, Tae-Hoon Yang, Yun-Mo Chung, Eu-Gene Kang, Seok-Rak Chang, Dong-Hyun Lee, Kil-Won Lee, Jong-Ryuk Park, Bo-Kyung Choi, Won-Bong Baek, Ivan Maidanchuk, Byung-Soo So, Jae-Wan Jung
  • Patent number: 8894805
    Abstract: A plasma reactor employs an e-beam source to generate plasma, and the e-beam source has a configurable magnetic shield.
    Type: Grant
    Filed: August 27, 2012
    Date of Patent: November 25, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Kallol Bera, Shahid Rauf, Leonid Dorf, Kenneth S. Collins, Ajit Balakrishna, Gary Leray
  • Patent number: 8894806
    Abstract: A plasma processing apparatus includes a vacuum evacuable processing chamber; a lower electrode for mounting a target substrate in the processing chamber; a focus ring attached to the lower electrode to cover at least a portion of a peripheral portion of the lower electrode; an upper electrode disposed to face the lower electrode in parallel in the processing chamber; a processing gas supply unit for supplying a processing gas to a processing space; and a radio frequency (RF) power supply for outputting an RF power. Further, the plasma processing apparatus includes a plasma generating RF power supply section for supplying the RF power to a first load for generating a plasma of the processing gas; and a focus ring heating RF power supply section for supplying the RF power to a second load for heating the focus ring.
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: November 25, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Chishio Koshimizu, Yohei Yamazawa
  • Patent number: 8888919
    Abstract: A wafer carrier includes a body defining a central axis, a generally planar top surface perpendicular to the central axis, and pockets recessed below the top surface for receiving wafers. The body can include a lip projecting upwardly around the periphery of the top surface. The lip can define a lip surface sloping upwardly from the planar top surface in a radially outward direction away from the central axis. The body can be adapted for mounting on a spindle of a processing apparatus so that the central axis of the body is coaxial with the spindle. The lip can improve the pattern of gas flow over the top surface of the wafer carrier.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: November 18, 2014
    Assignee: Veeco Instruments Inc.
    Inventors: Bojan Mitrovic, Joshua Mangum, William E. Quinn
  • Publication number: 20140335698
    Abstract: A component of a plasma processing chamber having a protective liquid layer on a plasma exposed surface of the component. The protective liquid layer can be replenished by supplying a liquid to a liquid channel and delivering the liquid through liquid feed passages in the component. The component can be an edge ring which surrounds a semiconductor substrate supported on a substrate support in a plasma processing apparatus wherein plasma is generated and used to process the semiconductor substrate. Alternatively, the protective liquid layer can be cured or cooled sufficiently to form a solid protective layer.
    Type: Application
    Filed: May 7, 2013
    Publication date: November 13, 2014
    Applicant: Lam Research Corporation
    Inventors: Harmeet Singh, Thorsten Lill
  • Publication number: 20140332497
    Abstract: The plasma processing apparatus is provided with a plasma source 13 which generates plasma inside a chamber 11, a stage 16 which is provided inside the chamber 11 and places a carrier 5 thereon, a cover 31 which is arranged above the stage 16 to cover a holding sheet 6 and a frame 7 and has a window 33 which is formed to penetrate the cover 31 in the thickness direction, and a drive mechanism 38 which changes the position of the cover 31 relative to the stage 16 between a first position and a second position. The second position does not allow the cover 31 to make contact with the holding sheet 6, the frame 7 and a substrate 2. The cover 31 includes at least a ceiling surface 36b which extends in parallel to the upper face of the frame 7 and an inclined surface 36c which is inclined to gradually come close to the upper face of the holding sheet 6 exposed at the inner diameter side of the frame 7.
    Type: Application
    Filed: April 23, 2014
    Publication date: November 13, 2014
    Applicant: Panasonic Corporation
    Inventors: Nobuhiro NISHIZAKI, Atsushi HARIKAI, Tetsuhiro IWAI, Mitsuru HIROSHIMA
  • Patent number: 8882923
    Abstract: A substrate processing apparatus includes: a process chamber having an object to be heated therein and configured to process a plurality of substrates; a substrate holder configured to hold the substrates with an interval therebetween in a vertical direction in the process chamber; a first heat exchange unit supporting the substrate holder from a lower side thereof in the process chamber and configured to perform a heat exchange with a gas in the process chamber; a second heat exchange unit provided in the process chamber, the second heat exchange unit being horizontally spaced apart from the first heat exchange unit with a gap therebetween and being configured to perform a heat exchange with the gas in the process chamber; and an induction heating unit configured to subject the object to be heated to an induction heating from an outer side of the object to be heated.
    Type: Grant
    Filed: October 24, 2012
    Date of Patent: November 11, 2014
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Shuhei Saido, Takatomo Yamaguchi, Daisuke Hara
  • Patent number: 8876976
    Abstract: Disclosed is a chemical vapor deposition apparatus for equalizing a heating temperature, which maintains the heating temperature of a heater provided therein uniform not only on the lower surface of the heater but also on the upper surface thereof, so that a thin film having a uniform thickness is deposited on a wafer. In order to maintain the heating temperature of the heater of the chemical vapor deposition apparatus uniform, the chemical vapor deposition apparatus includes a thermal insulation reflecting plate for reflecting heat from the lower surface of the heater and a heat dissipation member disposed between the thermal insulation reflecting plate and the heater to be in direct contact with the area of the heater having a high temperature, or includes a heat dissipation member mounted underneath the area of the heater having a high temperature.
    Type: Grant
    Filed: November 1, 2007
    Date of Patent: November 4, 2014
    Assignee: Eugene Technology Co., Ltd.
    Inventor: Pyung-yong Um
  • Patent number: 8869376
    Abstract: A substrate mounting table includes a plate shaped member provided with a mounting surface for mounting a substrate thereon, a plurality of gas injection openings opened on the mounting surface to supply a gas toward the mounting surface, and a gas supply channel for supplying the gas through the gas injection openings; and a thermally sprayed ceramic layer covering the mounting surface. At least inner wall portions of the gas supply channel are formed in curved surface shapes, the inner wall portions facing the gas injection openings.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: October 28, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Takehiro Ueda, Yoshiyuki Kobayashi, Kaoru Oohashi
  • Patent number: 8869742
    Abstract: An electrode is exposed to a plasma generation volume and is defined to transmit radiofrequency power to the plasma generation volume, and includes an upper surface for holding a substrate in exposure to the plasma generation volume. A gas distribution unit is disposed above the plasma generation volume and in a substantially parallel orientation to the electrode. The gas distribution unit includes an arrangement of gas supply ports for directing an input flow of a plasma process gas into the plasma generation volume in a direction substantially perpendicular to the upper surface of the electrode. The gas distribution unit also includes an arrangement of through-holes that each extend through the gas distribution unit to fluidly connect the plasma generation volume to an exhaust region. Each of the through-holes directs an exhaust flow from the plasma generation volume in a direction substantially perpendicular to the upper surface of the electrode.
    Type: Grant
    Filed: August 4, 2010
    Date of Patent: October 28, 2014
    Assignee: Lam Research Corporation
    Inventors: Rajinder Dhindsa, Alexei Marakhatnov, Andrew D. Bailey, III
  • Patent number: 8869741
    Abstract: A plasma processing system having a plasma processing chamber configured for processing a substrate is provided. The plasma processing system includes at least an upper electrode and a lower electrode for processing the substrate. The substrate is disposed on the lower electrode during plasma processing, where the upper electrode and the substrate forms a first gap. The plasma processing system also includes an upper electrode peripheral extension (UE-PE). The UE-PE is mechanically coupled to a periphery of the upper electrode, where the UE-PE is configured to be non-coplanar with the upper electrode. The plasma processing system further includes a cover ring. The cover ring is configured to concentrically surround the lower electrode, where the UE-PE and the cover ring forms a second gap.
    Type: Grant
    Filed: February 10, 2009
    Date of Patent: October 28, 2014
    Assignee: Lam Research Corporation
    Inventors: Andreas Fischer, Eric Hudson
  • Patent number: 8874258
    Abstract: A method of transporting a substrate with a substrate support, the method includes defining a frictional breakaway force between the substrate and the substrate support in a horizontal plane, moving the substrate in the horizontal plane along a horizontal trajectory, moving the substrate in a vertical direction along a vertical trajectory simultaneously while moving the substrate in the horizontal plane, and wherein the horizontal trajectory is determined based on the acceleration profile of the vertical trajectory and wherein the horizontal trajectory prevents the moving of the substrate from overcoming the coefficient of friction in the horizontal plane.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: October 28, 2014
    Assignee: Persimmon Technologies Corporation
    Inventor: Martin Hosek
  • Publication number: 20140311676
    Abstract: A substrate mounting table (94) is equipped with a mounting table (2), an electrostatic chuck (6), and a bevel covering (5). The electrostatic chuck (6) has a supporting surface (6e) which is in contact with the whole of the rear surface of a wafer (W). The annular bevel covering (5) has an outer diameter (DA) which is greater than that of the supporting surface (6e), and an inner diameter (DI) which is smaller than that of the wafer (W). The bevel covering (5) is disposed such that, when viewed from the direction orthogonal to the supporting surface (6e), the bevel covering (5) surrounds the periphery of the wafer (W) supported on the supporting surface (6e).
    Type: Application
    Filed: January 15, 2013
    Publication date: October 23, 2014
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hideyuki Hatoh, Shigeki Doba, Shinya Yamamoto, Satoshi YAMADA, Hiroto Mori, Kenji Ando
  • Patent number: 8858716
    Abstract: In a vacuum processing apparatus, a substrate chuck mechanism member is attached to a substrate holder provided in a vacuum processing chamber, includes a shaft member, first and second coil springs that are provided at the two ends, respectively, of the shaft member, and a substrate chuck plate provided at the end of the shaft member, and is additionally attached to the substrate holder using the substrate chuck plate by elastic biasing of the first coil spring. The holding state of the substrate on the substrate holder is changed by the expansion/contraction actions of the first and second coil springs in accordance with the reciprocal movement of the substrate holder.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: October 14, 2014
    Assignee: Canon Anelva Corporation
    Inventors: Fumiaki Hoshino, Hajime Hiraiwa, Katsuhiko Miura
  • Patent number: 8858715
    Abstract: The invention relates to a deposition device for comprising a processing space with a substrate support disposed therein, as well as several lift pins (50), which can be moved into and out of the plane of the substrate support to assist in introducing a semiconductor substrate into the processing space and removing it therefrom. The device is characterized in that the contact surface (52) of the lift pin (50) that is to be brought into contact with the semiconductor substrate and/or the substrate support is provided with a material layer (54) which has a lower hardness than the semiconductor substrate and/or the substrate support. This eliminates the risk of damage being caused to the substrate and/or to the substrate support as a result of said substrate shifting undesirably upon being lifted from and lowered onto the substrate support (susceptor). Thus there is no risk of scratches being formed and of particles being released, which might adversely affect the semiconductor manufacturing process.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: October 14, 2014
    Assignee: XYCarb Ceramics B.V.
    Inventors: Marcus Gerardus Van Munster, Charles Petronella Marie Buijs, Age Leijenaar
  • Publication number: 20140302629
    Abstract: A manufacturing method includes a step of forming an impurity diffusion layer by diffusing an impurity element in a surface of a silicon-based substrate; and an etching step of removing the impurity diffusion layer in at least a portion of a first-surface side of the silicon-based substrate, wherein the etching step includes an etching-fluid supplying step of, on the first-surface side, supplying an etching fluid that flows to an outer edge portion of the silicon-based substrate from a supply position, and an air supplying step of, on a second-surface side, which is opposite to the first-surface side, of the silicon-based substrate, supplying air in a same direction as the etching fluid in accordance with supply of the etching fluid at the etching-fluid supplying step.
    Type: Application
    Filed: February 1, 2012
    Publication date: October 9, 2014
    Applicant: Mitsubish Electric Corporation
    Inventor: Satoshi Hamamoto
  • Publication number: 20140302681
    Abstract: The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid may have slots of a particular aspect ratio which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber. The lower sub-chamber plasma has a lower electron density, lower effective electron temperature, and higher negative ion:positive ion ratio as compared to the upper sub-chamber plasma. The disclosed embodiments may result in an etching process having good center to edge uniformity, selectivity, profile angle, and Iso/Dense loading.
    Type: Application
    Filed: November 15, 2013
    Publication date: October 9, 2014
    Applicant: Lam Research Corporation
    Inventors: Alex Paterson, Harmeet Singh, Richard A. Marsh, Thorsten Lill, Vahid Vahedi, Ying Wu, Saravanapriyan Sriraman
  • Patent number: 8852348
    Abstract: A substrate heat exchange pedestal comprises: (i) a support structure having a contact surface comprising a coating of a diamond-like material, and (ii) a heat exchanger in the support structure, the heat exchanger capable of heating or cooling a substrate.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: October 7, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Vijay D Parkhe, Kurt J Ahmann, Matthew C Tsai, Steve Sansoni
  • Patent number: 8852349
    Abstract: According to one aspect of the invention, an apparatus for reducing auto-doping of the front side of a substrate and reducing defects on the backside of the substrate during an epitaxial deposition process for forming an epitaxial layer on the front side of the substrate comprising: a means for forming a wafer gap region between the backside of the substrate and a susceptor plate, having an adjustable thickness; a means for ventilating auto-dopants out of the wafer gap region with a flow of inert gas, while inhibiting or prohibiting the flow of inert gas over the front side of the substrate; and a means for flowing reactant gases over the surface of the front side of the substrate, while inhibiting or prohibiting the flow of reactant gases near the surface of the backside of the substrate.
    Type: Grant
    Filed: September 15, 2006
    Date of Patent: October 7, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Juan Chacin, Roger Anderson, Kailash Patalay, Craig Metzner
  • Patent number: 8851133
    Abstract: Provided is an apparatus and a method of holding a device. The apparatus includes a wafer chuck having first and second holes that extend therethrough, and a pressure control structure that can independently and selectively vary a fluid pressure in each of the first and second holes between pressures above and below an ambient pressure. The method includes providing a wafer chuck having first and second holes that extend therethrough, and independently and selectively varying a fluid pressure in each of the first and second holes between pressures above and below an ambient pressure.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: October 7, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Martin Liu, Chung-Yi Yu, Che Ying Hsu, Yeur-Luen Tu, Da-Hsiang Chou, Chia-Shiung Tsai
  • Publication number: 20140295671
    Abstract: A plasma processing apparatus is provided which includes a processing chamber disposed in a vacuum container, in a decompressed inside of which plasma is formed, a sample stage disposed in a lower part of the processing chamber, on a top surface of which a sample is mounted, a dielectric film made of a dielectric that forms a mounting surface on which the sample is mounted, and electrodes arranged inside the dielectric film and supplied with power for chucking and holding the sample onto the dielectric film, and when the sample is mounted on the sample stage, the sample is kept mounted on the sample stage until a sample temperature becomes a predetermined temperature or until a predetermined time elapses, and power is then supplied to the electrodes to chuck the sample to the sample stage and then start processing on the sample using the plasma.
    Type: Application
    Filed: February 19, 2014
    Publication date: October 2, 2014
    Inventors: Kohei Sato, Yuya Mizobe, Tomohiro Ohashi
  • Publication number: 20140290862
    Abstract: A power supply device supplies power to a substrate holder having a plurality of electrodes. The device includes a first fixed conductive member, a second fixed conductive member, a fixed insulating member fixed to an insulating housing portion and configured to insulate the first fixed conductive member from the second fixed conductive member, a first rotation conductive member, a second rotation conductive member, a rotation insulating member fixed to an insulating column portion and configured to insulate the first rotation conductive member from the second rotation conductive member, a first power supply member configured to supply a first voltage to the substrate holder via the first rotation conductive member and the first fixed conductive member, and a second power supply member configured to supply a second voltage to the substrate holder via the second rotation conductive member and the second fixed conductive member.
    Type: Application
    Filed: June 12, 2014
    Publication date: October 2, 2014
    Inventor: KYOSUKE SUGI
  • Patent number: 8845853
    Abstract: A substrate processing apparatus that can improve the uniformity of plasma processing carried out on a wafer. The wafer is housed in a chamber of the substrate processing apparatus and subjected to plasma processing using plasma produced in the processing chamber. A temperature control mechanism jets a high-temperature gas toward at least part of an annular focus ring facing the plasma.
    Type: Grant
    Filed: March 5, 2008
    Date of Patent: September 30, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Jun Yamawaku, Tsuyoshi Moriya
  • Patent number: 8845856
    Abstract: An edge ring assembly used in a plasma etching chamber includes a dielectric coupling ring and a conductive edge ring. In one embodiment, the dielectric coupling ring has an annular projection extending axially upward from its inner periphery. The dielectric coupling ring is adapted to surround a substrate support in a plasma etching chamber. The conductive edge ring is adapted to surround the annular projection of the dielectric coupling ring. A substrate supported on the substrate support overhangs the substrate support and overlies the annular projection of the dielectric coupling ring and a portion of the conductive edge ring. In another embodiment, the dielectric coupling ring has a rectangular cross section. The dielectric coupling ring and the conductive edge ring are adapted to surround a substrate support in a plasma etching chamber. A substrate supported on the substrate support overhangs the substrate support and overlies a portion of the conductive edge ring.
    Type: Grant
    Filed: December 1, 2010
    Date of Patent: September 30, 2014
    Assignee: Lam Research Corporation
    Inventors: Michael S. Kang, Michael C. Kellogg, Migùel A. Saldana, Travis R. Taylor
  • Patent number: 8845857
    Abstract: A substrate processing apparatus includes a vacuum container, a rotary table to rotate in the vacuum container, a substrate placement member mounted on the rotary table in a detachable manner, the substrate placement member and the rotary table together providing a recess in which a substrate is placed on an upper side of the rotary table, and the substrate placement member constituting a bottom surface in the recess on which the substrate is placed, a position regulating unit provided at least one of the rotary table and the substrate placement member to regulate a movement of the substrate caused by a centrifugal force during rotation of the rotary table, a reactant gas supply unit to supply reactant gas to the upper side of the rotary table, and a vacuum exhaust unit to exhaust the vacuum container.
    Type: Grant
    Filed: November 29, 2010
    Date of Patent: September 30, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Yukio Ohizumi, Manabu Honma
  • Patent number: 8840754
    Abstract: An apparatus for electrostatic chucking and dechucking of a semiconductor wafer includes an electrostatic chuck with a number of zones. Each zone includes one or more polar regions around a lift pin that contacts a bottom surface of the semiconductor wafer. The apparatus also includes one or more controllers that control the lift pins and one or more controllers that control the polar regions. The controller for the lift pins receives data from one or more sensors and uses the data to adjust the upward force of the lift pins. Likewise, the controller for the polar regions receives data from the sensors and uses the data to adjust the voltage in the polar regions.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: September 23, 2014
    Assignee: Lam Research Corporation
    Inventor: Jennifer Fangli Hao
  • Patent number: 8840726
    Abstract: An apparatus 101 for depositing a thin-film onto a surface of a substrate 113 using precursor gases G1, G2 is disclosed. The apparatus 101 comprises i) a supporting device 111 for holding the substrate 113; and ii) a spinner 105 positioned adjacent to the supporting device 111. Specifically, the spinner 105 includes a hub 106 for connecting to a motor, and one or more blades 201 connected to the hub 106. In particular, the one or more blades 201 are operative to rotate around the hub 106 on a plane to drive a fluid flow of the precursor gases G1, G2, so as to distribute the precursor gases G1, G2 across the surface of the substrate 113.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: September 23, 2014
    Assignee: ASM Technology Singapore Pte Ltd
    Inventors: Zilan Li, Teng Hock Kuah, Jiapei Ding, Ravindra Raghavendra
  • Publication number: 20140263177
    Abstract: A substrate support apparatus for a plasma processing system includes a layer of dielectric material having a top surface and a bottom surface. The top surface is defined to support a substrate in exposure to a plasma. The substrate support apparatus also includes a number of optical fibers each having a first end and a second end. The first end of each optical fiber is defined to receive photons from a photon source. The second end of each optical fiber is oriented to project photons received from the photon source onto the bottom surface of the layer of dielectric material.
    Type: Application
    Filed: March 29, 2013
    Publication date: September 18, 2014
    Applicant: Lam Research Corporation
    Inventors: Henry Povolny, Rajinder Dhindsa
  • Publication number: 20140262038
    Abstract: Systems, chambers, and processes are provided for controlling process defects caused by moisture contamination. The systems may provide configurations for chambers to perform multiple operations in a vacuum or controlled environment. The chambers may include configurations to provide additional processing capabilities in combination chamber designs. The methods may provide for the limiting, prevention, and correction of aging defects that may be caused as a result of etching processes performed by system tools.
    Type: Application
    Filed: April 7, 2014
    Publication date: September 18, 2014
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Anchuan Wang, Xinglong Chen, Zihui Li, Hiroshi Hamana, Zhijun Chen, Ching-Mei Hsu, Jiayin Huang, Nitin K. Ingle, Dmitry Lubomirsky, Shankar Venkataraman, Randhir Thakur
  • Publication number: 20140263179
    Abstract: A system includes a tuning element comprising a shaft and a tuning stub. The tuning stub includes a surface with a center point. The shaft is connected to the surface of the tuning stub at a location that is offset from the center point. A waveguide includes an opening into an inner portion of the waveguide. The shaft passes through the opening and the tuning stub is arranged in the inner portion of the waveguide. A first actuator selectively rotates the shaft.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Applicant: Lam Research Corporation
    Inventors: Carlo Waldfried, Orlando Escorcia, William Hansen
  • Publication number: 20140262044
    Abstract: Embodiments of the present invention generally relate to an apparatus for processing substrates having improved magnetic shielding. One embodiment of the present invention provides a plasma processing chamber having an RF match, a plasma source and a plasma region defined between a chamber ceiling and a substrate support. At least one of the RF match, plasma source and plasma region is shielded from any external magnetic field with a shielding material that has a relative magnetic permeability ranging from about 20,000 to about 200,000. As a result, the inherent process non-uniformities of the hardware may be reduced effectively without the overlaid non-uniformities from external factors such as earth's geomagnetic field.
    Type: Application
    Filed: March 4, 2014
    Publication date: September 18, 2014
    Inventors: IMAD YOUSIF, SAMER BANNA, WAHEB BISHARA, ALVARO GARCIA DE GORORDO
  • Patent number: 8834674
    Abstract: According to one embodiment, a plasma etching apparatus includes an electrode to which a high-frequency voltage is applied, having an upper surface along which a processing target substrate is to be placed, and having an inclined side, and an electrode cover provided along the side of the electrode.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: September 16, 2014
    Assignees: Kabushiki Kaisha Toshiba, Shibaura Mechatronics Corporation
    Inventors: Takeharu Motokawa, Hidehito Azumano
  • Publication number: 20140251540
    Abstract: Provided is a substrate processing apparatus including a chamber provided with a reaction space and formed with an exhaustion opening in a center of a bottom, a substrate supporter provided in the chamber and supporting a substrate, a gas injection assembly provided to be opposite to the substrate supporter, injecting a processing gas, and generating plasma thereof, and an exhauster connected to the exhaustion opening and provided below the chamber to exhaust an inside of the chamber, in which the substrate supporter includes a substrate support supporting the substrate and a plurality of supporting posts supporting an outside of the substrate support disposing the exhausting opening therebetween.
    Type: Application
    Filed: March 11, 2014
    Publication date: September 11, 2014
    Applicant: CHARM ENGINEERING CO., LTD.
    Inventors: Young-Soo SEO, Young-Ki HAN, Jun-Hyeok LEE, Kyu-Sang LEE
  • Publication number: 20140251542
    Abstract: In one embodiment, a wafer susceptor is formed to have portion of the susceptor that is positioned between a wafer pocket and an outside edge of the susceptor to have a non-uniform and/or a non-planar surface. In another embodiment, the non-uniform and/or non-planar surface includes one of a recess into the surface or a protrusion extending away from the surface.
    Type: Application
    Filed: March 8, 2013
    Publication date: September 11, 2014
    Inventors: John Michael Parsey, Jr., Hocine-Bouzid Ziad
  • Patent number: 8828257
    Abstract: In a plasma processing apparatus including a processing chamber in a vacuum container to form plasma in the processing chamber in which pressure is reduced, a sample stage in lower part of inside of the processing chamber and having an upper surface on which a wafer to be processed by plasma is put, a plurality of pins in the sample stage to be moved in vertical direction so that the pins abut against rear side of the wafer to move the wafer up and down over the upper surface of the sample stage, and a plurality of openings formed in the upper surface of the sample stage so that the pins are moved in the openings, gas is fed from supply ports communicating with the openings into the processing chamber through the openings when the wafer is not put on the upper surface of the sample stage.
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: September 9, 2014
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Hiroho Kitada, Kazunori Nakamoto, Yosuke Sakai
  • Patent number: 8815047
    Abstract: A plasma chemical reactor includes a chamber for providing a plasma reaction space, and a cathode assembly coupled at one side to a wall surface of the chamber and supporting a substrate at the other side such that the substrate is positioned at a center inside the chamber, and installed to enable height adjustment such that the substrate can maintain a horizontal state.
    Type: Grant
    Filed: October 20, 2008
    Date of Patent: August 26, 2014
    Assignee: DMS Co., Ltd.
    Inventors: Hwankook Chae, Dongseok Lee, Heeseok Moon, Kunjoo Park, Keehyun Kim, Weonmook Lee
  • Publication number: 20140231389
    Abstract: At a first timing after mounting a semiconductor wafer W on an electrostatic chuck 38, a susceptor 12 is switched from an electrically grounded state into a floated state. From a second timing after the first timing, a second high frequency power HF for plasma generation is applied to the susceptor 12, and a processing gas is excited into plasma in a chamber 10. From a third timing after the second timing, a first high frequency power LF for ion attraction is applied to the susceptor 12, and a self-bias (?Vdc) is generated. From a fourth timing close to the third timing, a negative second DC voltage ?BDC corresponding to the self-bias (?Vdc) is applied to the susceptor 12. From the fifth timing after the fourth timing, a positive first DC voltage ADC is applied to an inner electrode 42 of the electrostatic chuck 38.
    Type: Application
    Filed: February 19, 2014
    Publication date: August 21, 2014
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Kohichi Nagami, Norikazu Yamada, Tadashi Gondai, Kouichi Yoshida
  • Publication number: 20140231019
    Abstract: A susceptor 10 includes a ceramic substrate 20 having a wafer-placing surface 20a; a first circular RF electrode 31 buried in the ceramic substrate 20; and a second circular RF electrode 32 buried in the ceramic substrate 20 at a depth different from the depth of the first RF electrode 31. The second RF electrode 32 has a larger diameter than the first RF electrode 31. The second RF electrode 32 has a plurality of holes with an opening area of 9.42 to 25.13 mm2 distributed in a portion overlapping the first RF electrode 31 in a plan view of the ceramic substrate 20. The electrode width between the holes is 3 to 7 mm.
    Type: Application
    Filed: April 28, 2014
    Publication date: August 21, 2014
    Applicant: NGK Insulators, Ltd.
    Inventor: Noboru KAJIHARA
  • Publication number: 20140231018
    Abstract: In one aspect there is provided a plasma processing apparatus including a substrate placing unit configured to be placed a substrate to be processed, and an upper electrode opposed to the substrate placing unit, wherein an outer portion of a main surface of the upper electrode opposed to the substrate placing unit has a mirror surface.
    Type: Application
    Filed: February 14, 2014
    Publication date: August 21, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yoshifumi AOKI, Makoto SAITO, Hideo ETO
  • Publication number: 20140224427
    Abstract: A dry etching apparatus according to an aspect of the present invention is provided with a stage on which a substrate including a resist mask on an outermost layer thereof is mounted; a clamp for holding down the substrate from above the resist mask to fix the substrate on the stage; a chamber within which the stage and the clamp are housed; an exhaust device which evacuates the chamber; a process gas supply device which supplies a process gas into the chamber; and a power supply for supplying electrical power used to generate plasma within the chamber, wherein the clamp has an annular structure for covering an entire outer circumference and side surface of the substrate, and an antiadhesion layer composed of an inorganic film for preventing an adhesion of a resist material is formed on the contact surface side of the clamp in contact with the substrate.
    Type: Application
    Filed: February 14, 2014
    Publication date: August 14, 2014
    Applicant: FUJIFILM CORPORATION
    Inventor: Shuji TAKAHASHI
  • Publication number: 20140224426
    Abstract: A substrate support unit of an etching process chamber includes a substrate support portion configured to support a substrate, a cathode under the substrate support portion, the cathode including an upper surface portion under the substrate support portion, the upper surface portion being smaller than a size of the substrate, and a step portion positioned a step downward from an edge portion of the upper surface portion, and a focus ring at an edge portion of the substrate, the focus ring being on the step portion and encompassing a side wall of the step portion and an edge portion of the substrate, the focus ring being configured to make a uniform distribution of an electric field on the substrate.
    Type: Application
    Filed: January 30, 2014
    Publication date: August 14, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tae Gon KIM, Kyung Hyun HAN, Yun Kwang JEON
  • Patent number: 8795435
    Abstract: In accordance with the embodiment of the present invention, there is provided a susceptor which includes an annular first susceptor portion for supporting the peripheral portion of a silicon wafer and further includes a second susceptor portion provided in contact with the peripheral portion of the first susceptor portion and covering the opening of the first susceptor portion. The second susceptor portion is disposed so that, when the silicon wafer is supported on the first susceptor portion, a gap of a predetermined size is formed between the silicon wafer and the second susceptor portion, and so that another gap of a size substantially equal to the predetermined size and directly connected to the above gap is formed between the first susceptor portion and the second susceptor portion.
    Type: Grant
    Filed: July 1, 2010
    Date of Patent: August 5, 2014
    Assignees: Kabushiki Kaisha Toshiba, NuFlare Technology, Inc.
    Inventors: Shinya Higashi, Hironobu Hirata
  • Publication number: 20140213055
    Abstract: A semiconductor manufacturing device includes a stage, a plurality of pins, and a driving unit. The stage includes a mounting surface. The mounting surface has a first region for mounting thereon a substrate, and a second region for mounting thereon a focus ring. The second region is provided to surround the first region. A plurality of holes is formed in the stage. The holes extend in a direction that intersects the mounting surface while passing through the boundary between the first region and the second region. The pins are provided in the respective holes. Each of the pins has a first and a second upper end surface. The second. upper end surface is provided above the first upper end surface, and is offset towards the first region with respect to the first upper end surface. The driving unit moves the pins up and down in the aforementioned direction.
    Type: Application
    Filed: August 13, 2012
    Publication date: July 31, 2014
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Shinji Himori, Yoshiyuki Kobayashi, Takehiro Kato, Etsuji Ito
  • Patent number: 8790534
    Abstract: A system and method are disclosed for the precision fabrication of Micro-Electro-Mechanical Systems (MEMS), Nano-Electro-Mechanical Systems (NEMS), Microsytems, Nanosystems, Photonics, 3-D integration, heterogeneous integration, and Nanotechology devices and structures. The disclosed system and method can also be used in any fabrication technology to increase the precision and accuracy of the devices and structures being made compared to conventional means of implementation. A platform holds and moves a substrate to be machined during machining and a plurality of lasers and/or ion beams are provided that are capable of achieving predetermined levels of machining resolution and precision and machining rates for a predetermined application. The plurality of lasers and/or ion beams comprises a plurality of the same type of laser and/or ion beam.
    Type: Grant
    Filed: May 2, 2011
    Date of Patent: July 29, 2014
    Assignee: Corporation for National Research Initiatives
    Inventor: Michael A. Huff