Abstract: The present invention provides a multilayer print circuit board having at least an inner print circuit pattern and an outer print circuit pattern which are laminated on a substrate through an insulation layer and being electrically connected to each other through a blind hole provided in the insulation layer. The insulation layer is composed of a resin insoluble in an oxidization agent and inorganic powder dispersed in the resin. The inorganic powder is soluble in the oxidization agent. The surface of insulation layer and the wall of the blind hole are roughed by the oxidization agent before the outer print circuit pattern is formed on the surface of the insulation layer by plating, whereby the inorganic powder exposed to the oxidization agent is melted therein, resulting in the roughed surface of the insulation layer and the wall of the blind hole.

Abstract: A method for producing a foil circuit board including a plurality of flexible electrically non-conductive and flexible conductive layers, which are laminated together. The non-conductive layers are positioned between the conductive layers and two of the conductive layers are the outermost surface layers of the foil circuit board. The circuit board includes flexible areas and rigid areas, and the flexible areas are provided by etching the board to remove at least part of one of the outermost surface layers and an adjacent underlying non-conductive layer.

Abstract: The present invention provides a multilayer print circuit board having at least an inner print circuit pattern and an outer print circuit pattern which are laminated on a substrate through an insulation layer and being electrically connected to each other through a blind hole provided in the insulation layer. The insulation layer is composed of a resin insoluble in an oxidization agent and inorganic powder dispersed in the resin. The inorganic powder is soluble in the oxidization agent. The surface of insulation layer and the wall of the blind hole are roughed by the oxidization agent before the outer print circuit pattern is formed on the surface of the insulation layer by plating, whereby the inorganic powder exposed to the oxidization agent is melted therein, resulting in the roughed surface of the insulation layer and the wall of the blind hole.

Abstract: A module, such as a contact module for embedding an electronic device into a credit card, smart card, identification tag or other article, comprise a pattern of metal contacts having a first and a second surface and electrically-conductive vias built up on the first surface of the metal contacts. A layer of dielectric adhesive on the first surface of the pattern of metal contacts surrounds the electrically-conductive vias except the ends thereof distal from the metal contacts. An electronic device has electrical contacts connected to the exposed ends of the conductive vias, as by wire bonds or by flip-chip type connections.

Abstract: Disclosed is a printed circuit board including a first layer having a first stacked region, a second stacked region spaced apart from the first stacked region by a selected distance, and a flexible connection part disposed between the first and second stacked regions, and extending to the first stacked region and the second stacked region with selected width and length, the flexible connection part having a conductive pattern layer for signal transmission between the first stacked region and the second stacked region; a pair of second layers disposed apart on an upper surface of each of the first and second stacked regions of the first layer and having a first signal pattern layer on both surfaces of each of the second layers, wherein the first signal pattern layer of the second layer is electrically connected to the conductive pattern of the flexible connection part, a pair of upper metal layers disposed on respective upper surfaces of the second layer, the upper metal layer interposing a first insulating ad

Abstract: The present invention provides a resin compound, which causes very little thermal stress even when a flip chip is mounted, is of low elastic modulus, and has high heat resistance enough for solder floating at 300° C., and also an adhesive film, metal-clad adhesive film, circuit board, and assembly structure using the resin compound.

Abstract: The present invention provides a rigid circuit member obtained by bending a composite laminate comprising a circuit conductor made of a metal foil interposed between plastic films having an elastic modulus of not less than 450 kg/mm2 with an adhesive, characterized in that as said plastic film there is used a polyethylene naphthalate film. The present invention also provides a circuit board adapted to be connected to a conductor on a rigid substrate, characterized in that said circuit conductor is interposed between polyethylene naphthalate films. The present invention further provides a printed circuit board, comprising a polyethylene naphthalate film having an elastic modulus of not less than 500 kg/mm2, not more than 1.5×10−5/° C., a hygroscopic expansion coefficient of not more than 1.2×10−5/%RH, a water vapor permeability of not more than 15 g/m2/mil day, a percent water absorption of not more than 2% and a melting point of not higher than 280° C.

Abstract: An interposer for interconnection between microelectronic circuit panels has contacts at its surfaces. Each contact extends from a central conductor, and has a peripheral portion adapted to contract radially inwardly toward the central conductor response to a force applied by a contact pad defining a central hole on the engaged circuit panel. Thus, when the circuit panels are compressed with the interposers, the contacts contract radially inwardly and wipe across the pads. The wiping action facilitates bonding of the contacts to the pads, as by friction welding, or by a conductive bonding material carried on the contacts themselves.

Abstract: A semiconductor package is present along with an associated method. The package comprises a substrate with a top surface and a bottom surface, the substrate having a plurality of electrically conductive vias extending from the top surface of the substrate to the bottom surface of the substrate. A semiconductor device having an active surface, the active surface having a plurality of bonding pads, is attached to the substrate by an adhesive that bas holes that align with the vias. The vias are also aligned with the bonding pads. Solder serves to electrically and mechanically couple each of the bonding pads with a corresponding via. Each of the vias, in turn, is coupled to a solder ball formed on the bottom of the substrate.

Abstract: The adhesive for electroless plating which is advantageous to ensure insulation reliabilities between lines and between layers while maintaining a practical peel strength, and the printed circuit board using the adhesive are disclosed. The adhesive is formed by dispersing cured heat-resistant resin particles soluble in acid or oxidizing agent into uncured heat-resistant resin matrix hardly soluble in acid or oxidizing agent through curing treatment, in which the heat-resistant resin particles have an average particle size of not more than 1.5 &mgr;m.

Abstract: A method for fabricating bumped semiconductor components and electronic assemblies, such as multi chip modules, is provided. The method includes forming semi cured, electrically conductive, elastomeric bumps on electrodes of a semiconductor component (e.g., die, chip scale package), or on electrodes of a mating component (e.g., PCB, MCM substrate). The bumps include an adhesive matrix material and dendritic metal particles. The adhesive matrix material is in a semi cured condition having adhesive qualities for bonding, but with a structural rigidity for supporting the dendritic particles to enable penetration of oxide layers on the electrodes. The semi cured adhesive bumps permit the bumps to be cured without the necessity of externally generated compressive forces.

Abstract: A semiconductor device having a thermoset-containing, dielectric material and methods for fabricating the same is provided. The device may take the form of a printed circuit board, an integrated circuit chip carrier, or the like. The dielectric material is a non-fibrillated, fluoropolymer matrix that has inorganic particles distributed therein and is impregnated with a thermoset material.

Abstract: Through holes formed in an electrical insulating substrate having adhesive layers on its both surfaces are filled with a conductor. Then, supporting bases having wiring layers with a predetermined pattern are laminated on both the surfaces of the electrical insulating substrate, which are then heated and pressurized. After that, the supporting bases are removed, thus obtaining a circuit board in which the wiring layers have been embedded in the adhesive layers. The conductor within the through holes are compressed sufficiently, thus forming minute via holes with high reliability.

Abstract: A package for mounting an integrated circuit chip includes a body having at least a first region, the size of the integrated circuit chip, and a second region. The first region has a first coefficient of thermal expansion (CTE), and the second region has a second, different CTE. The first region approximately matches the CTE of the integrated circuit chip mounted on the package, and the second region approximates the CTE of the printed wiring board to which the package is mounted.

Abstract: Adhesive adhesive for electroless plating ensures insulation reliabilities between lines and between layers while maintaining a practical peel strength, and a printed circuit board using the adhesive are disclosed. The adhesive is formed by dispersing cured heat-resistant resin particles soluble in acid or oxidizing agent into uncured heat-resistant resin matrix hardly soluble in acid or oxidizing agent through curing treatment, in which the heat-resistant resin particles have an average particle size of not more than 2 &mgr;m, and comprised of rough particles and fine particles.

Abstract: This invention concerns lasable bond-ply materials comprising a nonwoven reinforcing material and at least one resin material. The present invention also includes methods for using the bond-ply of this invention to manufacture high density multilayer printed wiring boards.

Abstract: A surface mounting structure is arranged to minimize a height dimension of an electronic component. A surface mount type electronic component is provided on the surface mounting structure. The surface mount type electronic component includes a piezoelectric component element including an insulating substrate, and a piezo-resonator mounted on a mounting surface of the insulating substrate. The piezoelectric component element is mounted on a printed circuit board, with the mounting surface being arranged to face a surface of the printed circuit board. A recess is formed in the printed circuit board and a portion of the piezoelectric component element is accommodated in the recess. A conductive adhesive is located on external connection electrodes provided on the mounting surface and is firmly attached to circuit patterns on the printed circuit board so that the piezoelectric component element is fixed to the printed circuit board.

Abstract: A printed circuit assembly and method of making the same utilize in one embodiment an adhesive layer including a plurality of non-conductive “gauge particles” disposed within a non-conductive adhesive. When the adhesive layer is disposed between opposing printed circuit layers (be they insulating substrates, conductive layers, or other layers), individual gauge particles are interposed or sandwiched at various points between the layers such that the diameters of the particles control the layer separation throughout overlapping areas of thereof, thereby permitting careful control over layer separation. A printed circuit assembly and method of making the same utilize in another embodiment an interlayer interconnecting technology incorporating conductive posts that are deposited on one of a pair of contact pads formed on opposing printed circuit boards and thereafter bonded to the other in the pair of contact pads during lamination.

Abstract: A method of controlling i.e., minimizing the bowing of the base of an assembly by controlling the location, thickness, and characteristics of the constituent materials used to construct the base.

Abstract: An electronic structure, and associated method of formation, in which a plated metallic layer such as a copper layer, of a plated through hole (PTH) is adhesively coupled to holefill material distributed within the PTH. The holefill material includes a resin such as an epoxy and optionally includes a particulate component such as a copper powder. The adhesive coupling is accomplished by forming an adhesion promoter film on the plated metallic layer such that the adhesion promoter film is bonded to the resin. The adhesion promoter film may include a metallic oxide layer such as layer containing cupric oxide and cuprous oxide, which could be formed from bathing the PTH in a solution of sodium chlorite. Application of a reducing solution of dimethylamine borane to the cuprous oxide layer would convert some of the cuprous oxide to cupric oxide in the metallic oxide layer.

Abstract: A flip-chip mount board includes a circuit board provided with a plurality of conductor patterns to which a plurality of bumps provided on an electronic component can be connected via a connection medium provided on the conductor patterns. The conductor pattern includes at least one wiring pattern and a connection pad, the wiring pattern serves as an interconnection, the connection pad is provided at a position corresponding to one of the bumps, the at least one wiring pattern and the connection pad are provided in an integrated manner, and a width (W1) of the connection pad is formed so as to be greater than a width (W2) of the wiring pattern (W1>W2).

Abstract: An electronic device comprising a semiconductor chip which is fixed to the mounting face of a wiring board through an adhesive and in which external terminals are electrically connected with electrode pads of the wiring board through bump electrodes. Recesses are formed in the electrode pads, and in the recesses the electrode pads and the bump electrodes are connected. The electrode pads are formed over the surface of a soft layer, and the recesses are formed by elastic deformation of the electrode pads and the soft layer.

Abstract: A wiring board having a conductor layer formed on a substrate and a connecting pad disposed in a connecting pad disposition portion provided in part of the conductor layer surface, the conductor layer having a resin inflow prevention portion which is provided adjacently to the said connecting pad disposition portion and which has a surface roughness greater than the surface roughness of the said connecting pad disposition portion, the resin inflow prevention portion being capable of overcoming the problem of prior art that an adhesive resin (resin layer) of a prepreg or an adhesive flows out onto the upper surface of the pad, due to its softening under heat and its being pressurized for bonding when a structure member such as a cover layer is bonded to the wiring board, and forms a cured resin which extremely inhibits the bonding property of a chip element onto the pad.

Abstract: A ball-grid array connector structure for an electronic package in which the ball pitch can be reduced to increase the packaging density has a plastic substrate having at least one hollow through-hole and an electrode covering the wall of the through-hole and forming an electrode pad surrounding the through-hole on each surface of the substrate. A metallic ball is joined, either directly or through a solder or a combination of a metallic bump and a solder, to the electrode pad on at least one surface of the substrate at the position of the through-hole. The connector structure can be formed either by sealing an open end of the through-hole on the side to which the ball is not joined, or increasing the pressure within the through-hole by a pressure-control mechanism, before the through-hole is blocked by reflowing the ball itself or the metallic bump or solder used to connect the ball.

Abstract: The present invention provides a new device and technique for enhancing the electrical properties of the thick metal backer/adhesive bond/ground plane interface. The enhanced electrical properties are obtained by micro-roughening a connection surface of the thick metal backer prior to forming the thick metal backer/adhesive bond/ground plane interface.

Abstract: The multilayer foil circuit board according to the invention has rigid (s) and flexible (f) areas and in the rigid areas has more foil layers than in the flexible areas. The foil circuit board according to the invention is produced so that in the intended flexible areas (f) at least on one side at least the outermost foil layer (1.2) is removed by etching. By a corresponding etching mask design, it is possible to allow the flexible areas (f) to pass continuously into the rigid areas (s) in that the removal of the layers in the marginal areas (u) is less than in the center (z) of the flexible area (f), so that there are no marginal areas which have a tendency to break. The etching of the flexible areas can be performed in the same method stage as the etching of the plated through holes through the corresponding foil layer (1.2) or in a separate etching stage.

Abstract: The present invention relates to a multilayer wiring substrate for mounting a semiconductor chip, etc. The multilayer wiring substrate is comprised of a plurality of double-sided circuit substrates, each comprised of an organic high molecular weight insulating layer and wiring conductor. An adhesive is used for laminating the double-sided circuit substrates. A Ni--Fe based alloy foil or a titanium foil is embedded within the organic high molecular weight insulating layer.

Abstract: A low dielectric constant composition with a dielectric constant of 4 or less is disclosed. The composition comprises a matrix resin and crosslinked resin particles having an average particle diameter in the range from 0.03 to 10 .mu.m, the crosslinked resin particles being prepared by the polymerization of 1-100 wt % of cross-linking monomers and 0-99 wt % of non-cross-linking monomers, having a dielectric constant of 3 or less, and having a 50 ppm or less average concentration of metal ions. The composition exhibits superior insulation properties and capable of producing an insulating material and sealing material with a low dielectric constant and low dielectric loss tangent (tan .delta.). An insulating material and a sealing material comprising this low dielectric composition and a circuit board provided with the insulating material or sealing material are also disclosed.

Abstract: An anisotropic electro-conductive adhesive layer 14 including an adhesive 15 made of a thermosetting or thermoplastic resin containing electro-conductive particles 16 dispersed therein is formed on a basic circuit board 11 carrying a first circuit pattern 12. A second circuit pattern 18 is formed on the anisotropic electro-conductive adhesive layer 14. An end of the second circuit pattern 18 is curved into the anisotropic electro-conductive adhesive layer 14 to be electrically connected with first circuit pattern 12 via the electro-conductive particles 16. Thereby, the production process can be simplified and the production cost can be reduced. Also, the micro-circuit patterns can be arranged at a high density.

Abstract: An electronic chip package is provided having a laminated substrate. The laminated substrate includes at least one conductive layer and at least one dielectric layer which is bonded to the conductive layer. The dielectric layer has a glass transition temperature T.sub.g greater than 200.degree. C. and a volumetric coefficient of thermal expansion of .ltoreq.75 ppm/.degree.C. A semiconductor device is electrically attached to the laminated substrate.

Abstract: A present invention is to provide a thin parts installation structure and their manufacturing method. There is provided a circuit on a wiring substrate, an adhesive is painted to a selected part installation position on the wiring substrate, a conductive adhesive is painted in a position where the terminal area of electronic parts contact the wiring pattern circuits. The electronic part is put in the selected position of wiring the substrate such that the terminals of the electronic parts contact the conductive adhesive prior to curing the adhesives, and followed by both the non-conductive adhesive and conductive adhesive are stiffened.

Abstract: The present invention includes electrical interconnections, methods of conducting electricity, and methods of reducing horizontal conductivity within an anisotropic conductive adhesive. In one embodiment, an electrical interconnection configured to electrically couple a first substrate and a second substrate includes: a bond pad of the first substrate having a male configuration; and a bond pad of the second substrate having a female configuration, the bond pad of the second substrate being configured to mate with the bond pad of the first substrate during electrical connection of the bond pads of the first substrate and the second substrate. A method of conducting electricity according to the present invention includes providing first and second bond pads individually defining a planar dimension; coupling the first and second bond pads at an interface having a surface area greater than the area of the planar dimension; and conducting electricity between the first and second bond pads following the coupling.

Abstract: A method and apparatus for producing a multichip package comprising semiconductor chip and a substrate. The semiconductor chip includes conventional inner bond pads that are rerouted to other areas on the chip to facilitate connection with the substrate. The inner bonds are rerouted by covering the chip with a first insulation layer and opening the first insulation layer over the inner bond pads. A metal layer is then disposed over the first insulation layer in contact with the inner bond pads. A second insulation layer is disposed over the metal layer, and the second insulation layer is opened to expose selected portions of the metal layer to form external connection points. Electrically conductive epoxy is then disposed between the external connection points of the semiconductor chip and the terminals of the substrate, thereby electrically connecting the semiconductor chip to the substrate.

Abstract: The present invention provides a multilayer print circuit board having at least an inner print circuit pattern and an outer print circuit pattern which are laminated on a substrate through an insulation layer and being electrically connected to each other through a blind hole provided in the insulation layer. The insulation layer is composed of a resin insoluble in an oxidization agent and inorganic powder dispersed in the resin. The inorganic powder is soluble in the oxidization agent. The surface of insulation layer and the wall of the blind hole are roughed by the oxidization agent before the outer print circuit pattern is formed on the surface of the insulation layer by plating, whereby the inorganic powder exposed to the oxidization agent is melted therein, resulting in the roughed surface of the insulation layer and the wall of the blind hole.

Abstract: An adhesive composition including (a) a polyamide-imide resin preferably having a molecular weight of 80,000 or more and (b) a thermosetting component preferably including an epoxy resin and a curing agent and/or a curing accelerator therefor is used for providing an insulating adhesive layer having a storage elastic modulus at 300.degree. C. of 30 MPa or more and a glass transition temperature of 180.degree. C. or higher. The insulating adhesive is suitable for use in wire scribed circuit boards, multilayer printed circuit boards, and circuit boards for chip carriers.

Abstract: A thin film circuit substrate comprising multilayer conductor layers formed via insulating layers, wherein a signal transmission path in at least one of the conductor layers is embedded in a low dielectric constant insulator, and the low dielectric constant insulator is embedded in an insulator layer with a good adhesiveness. The thin film circuit substrate attains a low dielectric constant, and thus an improved signal propagation velocity, without lowering the interlayer adhesiveness.

Abstract: A printed circuit board assembly includes a first printed circuit board and a first component. The first printed circuit board includes a first cured unreinforced layer and a first dried, uncured, unreinforced layer. The first component includes a second dried, uncured, unreinforced layer. The first and second dried, uncured unreinforced layers are placed in contact prior to curing. During curing, the dried, uncured, unreinforced layers form a unitary cured layer which binds and supports the PCB assembly without the need for a fiber reinforced resin layer. Elimination of the fiber reinforced layer provides a reduction in the overall thickness of the PCB assembly.

Abstract: The semiconductor device comprises an insulating film in which penetrating holes are formed, a semiconductor chip having electrodes, a wiring pattern adhered by an adhesive over a region including penetrating holes on one side of the insulating film and electrically connected to the electrodes of the semiconductor chip, and external electrodes provided on the wiring pattern through the penetrating holes and projecting from the surface opposite to the surface of the substrate on which the wiring pattern is formed. Part of the adhesive is drawn in to be interposed between the penetrating holes and external electrodes.

Abstract: A bonding opening exposing conductors through a cover of a multiconductor flat cable or electrical component to allow direct bonding thereof is described. The multiconductor flat cable or electrical component having a base layer with conductors disposed thereon and a flat cover having an opening provided therein at a bonding site, preferably by die cutting. The flat cover with the opening is laminated to the base layer, overlaying the conductors, so that the conductors are mechanically stabilized by the base layer while being exposed through the bonding opening. The shape of the multiconductor flat cable or electrical component of the present invention may be highly varied. In one embodiment, the flat multiconductor electrical component circumferentially extends around a central area, for example, totally encompassing in IC chip which may be connected to the conductors thereof at a bonding site.

Abstract: A multilayer wiring board for mounting a semiconductor device, which has a multi-bonding-deck cavity, comprises at least two wiring boards and an insulation adhesive layer having an elastic modulus of 1,400 MPa or lower having a coefficient of thermal expansion of 450 ppm/.degree. C. or lower in a direction of thickness and being a cured product of an adhesive film which is a semi-cured product of an adhesive composition comprising (a) 71 to 100 parts by weight of an epoxy group-containing acrylic rubber having a glass transition point of -10.degree. C. or above and a weight average molecular weight of 100,000 or above, (b) 50 to 70 parts by weight of an epoxy resin having a weight average molecular. weight of less than 10,000 and a curing agent, (c) 10 to 60 parts by weight of a high-molecular weight resin being compatible with the epoxy resin and having a weight average molecular weight of 30,000 or above and (d) 0.1 to 5 parts by weight of a cure accelerator.

Abstract: A semiconductor unit including a circuit board having terminal electrodes on a surface thereof and a semiconductor device having an electrode pad on a first surface, where the semiconductor device is mounted face down on the surface of the circuit board. The semiconductor device has a plurality of bumps formed on the electrode pad, for electrically connecting the electrode pad to the terminal electrodes of the circuit board. Each bump includes a first bump portion and a smaller second bump portion formed on the first bump portion, and each second bump portion has a plurality of irregularities having concave portions extending in various directions. The bonding layer is formed between the second bump portion and the terminal electrode, and includes conductive particles which along with a portion of the bonding layer enter the concave portions of the plurality of irregularities of the bumps.

Abstract: A conductive paste composition, which is superior in electrical connection reliability and has properties required for a via-filling conductive paste composition is disclosed. The via-filling conductive paste composition contains a solvent in an amount of not more than 5 parts by weight per 100 parts by weight of the total amount of components A to D:A: 86 to 95 parts by weight of silver-coated copper particles made by coating surfaces of copper particles having an average particle diameter of 1 to 10 .mu.m with silver, a proportion of silver to the total amount of copper particles and coated silver being from 0.5 to 20% by weight,B: 2 to 8 parts by weight of a liquid epoxy resin having two or more epoxy groups,C: 2 to 8 parts by weight of a resol-type phenol resin, andD: 0.5 to 5 parts by weight of a curing agent for an epoxy resin, wherein the composition has a viscosity not more than 1000 Pa.multidot.s.

Abstract: This invention provides a silicon nitride circuit board in which a metal circuit plate is bonded to a high thermal conductive silicon nitride substrate having a thermal conductivity of not less than 60 W/m K, wherein a thickness D.sub.S of the high thermal conductive silicon nitride substrate and a thickness D.sub.M of the metal circuit plate satisfy a relational formula D.sub.S .ltoreq.2D.sub.M. The silicon nitride circuit board is characterized in that, when a load acts on the central portion of the circuit board which is held at a support interval of 50 mm, a maximum deflection is not less than 0.6 mm until the silicon nitride substrate is broken. The silicon nitride circuit board is characterized in that, when an anti-breaking test is performed to the circuit board which is held at a support interval of 50 mm, an anti-breaking strength is not less than 500 MPa.

Abstract: An apparatus and method for evenly applying an atomized adhesive for bonding a die to a leadframe are disclosed. In one embodiment, the apparatus includes a hood in communication with an air supply and a vacuum plenum that encompass a semiconductor device component located in a target area during adhesive application so that the adhesive is selectively applied to specific portions of the leadframe or other semiconductor device component and adhesive is not allowed outside the system. A mask or stencil may be employed for further prevention of adhesive application to undesired areas. An air purge may be employed to direct the adhesive mist toward the component to be coated. In another embodiment, a fine adhesive spray is directed against the surface of the workpiece to be coated, selected areas being masked to prevent coating. Wafers may be coated as well as leadframes.

Abstract: An integrated circuit package for direct mounting of an integrated circuit die to a printed circuit board is disclosed. The integrated circuit die includes a silicon sensor that detects changes in external variables, such as providing an image of a human fingerprint. The integrated circuit die has wire bond pads formed along only one side thereof to provide maximum exposure of the top surface area of the silicon sensor. The die is affixed to the printed circuit board and an adhesive surface coating, such as epoxy, is applied to the die and the printed circuit board for sealing the die thereto. The adhesive surface coating is formed from a first bead applied to the printed circuit board to cover at least the ends of the wires bonded to the board and a second bead applied to the first bead and the die to enclose the sides of the die and partially overlap the wire band pads and wires on top surface thereof.

Abstract: The present invention provides a novel method of reducing the amount of seed deposited on polymeric dielectric surfaces. The method comprises the following steps: providing a work-piece coated with a polymeric dielectric layer; baking the work-piece to modify the surface of the polymeric dielectric layer; then applying the seed to polymeric dielectric layer and electrolessly plating metal to the seed layer. The invention also relates to a circuit board produced by the method of the present invention.

Abstract: This invention provides a silicon nitride circuit board in which a metal circuit plate is bonded to a high thermal conductive silicon nitride substrate having a thermal conductivity of not less than 60 W/m K, wherein a thickness D.sub.s of the high thermal conductive silicon nitride substrate and a thickness D.sub.M of the metal circuit plate satisfy a relational formula D.sub.s .ltoreq.2D.sub.M. The silicon nitride circuit board is characterized in that, when a load acts on the central portion of the circuit board which is held at a support interval of 50 mm, a maximum deflection is not less than 0.6 mm until the silicon nitride substrate is broken. The silicon nitride circuit board is characterized in that, when an anti-breaking test is performed to the circuit board which is held at a support interval of 50 mm, an anti-breaking strength is not less than 500 MPa.

Abstract: A multilayer printed circuit board is obtained by impregnating a base material with a thermosetting resin in to form a prepreg; applying an undercoating agent comprising a terminal-bifunctional linear epoxy resin having an average epoxy equivalent of 450 to 6,000, together with at least one of 2-undecylimidazole, 1-cyanoethy1-2-undecylimidazole or 2,4-diamino-6{2'-undecyl-imidazole(1')}ethyl-s-triazine, or the aforementioned components together with an aromatic polyamine, to at least one circuit side of an interlayer circuit board on at least one side of which a circuit has been formed; and laying the prepreg on at least one side of the undercoating agent-applied interlayer circuit board and subjecting them to laminating.

Abstract: A conductive paste compound for via hole filling includes a conductive filler at 80 to 92 weight percent with an average particle size of from 0.5 to 20 .mu.m and specific surface of from 0.1 to 1.5 m.sup.2 /g, a liquid epoxy resin at 4.5 to 20 weight percent containing 2 or more epoxy groups with room temperature viscosity of 15 Pa.sec or less, and a hardener at 0.5 to 5 weight percent, wherein the viscosity is 2,000 Pa.sec or less and the volatile amount is 2.0 weight percent or less. A filling paste and a printed circuit board with use thereof are provided which can conduct an inner-via-hole connection between electrode layers without using a through-hole plating technique.The conductive paste comprises a metallic particle such as copper, an epoxy resin, a hardener, and if necessary, a dispersant. The paste having low viscosity and low volatility under high shear is used to fill holes disposed in a laminated substrate.

Abstract: A printed wiring board and an electronic device using the same with which the formation of cracks in base portions of projecting external electrodes formed on lands on the printed wiring board is certainly prevented. With respect to a printed wiring board 11 having lands 16 formed in a wiring pattern where external electrodes 13 are to be formed and a pattern-protecting film 17 having openings 17a where the external electrodes 13 are to be formed, the opening diameter D1 of the openings 17a in the pattern-protecting film 17 is set greater by a predetermined dimension than the external diameter D2 of the lands 16 and a gap is thereby provided between each of the external electrodes 13 and the pattern-protecting film 17 so that the external electrodes 13 and the pattern-protecting film 17 do not make contact with each other and as a result there is no cracking of the external electrodes 13 caused by differential thermal expansion of the external electrodes 13 and the pattern-protecting film 17.