Adhesive/bonding Patents (Class 174/259)
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Patent number: 6611065Abstract: The present invention is a connection material which enables a flexible circuit board to be connected to a bare IC chip without causing a shoulder touch effect. The connection material contains an insulating adhesive and a flaky or fibrous insulating filler dispersed therein is used for connecting a film-like flexible circuit board and a bare IC chip. The aspect ratio of the flaky or fibrous insulating filler is no less than 20.Type: GrantFiled: November 14, 2001Date of Patent: August 26, 2003Assignee: Sony Chemicals CorporationInventors: Motohide Takeichi, Junji Shinozaki
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Patent number: 6608259Abstract: AC-ground plane is for a semiconductor chip adapted to be mounted on a supporting member in a chip package, wherein said ground plane comprises at least one first capacitor plate provided within said chip, and at least one second capacitor plate provided on said supporting member, said first and second capacitor plate being separated by a dielectric layer and capacitively coupled to each other via this layer, and said ground plane comprising at least one first conducting member, said first conducting member being at least one electrically conducting via extending through said supporting member and electrically coupled in series with said second capacitor plate.Type: GrantFiled: November 27, 2000Date of Patent: August 19, 2003Assignee: Nokia Mobile Phones LimitedInventor: Soren Norskov
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Patent number: 6607825Abstract: As a technique capable of stably providing various metal film adhered bodies for printed circuit boards having an excellent peel strength even in the wiring having higher density and higher pattern accuracy and other industrial parts, there are provided adhesive, adhesive layer and metal film adhered body in which a mixed resin consisting of a thermoplastic resin and an uncured thermosetting resin including a resin substituted at a part of its functional group with a photosensitive group and/or an uncured photosensitive resin is used as a heat-resistant resin matrix constituting the adhesive and further a cured homogeneous resin composite forming a quasi-homogeneous compatible structure, co-continuous phase structure or spherical domain structure is used as a heat-resistant resin matrix of the adhesive layer.Type: GrantFiled: August 22, 1997Date of Patent: August 19, 2003Assignee: Ibiden Co., Ltd.Inventors: Dong Dong Wang, Motoo Asai
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Patent number: 6602584Abstract: A flexible printed circuit board with a reinforcing plate, which comprises: a flexible printed circuit board including i) a conductive circuit pattern layer, and ii) an insulating layer made of a plastic film; a reinforcing plate; and an adhesive layer so that the reinforcing plate is attached to the flexible printed circuit board via the adhesive layer, wherein the adhesive layer is formed from an adhesive composition containing a composite metal hydroxide represented by formula (1): M1-xQx(OH)2 (1) wherein M is at least one metal atom selected from the group consisting of Mg, Ca, Sn and Ti; Q is at least one metal atom selected from the group consisting of Mn, Fe, Co, Ni, Cu and Zn; and x is a positive number from 0.01 to 0.5.Type: GrantFiled: April 10, 2002Date of Patent: August 5, 2003Assignee: Nitto Denko CorporationInventors: Kyouyuu Jo, Yasufumi Miyake
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Patent number: 6602583Abstract: A multi-layer circuit board comprises a liquid crystalline polymer bond ply disposed between two circuit layers wherein the liquid crystalline polymer bond ply is formed by treating a film comprising a liquid crystalline polymer with an amount of heat and pressure effective to produce a liquid crystalline polymer bond ply with an in-plane coefficient of thermal expansion (CTE) of 0 to about 50 ppm/° C. and further wherein the multi-layer circuit is formed by lamination at a temperature of 0° C. to about 10° C. less than the melt temperature of the liquid crystalline polymer.Type: GrantFiled: December 4, 2001Date of Patent: August 5, 2003Assignee: World Properties, Inc.Inventors: Michael E. St. Lawrence, Scott Kennedy
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Publication number: 20030135994Abstract: The present invention relates to a method for manufacturing a printed circuit board, and the method comprises forming penetrating holes in predetermined positions of an insulating substrate, then forming resist films having a predetermined pattern on the front and the rear surfaces of the insulating substrate; plating the insulating substrate provided with the resist films so as to form conductive plating patterns on the front and the rear surfaces of the insulating substrate and conductive paths on the inside surfaces of the penetrating holes, the conductive plating patterns being connected to each other via the conductive paths; and subsequently removing the resist films.Type: ApplicationFiled: January 15, 2003Publication date: July 24, 2003Applicant: Fujitsu LimitedInventors: Takashi Shutou, Yasuhito Takahashi, Kenji Iida, Kenji Takano, Yukio Miyazaki
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Publication number: 20030121697Abstract: For a three-layer flexible board, there is provided a copper alloy foil that requires no roughening processing, that has good adhesion with an adhesive containing an epoxy resin, that can be laminated to form a copper-clad laminate, that has a low surface roughness, and that has high conductivity and strength. The copper alloy of the foil contains at least one of 0.01-2.0 weight percent Cr and 0.01-1.0 weight percent Zr or contains 1.0-4-8 weight percent Ni and 0.2-1.4 weight percent Si. Good adhesion of the copper alloy foil to a resin substrate with an adhesive containing an epoxy resin is obtained by setting the thickness of the anticorrosive coating to less than 3 nm; the surface roughness of the copper alloy foil is below 2 &mgr;m expressed as ten-point average surface roughness (Rz); and, without roughening processing, the 180° C. peel strength, after adhesion of the copper alloy foil to the board film by means of an adhesive containing an epoxy resin, is greater than 8.0 N/cm.Type: ApplicationFiled: July 3, 2002Publication date: July 3, 2003Inventors: Hifumi Nagai, Toshiteru Nonaka
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Patent number: 6586081Abstract: Polyimide/metal laminates having a polyimide film and a metal layer laminated thereon, wherein the polyimide film contains titanium element and flexible print wiring boards with the use of the same are disclosed. The polyimide/metal laminates are excellent in adhesion under the ordinary conditions and, moreover, can sustain the adhesive strength at a high ratio after exposure to high temperature or high temperature and high humidity. Owing to these characteristics, these polyimide/metal laminates are appropriately usable in flexible print wiring boards, multi-layered print wiring boards, rigid flex wiring boards, tapes for TAP, semiconductor packages such as CFOs and multi chip modules (MCMs), magnetic recording films, coating films for aerospace materials and filmy resistance elements.Type: GrantFiled: March 9, 2000Date of Patent: July 1, 2003Assignee: Kaneka CorporationInventors: Masaru Nishinaka, Kiyokazu Akahori
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Patent number: 6582616Abstract: Disclosed are a method for preparing a high performance BGA board containing a plurality of printed circuit boards in which a conductor circuit, a bonding pad electrically connected to a semiconductor chip, and an inner hole for mounting a semiconductor chip are formed, by primary- and secondary-laminating a plurality of boards. The present invention enjoys advantages in that contamination due to an outer layer surface treatment of the board laminate can be prevented, and a process for preventing a contamination of an inner hole can be omitted, and also a defective proportion can be reduced remarkably in comparison with prior arts by applying a pressure uniformly during a secondary lamination. Furthermore, a BGA board according to the invention has an ideal ball pitch and multi-fins, excellent electrical and thermal properties, also can be applied in the case of high current, and can be easily mounted on a chip.Type: GrantFiled: October 29, 2001Date of Patent: June 24, 2003Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Myung-Sam Kang, Keon-Yang Park, Won-Hoe Kim
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Publication number: 20030111259Abstract: An apparatus to retain an assembled component on one side of a double-sided printed circuit board during reflow of other components subsequently positioned onto an opposite side of the double-sided printed circuit board and methods for manufacturing and using the same. Being formed from an epoxy material, the retainer is configured to be coupled with a component, which is then positioned onto a printed circuit board. During a subsequent solder reflow stage, an ambient temperature surrounding the printed circuit board increases, and the epoxy material is configured to enter a semi-liquid state, flowing onto, and adhering with, the printed circuit board. Upon reaching a typical solder reflow temperature, the liquefied epoxy material is configured to cure or harden, adhesively coupling the component with the printed circuit board. Thereby, the component is inhibited from separating from the printed circuit board when the printed circuit board is subsequently inverted, populated, and reflowed.Type: ApplicationFiled: December 5, 2002Publication date: June 19, 2003Inventors: Tom E. Pearson, Christopher D. Combs, Arjang Fartash, Raiyomand Aspandiar
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Patent number: 6580035Abstract: An electronic device includes electronic components, such as “flip chip” semiconductor devices, chip resistors, capacitors and other electronic components, mounted to and interconnected to a substrate by a flexible adhesive membrane having contact pads that have substantially the same pattern as those of the corresponding electronic components. The flexible adhesive membrane includes an insulating matrix and conductive pads therein that employ thermoplastic and thermosetting adhesives, and combinations thereof, each having a low modulus of elasticity. The flexible conductive adhesive employed for the conductive pads or features preferably has a lower flow index than does the flexible adhesive employed for the insulating matrix, whereby the conductive features penetrate the insulating adhesive during bonding to assure reliable interconnection.Type: GrantFiled: January 7, 1999Date of Patent: June 17, 2003Assignee: Amerasia International Technology, Inc.Inventor: Kevin Kwong-Tai Chung
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Patent number: 6576839Abstract: A unique bond-ply structure and associated processes for processing of the bond-ply structure and for joining together circuit layer pairs which makes it possible to create a bond-ply having raised structures of conductive material which compensate for shrinkage during sintering thus creating a stress-free and void-free electrically conductive junction between layer-pairs in an interconnect.Type: GrantFiled: March 27, 2001Date of Patent: June 10, 2003Assignee: Honeywell International Inc.Inventors: Richard J. Pommer, Scott Zimmerman, Brad Banister
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Publication number: 20030102152Abstract: A multi-layer electronic circuit board design 10 having selectively formed apertures or cavities 26, and which includes grooves or troughs 20, 22 which are effective to selectively entrap liquefied adhesive material, thereby substantially preventing the adhesive material from entering the apertures 26.Type: ApplicationFiled: November 20, 2002Publication date: June 5, 2003Inventors: Lawrence Leroy Kneisel, Mohan Paruchuri, Vivek Jairazbhoy, Vladimir Stoica
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Patent number: 6572954Abstract: The invention relates to an electromechanical component which is configured as a sandwich-type structure. In the interior of said structure, a support layer consisting of foamed plastic is arranged. Said support layer is placed between covering layers which consist of compact materials. All layers are produced from hardly inflammable plastic material, for example LCP or PEI plastics so that it is not necessary to add any flame-retardant additives. The component can be configured in the shape of a slab but it can also have a more complex three-dimensional structure and can optionally be provided with mechanical functional elements. Accordingly to an aspect of the invention, the support layer of the component can consist of silicone. The composition of the inventive component provides a means for simplifying recycling a product at the end of its lifetime.Type: GrantFiled: April 25, 2001Date of Patent: June 3, 2003Assignee: Thomson Licensing, S.A.Inventors: Hans-Otto Haller, Volker Strubel
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Patent number: 6569512Abstract: In a mounting structure including a first electrode and a second electrode electrically connected to each other via a conductive adhesive, the periphery of an adhesion portion between at least one of the electrodes and the conductive adhesive is covered with an electrical insulating layer, whereby the adhesion portion is reinforced from the periphery. The electrical insulating layer may be formed by dissolving a binder resin component of the conductive adhesive in a solvent. This increases the concentration of a conductive filler in the conductive adhesive, so that the conductivity of the adhesion portion is also enhanced.Type: GrantFiled: September 27, 2001Date of Patent: May 27, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hiroaki Takezawa, Tsutomu Mitani, Minehiro Itagaki, Yoshihiro Bessho, Kazuo Eda
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Patent number: 6570098Abstract: A printed wiring board reduced in weight by reducing the size and the thickness of a substrate in its entirety. The printed wiring board includes a rigid substrate 2, comprised of a core material 11 at least one side of which carries a land 23, and flexible substrates 3, 4, 5 and 6 comprised of core materials 33, 36 on at least one surface of which a bump 32 for electrical connection to the land 38 is formed protuberantly. The rigid substrate 2 and the flexible substrates 3 to 6 are molded as one with each other, with the interposition of an adhesive in-between, so that the land and the bump face each other.Type: GrantFiled: February 28, 2001Date of Patent: May 27, 2003Assignees: Sony Corporation, Sony Chemicals CorporationInventors: Kazuhiro Shimizu, Nobuo Komatsu, Soichiro Kishimoto
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Patent number: 6559524Abstract: A COF-use tape carrier for a semiconductor device has dummy leads not to be electrically connected to a semiconductor chip, in the proximity of an edge of an opening of a solder resist. The dummy leads are provided on an insulating tape, between adjacent two inner leads that are relatively widely spaced from each other. The dummy leads extend across the edge of the opening of the solder resist, so that one end of each dummy lead is located within the opening of the solder resist, while the other end of the dummy lead is located under the solder resist. A semiconductor chip is to be mounted on a chip-mounting region of the insulating tape.Type: GrantFiled: September 21, 2001Date of Patent: May 6, 2003Assignee: Sharp Kabushiki KaishaInventor: Toshiharu Seko
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Patent number: 6544638Abstract: An electronic chip package is provided having a laminated substrate. The laminated substrate includes at least one conductive layer and at least one dielectric layer which is bonded to the conductive layer. The dielectric layer has a glass transition temperature Tg greater than 200° C. and a volumetric coefficient of thermal expansion of ≦75 ppm/° C. A semiconductor device is electrically attached to the laminated substrate.Type: GrantFiled: September 10, 2001Date of Patent: April 8, 2003Assignee: Gore Enterprise Holdings, Inc.Inventors: Paul J. Fischer, Joseph E. Korleski
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Patent number: 6541872Abstract: An improved method of attaching a semiconductor die to an organic substrate and an improved semiconductor package are herein disclosed. The die package comprises a die secured to a printed circuit board (PCB) with an adhesive tape. The adhesive tape may be of single or multi-layer construction. In one embodiment, a tri-layer tape is disclosed having a carrier layer sandwiched between two identical adhesive layers. In one embodiment, a method is disclosed utilizing a pressure sensitive, thermoset adhesive tape. In another embodiment, a method is disclosed utilizing a B-stageable thermoset adhesive. In yet another embodiment, a method using a pressure sensitive adhesive is disclosed. In still yet another embodiment, a method is disclosed wherein the adhesive is a hybrid material having both thermoset and thermoplastic components.Type: GrantFiled: January 11, 1999Date of Patent: April 1, 2003Assignee: Micron Technology, Inc.Inventors: Edward A. Schrock, Tongbi Jiang
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Patent number: 6542377Abstract: A computer system including a microprocessor and a system memory coupled t provide storage to facilitate execution of computer programs by the microprocessor. An input is coupled to provide input to the microprocessor. A display is coupled to the microprocessor by a video controller and a mass storage is coupled to the microprocessor. A printed circuit board is electrically coupled to the microprocessor. The printed circuit board includes a circuit substrate having two spaced apart major surfaces and a plurality of rows of interconnect assemblies. Each row of interconnect assemblies includes a first and a second interconnect pad on a major surface of the circuit substrate. The first and the second interconnect pads are positioned on a respective reference axis. The first interconnect pad is spaced apart from the second interconnect pad by a first distance. A first and a second conductive via extend through the circuit substrate.Type: GrantFiled: June 28, 2000Date of Patent: April 1, 2003Assignee: Dell Products L.P.Inventors: Doreen S. Fisher, Thad McMillan
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Method of mounting electronic component on substrate without generation of voids in bonding material
Publication number: 20030051905Abstract: When an electronic component is mounted on a substrate, the electronic component is first placed on the substrate with a solid support interposed between the electronic component and the substrate. The solid support serves to space a terminal conductor of the electronic component from a corresponding terminal pad on the substrate. A conductive bonding material is then melted on the terminal pad. The melted conductive bonding material gets exposed to the peripheral atmosphere over a larger area. Even if a bubble is generated within the melted conductive bonding material, the bubble is allowed to easily get out of the melted conductive bonding material. Removal of the gas is promoted in the melted conductive bonding material. The solid support is subsequently melted. The electronic component is moved down toward the substrate, thereby contacting the terminal conductor with the melted conductive bonding material on the corresponding terminal pad.Type: ApplicationFiled: February 12, 2002Publication date: March 20, 2003Applicant: Fujitsu LimitedInventors: Tsuyoshi Yamamoto, Mitsuo Suehiro, Hiroshi Yamada -
Publication number: 20030051908Abstract: A DRAM module package, which uses a board on chip (BOC) manner to form multiple windows on the module printed circuit board (PCB). A chip is directly adhered to a backside of the module PCB and the bonding pads of the chip are arranged to be located at a center of the windows. The conductive wire penetrates through the window and connects crossing between a mounting pad in front of the module PCB and the bonding pad of the chip. Then, an encapsulation process is performed to protect the conductive wires, the mounting pads on the module PCB, the chip and the bonding pads.Type: ApplicationFiled: September 27, 2001Publication date: March 20, 2003Inventor: Kai-Kuang Ho
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Patent number: 6535393Abstract: A device comprising a circuit, a lead having a first end connected to the circuit and having a second end, and a deformable structure connected to the second end of the lead. The invention may be embodied on a circuit board, so that the circuit board includes a substrate and a deformable structure connected to said substrate. Also disclosed is a device comprising a circuit having an active side and a non-active side, a package enclosing the active side of the circuit and not enclosing a portion of the non-active side of the circuit, and a lead having a first end connected to the active side of the circuit via a lead-over-chip connection, and having a second end extending from the package. Also disclosed is a device comprising a circuit and a lead formed from a flexible conductor, with the lead having a first end connected to the circuit.Type: GrantFiled: December 4, 1998Date of Patent: March 18, 2003Assignee: Micron Technology, Inc.Inventors: Salman Akram, Warren M. Farnworth, Alan G. Wood, J. Michael Brooks, Eugene H. Cloud
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Patent number: 6534724Abstract: The present invention provides a new device and method for enhancing the electrical properties of the thick metal backer/electrically conductive thermoset adhesive/printed circuit board or card assembly. The enhanced electrical properties are obtained by providing a thin bondline of conductive adhesive that is essentially void free.Type: GrantFiled: May 28, 1997Date of Patent: March 18, 2003Assignee: International Business Machines CorporationInventors: Donald Seton Farquhar, Gerard Paul Kohut, Andrew Michael Seman, Michael Joseph Klodowski
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Patent number: 6534160Abstract: A semiconductor device having a thermoset-containing, dielectric material and methods for fabricating the same is provided. The device may take the form of a printed circuit board, an integrated circuit chip carrier, or the like. The dielectric material is a non-fibrillated, fluoropolymer matrix that has inorganic particles distributed therein and is impregnated with a thermoset material.Type: GrantFiled: February 12, 2001Date of Patent: March 18, 2003Assignee: International Business Machines CorporationInventors: Donald S. Farquhar, Konstantinos I. Papathomas, Mark D. Poliks
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Publication number: 20030047354Abstract: A method for attaching a sensing device to a substrate at a pre-determined distance from the substrate is provided. The method preferably includes providing a compliant adhesive and depositing a first layer of the compliant adhesive onto the substrate, curing the first layer of the compliant adhesive, depositing a second layer of the compliant adhesive directly onto the first layer of the compliant adhesive, inserting the sensing device into the second layer of the compliant adhesive and curing the second layer of the compliant adhesive.Type: ApplicationFiled: September 7, 2001Publication date: March 13, 2003Inventors: Donald W. Havas, Dean Carl Newswanger, Walter B. Swankoski
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Patent number: 6531662Abstract: A circuit substrate (10) comprises a first substrate split (11) formed with a predetermined wiring pattern (16) and a second substrate split (12) formed with a predetermined wiring pattern (17). The substrate splits are electrically and/or mechanically joined together, and the circuit substrate is bent at the joint. The joint is provided by a bendable joint member (13) including a plurality of leads (14) disposed in parallel and held by a thin piece of base film (20) integrally therewith. The joint member is attached to interconnect the first and the second substrate splits (11, 12).Type: GrantFiled: October 19, 2001Date of Patent: March 11, 2003Assignee: Rohm Co., Ltd.Inventor: Satoshi Nakamura
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Publication number: 20030042042Abstract: A flexible printed circuit board with a reinforcing plate, which comprises: a flexible printed circuit board including i) a conductive circuit pattern layer, and ii) an insulating layer made of a plastic film; a reinforcing plate; and an adhesive layer so that the reinforcing plate is attached to the flexible printed circuit board via the adhesive layer, wherein the adhesive layer is formed from an adhesive composition containing a composite metal hydroxide represented by formula (1):Type: ApplicationFiled: April 10, 2002Publication date: March 6, 2003Applicant: NITTO DENKO CORPORATION;Inventors: Kyouyuu Jo, Yasufumi Miyake
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Patent number: 6528732Abstract: A circuit device board having a desired characteristic is provided by bonding dielectric substrates. A printed board 11 carrying patterns 11a and 11b incorporating a resonator is joined by a prepreg 13 to a printed board 12 carrying patterns 12a and 12b, which are substantially identical to the patterns 11a and 11b, so that the patterns come opposite to each other. As a grounding conductor is provided on the outer side of each of the printed boards 11 and 12, a band-pass filter having the three-plate structure is completed. The patterns 11a and 12a are connected to each other for determining the signal input while the patterns 11b and 12b are connected to each other for determining the signal output. Accordingly, the frequency response can be obtained at a desired level regardless of the thickness of the prepreg 13.Type: GrantFiled: August 18, 2000Date of Patent: March 4, 2003Assignee: Sony CorporationInventors: Akihiko Okubora, Takayuki Hirabayashi, Hideyuki Shikichi
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Patent number: 6525429Abstract: A method of making a microelectronic assembly including a compliant interface includes providing a first support structure, such as a flexible dielectric sheet, having a first surface and a porous resilient layer on the first surface of the first support structure, stretching the first support structure and bonding the stretched first support structure to a ring structure. The first surface of a second support structure, such as a semiconductor wafer, is then abutted against the porous layer and, desirably after the abutting step, a first curable liquid is disposed between the first and second support structures and within the porous layer. The first curable liquid may then be at least partially cured.Type: GrantFiled: March 2, 2000Date of Patent: February 25, 2003Assignee: Tessera, Inc.Inventors: Zlata Kovac, Craig Mitchell, Thomas Distefano, John Smith
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Patent number: 6517924Abstract: The present invention provides a laminated body, comprising: a first sheet layer comprising an aggregate of a first powder, at least a part of the first powder being in a sintered state; a second sheet layer disposed so as to make contact with the first sheet layer and comprising an aggregate of a second powder, the second powder being in a non-sintered state; and the first powder and the second powder being solidified to each other by allowing a part of the first sheet layer material to diffuse or to flow into the second sheet layer.Type: GrantFiled: April 28, 1999Date of Patent: February 11, 2003Assignee: Murata Manufacturing Co. LtdInventors: Hirokazu Kameda, Shuya Nakao, Kenji Tanaka
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Patent number: 6512183Abstract: An electronic component mounted member includes a circuit board, an electronic component connected to the circuit board and an electrically conductive adhesive interposed between the electronic component and the circuit board. In a joining interface of the electrically conductive adhesive and an electrode of the circuit board, an intermediate layer that is formed of a thermoplastic insulating adhesive with a softening temperature of 100° C. to 300° C. is interposed between the electrically conductive adhesive and the electrode. An electrically conductive filler contained in the electrically conductive adhesive is present partially in the intermediate layer, thus allowing an electrical conduction between the electrically conductive adhesive and the electrode of the circuit board.Type: GrantFiled: June 27, 2001Date of Patent: January 28, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Tsutomu Mitani, Hiroaki Takezawa, Yukihiro Ishimaru, Takashi Kitae, Yasuhiro Suzuki
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Patent number: 6512184Abstract: An anisotropically electroconductive connection body, in which two elements, each having electrodes on a confronting face, are connected with each other. The connection body is made up of a connecting material containing an adhesive component constituted mainly of a thermosetting resin, the connecting material being interposed between the two elements to be connected, and an extraneous portion of the connecting material protruding from the periphery of one of the elements on the other one of the elements, wherein the degree of hardening of the thermosetting resin in the connecting material in the extraneous portion is at least 60%.Type: GrantFiled: September 11, 2000Date of Patent: January 28, 2003Assignee: Sony Chemicals CorporationInventors: Yukio Yamada, Hiroyuki Fujihira
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Patent number: 6506978Abstract: A flexible wiring board 100 includes a first single-sided flexible board 10 and a second single-sided flexible board 20. The first single-sided flexible board 10 includes a first base body 12 having an insulative property, and a first wiring layer 14 formed in a predetermined pattern on the first base body. The second single-sided flexible board 20 includes a second base body 22 having an insulative property, and a second wiring layer 24 formed in a predetermined pattern on the second base body. The first and second single-sided flexible boards respectively have insulating layers 16 and 26 covering the wiring layers 14 and 24, and the insulating layers are provided with contact sections C10 and C20. The first single-sided flexible board 10 and the second single-sided flexible board 20 are arranged so that the first wiring layer and the second wiring layer face each other, and are bonded through an anisotropically conductive adhesive layer 30.Type: GrantFiled: September 1, 2000Date of Patent: January 14, 2003Assignee: Seiko Epson CorporationInventor: Hiroaki Furihata
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Patent number: 6500529Abstract: A process for fabricating a low loss multilayer printed circuit board using a bonding ply comprising a fluoropolymer composite substrate and a thermosetting adhesive composition is disclosed. The fluoropolymer composite comprises at least one fluoropolymer and a substrate selected from woven fabrics, nonwoven fabrics and polymeric films.Type: GrantFiled: September 14, 2001Date of Patent: December 31, 2002Assignee: Tonoga, Ltd.Inventors: Thomas F. McCarthy, David L. Wynants, Sr.
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Patent number: 6495758Abstract: An anisotropically electroconductive connecting material, which is disposed between a connection terminal on a first substrate and a connection terminal on a second substrate and joins the substrates together by thermocompression bonding while maintaining electroconductive connection therebetween, includes electroconductive particles dispersed in an insulating adhesive, wherein the modulus of elasticity of the electroconductive particles at the compression bonding temperature is 200% or less of the modulus of elasticity of the first substrate at the compression bonding temperature.Type: GrantFiled: March 8, 2001Date of Patent: December 17, 2002Assignee: Sony Chemicals Corp.Inventor: Masao Saitoh
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Patent number: 6495244Abstract: This invention relates to printed circuit boards having improved fire resistance and improved environmental stability. The invention provides halogen-free fire retardant printed circuit boards incorporating potentially flammable polymers. Flame resistant thermoplastic layers prevent combustion of thermosetting polymers, as well as adding strength to the laminate, resulting in a less brittle thin core than the prior art. The flame resistant circuit board is cost efficient, environmentally safe and has excellent properties, including a decreased probability of shorting, good dielectric breakdown voltage, a smooth surface and good electrical/thermal performance.Type: GrantFiled: September 7, 2000Date of Patent: December 17, 2002Assignee: Oak-Mitsui, Inc.Inventors: John A. Andresakis, Dave Paturel
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Publication number: 20020182385Abstract: Materials and surfaces terminated with sulfur, phosphorous, antimony, selenium, tellurium, bromine and/or iodine atoms are suitable for the manufacture of metallic thin films by deposition of highly polarizable transition metals over an atomic passivation layer or a self-assembled layer.Type: ApplicationFiled: May 29, 2002Publication date: December 5, 2002Applicant: Rensselaer Polytechnic InstituteInventors: John Joseph Senkevich, Toh-Ming Lu, Guangrong Yang
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Patent number: 6490170Abstract: According to the package board of the present invention, each soldering pad formed on the top surface of the package board, on which an IC chip is to be mounted, is small (133 to 170 &mgr;m in diameter), so the metallic portion occupied by the soldering pads on the surface of the package board is also small. On the other hand, each soldering pad formed on the bottom surface of the package board, on which a mother board, etc. are to be mounted, is large (600 &mgr;m in diameter), so the metallic portion occupied by the soldering pads on the surface of the package board is also large. Consequently, a dummy pattern 58M is formed between conductor circuits 58U and 58U for forming signal lines on the IC chip side surface of the package board thereby to increase the metallic portion on the surface and adjust the rate of the metallic portion between the IC chip side and the mother board side of the package board, protecting the package board from warping in the manufacturing processes, as well as during operation.Type: GrantFiled: July 17, 2001Date of Patent: December 3, 2002Assignee: Ibiden Co., Ltd.Inventors: Motoo Asai, Yoji Mori
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Patent number: 6489572Abstract: A substrate structure for an integrated circuit package. The substrate is electrically connected to a circuit board and an integrated circuit. The substrate includes a plurality of metal sheets and glue. The metal sheets are arranged opposite to each other. Each of the metal sheets includes a first surface and a second surface. The glue is used for sealing the plurality of metal sheet to form the substrate. The first surfaces and second surfaces of the metal sheets are exposed to the outside of the glue so as to form a plurality of signal input terminals for electrically connecting to the integrated circuit and a plurality of signal output terminals for electrically connecting to the circuit board. Thus, the signal output terminals of the metal sheets can be electrically connected to the circuit board smoothly. Furthermore, the signal transmission distance between the integrated circuit and the circuit board can be shortened so that better signal transmission effect can be obtained.Type: GrantFiled: January 23, 2001Date of Patent: December 3, 2002Assignee: Kingpak Technology Inc.Inventors: Mon Nan Ho, Chih-Hong Chen, Yen Cheng Huang, Li Huan Chen, Kuo Feng Peng, Jichen Wu, Allis Chen, Wen Chuan Chen
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Patent number: 6489573Abstract: An electrode bonding structure is disclosed for reducing the thermal expansion of a circuit board during the bonding process of the circuit board and a substrate of a flat display. The electrode bonding structure includes a substrate, a circuit board, and an anisotropic conductive film ACF. A substrate dielectric layer and an indenting pad are formed on the surface of the substrate, and the inner surface of the indenting pad is lower than the surface of the substrate dielectric layer by an indenting depth H3. The circuit board is placed parallel to the substrate, and a circuit dielectric layer and a bump pad are formed on the surface of the circuit board. The bump pad is higher than the surface of the circuit dielectric layer by a height H1. The ACF is placed between the substrate and the circuit board, and the thickness of the ACF is a thickness H2.Type: GrantFiled: June 11, 2001Date of Patent: December 3, 2002Assignee: Acer Display TechnologyInventors: Jiun-Han Wu, Tzeng-Shii Tsai, Po-Cheng Chen
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Patent number: 6486411Abstract: A semiconductor module solder bonding of high reliability in which the heat resisting properties of the circuit substrate and electronic parts are taken into consideration. In order to achieve this, there are provided semiconductor devices each having solder bumps as external pads, and a circuit substrate bonded to the external pads of each of the semiconductor devices through a solder paste, each of the solder bumps being made of a first lead-free solder, the solder paste being made of a second lead-free solder having a melting point lower than that of the first lead-free solder.Type: GrantFiled: March 20, 2001Date of Patent: November 26, 2002Assignee: Hitachi, Ltd.Inventors: Kazuma Miura, Hanae Shimokawa, Koji Serizawa, Tasao Soga, Tetsuya Nakatsuka
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Patent number: 6479757Abstract: An apparatus includes a connection sheet having a separator layer and an adhesive film layer formed on the separator layer such that said adhesive film layer can be peeled from the separator layer. The cohesive strength of the adhesive film layer decreases when the adhesive film layer is heated to a predetermined temperature. Electronic parts each have an electrode surface and at least one electrode on the electrode surface.Type: GrantFiled: October 12, 2000Date of Patent: November 12, 2002Assignee: Hitachi Chemical Company, Ltd.Inventors: Isao Tsukagoshi, Kouji Kobayashi, Kazuya Matsuda, Naoki Fukushima, Jyunichi Koide
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Patent number: 6479136Abstract: An object is to provide a metal-clad laminated board applicable for a printed wiring board capable of readily dissipating heat and superior in thermal conduction, and further, the printed wiring board substrate overlaid with a lead frame having the same characteristics as the metal-clad laminated board. To attain the aforesaid object, the printed wiring board of the invention has the carbon-base substrate overlaid with metal foil or lead frame through an insulating bonding layer. Thus, in a case of using the metal foil, the printed wiring board is formed in a metal-clad laminated board, and in a case of using the lead frame, the printed wiring board is formed in a lead frame laminated board.Type: GrantFiled: May 4, 2001Date of Patent: November 12, 2002Assignee: Suzuki Sogyo Co., Ltd.Inventor: Motoyasu Nakanishi
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Patent number: 6477052Abstract: A printed circuit board, containing thermal pads, is adhered to a rigidizer plate whereupon the entire unit can then be bent over itself to create a compact assembly which can be substantially smaller, but contain the same number of traces and electrical components, as an unbent printed circuit board of the same surface area. Further, a complete housing assembly is formed which is sealed on each edge of the rigidizer by inserting the edge into a panel with a groove. This assembly provides a secure fit that provides great stability with a relatively low weight and volume. The assembly also provides a better RF non-mechanical connection and much better thermal performance.Type: GrantFiled: August 1, 2000Date of Patent: November 5, 2002Assignee: DaimlerChrysler CorporationInventor: Tina Barcley
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Patent number: 6468640Abstract: In a green laminate body including a plurality of base green layers and a plurality of constraining green layers for forming a monolithic ceramic substrate by using a non-shrinking process, when the thicknesses of the base green layers differ from each other, a thicker base green layer shrinks largely during sintering, and hence, the resulting monolithic ceramic substrate may warp in some cases. In order to solve this problem, the constraining green layers, which are in contact with the main surfaces of the individual base green layers, have different thicknesses so that a relatively thicker constraining green layer is in contact with a relatively thicker base green layer, and a relatively thinner constraining green layer is in contact with a relatively thinner base green.Type: GrantFiled: April 6, 2001Date of Patent: October 22, 2002Assignee: Murata Manufacturing Co., Ltd.Inventors: Mitsuyoshi Nishide, Norio Sakai, Akira Baba
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Patent number: 6465084Abstract: A method of forming a core for and forming a composite wiring board. The core has an electrically conductive coating on at least one face of a dielectric substrate. At least one opening is formed through the substrate extending from one face to the other and through each conductive coating. An electrically conductive material is dispensed in each of the openings extending through the conducting coating. At least a portion of the surface of the conductive coating on one face is removed to allow a nub of the conductive material to extend above the substrate face and any remaining conductive material to thereby form a core that can be electrically joined face-to-face with a second core member or other circuitized structure.Type: GrantFiled: April 12, 2001Date of Patent: October 15, 2002Assignee: International Business Machines CorporationInventors: Brian E. Curcio, Donald S. Farquhar, Konstantinos I. Papathomas, Mark D. Poliks
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Patent number: 6462284Abstract: A method of manufacturing a semiconductor device comprises: a first step of interposing a thermosetting anisotropic conductive material 16 between a substrate 12 and a semiconductor chip 20; a second step in which pressure and heat are applied between the semiconductor chip 20 and the substrate 12, an interconnect pattern 10 and electrodes 22 are electrically connected, and the anisotropic conductive material 16 is spreading out beyond the semiconductor chip 20 and is cured in the region of contact with the semiconductor chip 20; and a third step in which the region of the anisotropic conductive material 16 other than the region of contact with the semiconductor chip 20 is heated.Type: GrantFiled: February 25, 2000Date of Patent: October 8, 2002Assignee: Seiko Epson CorporationInventor: Nobuaki Hashimoto
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Patent number: 6461896Abstract: An electronic device comprising a semiconductor chip which is fixed to the mounting face of a wiring board through an adhesive and in which external terminals are electrically connected with electrode pads of the wiring board through bump electrodes. Recesses are formed in the electrode pads, and in the recesses the electrode pads and the bump electrodes are connected. The electrode pads are formed over the surface of a soft layer, and the recesses are formed by elastic deformation of the electrode pads and the soft layer.Type: GrantFiled: May 5, 2000Date of Patent: October 8, 2002Assignees: Hitachi, Ltd., Hitachi Hokkai Semiconductor, Ltd.Inventors: Satoshi Imasu, Ikuo Yoshida, Tetsuya Hayashida, Akira Yamagiwa, Shinobu Takeura
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Patent number: 6459047Abstract: A substrate and a method of making the substrate is provided. The substrate includes a layer of metal with at least one through hole therein, the layer of metal having an adhesion promoting layer thereon. A layer of a partially cured low-loss polymer or polymer precursor is positioned on the adhesion promoting layer and a plurality of conductive circuit lines are positioned on a portion of the partially cured dielectric layer. The substrate can be used as a building block in the fabrication of a multilayered printed circuit board.Type: GrantFiled: September 5, 2001Date of Patent: October 1, 2002Assignee: International Business Machines CorporationInventors: Robert M. Japp, Voya R. Markovich, Konstantinos I. Papathomas