Adhesive/bonding Patents (Class 174/259)
  • Patent number: 5965064
    Abstract: An anisotropically electroconductive adhesive to be used for establishing electric connection between terminals of, for example, an IC chip and of a circuit pattern, at a low cost with high reliabilities both in the establishment of electric connection and in the insulation upon the connection without suffering from short-circuiting between circuit lines in the circuit and without causing any obstruction on the circuit, even when the terminals or the circuit lines are disposed at close intervals, which adhesive comprises an electrically insulating adhesive matrix and electroconductive particles dispersed in the matrix, wherein the electroconductive particles comprise at least two electroconductive particulate products of different average particle sizes and wherein each particle of both the particulate products is coated with an electrically insulating resin insoluble in the insulating adhesive matrix.
    Type: Grant
    Filed: October 21, 1998
    Date of Patent: October 12, 1999
    Assignee: Sony Chemicals Corporation
    Inventors: Yukio Yamada, Masao Saito, Junji Shinozaki, Motohide Takeichi
  • Patent number: 5956843
    Abstract: A multilayered printed wiring board includes two or more layers each having a via hole therein, these holes aligned vertically above one another to minimize board real estate while assuring an effective circuit path between respective points on the two layers. One or both via holes can be filled with either an electrically conductive material (e.g., copper paste) or a nonconductive material (e.g., resin).
    Type: Grant
    Filed: February 4, 1997
    Date of Patent: September 28, 1999
    Assignee: International Business Machines
    Inventors: Shogo Mizumoto, Yutaka Tsukada
  • Patent number: 5955192
    Abstract: A conductive circuit board is prepared by forming a film of organopolysilane having a H-Si bond on a substrate, selectively exposing the organopolysilane film to light to form a photo-crosslinked layer in exposed areas, dissolving away unexposed areas, and contacting a silver salt with the photo-crosslinked layer and reducing the silver salt to form a silver conductive layer thereon. A conductive circuit board comprising a circuit-patterned film of photo-crosslinked polymer on a substrate and a silver conductive layer on the film has high and stable electric property.
    Type: Grant
    Filed: November 19, 1997
    Date of Patent: September 21, 1999
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Motoo Fukushima, Yoshitaka Hamada, Shigeru Mori
  • Patent number: 5936847
    Abstract: An improved circuit module construction for mounting and interconnecting electronic components to substrates, which is applicable to mounting a wide variety of electronic components and conductors, including inverted or `flip chip` mounted integrated circuits. The components are mounted to the substrate with a sandwiched non-conductive polymer layer which acts as the bonding agent and underfill. The substrate and underfill have apertures aligned with signal traces on the substrate and the contacts of the component and conductive polymer is injected through the apertures to fill the area between the substrate contacts and the component contacts, to secure good electrical connection. In one embodiment the non-conductive polymer is printed on the contact side of the substrate with gaps for the contacts. In another embodiment B-staged non-conductive polymer is coated on the non-contact side of the substrate, prior to forming contact apertures and mounting of components.
    Type: Grant
    Filed: May 2, 1996
    Date of Patent: August 10, 1999
    Assignee: HEI, Inc.
    Inventor: Scott J. Kazle
  • Patent number: 5932339
    Abstract: The present invention relates to an anisotropically electricity-conductive film obtainable by dispersing in an adhesive agent electrically conductive particles, the adhesive agent being a curable adhesive agent comprising as a major component at least one polymer selected from the group consisting of an ethylene-vinyl acetate copolymer; a copolymer of ethylene, vinyl acetate and an acrylate and/or methacrylate monomer; a copolymer of ethylene, vinyl acetate and maleic acid and/or maleic anhydride; a copolymer of ethylene, an acrylate and/or methacrylate monomer and maleic acid and/or maleic anhydride; and an ionomer resin wherein molecules of an ethylene-methacrylic acid copolymer are linked with each other through a metal ion.
    Type: Grant
    Filed: August 22, 1996
    Date of Patent: August 3, 1999
    Assignee: Bridgestone Corporation
    Inventors: Ryou Sakurai, Tasuku Saito, Hidefumi Kotsubo
  • Patent number: 5928767
    Abstract: A thin film printed board precursor containing a laminate of a dielectric thermosetting resin film layer and a heat and electrically conductive metal foil layer in direct adhesive bonding with a side of the resin film, optionally containing a supporting layer comprising one or more of fiber, fabric and thermoplastic polymer in contact with the other side of the resin layer, wherein the dielectric thermosetting resin layer has an unimpeded thickness that is at least equal to that of the foil layer bonded to it.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: July 27, 1999
    Assignee: Dexter Corporation
    Inventors: William F. Gebhardt, Rocco Papalia
  • Patent number: 5920037
    Abstract: The present invention provides a new device and technique for enhancing the electrical properties of the thick metal backer/adhesive bond/ground plane interface. The enhanced electrical properties are obtained by micro-roughening a connection surface of the thick metal backer prior to forming the thick metal backer/adhesive bond/ground plane interface.
    Type: Grant
    Filed: May 12, 1997
    Date of Patent: July 6, 1999
    Assignee: International Business Machines Corporation
    Inventors: Lisa Jeanine Jimarez, David Noel Light, Andrew Michael Seman, David Brian Stone
  • Patent number: 5910641
    Abstract: An electrically conductive adhesive film having a pattern of microscopic elongate metal particles which extend from one surface to the other to provide an interconnection between confronting conductive metal pads abutting the surface. The particles have sharp ends to penetrate the oxide coating on the conductive metal pads of an electronic module when force is applied to press the module against the film.
    Type: Grant
    Filed: July 17, 1997
    Date of Patent: June 8, 1999
    Assignee: International Business Machines Corporation
    Inventors: Michael A. Gaynes, Jaynal A. Molla
  • Patent number: 5900312
    Abstract: A package for mounting an integrated circuit chip includes a body having at least a first region and a second region. The first region has a first coefficient of thermal expansion (CTE), and the second region has a second, different CTE. The first region approximately matches the CTE of the integrated circuit chip mounted on the package, and the second region approximates the CTE of the printed wiring board to which the package is mounted.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: May 4, 1999
    Assignee: W. L. Gore & Associates, Inc.
    Inventor: Mark F. Sylvester
  • Patent number: 5879502
    Abstract: A method is described by which it is possible to obtain modules comprising a body of synthetic material, including an electronic circuit, having two main faces absolutely smooth and without swellings at the place where the circuit is enclosed in the body. The body includes two sheets having either an impregnating resin or a certain quantity of gas or air, the electronic circuit being disposed between the two sheets and these being pressed together at a predetermined temperature. A module is thus obtained having at least one electronic circuit which can include a coil serving as an antenna, the module being able to be cut in credit card format and being able to serve as an identification badge. The same method and the same substances can be used to make a module having an electronic circuit with a housing, contact tracks being flush on one of the main faces of the module. Composite modules having the two types of circuits can also be made using the same method.
    Type: Grant
    Filed: November 12, 1996
    Date of Patent: March 9, 1999
    Inventor: Ake Gustafson
  • Patent number: 5861076
    Abstract: The present invention relates to a bond enhancement process for promoting strong, stable adhesive bonds between surfaces of copper foil and adjacent resin impregnated substrates or superimposed metallic sublayers. According to the process of the invention, a black oxide-coated copper surface is treated with an aqueous reducing solution containing sodium metabisulfite and sodium sulfide to convert the black oxide coating to a roughened metallic copper coating. The roughened metallic copper-coated surface is then passivated and laminated to a resin impregnated substrate. The bond enhancement process is especially useful in multilayer printed circuit fabrication and in the treatment of copper circuit lines and areas which are disconnected from each other, that is, which do not have electrically conductive continuity.
    Type: Grant
    Filed: September 6, 1995
    Date of Patent: January 19, 1999
    Assignee: Park Electrochemical Corporation
    Inventors: Edwin J. Adlam, Sukianto Rusli, Jordan L. Wahl, Tayfun Ilercil, Robert A. Forcier, Jerome S. Sallo
  • Patent number: 5855993
    Abstract: Silicon and germanium containing materials are used at surface of conductors in electronic devices. Solder can be fluxlessly bonded and wires can be wire bonded to these surfaces. These material are used as a surface coating for lead frames for packaging integrated circuit chips. These materials can be decal transferred onto conductor surfaces or electrolessly or electrolytically disposed thereon.
    Type: Grant
    Filed: February 22, 1994
    Date of Patent: January 5, 1999
    Assignee: International Business Machines Corporation
    Inventors: Michael John Brady, Curtis Edward Farrell, Sung Kwon Kang, Jeffrey Robert Marino, Donald Joseph Mikalsen, Paul Andrew Moskowitz, Eugene John O'Sullivan, Terrence Robert O'Toole, Sampath Purushothaman, Sheldon Cole Rieley, George Frederick Walker
  • Patent number: 5844782
    Abstract: A printed wiring board and an electronic device using the same with which the formation of cracks in base portions of projecting external electrodes formed on lands on the printed wiring,board is certainly prevented. With respect to a printed wiring board 11 having lands 16 formed in a wiring pattern where external electrodes 13 are to be formed and a pattern-protecting film 17 having openings 17a where the external electrodes 13 are to be formed, the opening diameter D1 of the openings 17a in the pattern-protecting film 17 is set greater by a predetermined dimension than the external diameter D2 of the lands 16 and a gap is thereby provided between each of the external electrodes 13 and the pattern-protecting film 17 so that the external electrodes 13 and the pattern-protecting film 17 do not make contact with each other and as a result there is no cracking of the external electrodes 13 caused by differential thermal expansion of the external electrodes 13 and the pattern-protecting film 17.
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: December 1, 1998
    Assignee: Sony Corporation
    Inventor: Hiroyuki Fukasawa
  • Patent number: 5839190
    Abstract: Methods for making a printed wiring device including a substrate having a metal-plateable member and an electrical component having a metal plateable lead connected with the metal-plateable member, the lead and the member being electrically interconnected by a metal layer plated on the lead and on the member and forming an electrically conductive path between the lead and the member.
    Type: Grant
    Filed: October 10, 1996
    Date of Patent: November 24, 1998
    Inventor: Kenneth W. Sullivan
  • Patent number: 5828555
    Abstract: A multilayer printed-circuit board includes at least one inner-layer signal line, first and second ground layers between which the inner-layer signal line is sandwiched via a frame member made of an insulating material in a thickness direction of the multilayer printed-circuit board, and metallic wall members which are provided on inner walls of slits formed in the frame member and extending along the inner-layer signal line. The first and second ground layers and the metallic wall members shielding the inner-layer signal line.
    Type: Grant
    Filed: May 20, 1997
    Date of Patent: October 27, 1998
    Assignee: Fujitsu Limited
    Inventor: Takumi Itoh
  • Patent number: 5807626
    Abstract: A ceramic circuit board is characterized by being constituted by bonding a ceramic substrate 2 and a metal circuit plate 3 to each other through a silver-copper-based brazing material layer 5 containing at least one active metal selected from Ti, Zr, Hf, V, Nb and Ta, and wherein the Vickers hardness of a reaction product layer 6 generated by causing the silver-copper-based brazing material layer 5 and the ceramic substrate 2 to react with each other is 1,100 or more. At least one element selected from In, Zn, Cd, and Sn is preferably contained in the silver-copper-based brazing material layer 5. Further, 0.1 to 10.0 wt % of carbon powder is preferably contained in the brazing material layer 5. According to the above arrangement, there can be provided a ceramic circuit board in which cracks are effectively suppressed from being formed even after a thermal cycle is repeatedly applied for a long period of time, i.e.
    Type: Grant
    Filed: September 30, 1996
    Date of Patent: September 15, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takayuki Naba
  • Patent number: 5796586
    Abstract: Discloses is a method for making substrate boards for use in packaging semiconductor devices. The substrate board has a plurality of conductive traces patterned on at least one side, and an anti-adhesive solder mask is applied over and around conductive traces lying at an outer portion of the substrate board. The center portion of the substrate board will therefore remain uncovered by the anti-adhesive solder mask material. As a result, the uncovered center portion of the substrate board and conductive traces provide a surface area that is substantially more adhesive than the outer portion covered with the anti-adhesive solder mask.
    Type: Grant
    Filed: August 26, 1996
    Date of Patent: August 18, 1998
    Assignee: National Semiconductor, Inc.
    Inventors: Shaw Wei Lee, Poh Ling Lee, Anthony E. Panczak
  • Patent number: 5796050
    Abstract: A circuit board assembly which includes a flexible printed circuit bonded to a substrate by an adhesive that is curable upon exposure to actinic radiation of a preselected wavelength is provided. The flexible circuit includes a dielectric layer made from a material that is transmissive to actinic radiation of a preselected wavelength and a conductive layer disposed on a surface of the dielectric layer. The conductive layer has an opening therethrough to allow passage of the actinic radiation through the flexible circuit. Preferably, the opening is in the region of the conductive layer that lacks metal tracings. The substrate of the assembly includes a top surface defining a mating region and a channel and a side surface defining a port that is in communication with the channel. The channel of the substrate is aligned and coincident with the opening of the conductive layer. The adhesive is disposed within the channel.
    Type: Grant
    Filed: February 5, 1997
    Date of Patent: August 18, 1998
    Assignee: International Business Machines Corporation
    Inventor: Jeffrey Scott Campbell
  • Patent number: 5780776
    Abstract: A multilayer circuit board unit includes a plurality of printed boards, an electronic component, an anisotropic conductive film, and a notched hole. The printed boards have printed circuits on surfaces thereof and are stacked on each other. The electronic component is mounted on at least one of the printed boards and arranged between the printed board on which it is mounted and an adjacent printed board. The anisotropic conductive film electrically connects the printed circuits of the printed boards to each other. The notched hole is formed in the adjacent printed board to correspond to the electronic component.
    Type: Grant
    Filed: May 30, 1997
    Date of Patent: July 14, 1998
    Assignee: NEC Corporation
    Inventor: Yuji Noda
  • Patent number: 5771157
    Abstract: A printed circuit board carries a microcircuit package electrically connected to bare copper connector pads on the printed circuit board microcircuit package by aluminum wires. The copper connection pads are encapsulated by a material such as low stress liquid encapsulant having a thermal expansion coefficient approximately equal to that of the printed circuit board substrate material. Preferably the printed circuit board laminate comprises cellulose epoxy mat such as CEM-1.
    Type: Grant
    Filed: March 8, 1996
    Date of Patent: June 23, 1998
    Assignee: Honeywell, Inc.
    Inventor: Robert L. Zak
  • Patent number: 5763058
    Abstract: An article having an electrical circuit component printed directly onto one side of a substrate includes the substrate and an electrical circuit component formed of a conductive liquid printed directly onto one side of the substrate. The electrical component is capable of performing its electrical circuit functions, as printed, and without the necessity for post-printing processes such as metal etching, catalytic ink activation, or electroless deposition.
    Type: Grant
    Filed: October 7, 1995
    Date of Patent: June 9, 1998
    Assignee: Paramount Packaging Corporation
    Inventors: Irvin Isen, Joseph Kucherovsky
  • Patent number: 5750271
    Abstract: A method of forming a solder film on a metallic surface such as a pad of a metallic circuit of a printed circuit board and a lead frame of electronic parts, which is capable of forming a precise and fine pattern and which comprises selectively imparting tackiness to only a predetermined part of the metallic surface by means of a tacky layer-forming solution, adhering a powdered solder to the resulting tacky part, and then melting the solder by heating to thereby form a solder film.
    Type: Grant
    Filed: August 10, 1995
    Date of Patent: May 12, 1998
    Assignee: Showa Denko K.K.
    Inventors: Takeo Kuramoto, Masataka Watabe, Satoshi Noda, Takashi Shoji, Takekazu Sakai
  • Patent number: 5745984
    Abstract: A multi-chip module is provided which utilizes benzocyclobutene as a laminate adhesive for bonding the upper dielectric films in a high density interconnect structure. The benzocyclobutene thermosetting polymer is spin coated on a polyimide film, and baked at low temperature to remove any solvent to leave a B-staged coating on the polyimide film. The composite film can be laminated to an underlying electrical structure using a vacuum laminator and heat. As the heat is applied, the BCB layer softens, flows and then cures to bond the polyimide film to the underlying electrical structure.
    Type: Grant
    Filed: July 10, 1995
    Date of Patent: May 5, 1998
    Assignee: Martin Marietta Corporation
    Inventors: Herbert Stanley Cole, Jr., Theresa Ann Sitnik-Nieters
  • Patent number: 5737191
    Abstract: A semiconductor chip mount structure includes a substrate having a base surface on which base side connectors are formed; a semiconductor chip mounted on the base surface, the semiconductor chip having chip side connectors on a first surface thereof facing the base surface, the chip side connectors being electrically connected to the base side connectors; an insulating resin layer covering the chip side connectors and the base side connectors; a metal layer, made of a metal having a melting point lower than a temperature at which the electrical components of the semiconductor chip may be thermally destroyed, for covering the semiconductor chip and the insulating resin layer; and a wetting characteristic improving layer such as a metal powder or foil layer, formed along a contact surface between the metal layer and the insulation resin layer.
    Type: Grant
    Filed: April 5, 1996
    Date of Patent: April 7, 1998
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Michio Horiuchi, Yoichi Harayama
  • Patent number: 5723205
    Abstract: A multilayer rigid flex printed circuit board, wherein the board laminate comprises a double-sided basestock composite, formed by laminating two conducting sheets (12 and 14) to an insulating layer, said insulator layer contacting a flexible core (20), a second insulator layer (24 and 26) affixed to each side of the basestock, said insulator having a cutout region proximate to the flexible core of the basestock composite, a flexible layer (28 and 30) affixed to said cutout regions with an adhesive, wherein said flexible layer contacts the conducting layers and abuts and overlaps a portion of the second insulator layer such that upon stacking of the board laminate a hollow region (32) is produced as between the stacked laminate sections.
    Type: Grant
    Filed: September 6, 1996
    Date of Patent: March 3, 1998
    Assignee: Teledyne Industries, Inc.
    Inventors: Lee J. Millette, A. Roland Caron, Joseph A. Thoman
  • Patent number: 5719354
    Abstract: The invention provides a multilayer microelectronic circuit board including a laminate of a plurality of circuit layers containing conductive vias within the layers or a combination of conductive vias and conductive wiring patterns on a surface of the layers, the layers comprising a first liquid crystal polymer and, interposed between said circuit layers, a layer of second liquid crystal polymer having a melting point of at least about 10.degree. C. lower than the melting point of the first liquid crystal polymer.
    Type: Grant
    Filed: September 16, 1994
    Date of Patent: February 17, 1998
    Assignees: Hoechst Celanese Corp., Kuraray Company Ltd.
    Inventors: Randy Douglas Jester, Edwin Charles Culbertson, Detlef M. Frank, Sherman Hall Rounsville, John Arthur Penoyer, Takeichi Tsugaka, Minoru Onodera, Toshiaki Sato, Toru Sanefuji
  • Patent number: 5714252
    Abstract: The present invention relates to a deformable substrate assembly for microelectronic components which includes an array of ductile metal circuit traces on a surface thereof. When an electronic component is adhesively bonded to the substrate assembly, and bonding elements from the component contact the traces, the substrate has material properties which allow individual bonding elements to locally deform the traces until the traces penetrate into the substrate surface.
    Type: Grant
    Filed: January 2, 1997
    Date of Patent: February 3, 1998
    Assignee: Minnesota Mining and Manufacturing Company
    Inventors: Peter B. Hogerton, Kenneth E. Carlson
  • Patent number: 5707749
    Abstract: A thin film multilayer wiring material excellent in reliability, yield, productivity, and higher positioning accuracy includes an insulation organic film having a wiring pattern on one surface and an adhesive layer on another principal surface. The insulation organic film is a polyimide film having a heat resistance at a pyrolysis beginning temperature of 350.degree. to 550.degree. C., a dielectric constant of 3.5-2.2 and a flame retardance of V-0 or V-1 according to the UL-94 standard. The adhesive layer contains an ether bismaleimide compound.
    Type: Grant
    Filed: June 26, 1995
    Date of Patent: January 13, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Junichi Katagiri, Akio Takahashi, Akira Nagai, Haruo Akahoshi, Kouji Fujisaki, Akio Mukoh, Fumiyuki Kobayashi
  • Patent number: 5706578
    Abstract: Substrates (11, 12) each of which having components with contacts (13, 14) are arranged one above the other in a stack in order to produce a three-dimensional circuit arrangement. Metal surfaces (20) are applied onto that main surface (15) of at least one of the substrates (11) which is adjacent to the other substrate, which metal surfaces (20) are soldered to the adjacent main surface (17) of the other substrate (12) in order to produce the mechanical joint between the two substrates (11, 12). The components can be tested before the application of further substrates, and substrates having faulty components are removed by grinding away into the metal surfaces (20).
    Type: Grant
    Filed: August 13, 1996
    Date of Patent: January 13, 1998
    Assignee: Siemens Aktiengesellschaft
    Inventor: Holger Hubner
  • Patent number: 5688584
    Abstract: A multilayer circuit board having three or more conductive layers, with at least two conductive layers electrically and mechanically connected by an interconnecting adhesive layer, is disclosed. The interconnecting adhesive layer comprises a conductive adhesive material having a plurality of deformable, heat fusible metallic particles dispersed substantially throughout a non-conductive adhesive. The fabricated multilayer circuit boards have interconnections which are reliable, heat resistant, and capable of withstanding thermal cycling and typical circuit board finishing and assembly processes.
    Type: Grant
    Filed: September 27, 1995
    Date of Patent: November 18, 1997
    Assignee: Sheldahl, Inc.
    Inventors: Keith L. Casson, Carol Myers, Kenneth B. Gilleo, Deanna Suilmann, Edward Mahagnoul, Marion Tibesar
  • Patent number: 5686703
    Abstract: An anisotropic, electrically conductive adhesive film includes an insulating adhesive, electrically conductive particles dispersed in the electrically insulating adhesive, and transparent, spherical glass particles dispersed in the insulating adhesive.
    Type: Grant
    Filed: December 16, 1994
    Date of Patent: November 11, 1997
    Assignee: Minnesota Mining and Manufacturing Company
    Inventor: Hiroaki Yamaguchi
  • Patent number: 5679444
    Abstract: A method for producing a panel of a multi-layer electronic circuit package and resulting article of manufacture is provided comprising the steps of coating a circuitized core material that has been cut into panels with a dielectric material and copper cover sheets; forming circuits from the cover sheets by etching; applying an adhesive polymer across the dielectric material covering the entire area of the panel; applying a cover sheet; drilling the panel to form through-holes and vias; seeding and plating the through-holes and vias with joining metal; applying photo-resist to the panels exposed with an image of the area of the panel to be joined and developed; and etching the cover sheet and the photo-resist away in the area of the panel to be joined to expose the adhesive polymer.
    Type: Grant
    Filed: July 15, 1996
    Date of Patent: October 21, 1997
    Assignee: International Business Machines Corporation
    Inventors: Charles Robert Davis, Thomas P. Gall
  • Patent number: 5674595
    Abstract: A flexible circuit board having an improved protective coverlay is provided. The product flexible circuit board comprises a flexible, dielectric substrate, one or more electrical conductors carried on the surface thereof, one or more electrical contact bumps in electrical communication with the conductors, and an improved protective coverlay electrically insulating the electrical conductors. The coverlay, which is a solid, tack-free film bonded to the surface of the dielectric substrate, is formed in situ from one or more layers of flexible, dielectric, polymeric adhesives and avoids the use of a pre-formed, self-supporting film.
    Type: Grant
    Filed: April 22, 1996
    Date of Patent: October 7, 1997
    Assignee: International Business Machines Corporation
    Inventors: Raymond Archie Busacco, Russell E. Darrow, Paul G. Rickerl
  • Patent number: 5652055
    Abstract: The present invention is an improved adhesive sheet (also known as a "bond ply," "bond film," or "prepreg") material suitable for bonding together electric circuit boards and other electrical components. The adhesive sheet of the present invention comprises a combination of a porous expanded polytetrafluoroethylene (PTFE), a ceramic filler, and a thermoset resin imbibed within the porous PTFE structure. By employing a fill of less than about 60% by weight of resin, the adhesive sheet has exceptionally good performance characteristics while being vastly easier to process.
    Type: Grant
    Filed: April 7, 1995
    Date of Patent: July 29, 1997
    Assignee: W. L. Gore & Associates, Inc.
    Inventors: David R. King, Gary C. Adler, Joseph E. Korleski, Michelle M. H. Waters
  • Patent number: 5633072
    Abstract: A process for manufacturing a multi-layer printed wire board, also referred to as a multilayer, comprising at least two electrically insulating substrates with electrically conductive traces or layers provided on at least three surfaces thereof, in which process, by means of lamination under pressure, a cured basic substrate based on a UD-reinforced synthetic material, provided on either side with traces, is combined with and bonded to a back-up substrate, wherein during the laminating process the back-up substrate is added to the basic substrate, the back-up substrate comprising a UD-reinforced cured core layer provided at least on the side facing the conducting traces of the basic substrate with a still plastically deformable (flowable) adhesive layer, and such a pressure is exerted on the laminate as to bring said cured core layer of the back-up substrate into contact or practically into contact with the conducting traces of the basic substrate, and the space between these traces is filled with the adhesiv
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: May 27, 1997
    Assignee: Akzo Nobel N.V.
    Inventors: Erik Middelman, Pieter H. Zuuring
  • Patent number: 5623127
    Abstract: A solder clad printed circuit board (100) consists of an electrically insulating substrate that has copper circuit traces (105), portions of which are solderable. A substantially planar layer (120) of a soldering composition is fused to the solderable traces, to form a solder pad that is not domed. The layer is composed of a mass of off-eutectic solder particles (115) that are fused together to form an agglomeration (120) having a porous structure. The solder particles are fused together by heating the off-eutectic solder to a temperature that is between the solidus temperature and the liquidus temperature of the solder. The solder is then cooled below the solidus temperature to solidify it.
    Type: Grant
    Filed: December 2, 1994
    Date of Patent: April 22, 1997
    Assignee: Motorola, Inc.
    Inventors: Edwin L. Bradley, III, Kingshuk Banerji, William B. Mullen, III
  • Patent number: 5620782
    Abstract: Disclosed is a parallel processor packaging structure and a method for manufacturing the structure. The individual logic and memory elements are on printed circuit cards. These printed circuit boards and cards are, in turn, mounted on or connected to circuitized flexible substrates extending outwardly from a laminate of the circuitized, flexible substrates. Intercommunication is provided through a switch structure that is implemented in the laminate. The printed circuit cards are mounted on or connected to a plurality of circuitized flexible substrates, with one printed circuit card at each end of the circuitized flexible circuit. The circuitized flexible substrates connect the separate printed circuit boards and cards through the central laminate portion. This laminate portion provides XY plane and Z-axis interconnection for inter-processor, inter-memory, inter-processor/memory element, and processor to memory bussing interconnection, and communication.
    Type: Grant
    Filed: June 2, 1995
    Date of Patent: April 15, 1997
    Assignee: International Business Machines Corporation
    Inventors: Charles R. Davis, Thomas P. Duffy, Steven L. Hanakovic, Howard L. Heck, John T. Kolias, John S. Kresge, David N. Light, Ajit K. Trivedi
  • Patent number: 5592737
    Abstract: A process for manufacturing a multi-layer printed wire board, also referred to as a multilayer, comprising at least two electrically insulating substrates with electrically conductive traces or layers provided on at least three surfaces thereof, in which process, by means of lamination under pressure, a cured basic substrate based on a UD-reinforced synthetic material, provided on either side with traces, is combined with and bonded to a back-up substrate, wherein during the laminating process the back-up substrate is added to the basic substrate, the back-up substrate comprising a UD-reinforced cured core layer provided at least on the side facing the conducting traces of the basic substrate with a still plastically deformable (flowable) adhesive layer, and such a pressure is exerted on the laminate as to bring said cured core layer of the back-up substrate into contact or practically into contact with the conducting traces of the basic substrate, and the space between these traces is filled with the adhesiv
    Type: Grant
    Filed: December 3, 1993
    Date of Patent: January 14, 1997
    Assignee: Akzo Nobel N.V.
    Inventors: Erik Middelman, Pieter H. Zuuring
  • Patent number: 5590461
    Abstract: A multi-layer wiring board has at least one stacking block with an insulating hard substrate, a grounding layer being provided in the insulating hard substrate. A plurality of wiring layers are provided over upper and lower major surfaces of the insulating hard substrate. A plurality of throughholes are provided in the insulating hard substrate for connecting wiring layers on the top and bottom surfaces of the substrate. A base block has an insulating base board, and at least one wiring layer provided over one major surface of the insulating base board. Connections electrically and mechanically connect the at least one stacking block and the base block. The stacking block and the base block may be simultaneously manufactured in parallel with others. The stacking block and the base block may be adhered to each other by an adhesive layer. Each electrical connection between the stacking block and the base block may be achieved with bumps and pads.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: January 7, 1997
    Assignee: NEC Corporation
    Inventor: Hisashi Ishida
  • Patent number: 5591519
    Abstract: Multilayer rigid flex printed circuits are fabricated from a novel basestock composite comprising two copper conducting sheets, bonded to insulator layers comprised of fiberglass sheets impregnated with an adhesive such as epoxy, wherein the insulator layers are both affixed to Kapton layers wherein said Kapton layers are not coextensive with the borders of the insulator layers. The basestock composite can then be imaged and etched on the conductor layers to form conductor patterns, laminated or coated with a coverlay of dielectric material, and the basestock can be cut at a point internal to its borders and into the Kapton layers thereby separating two imaged and etched conductor layers.
    Type: Grant
    Filed: May 25, 1995
    Date of Patent: January 7, 1997
    Assignee: Teledyne Industries, Inc.
    Inventors: A. Roland Caron, Lee J. Millette, John G. King
  • Patent number: 5586007
    Abstract: A circuit board consisting of an insulating substrate, a die bonding pad for fixedly bonding a semiconductor element onto the insulating substrate, and a wiring layer, in such a manner that the die bonding pad and wire layer are formed on the insulating substrate. A first heat conducting/radiating layer formed on the portion of the surface of the insulating substrate where the wiring layer and the die bonding pad are not formed, in such a manner that the first heat conducting/radiating layer is thermally connected to the die bonding pad. A second heat conducting/radiating layer is formed on the rear surface of the insulating substrate, and a heat bridge through which the die bonding pad or the first heat conducting/radiating layer is connected to the second heat conducting/radiating layer. The circuit board is light and small, and high in heat radiating characteristic, and low in manufacturing cost.
    Type: Grant
    Filed: October 13, 1995
    Date of Patent: December 17, 1996
    Assignee: Fuji Xerox Co., Ltd.
    Inventor: Masao Funada
  • Patent number: 5579573
    Abstract: Method for fabricating an undercoated chip electrically interconnected to a substrate. The method includes the initial step of depositing a predetermined quantity of a liquid undercoat material onto the chip or the substrate. The method continues with the step of interconnecting the chip to the substrate so as to form an electrical interconnection bond therebetween. Finally, the method concludes with the step of heating, reflowing and curing the undercoat material during or after the step of electrically interconnecting the chip to the substrate.
    Type: Grant
    Filed: October 11, 1994
    Date of Patent: December 3, 1996
    Assignee: Ford Motor Company
    Inventors: Jay D. Baker, Cuong V. Pham, Robert E. Belke, Jr.
  • Patent number: 5571365
    Abstract: An adhesive for a printed circuit board which consists essentially of a dispersion of a resin which is soluble in an alkaline oxidizing agent after curing in a resin matrix which is sparingly soluble in an alkaline oxidizing agent after curing, and a process for producing a printed circuit board using the above adhesive.
    Type: Grant
    Filed: November 14, 1994
    Date of Patent: November 5, 1996
    Assignees: Nec Corporation, Sumitomo Bakelite Corporation Limited
    Inventors: Eiji Maehata, Toshio Komiyatani
  • Patent number: 5557843
    Abstract: A printed circuit board and method of manufacture thereof is disclosed. The printed circuit board includes a first substrate provided from a conductive layer having disposed on a first surface thereof a cured adhesive layer, A semi-cured adhesive layer is then disposed over the cured adhesive layer and a second substrate is disposed against the semi-cured adhesive layer.
    Type: Grant
    Filed: August 30, 1994
    Date of Patent: September 24, 1996
    Assignee: Parlex Corporation
    Inventors: Darryl J. McKenney, Robert D. Cyr
  • Patent number: 5548091
    Abstract: A semiconductor chip connection component is provided with an adhesive, desirably in a solid, non-tacky condition on its bottom surface. The adhesive may be present in a pattern covering less than all of the component bottom surface, so as to provide a void-free interface when the adhesive bonds the component to the top surface of a chip. The adhesive desirably is brought to a flowable condition by heat transferred from the chip itself. The connection component may include leads having base metal strips in a trace area underlying the top surface and noble metal portions protruding beyond an edge of the top layer. A flowable, curable material encapsulates the base metal sections. Because the base metal sections desirably are free of undercuts, the same can be encapsulated in a void-free manner during formation of the component.
    Type: Grant
    Filed: October 26, 1993
    Date of Patent: August 20, 1996
    Assignee: Tessera, Inc.
    Inventors: Thomas H. DiStefano, Gus Karavakis, Zlata Kovac, Craig Mitchell
  • Patent number: 5539153
    Abstract: A solder bump is stenciled into a substrate, providing bumped substrate at pitches below 400 microns. The solder is applied through stencil/mask and paste method; the mask, however, remains attached to the substrate during reflow. Pitches of greater than 400 microns may also be obtained through the invention.
    Type: Grant
    Filed: August 8, 1994
    Date of Patent: July 23, 1996
    Assignee: Hewlett-Packard Company
    Inventors: Matthew K. Schwiebert, Donald T. Campbell, Matthew Heydinger, Robert E. Kraft, Hubert A. Vander Plas
  • Patent number: 5536908
    Abstract: A printed circuit is provided that is capable of operating at temperatures above 200.degree. C. A printed wiring board has a plating scheme of Tin plating over sulfamate nickel plated over copper. The materials are electroplated in the pattern of the desired circuit. The copper provides a conductive material for carrying electrical current. The sulfamate nickel is a ductile material that serves as a barrier between the copper and the Tin and is able to maintain its strength under temperatures of above 200.degree. C. The Tin is compatible with the new solder compound that is used to solder electrical components to the board. The solder compound is comprised of Tin and Silver. This solder has a higher initial melting point than traditional Tin/Lead solders but has a lower solder reflow temperature than conventional HMP solder compounds. This new solder is also stronger than conventional HMP solder and contains virtually no Lead component.
    Type: Grant
    Filed: September 27, 1995
    Date of Patent: July 16, 1996
    Assignee: Schlumberger Technology Corporation
    Inventors: Richard K. Etchells, Lawrence E. Tawyea
  • Patent number: 5519177
    Abstract: An adhesive usable for electroless plating in the formation of printed circuit boards is formed by dispersing a cured heat-resistant resin powder soluble in an acid or an oxidizing agent into an uncured heat-resistant resin matrix hardly soluble in an acid or an oxidizing agent after the curing treatment, in which the heat-resistant resin matrix is a mixture of a thermoplastic resin and an uncured thermosetting resin or an uncured photosensitive resin.
    Type: Grant
    Filed: May 16, 1994
    Date of Patent: May 21, 1996
    Assignee: IBIDEN Co., Ltd.
    Inventors: Dong D. Wang, Motoo Asai
  • Patent number: 5504993
    Abstract: A method of fabricating a printed circuit board power core is disclosed wherein ceramic particles that have a diameter that is approximately equal to the desired dielectric thickness are combined with dielectric powders that have a relatively very small size. To produce a dielectric core using this technique, a dielectric material mixture is applied between two conductor layers and bonded therebetween. This dielectric material mixture preferably has a concentration of large particles equal to the desired core thickness with a loading factor of large/small particles less than the maximum ratio needed to provide the desired dielectric constant, but greater than the ratio required to provide stability during the pressing and curing steps.
    Type: Grant
    Filed: August 30, 1994
    Date of Patent: April 9, 1996
    Assignee: Storage Technology Corporation
    Inventors: Stanley R. Szerlip, Floyd G. Paurus, Frances Planinsek, Robert D. Stroud
  • Patent number: 5502889
    Abstract: A multilayer circuit board having three or more conductive layers, with at least two conductive layers electrically and mechanically connected by an interconnecting adhesive layer, is disclosed. The interconnecting adhesive layer comprises a conductive adhesive material having a plurality of deformable, heat fusible metallic particles dispersed substantially throughout a non-conductive adhesive. The fabricated multilayer circuit boards have interconnections which are reliable, heat resistant, and capable of withstanding thermal cycling and typical circuit board finishing and assembly processes.
    Type: Grant
    Filed: January 8, 1993
    Date of Patent: April 2, 1996
    Assignee: Sheldahl, Inc.
    Inventors: Keith L. Casson, Carol Myers, Kenneth B. Gilleo, Deanna Suilmann, Edward Mahagnoul, Marion Tibesar