Adhesive/bonding Patents (Class 174/259)
  • Publication number: 20110192639
    Abstract: A novel sulfonium borate complex that is capable of reducing the amount of fluorine ions generated during thermal cationic polymerization, and is capable of providing a thermal cationic polymerizable adhesive with low-temperature fast curing properties is represented by a structure represented by the formula (1). In the formula (1), R1 is an aralkyl group, R2 is a lower alkyl group, and R3 is a lower alkoxycarbonyl group. X is a halogen atom, and n is an integer of from 1 to 3.
    Type: Application
    Filed: December 2, 2009
    Publication date: August 11, 2011
    Applicant: SONY CHEMICAL & INFORMATION DEVICE CORPORATION
    Inventors: Yoshihisa Shinya, Jun Yamamoto, Ryota Aizaki, Naoki Hayashi, Misao Konishi, Yasuhiro Fujita
  • Patent number: 7988808
    Abstract: A bonding structure with a buffer layer, and a method of forming the same are provided. The bonding structure comprises a first substrate with metal pads thereon, a protection layer covered on the surface of the substrate, a first adhesive metal layer formed on the metal pads, a buffer layer coated on the protection layer and the metal pads, a first metal layer covered on the buffer layer, and a second substrate with electrodes and a bonding layer thereon. The first metal layer, the electrodes and the bonding layer are bonded to form the bonding structure. Direct bonding can be performed through surface activation or heat pressure. The method uses fewer steps and is more reliable. The temperature required for bonding the structure is lower. The bonding density between the contacted surfaces is increased to a fine pitch. The quality at the bonding points is increased because fewer contaminations between the contacted surfaces are generated.
    Type: Grant
    Filed: August 19, 2008
    Date of Patent: August 2, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Su-Tsai Lu, Shu-Ming Chang, Shyh-Ming Chang, Yao-Sheng Lin, Yuan-Chang Huang
  • Publication number: 20110176288
    Abstract: The adhesive composition of the invention comprises a thermoplastic resin, a radical polymerizing compound, a radical polymerization initiator and a radical polymerization regulator. According to the present invention it is possible to provide an adhesive composition, a circuit connecting material, a connection structure for a circuit member and a semiconductor device whereby curing treatment can be carried out with sufficient speed at low temperature, curing treatment can be carried out with a wide process margin, and adequately stable adhesive strength can be obtained.
    Type: Application
    Filed: June 8, 2005
    Publication date: July 21, 2011
    Applicant: HITACHI CHEMICAL COMPANY LTD.
    Inventors: Shigeki Katogi, Houko Sutou, Hiroyuki Izawa, Toshiaki Shirasaka, Masami Yusa, Takanobu Kobayashi
  • Patent number: 7981508
    Abstract: The present invention provides a circuit creation technology that improves conductive line manufacture by adding active and elemental palladium onto the surface of a substrate. The palladium is disposed in minute amounts on the surface and does not form a conductive layer by itself, but facilitates subsequent deposition of a metal onto the surface, according to the pattern of the palladium, to form the conductive lines.
    Type: Grant
    Filed: September 12, 2007
    Date of Patent: July 19, 2011
    Assignee: SRI International
    Inventors: Sunity Sharma, Jaspreet Singh Dhau
  • Patent number: 7982322
    Abstract: The present invention provides a liquid resin composition for electronic part sealing that is good in fluidity in a narrow gap, being free from void generation, and that excels in fillet formation; and an electronic part apparatus sealed thereby of high reliability (moisture resistance and thermal shock resistance). The liquid resin composition for electronic part sealing is characterized by comprising (A) an epoxy resin including a liquid epoxy resin, (B) a hardening agent including a liquid aromatic amine, (C) a hydrazide compound having an average particle diameter of less than 2 ?m, and (D) an inorganic filler having an average particle diameter of less than 2 ?m.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: July 19, 2011
    Assignee: Hitachi Chemical Co., Ltd.
    Inventors: Satoru Tsuchida, Shinsuke Hagiwara, Kazuyoshi Tendou
  • Publication number: 20110168434
    Abstract: Vertical stacks of a metal portion and a semiconductor portion formed on a first substrate are brought into physical contact with vertical stacks of a metal portion and a semiconductor portion formed on a second substrate. Alternately, vertical stacks of a metal portion and a semiconductor portion formed on a first substrate are brought into physical contact with metal portions formed on a second substrate. The assembly of the first and second substrates is subjected to an anneal at a temperature that induces formation of a metal semiconductor alloy derived from the semiconductor portions and the metal portions. The first substrate and the second substrate are bonded through metal semiconductor alloy portions that adhere to the first and second substrates.
    Type: Application
    Filed: January 12, 2010
    Publication date: July 14, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mukta G. Farooq, Zhengwen Li, Zhijiong Luo, Huilong Zhu
  • Patent number: 7974104
    Abstract: A printed wiring board having an insulating base material; a wiring formed on at least one surface of the insulating base material, the wiring forming a predetermined circuit pattern; a first connection terminal portion formed on the surface and electrically connected to the wiring, the first connection terminal portion having a first width; a second connection terminal portion formed on the surface and electrically connected to the wiring, the second connection terminal portion having a second width; and a cover layer configured to cover the wiring and expose the first and the second connection terminal portion.
    Type: Grant
    Filed: October 13, 2009
    Date of Patent: July 5, 2011
    Assignee: Fujikura Ltd.
    Inventors: Tomofumi Kitada, Hiroki Maruo
  • Patent number: 7973412
    Abstract: In a semiconductor device bonded to a motherboard with a bonding material having a melting point of 200° C. to 230° C., a bonding material 15 which is a die bonding material for bonding a semiconductor element 13 to a semiconductor substrate 11 is a Bi alloy containing 0.8 wt % to 10 wt % of Cu and 0.02 wt % to 0.2 wt % of Ge, so that the bonding material 15 for bonding the semiconductor element 13 to the semiconductor substrate 11 is not melted when the semiconductor device is bonded to the motherboard by reflowing. It is therefore possible to suppress poor connection on the semiconductor element 13, thereby securing the mountability and electrical reliability of the semiconductor device.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: July 5, 2011
    Assignee: Panasonic Corporation
    Inventors: Seiji Fujiwara, Yoshihiro Tomita, Akio Furusawa, Kenichirou Suetugu
  • Publication number: 20110148777
    Abstract: A method for bonding a flexible printed circuit (FPC) onto a baseboard is provided. The baseboard includes a bonding region having a plurality of first electrodes, and a protective layer covering the bonding region. The FPC includes a plurality of second electrodes. The method includes aligning the FPC with the bonding region of the baseboard, positioning an ACF between the FPC and the baseboard, and pressing the FPC towards the baseboard such that an end of a conductive particle abuts against the second electrode of the FPC, and an opposite end of the conductive particle penetrates the protective layer and contacts the first electrodes.
    Type: Application
    Filed: February 8, 2010
    Publication date: June 23, 2011
    Applicants: INNOCOM TECHNOLOGY (SHENZHEN) CO., LTD., INNOLUX DISPLAY CORP.
    Inventor: KAI MENG
  • Patent number: 7964801
    Abstract: A circuit board structure and fabrication method thereof are disclosed, including: a circuit board with a circuit layer thereon; a reactant formed on the surface of the circuit layer, wherein the reactant is an organic metallic polymer having a polymer end and a metal ion end; and a dielectric layer formed above the reactant and the circuit board, thus forming a metallic bond between the metal ion end of the reactant and the circuit layer and forming a chemical bond between the polymer end of the reactant and the dielectric layer. Owing to enhanced bonding between the dielectric layer and the circuit board, electrical performance of the circuit board structure is improved, and the demand for fine circuits is met.
    Type: Grant
    Filed: March 26, 2008
    Date of Patent: June 21, 2011
    Assignee: Unimicron Technology Corp.
    Inventor: Chao-Wen Shih
  • Publication number: 20110139500
    Abstract: A method of connecting a flexible flat cable and a board is provided, which includes the steps of preparing the flexible flat cable having a first connection terminal composed of a plurality of exposed flat type conductors; preparing the board having a second connection terminal composed of a plurality of conductors; aligning each of the first and second connection terminals and placing an adhesive film on the first connection terminal; and thermocompressionally bonding the first and second connection terminals by heating and fusing the adhesive film while applying a pressure to the adhesive film, thereby sealing the first and second connection terminals, bringing each flat type conductor of the first connection terminal and the corresponding conductor of the second connection terminal into direct contact to form an electrical connection, and insulating adjacent ones of the plurality of flat type conductors of the first connection terminal by the adhesive film.
    Type: Application
    Filed: August 27, 2009
    Publication date: June 16, 2011
    Inventor: Tomihiro Hara
  • Patent number: 7957157
    Abstract: A printed circuit board including: a semiconductor package; a board; first to fourth electrodes on a second face of the semiconductor package; fifth to eighth electrodes on a mount region of the board; a first conductor connecting the first electrode with the second electrode; a second conductor connecting the third electrode with the fourth electrode; a third conductor connecting the sixth electrode with the seventh electrode; fourth conductors respectively connecting to the fifth electrode and the eighth electrode; conductive bonding portions bonding each of the electrodes on the second face with corresponding one of the electrodes on the mount region; and a determination circuit connected to the fourth conductors and configured to determine a difference between a value of current supplied to one of the fourth conductors and a value of current received through the other fourth conductor.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: June 7, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yuuichi Koga
  • Patent number: 7952033
    Abstract: A microstructure comprises a laminate structure having a first conductor, a second conductor, and an intervening insulator located between the first and the second conductors. The first conductor includes opposite faces in relation to the second conductor, side faces, and edge parts which form the boundaries of the aforementioned opposite faces and side faces. The second conductor includes an extended face extending beyond the edge parts exceeding the first conductor. The insulation film includes an area covering at least part of an edge part and/or at least part of a side face.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: May 31, 2011
    Assignee: Fujitsu Limited
    Inventors: Yoshihiro Mizuno, Norinao Kouma, Hisao Okuda, Hiromitsu Soneda, Tsuyoshi Matsumoto, Osamu Tsuboi
  • Patent number: 7947908
    Abstract: An electronic device is provided. The electronic device includes: a circuit board having a surface on which a hollow is formed; an electronic component placed into the hollow; a pattern wiring which is formed on a bottom surface of the hollow and whose tip is provided at a position corresponding to a signal electrode of the electronic component; a signal wire connecting a tip of the pattern wiring and the signal electrode of the electronic component; two in-hollow ground patterns formed so as to sandwich the tip of the pattern wiring therebetween on the bottom surface of the hollow; and two or more ground wires that connect two ground electrodes provided on the electronic component so as to sandwich the signal electrode therebetween to the corresponding in-hollow ground patterns, respectively.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: May 24, 2011
    Assignee: Advantest Corporation
    Inventors: Shoichi Mizuno, Hiroaki Takeuchi, Shuji Nojima
  • Patent number: 7944703
    Abstract: A flash memory device includes one or two panels that are attached solely by a thermal bond adhesive to either a frame or integrated circuits (e.g., flash memory devices) disposed on a PCBA. The frame is disposed around the PCBA and supports peripheral edges of the panels. The thermal bond adhesive is either heat-activated or heat-cured, and is applied to either the memory devices, the frame or the panels, and then compressed between the panels and flash memory devices/frame using a fixture. The fixture is then passed through an oven to activate/cure the adhesive. An optional insulating layer is disposed between the panels and the ICs. An optional conforming coating layer is formed over the ICs for preventing oxidation of integrated circuit leads or soldering area, covering or protecting extreme temperature exposure either cold or hot, and waterproofing for certain military or industrial applications.
    Type: Grant
    Filed: April 3, 2008
    Date of Patent: May 17, 2011
    Assignee: Super Talent Electronics, Inc.
    Inventors: Jim Chin-Nan Ni, Nan Nan, I-Kang Yu, Abraham C. Ma
  • Publication number: 20110100690
    Abstract: An electrically conductive body includes: a first electrically conductive material; a second electrically conductive material; and a bonding material bonding the first electrically conductive material to the second electrically conductive material at least for electric conduction. The bonding material is made of a metallic structure containing copper-tin based intermetallic compound phases and tin-bismuth phases, the copper-tin based intermetallic compound phases being continuous between the first electrically conductive material and the second electrically conductive material, the tin-bismuth phases being surrounded by the copper-tin based intermetallic compound phases.
    Type: Application
    Filed: October 29, 2010
    Publication date: May 5, 2011
    Applicants: FUJITSU LIMITED, SANYO SPECIAL STEEL CO., LTD.
    Inventors: Hideaki Yoshimura, Kenji Fukuzono, Takashi Kanda, Tomohisa Yagi, Hiroki Ikeda, Katsu Yanagimoto
  • Patent number: 7935892
    Abstract: Circuit board having conductor wiring and connection terminal; anisotropic conductive resin layer provided on one surface of circuit board; and plurality of electronic components respectively provided with electrode terminals in positions facing the connection terminal are included. The anisotropic conductive resin layer includes at least one kind of conductive particles selected from coiled conductive particles, fiber fluff conductive particles and conductive particles provided with a plurality of conductive protrusions, and resin binder; electrically couples electrode terminals of plurality of electronic components to connection terminals to each other with conductive particles; mechanically fixes electronic components and circuit board to each other; and protects conductor wiring.
    Type: Grant
    Filed: April 14, 2006
    Date of Patent: May 3, 2011
    Assignee: Panasonic Corporation
    Inventors: Kazuhiro Nishikawa, Hidenori Miyakawa, Norihito Tsukahara, Shigeaki Sakatani
  • Patent number: 7935408
    Abstract: An electrical structure and method of forming. The electrical structure includes a first substrate, first dielectric layer, an underfill layer, and a second substrate. The first dielectric layer is formed over a top surface of the first substrate. The first dielectric layer includes a first opening extending through a top surface and a bottom surface of said first dielectric layer. The underfill layer is formed over the top surface of the first dielectric layer and within the first opening. The second substrate is formed over and in contact with the underfill layer.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: May 3, 2011
    Assignee: International Business Machines Corporation
    Inventors: Timothy Harrison Daubenspeck, Jeffrey Peter Gambino, Christopher David Muzzy, Wolfgang Sauter
  • Patent number: 7928323
    Abstract: A wiring unit includes a first insulating layer which is provided with an electrode and a wire electrically connected to the electrode on one surface of the first insulating layer; a second insulating layer which is formed on the one surface of the first insulating layer and which covers the wire; an adhesive layer which is formed on a surface, of the second insulating layer, not facing the first insulating layer; a through hole which is formed through the adhesive layer and the second insulating layer and in which the electrode is exposed; a protective sheet which is detachably adhered on a surface, of the adhesive layer, not facing the second insulating layer, and; and a liquid electroconductive material which is filled in a space defined by the through hole, the electrode exposed in the through hole, and the protective sheet.
    Type: Grant
    Filed: July 17, 2008
    Date of Patent: April 19, 2011
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventor: Shuhei Hiwada
  • Patent number: 7916494
    Abstract: A printed circuit board includes a high-speed differential signal control chip, first to fourth coupling capacitor pads, first and second connector pads, first and second inductor pads, a number of transmission lines, a power pin, two sharing pads, and two selection pads. Two coupling capacitors can selectively connect the first and second coupling capacitor pads and the two sharing pads or between the third and fourth coupling capacitor pads and the two sharing pads, respectively. Two inductors can connect the first and second inductor pads and the two selection pads respectively, and the first and second inductor pads and the two selection pads can be void.
    Type: Grant
    Filed: December 8, 2009
    Date of Patent: March 29, 2011
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Yung-Chieh Chen, Cheng-Hsien Lee, Shou-Kuo Hsu, Shen-Chun Li, Hsien-Chuan Liang
  • Publication number: 20110061916
    Abstract: A wiring board includes a substrate having a surface made of an insulating resin. An adhesion layer is formed on the substrate. A wiring layer is formed on the adhesion layer. The adhesion layer is formed by a nitrided NiCu alloy containing nitrogen therein. A nitrogen content of the nitrided NiCu alloy is within a range from 1 atoms % to 5 atoms %.
    Type: Application
    Filed: August 27, 2010
    Publication date: March 17, 2011
    Inventor: Tomoo Yamasaki
  • Patent number: 7905011
    Abstract: In a method for forming bumps 19 on electrodes 32 of a wiring board 31, a fluid 14 containing conductive particles 16 and a gas bubble generating agent is supplied onto a first region 17 including the electrodes 32 on the wiring board 31. Then, a substrate 40 which has a protruding surface 13 having the same area as that of the first region 17 and formed on a main surface 18 of the substrate 40 having a larger area than that of the first region 17 is disposed so that the protruding surface 13 faces the first region 17 of the wiring board 31. Then, the fluid 14 is heated to generate gas bubbles 30 from the gas bubble generating agent contained in the fluid 14.
    Type: Grant
    Filed: February 22, 2007
    Date of Patent: March 15, 2011
    Assignee: Panasonic Corporation
    Inventors: Yasushi Taniguchi, Seiichi Nakatani, Seiji Karashima, Takashi Kitae, Susumu Matsuoka, Masayoshi Koyama
  • Patent number: 7894201
    Abstract: A method of manufacturing an electronic component includes the steps of a) forming a plurality of wiring boards that include first through holes penetrating through a semiconductor substrate and conductive material buried in the first through holes; b) providing conductive projections on the conductive material of any of the plurality of wiring boards; and c) bonding the plurality of wiring boards to each other and electrically connecting the conductive material of the respective wiring boards by the projections.
    Type: Grant
    Filed: November 20, 2007
    Date of Patent: February 22, 2011
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kei Murayama, Yuichi Taguchi, Akinori Shiraishi, Masahiro Sunohara, Mitsutoshi Higashi
  • Patent number: 7888599
    Abstract: Disclosed is a PCB including an embedded capacitor and a method of fabricating the same. The long embedded capacitor is formed through an insulating layer, making a high capacitance and various capacitance designs possible.
    Type: Grant
    Filed: September 2, 2008
    Date of Patent: February 15, 2011
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Young Woo Kim, Byoung Youl Min, Chang Myung Ryu, Woo Lim Chae, Han Kim
  • Publication number: 20110030999
    Abstract: The invention is to provide a metal circuit wiring having an organic adhesive layer, the metal circuit wirings comprising: an organic adhesive layer formed with a resin selected from the group consisting of acrylic resin, chloroprene rubber and silicone rubber resin; and metal wiring patterns formed with an ink composition including metal nanoparticles, in which the metal wiring exhibits excellent adhesive between metal nano materials and the substrate and electrical property.
    Type: Application
    Filed: December 9, 2009
    Publication date: February 10, 2011
    Inventors: Young-Il LEE, Sung-Eun Kim, Tae-Hoon Kim, Young-Kwan Seo
  • Patent number: 7875807
    Abstract: An electronic device includes an electronic part including at least one first electrode, a substrate including at least one second electrode, and at least one bump formed on the at least one first electrode and formed from an elastic conductive resin including a resin having rubbery elasticity, and an acicular conductive filler including a surface layer coated with one of gold, silver, nickel, and copper. The at least one first electrode and the at least one second electrode are electrically connected to each other by mechanically contacting the at least one bump with the at least one second electrode.
    Type: Grant
    Filed: February 12, 2007
    Date of Patent: January 25, 2011
    Assignee: Ricoh Company, Ltd.
    Inventors: Takeshi Sano, Hirofumi Kobayashi, Hideaki Ohkura
  • Publication number: 20110005813
    Abstract: Articles and methods of manufacture are provided for using laser energy in an automated bonding machine to effect laser welding of ribbons to electronic components, particularly conductive ribbons comprising titanium for microelectronic circuits. Bonding and connection of microelectronic circuits with discrete heating avoids heat damage to peripheral microelectronic components. Bonding of flexible materials and low-resistance materials are possible, and are less dependant on substrate and terminal stability in comparison to other bonding methods. The ribbon-connections can forgo the use of blocks, bond pads, and bond pad arrays for attaching ribbon to a printed wiring board. Profile height of the ribbon-connection is decreased and the density of ribbons and bonding sites can be increased compared to ribbon-connections employing bonding pads.
    Type: Application
    Filed: July 8, 2009
    Publication date: January 13, 2011
    Inventor: Steven Boyd
  • Patent number: 7862889
    Abstract: The invention relates to an adhesion assisting agent-bearing metal foil comprising a layer of an adhesion assisting agent containing an epoxy resin as an indispensable component on a metal, wherein the adhesion assisting agent layer has a thickness of 0.1 to 10 ?m. The invention also relates to a printed wiring board being a multilayer wiring board having a plurality of layers, wherein an adhesion assisting agent layer is formed between insulating layers.
    Type: Grant
    Filed: November 5, 2009
    Date of Patent: January 4, 2011
    Assignee: Hitachi Chemical Co., Ltd.
    Inventors: Kenji Takai, Norio Moriike, Kenichi Kamiyama, Takako Watanabe, Shin Takanezawa, Koji Morita, Katsuyuki Masuda, Kiyoshi Hasegawa
  • Publication number: 20100326714
    Abstract: A printed circuit board include: a printed circuit board main body having a mounting area on a first surface of the printed circuit board main body and a recess being provided at a recess area on a second surface that is a back side of the first surface of the printed circuit board main body, the electronic component being mounted on the mounting area, the recess area being provided to correspond to the mounting area; and a thermal expansion control element being placed in the recess and having a smaller thermal expansion coefficient than the printed circuit board main body.
    Type: Application
    Filed: June 17, 2010
    Publication date: December 30, 2010
    Applicant: FUJITSU LIMITED
    Inventor: Kenji FUKUZONO
  • Publication number: 20100319972
    Abstract: A printed circuit board having a connection terminal which includes: an insulating substrate including first and second surfaces, and an end surface along an outline normal to an insertion direction of the connection terminal; at least one lead wiring layer formed on the first surface of the insulating substrate; an insulating protection film covering the lead wiring layer; at least one lead terminal layer constituting an end portion of the lead wiring layer, the lead terminal layer being formed into a strip, and having an end surface along the outline; a reinforcement body adhered on the second surface of the insulating substrate at a backside position of the lead terminal layer; wherein a distance between an outer surface of the lead terminal layer and an outer surface of the reinforcement body on the outline side is smaller than a distance therebetween on the lead wiring layer side.
    Type: Application
    Filed: June 22, 2010
    Publication date: December 23, 2010
    Applicant: FUJIKURA LTD.
    Inventor: Hirohito WATANABE
  • Publication number: 20100307801
    Abstract: The present invention relates to a multilayer ceramic substrate including: a ceramic stacked structure in which multiple ceramic layers are stacked and interconnected to one another through vias provided in respective ceramic layers, the ceramic stacked structure having surface reforming layers 111a formed by removal of glass component on the surfaces of upper and lower parts of the ceramic layers; and contact pads formed on a top surface and a bottom surface of the ceramic stacked structure so as to be electrically connected to the vias.
    Type: Application
    Filed: July 28, 2009
    Publication date: December 9, 2010
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yong Suk Kim, Yong Soo Oh, Byeung Gyu Chang
  • Publication number: 20100307805
    Abstract: The circuit connecting material of the invention is a circuit connecting material for connection between a first circuit member having a first circuit electrode formed on the main side of a first board, and a second circuit member having a second circuit electrode formed on the main side of a second board, with the first circuit electrode and second circuit electrode laid facing each other, the circuit connecting material comprising a curing agent that generates free radicals, a radical polymerizing substance and a compound containing secondary thiol group. The circuit connecting material of the invention is capable of low-temperature rapid curing and has excellent storage stability.
    Type: Application
    Filed: August 29, 2008
    Publication date: December 9, 2010
    Applicant: HITACHI CHEMICAL COMPANY, LTD.
    Inventors: Takashi Nakazawa, Motohiro Arifuku, Kazuyoshi Kojima, Nichiomi Mochizuki
  • Patent number: 7847195
    Abstract: A closing device (1, 101, 201, 301) includes a plurality of adhesive closing elements (2) in the form of a hook, mushroom head or clasp, and a flat support (3, 103, 203, 303). The adhesive closing elements (2) protruded from at least one surface (4) of the support (3, 103, 203, 303). At least one switching circuit (5, 503) with at least one electric and/or electronic component (6, 106, 7, 107, 207, 307) is provided.
    Type: Grant
    Filed: October 11, 2003
    Date of Patent: December 7, 2010
    Assignee: Gottlieb Binder GmbH & Co. KG
    Inventor: Jan Tuma
  • Publication number: 20100294551
    Abstract: There are provided an adhesive for connecting a circuit to be interposed between substrates having circuit electrodes thereon opposed to each other and to electrically connect the circuit electrodes on the substrates opposed to each other to the pressurizing direction under pressure, wherein the adhesive contains a compound having an acid equivalent of 5 to 500 KOH mg/g, and an adhesive for connecting a circuit to be interposed between substrates having circuit electrodes opposed to each other and to electrically connect the electrodes on the substrate opposed to each other to the pressurizing direction under pressure, wherein the adhesive comprises a first adhesive layer and a second adhesive layer, and a glass transition temperature of the first adhesive layer after pressure connection is higher than the glass transition temperature of the second adhesive layer after pressure connection.
    Type: Application
    Filed: July 30, 2010
    Publication date: November 25, 2010
    Inventors: Satoyuki Nomura, Tohru Fujinawa, Hiroshi Ono, Hoko Kanazawa, Masami Yusa
  • Publication number: 20100294550
    Abstract: A bonding material containing 2 to 10.5% by weight of Cu, 0.02 to 0.2% by weight of Ge and 89.3 to 97.98% by weight of Bi has heat resistance of up to 275° C. and superior wettability, and a bonding material containing 2 to 10.5% by weight of Cu, 0.02 to 0.2% by weight of Ge, 0.02 to 0.11% by weight of Ni and 89.19 to 97.96% by weight of Bi has more superior heat resistance.
    Type: Application
    Filed: December 9, 2008
    Publication date: November 25, 2010
    Inventors: Akio Furusawa, Shigeki Sakaguchi, Kenichiro Suetsugu
  • Patent number: 7834275
    Abstract: A secure electronic entity comprising a support and a microcircuit having an active surface which is at least partially covered by a resin, wherein at least one distinct element masks the active surface in an at least partial manner, characterized in that the element (13) is joined to the resin (16) in a more resistant manner than to the support (11).
    Type: Grant
    Filed: April 22, 2005
    Date of Patent: November 16, 2010
    Assignee: Oberthur Technologies
    Inventor: François Launay
  • Patent number: 7829793
    Abstract: An additive process disk drive suspension interconnect, and method therefor is provided. The interconnect has a metal grounding layer of typically stainless steel or copper metallized stainless steel, a metal conductive layer and an insulative layer between the metal grounding layer and the conductive metal layer. A circuit component such as a slider is electrically connected to the conductive layer along a grounding path from the circuit component and the conductive layer to the metal grounding layer through an aperture in the insulative layer. For improved electrical connection a tie layer is provided through the insulative layer onto the grounding layer in bonding relation with the ground layer. A conductor is deposited onto both the conductive metal layer and the tie layer in conductive metal layer and tie layer bonding relation, and the circuit component is thus bonded to the grounding layer by the conductor.
    Type: Grant
    Filed: July 13, 2006
    Date of Patent: November 9, 2010
    Assignee: Magnecomp Corporation
    Inventors: Christopher Schreiber, Christopher Dunn
  • Patent number: 7829794
    Abstract: The present invention relates to partially rigid flexible circuits having both rigid portions and flexible portions and methods for making the same.
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: November 9, 2010
    Assignee: 3M Innovative Properties Company
    Inventors: Rui Yang, Nathan P. Kreutter, James S. McHattie
  • Patent number: 7820274
    Abstract: A prepreg having low dielectric constant, low dielectric loss, and high heat cycle resistance. The prepreg includes a sheet-like preform and a resin-impregnated, sheet-like, fiber-reinforced material thermal pressure adhered to the sheet-like preform. The sheet-like preform includes a graft copolymer (a) in which 15 to 40 parts by mass of an aromatic vinyl monomer are grafted to 60 to 85 parts by mass of a random or block copolymer comprising monomer units selected from nonpolar ?-olefin monomers and nonpolar conjugated diene monomers. The resin-impregnated, sheet-like, fiber-reinforced material includes a sheet-like, fiber-reinforced material (b1) and a thermoplastic resin (b2) into which the sheet-like, fiber-reinforced material (b1) is impregnated. The thermoplastic resin (b2) is a random or block copolymer composed of 60 to 90 mass % of a monomer unit, which is selected from nonpolar ?-olefin monomers and nonpolar conjugated diene monomers, and 10 to 40 mass % of an aromatic vinyl monomer unit.
    Type: Grant
    Filed: May 30, 2007
    Date of Patent: October 26, 2010
    Assignee: NOF Corporation
    Inventors: Toshihiro Ohta, Tomiho Yamada, Shigeru Asami
  • Patent number: 7812261
    Abstract: There are provided a multilayer printed circuit board and a testing piece for the printed circuit board, including a substrate having an inner-layer conductor circuit and one or more outer-layer conductor circuits formed on the substrate with an insulating layer laid between the substrate and outer-layer conductor circuit, wherein a strain gauge having a resistive element held tight between resin films formed from polyimide or thermoplastic resin is buried in the substrate, and electrodes electrically connected to the resistive element are exposed to outside from the resin film and are electrically connected at exposed portions thereof to a viahole. Even if a crack is caused by an impact test to take place in the insulative resin layer, the resin film layers prevent the crack from spreading and thus the resistive element forming the strain gauge will not be ruptured.
    Type: Grant
    Filed: January 17, 2005
    Date of Patent: October 12, 2010
    Assignee: Ibiden Co., Ltd.
    Inventors: Takahiro Yamashita, Hirofumi Futamura, Akihide Ishihara, Takayoshi Katahira
  • Publication number: 20100244266
    Abstract: The present invention discloses a metallic bonding structure for copper and solder, which applies to connect at least one electronic element. The metallic bonding structure comprises at least one copper-based member and at least one zinc bonding member. The copper-based members are arranged on the electronic element through at least one solder member. The zinc bonding members are arranged between the copper-based members and the solder members. The solder members are tin-based solder bumps.
    Type: Application
    Filed: March 27, 2009
    Publication date: September 30, 2010
    Inventors: Jenq-Gong Duh, Chi-Yang Yu
  • Publication number: 20100230141
    Abstract: The invention offers a board-connecting structure that can provide electrodes with a fine pitch and that can combine the insulating property and the connection reliability. The structure of connecting printed wiring boards 10 and 20 electrically connects a plurality of first electrodes 12 and 13 provided to be adjacent to each other on a first board 11 with a plurality of second electrodes 22 and 23 provided to be adjacent to each other on a second board 21 through an adhesive 30 that contains conductive particles 31 and that has anisotropic conductivity. By heating and pressing the adhesive placed between the mutually facing first electrode 12 and second electrode 22 and between the mutually facing first electrode 13 and second electrode 23, an adhesive layer 30a is formed between the first board 11 and the second board 21 and in the adhesive layer 30a, a cavity portion 33 is formed between the first electrodes 12 and 13 and between the second electrodes 22 and 23.
    Type: Application
    Filed: March 12, 2010
    Publication date: September 16, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Masamichi Yamamoto, Kyouichirou Nakatsugi, Ayao Kariya, Katsuhiro Satou, Yasuhiro Okuda
  • Patent number: 7794820
    Abstract: Disclosed herein are a printed circuit board and a fabrication method thereof, which can improve electrical properties, shorten processing time, and reduce the thickness of a chip package by achieving an ultra-thin fine circuit pattern. The printed circuit board includes an insulating material; a via-hole formed in a given location of the insulating material; a copper seed layer formed through ion beam surface treatment and vacuum deposition on the surface of the insulating material having the via-hole formed therein; and a copper pattern plating layer formed on a given region of the insulating material, which has the copper seed layer formed thereon, and in the via-hole.
    Type: Grant
    Filed: July 20, 2007
    Date of Patent: September 14, 2010
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Dong Sun Kim, Taehoon Kim, Jong Seok Song, Sam Jin Her, Jun Heyoung Park
  • Patent number: 7790268
    Abstract: A circuit assembly comprises two or more circuit laminates, each comprising a conductive metal layer disposed on a poly(arylene ether ketone) substrate layer, wherein at least one of the conductive metal layers has been patterned to form a circuit, and a bond ply layer comprising a thermoplastic or thermosetting material. The thermoplastic bond ply has a melting point between 250° C. and 370° C., a decomposition temperature greater than about 290° C. and a dissipation factor of less than 0.01 at 10 GHz. The thermoset bond ply has a dissipation factor less than 0.01 at 10 GHz and a decomposition temperature greater than about 290° C. after lamination. Methods of forming the above circuit assemblies are also disclosed.
    Type: Grant
    Filed: April 10, 2008
    Date of Patent: September 7, 2010
    Assignee: World Properties, Inc.
    Inventor: Scott D. Kennedy
  • Patent number: 7785708
    Abstract: The present invention provides an adhesive film for circuit connection which is to be interposed between circuit electrodes facing each other and used for electrically connecting the circuit electrodes to each other, which comprises a curing agent to generate free radicals with heating, a radically polymerizable substance, and a film-forming polymer, and in which a temporary fixing power to a flexible substrate having the circuit electrode is 40-180 N/m.
    Type: Grant
    Filed: January 6, 2005
    Date of Patent: August 31, 2010
    Assignee: Hitachi Chemical Co., Ltd.
    Inventors: Takashi Tatsuzawa, Itsuo Watanabe, Naoki Fukushima, Masahide Kume
  • Publication number: 20100212944
    Abstract: The present invention is directed to silane coupling agents for printed circuit boards, such as high-temperature printed circuit boards (PCBs), a process for synthesizing the silane coupling agent, and PCBs with such coupling agents. The silane coupling agent is defined by the following formula: wherein at least one R? is an allyl and the other one is hydrogen, an alkyl, a cycloalkyl, an aryl, a heteroaryl, a non-aromatic heterocyclic ring, or an allyl; and R1 is an alkyl, a cycloalkyl, an aryl, a heteroaryl, a non-aromatic heterocyclic ring, or an allyl.
    Type: Application
    Filed: January 26, 2010
    Publication date: August 26, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jeffrey Donald Gelorme, Joseph Kuczynski
  • Publication number: 20100212945
    Abstract: An inductive thermal bonding system includes at least one inductive bonding or heating member containing a magnetic E-shaped inductive core and a coil bounding a central member of the E-shaped inductive core. A rigid cover plate allows high and predictable temperature rate-of-change during use and reduced thermal cycling time without risk of detriment. Adaptive solid copper pads on multiplayer bonding regions minimize bonding errors and improve reliability. A cooling system is provided for adaptively cooling both the bond head and the bonded stack. Single and paired inductive heating members may be employed, and may also be alternatively controlled and positioned to aid generation of multiplayer bonding subassemblies distant from an edge of a multiplayer sheet construct.
    Type: Application
    Filed: August 30, 2007
    Publication date: August 26, 2010
    Inventors: Anthony Faraci, Gary N. Sortino
  • Patent number: 7781679
    Abstract: A disk drive suspension interconnect, and method therefor. The interconnect has a metal grounding layer, a metal conductive layer and an insulative layer between the metal grounding layer and the conductive metal layer. A circuit component such as a slider is electrically connected to the conductive layer along a grounding path from the circuit component and the conductive layer to the metal grounding layer through an aperture in the insulative layer. For improved electrical connection a tie layer is provided through the insulative layer onto the grounding layer in bonding relation with the ground layer. A conductor is deposited onto both the conductive metal layer and the tie layer in conductive metal layer and tie layer bonding relation, and the circuit component is thus bonded to the grounding layer by the conductor.
    Type: Grant
    Filed: January 26, 2006
    Date of Patent: August 24, 2010
    Assignee: Magnecomp Corporation
    Inventors: Christopher Schreiber, Christopher Dunn
  • Publication number: 20100206623
    Abstract: To provide a nonconductive adhesive film, for electrically connecting a flexible printed circuit board to a circuit board, which is superior in both storage stability and curability and which suppresses the formation of air bubbles at the time of press bonding. A nonconductive adhesive film substantially comprising a heat-curable epoxy resin, a latent curing agent, and organic elastic fine particles of an average particle size of approximately 1 ?m or less, a film being formed by aggregation of the organic elastic fine particles, is provided.
    Type: Application
    Filed: October 6, 2008
    Publication date: August 19, 2010
    Inventors: Kohichiro Kawate, Hiroko Arita, Hideaki Yasui, Yoshiaki Sato
  • Patent number: 7776438
    Abstract: The present invention provides an adhesive film for circuit connection which is to be interposed between circuit electrodes facing each other and used for electrically connecting the circuit electrodes to each other, which comprises a curing agent to generate free radicals with heating, a radically polymerizable substance, and a film-forming polymer, and in which a temporary fixing power to a flexible substrate having the circuit electrode is 40-180 N/m.
    Type: Grant
    Filed: October 25, 2007
    Date of Patent: August 17, 2010
    Assignee: Hitachi Chemical Co., Ltd.
    Inventors: Takashi Tatsuzawa, Itsuo Watanabe, Naoki Fukushima, Masahide Kume