Abstract: An objective of this invention is to provide an interlayer dielectric film with a carrier material used in a multilayer printed circuit board, which exhibits sufficient rigidity for a thin multilayer printed circuit board. According to the present invention, there is provided an interlayer dielectric film with a carrier material comprising a carrier material comprised of a metal foil or resin film and an interlayer dielectric film formed on one side of the carrier material, wherein the interlayer dielectric film is comprised of a base material impregnated with a resin; the base material has a thickness of 8 ?m to 20 ?m; and when the resin is cured at 170° C. for one hour under a pressure of 30 kgf/cm2, an elongation percentage of the interlayer dielectric film in a planar direction is 0.05% or less as determined by a TMA method.

Abstract: A method for producing an arrangement of optoelectronic components (10) is specified, comprising the following steps: producing at least two fixing regions (2) on a first connection carrier (1); introducing solder material (3) into the fixing regions (2); applying a second connection carrier (4) to the fixing regions (2); and soldering the second connection carrier (4) onto the first connection carrier (1) with the solder material (3) in the fixing regions (2).

Abstract: Disclosed herein are a power module using sintering die attach and a manufacturing method of the same. The power module includes: a substrate having an insulating layer formed on a surface of a metal plate; a circuit layer formed on the substrate and including a wiring pattern and an electrode pattern; a device mounted on the wiring pattern; a sintering die attach layer applying a metal paste between the wiring pattern and the device and sintering the metal paste to bond the wiring pattern to the device; and a lead frame electrically connecting the device to the electrode pattern, whereby making it possible to simplify and facilitate the process, increase electrical efficiency and improve radiation characteristics, and manufacture firm and reliable power module.

Abstract: A printed circuit board and a manufacturing method of the printed circuit board are disclosed. The printed circuit board includes: a first insulation layer having a first pattern formed thereon; a first trench caved in one surface of the first insulation layer along at least a portion of the first pattern; and a second insulation layer stacked on one surface of the first insulation layer so as to cover the first pattern. The first trench is filled by the second insulation layer.

Abstract: Embodiments pin connections, electronic devices, and methods are shown that include pin configurations to reduce voids and pin tilting and other concerns during pin attach operations, such as attachment to a chip package pin grid array. Pin head are shown that include features such as convex surfaces, a number of legs, and channels in pin head surfaces.

Abstract: A printed wiring board including: an insulated substrate; a conductive circuit provided on one side of this insulated substrate; a cover layer covering the insulated substrate and the conductive circuit; and a conductive particle buried in this cover layer, wherein the conductive particle is buried in the cover layer so that the conductive particle contacts the conductive circuit and protrudes from the cover layer; and the conductive particle serves as an electric contact point.

Abstract: A multilayer electronic support structure comprising a plurality of layers extending in an X-Y plane consisting of a dielectric material surrounding metal via posts that conduct in a Z direction perpendicular to the X-Y plane, wherein a stacked via structure crossing at least two via layers of the plurality of layers comprises at least two via posts in neighboring via layers wherein the at least two stacked via posts in neighboring layers have different dimensions in the X-Y plane, such that the stacked via structure tapers.

Abstract: Disclosed are a printed circuit board and a method for manufacturing the same. The method for manufacturing the printed circuit board includes forming a base circuit board including a cavity circuit pattern in a cavity region on upper and lower portions of a substrate and internal circuit layers outside the cavity region, forming a cavity separation layer on the cavity circuit pattern, forming at least one pair of an insulating layer and a circuit layer on the base circuit board, cutting the insulating layer and the cavity separation layer provided on an etch stop pattern by controlling a focal length of a laser beam such that the laser beam reaches a surface of the base circuit board, and removing the insulating layer by separating the cavity separation layer to form the cavity. The cavity separation layer is formed on the cavity circuit pattern, and the resultant structure is cut to the cavity separation layer by using a laser so that the insulating layer is separated.

Abstract: The present invention provides a transparent conductive film which is low in terms of surface resistivity and high in terms of transparency. The transparent conductive film according to the present invention includes an adhesive conductive layer in openings of a conductive metal mesh layer provided on at least one surface of a transparent base material, wherein the conductive layer is composed of a conductive adhesive composition containing (A) a water-soluble vinyl polymer, (B) an organic additive, and (C) a conductive organic polymer compound, the organic additive (B) is at least one member selected among water-soluble polyhydric alcohols, water-soluble pyrrolidones, and hydrophilic aprotic solvents, and the conductive organic polymer compound (C) is at least one member selected among polyanilines, polypyrroles, polythiophenes, and derivatives thereof.

Abstract: An electroconductive ink made with metallic nanoparticles is disclosed. The ink contains an organophosphorus acid that increases adhesion between the deposited metallic layer and the substrate to which the metallic layer is applied.

Abstract: In order to provide a flexible laminate circuit board using a surface treated copper foil satisfying all of a bonding strength of a copper foil with respect to polyimide, acid resistance, and etching property, in a flexible laminate circuit board formed by a copper foil on the surface of a polyimide resin layer, the copper foil is a surface treated copper foil formed by depositing an Ni—Zn alloy onto at least one surface of a untreated copper foil, and the Zn deposition amount in the deposited Ni—Zn alloy is 6% or more and 15% or less of the (Ni deposition amount+Zn deposition amount), and the Zn deposition amount is 0.08 mg/dm2 or more to provide a flexible copper clad laminate.

Abstract: The present invention provides a multilayer rigid flexible printed circuit board including: a flexible region including a flexible film having a circuit pattern formed on one or both surfaces thereof and a laser blocking layer formed on the circuit pattern; and a rigid region formed adjacent to the flexible region and including a plurality of pattern layers on one or both surfaces of extended portions extended to both sides of the flexible film of the flexible region, and a method for manufacturing the same.

Abstract: An integrated circuit package system includes: providing a package substrate; mounting an interposer chip containing active circuitry over the package substrate; attaching a conductive bump stack having a base bump end and a stud bump end, the base bump end on the interposer chip; connecting a stack connector to the interposer chip and the package substrate; and applying a package encapsulant over the interposer chip, the stack connector, and the conductive bump stack with the stud bump end of the conductive bump stack substantially exposed.

Abstract: A mounting structure of an electronic component includes: a bump electrode included in the electronic component, the bump electrode having an internal resin as a core and a conductive film covering a surface of the internal resin, and elastically deforming so as to follow a shape of at least one corner of a terminal so that the conductive film makes direct conductive contact with at least part of a top surface of the terminal and at least part of a surface along a thickness direction of the terminal; a substrate having the terminal and the electronic component that is mounted on the substrate; and a holding unit provided to the substrate and the electronic component so as to hold a state in which the bump electrode electrically deformed makes conductive contact with the terminal.

Abstract: A layout method for electronic components of a double-sided surface mount circuit board is presented, which includes the following steps. At least one first electronic component is fixed on a first side surface of a circuit board through a reflow soldering process. At least one second electronic component is inserted on the first side surface of the circuit board. The other first electronic component is placed on a second side surface of the circuit board, and the other second electronic component is inserted on the second side surface of the circuit board. Finally, a reflow soldering process is performed on the circuit board disposed with the first electronic components and the second electronic components, thereby completing a layout process for the electronic components on the two side surfaces of the circuit board at the same time.

Abstract: At least one electronic component having a plurality of terminals on one of surfaces is temporarily fixed to a surface of a first support with a first adhesive layer in such a manner that the terminal side of the electronic component faces the first support. A second support having a second adhesive layer is fixed to the electronic component in order to interpose the electronic component between the first support and the second support. The first support and the first adhesive layer are peeled. The electronic component on the second support is sealed with a sealing resin in such a manner that at least a part of the terminals of the electronic component is exposed. An insulating resin layer and a wiring layer to be electrically connected to the terminal of the electronic component are stacked on the electronic component and the sealing resin.

Abstract: Disclosed is a wafer process body, a temporary adhesive layer is formed on a supporting body, and a wafer having a circuit-formed front surface and a to-be-processed back surface is stacked on the temporary adhesive layer, wherein the temporary adhesive layer is provided with a first temporary adhesive layer including a non-aromatic saturated hydrocarbon group-containing organopolysiloxane layer (A) which is adhered to the front surface of the wafer so as to be detachable and a second temporary adhesive layer comprised of a thermosetting-modified siloxane polymer layer (B) which is stacked on the first temporary adhesive layer and adhered to the supporting body so as to be detachable. Thus, temporary adhesion of a wafer with a supporting body may become easy, process conformity with the TSV formation process and with the wafer-back surface-wiring process may become high, and removal may be done easily, with high productivity.

Abstract: Decoupling capacitor circuit assembly is described. In one example, a circuit assembly includes a passive substrate, a plurality of terminals, and at least one capacitor. The passive substrate includes a top surface and a bottom surface. The plurality of terminals is formed on the top surface and is configured for electrical communication with a respective plurality of lands on a printed circuit board (PCB). The at least one capacitor is mounted to the bottom surface of the passive substrate and is configured to provide decoupling capacitance for an integrated circuit (IC) on the PCB. Each capacitor is coupled to a pair of the plurality of terminals. In another example, a circuit assembly includes a PCB, and IC mounted to the PCB, a passive substrate mounted to the PCB, and at least one capacitor mounted to the passive substrate for providing decoupling capacitance for the IC.

Abstract: Disclosed is a composition, in particular a dispersion, which contains nanofiber material in at least one organic matrix component, said nanofiber material being pre-treated in at least one method step for adjusting the physical properties of the composition.

Abstract: A circuit subassembly, comprising: a conductive layer, a dielectric layer formed from a thermosetting composition, wherein the thermosetting composition comprises, based on the total weight of the thermosetting composition a polybutadiene or polyisoprene resin, about 30 to about 70 percent by weight of a magnesium hydroxide having less than about 1000 ppm of ionic contaminants, and about 5 to about 15 percent by weight of a nitrogen-containing compound, wherein the nitrogen-containing compound comprises at least about 15 weight percent of nitrogen; and an adhesive layer disposed between and in intimate contact with the conductive layer and the dielectric layer, wherein the adhesive comprises a poly(arylene ether), wherein the circuit subassembly has a UL-94 rating of at least V-1.

Abstract: The present disclosure relates to a conductive structure. The conductive structure includes a first conductive layer, a conductive unit, a circuit board and a conductive material. The conductive unit is disposed on the first conductive layer. The circuit board having a first through hole is disposed on the first conductive layer. The conductive unit is exposed to the first through hole. The first through hole is filled with a conductive material, such that the conductive material is electrically connected to the conductive unit.

Abstract: A multilayer stacked circuit arrangement with localized separation section, has a first flat cable and first signal transmission lines arranged on the first flat cable. A second flat cable is stacked on and bonded to the first flat cable. The second flat cable further has signal transmission lines arranged on it. A bonding substance layer is formed between a first non-separation section of the first flat cable and a second non-separation section of the second flat cable for properly stacking the first and second flat cables where the separation sections are spaced apart from each other. A conductive via extends between the first non-separation section and the second non-separation section. At least some of the second signal transmission lines of the second flat cable are connected through the conductive via to the first signal transmission lines of the first flat cable.

Abstract: The invention offers a board-connecting structure that can provide electrodes with a fine pitch and that can combine the insulating property and the connection reliability. The structure of connecting printed wiring boards 10 and 20 electrically connects a plurality of first electrodes 12 and 13 provided to be adjacent to each other on a first board 11 with a plurality of second electrodes 22 and 23 provided to be adjacent to each other on a second board 21 through an adhesive 30 that contains conductive particles 31 and that has anisotropic conductivity. By heating and pressing the adhesive placed between the mutually facing first electrode 12 and second electrode 22 and between the mutually facing first electrode 13 and second electrode 23, an adhesive layer 30a is formed between the first board 11 and the second board 21 and in the adhesive layer 30a, a cavity portion 33 is formed between the first electrodes 12 and 13 and between the second electrodes 22 and 23.

Abstract: A multilayer electronics assembly and associated method of manufacture are provided. The multilayer electronics assembly includes a plurality of stacked substrate layers. Each of the substrate layers is fusion bonded to at least an adjacent one of the plurality of substrate layers. A first discrete electrical circuit component is bonded to a first layer of the plurality of layers. A bonding material is interposed between the discrete electrical circuit component and the first layer. The bonding material has a reflow temperature at which the bonding material becomes flowable that is higher than a fusion bonding temperature of the substrate layers.

Abstract: The present invention is a circuit connecting material used for the mutual connection of a circuit member in which electrodes and insulating layers are formed adjacent to each other on the surface of a board, and a circuit member in which electrodes and insulating layers are formed adjacent to each other on the surface of a board, with the edge parts and of the insulating layers being formed with a greater thickness than the electrodes on the basis of the main surfaces, wherein this circuit connecting material contains a bonding agent composition and conductive particles that have a mean particle size of 1 ?m or greater but less than 10 ?m and a hardness of 1.961 to 6.865 GPa, and this circuit connecting material exhibits a storage elastic modulus of 0.5 to 3 GPa at 40° C. and a mean coefficient of thermal expansion of 30 to 200 ppm/° C. at from 25° C. to 100° C. when subjected to the curing treatment.

Abstract: A printed circuit board to which a localised solder connection is to be made, the surface of said printed circuit board having a continuous or non-continuous coating of a composition comprising a halo-hydrocarbon polymer at a thickness of from 1 nm to 10 ?m.

Abstract: When a formed position of a via formed on a board is the same as a position of a footprint of a chip component located on the back surface of the board corresponding to an area on which a BGA is mounted, a board designing apparatus determines that the chip component and the BGA can be connected using chip on hole. When it is determined that the chip component and the BGA can be connected, the board designing apparatus carries out chip on hole by forming a via in an area of the board on which the BGA is mounted, the via leading to the footprint of the chip component located on the back surface of the board.

Abstract: A surface mount adhesive includes an epoxy resin, a curing agent, an accelerator, a first filler, and a second filler. The second filler has a specific gravity 1.1 to 3 times that of the first filler, and the second filler has a hardness higher than that of the first filler. The first filler has a largest particle size of 1 to 100 ?m, and the second filler has a largest particle size of 1 to 100 ?m, a specific gravity of 1.7 to 4.5, and a revised Mohs hardness of 2 to 12. The weight ratio of the first filler to the second filler is from 1:3 to 3:1, and the surface mount adhesive has a specific gravity of 1.2 to 1.5. When the surface mount adhesive is dispensed, dispensing failures are suppressed, and dispensing stability is improved.

Abstract: A curing agent for epoxy resins that is comprised of the reaction product of an amine, an epoxy resin, and an elastomer-epoxy adduct; compositions containing the curing agent and an epoxy resin; the compositions are useful in electronic displays, circuit boards, semi conductor devices, flip chips and other applications.

Abstract: A die having a base formed of a first material is connected to a board having a base formed of a second material. An interposer having a coefficient of thermal expansion intermediate coefficients of thermal expansion of the first and second materials is positioned between the die and the board.

Abstract: A microstructure comprises a laminate structure having a first conductor, a second conductor, and an intervening insulator located between the first and the second conductors. The first conductor includes opposite faces in relation to the second conductor, side faces, and edge parts which form the boundaries of the aforementioned opposite faces and side faces. The second conductor includes an extended face extending beyond the edge parts exceeding the first conductor. The insulation film includes an area covering at least part of an edge part and/or at least part of a side face.

Abstract: Disclosed herein are a printed circuit board and a method of manufacturing the same. The printed circuit board includes: an insulating layer; a first metal layer formed on the insulating layer; a second metal layer formed on a portion of the first metal layer; and an oxidation layer formed on a portion of the first metal layer on which the second metal layer is not formed, wherein materials of the first and second metal layers are different from each other, and the second metal layer is made of a material of which ionization tendency is smaller than that of the first metal layer.

Abstract: A cable in one embodiment comprises a plurality of leads; and an electrostatically dissipative adhesive operatively electrically coupling the leads together, the adhesive comprising a mixture of an adhesive material and electrically conductive particles intermixed with the adhesive material. A method in one embodiment comprises applying an electrostatically dissipative adhesive to exposed leads of a cable for operatively electrically coupling the leads together, the adhesive comprising a mixture of an adhesive material and electrically conductive particles intermixed with the adhesive material. Additional embodiments are presented.

Abstract: An upper board having an opening and forming a circuit on a surface layer, a connection sheet between boards having an opening and forming conductive holes filled with conductive paste in through-holes, and a lower board forming a circuit on a surface layer are stacked up, heated and pressed. In particular, the connection sheet between boards is made of a material different from the upper board and the lower board. A multi-layer circuit board having a cavity structure, and a full-layer IVH structure with high interlayer connection reliability can be manufactured.

Abstract: A fixing metal bracket for a component mounted on a circuit board, includes a solder bonding plate section to be solder-fixed on a surface of a circuit board with a cream solder, and a component fixing section to be fixed to a component mounted on the circuit board. An annular through-groove is formed on the solder bonding plate section at a position surrounding a central area thereof. An island-shaped portion at the inside of the through-groove is separated from a peripheral portion at the outside of the through-groove while the connection part is remained. A step is formed on a solder bonding face of the connection part. Pure Sn plating is applied to the solder bonding face of the island-shaped portion and whisker resistance plating is applied to a surface of a portion other than the island-shaped portion.

Abstract: A method of fabricating a substrate core structure comprises: providing first and second patterned conductive layers defining openings therein on each side of a starting insulating layer; providing a first and a second supplemental insulating layers onto respective ones of a first and a second patterned conductive layer; laser drilling a set of via openings extending through at least some of the conductive layer openings of the first and second patterned conductive layers; filling the set of via openings with a conductive material to provide a set of conductive vias; and providing a first and a second supplemental patterned conductive layer onto respective ones of the first and the second supplemental insulating layers, the set of conductive vias contacting the first supplemental patterned conductive layer at one side thereof and the second supplemental patterned conductive layer at another side thereof.

Abstract: Micro-machined (e.g., stress-engineered spring) structures are produced by forming a release layer, forming a partially or fully encapsulated beam/spring structure, and then releasing the beam/spring structure by etching the release layer. The encapsulation structure protects the beam/spring during release, so both the release layer and the beam/spring can be formed using plating and/or using the same material. The encapsulation structure can be metal, resist, polymer, oxide, or nitride, and may be removed after the release process, or retained as part of the completed micro-machined structure.

Abstract: A mounting structure is provided which includes an electronic component; a circuit board; a first insulating resin and a second insulating resin which are placed between the electronic component and the circuit board, for sealing; a plurality of bumps are formed on the electronic component or the circuit board; a plurality of counter electrodes of the circuit board or the electronic component, connected to the plurality of bumps; and a plurality of joining regions. The plurality of joining regions are formed by the second insulating resin, a plurality of first insulating resin regions are disposed around the joining regions so that the joining regions are sandwiched by the plurality of first insulating resin regions, the first insulating resin and the second insulating resin each contain filler, and the second insulating resin has a higher curing temperature than the curing temperature of the first insulating resin.

Abstract: The invention relates to a prepreg, obtained by impregnating a base material with an epoxy resin composition containing an epoxy resin (A), a curing agent (B), an accelerator (C), a phenoxy resin (D), and an inorganic filler (E) and semi-hardening the impregnated material, wherein the inorganic filler (E) has an average particle diameter of 3 ?m or less. When a circuit with a narrow wire distance is formed on a surface of a insulator substrate composed of such a prepreg by using a method of forming the circuit by plating process, an amount of the plating remaining on the insulator substrate surface at the circuit contour periphery can be reduced. As a result, it leads to stabilization of inter-circuit insulation resistance and increase in a yield during production of printed wiring boards.

Abstract: Disclosed are a flip-chip carrier having individual pad masks (IPMs) and a fabricating method of a MPS-C2 package utilized from the same. The flip-chip carrier primarily comprises a substrate and a plurality of the IPMs. The substrate has a top surface and a plurality of connecting pads on the top surface. The IPMs cover the corresponding connecting pads in one-on-one alignment where each IPM consists of a photo-sensitive adhesive layer on the corresponding connecting pad and a pick-and-place body pervious to light formed on the photo-sensitive adhesive layer. After the photo-sensitive adhesive layers are irradiated by light penetrating through the pick-and-place bodies, the pick-and-place bodies can be pulled out by a pick-and-place process to expose the connecting pads from an encapsulant. The issues of solder bridging and package warpage can easily be solved in conventional MPS-C2 packages.

Abstract: A multilayered printed wiring board includes a plurality of insulating layers; a plurality of wiring layers which are located between the corresponding adjacent insulating layers; and a plurality of interlayer connection conductors for electrically connecting the wiring layers through the insulating layers; wherein a cavity is formed through one or more of the insulating layers so as to insert a first electric/electronic component and an area for embedding a second electric/electronic component is defined for the insulating layers.

Abstract: When silver oxide is reduced to silver, a large number of cores of metallic silver are formed inside the silver oxide. Then, the silver oxide is reduced in a manner of being hollowed out while its original outer configuration is being maintained. As a result, the curvature of the silver generated becomes larger. The utilization of this microscopic-particle implementation mechanism allows accomplishment of the bonding even if the silver oxide is supplied not in a particle-like configuration, but in a closely-packed layer-like configuration. In the present invention, there is provided an electronic member including an electrode for inputting/outputting an electrical signal, or a connection terminal for establishing a connection with the electrical signal, wherein the uppermost surface of the electrode or the connection terminal is a silver-oxide layer.

Abstract: The present invention aims to provide conductive particles which can reduce the stress while maintaining high hardness (hardly causing cracks even in a state of being crushed in connection process) by improving rolling properties and can ensure adequate conductive reliability not only with respect to ITO substrates, but also with respect to IZO substrates, an anisotropic conductive film provided with the conductive particles, a joined structure provided with the anisotropic conductive film, and a joining method using the anisotropic conductive film. The conductive particles of the present invention include polymer fine particles, and a conductive layer formed on surfaces of the polymer fine particles, wherein an outermost surface shell of the conductive layer is a nickel-palladium alloy layer.

Abstract: A multichip module includes a package substrate, a first semiconductor device, a second semiconductor device and a conductive bump. The first semiconductor device is flip-chip bonded to the package substrate. The first semiconductor device includes a first chip pad on a surface thereof. The second semiconductor device is mounted on the first semiconductor device. The second semiconductor device includes a second chip pad facing the first chip pad. The conductive bump connects the first chip pad to the second chip pad. The conductive bump includes a first metallic body that has a first diffusion rate and a second metallic body that has a second diffusion rate lower than the first diffusion rate.

Abstract: A multi layer interconnecting substrate has at least two spaced apart metal layers with a conductive pad on each one of the metal layers. Two different types of insulating layers are placed between the metal layers. The placement is such that one of the two different types of insulating layers is placed between the conductive pads and the other type of insulating layer is placed between the two spaced apart metal layers.

Abstract: Disclosed is a solder material which enables to realize a lower mounting temperature when an electronic component is mounted. Also disclosed are a solder paste and a conductive adhesive. Specifically disclosed is a solder material having a basic composition composed of Sn, Bi and In. This solder material may further contain at least one metal selected from the group consisting of Cu, Ge and Ni. A solder paste which enables to realize a low-temperature mounting can be obtained by blending a flux component into the solder material. A conductive adhesive which enables to realize a low-temperature mounting can be obtained by blending a resin component into the solder material.

Abstract: A printed circuit board includes a ground layer, a power source layer, a signal wiring layer, an insulating layer and an electromagnetic radiation suppressing member. The power source layer is provided to be opposed to the ground layer. The signal wiring layer transmits a signal in a predetermined frequency domain. The insulating layer insulates the ground layer, the power source layer and the signal wiring layer from one another. The electromagnetic radiation suppressing member is provided to cover a circumferential edge of the insulating layer. The electromagnetic radiation suppressing member has a negative dielectric constant and a positive magnetic permeability in a frequency domain including the predetermined frequency domain.

Abstract: An OLED display and a manufacturing method thereof. The OLED includes: a cover window; a guide frame disposed on the cover window; an adhesive layer disposed on the cover window, within the guide frame, and a display panel attached to the cover window, via the adhesive layer.

Abstract: An exemplary method for manufacturing a circuit board includes, firstly, obtaining an insulating substrate, liquid heat-curable adhesive and electrically conductive particles. The electrically conductive particles are added into the liquid heat-curable adhesive. The electrically conductive particles in the heat-curable adhesive are activated by electrical discharge. Secondly, the liquid heat-curable adhesive having activated electrically conductive particles are spread on the insulating substrate to form a heat-curable adhesive layer on the insulating substrate. Thirdly, the heat-curable adhesive layer are exposed to the mid-infrared light by using a photo-mask, the photo-mask has a pattern corresponding to a desired circuit pattern of the circuit board. The electrically conductive particles relocated themselves one by one to form the circuit pattern under irradiation by the mid-infrared light. Finally, the heat-curable adhesive layer are hardening.

Abstract: An electrical structure and method of forming. The electrical structure includes a first substrate, a first dielectric layer, an underfill layer, a first solder structure, and a second substrate. The first dielectric layer is formed over a top surface of the first substrate. The first dielectric layer includes a first opening extending through a top surface and a bottom surface of said first dielectric layer. The first solder structure is formed within the first opening and over a portion of the top surface of said first dielectric layer. The second substrate is formed over and in contact with the underfill layer.