Abstract: A base insulating layer is formed on a suspension body. Read wiring patterns, write wiring patterns and a ground pattern are formed in parallel on the base insulating layer. A first cover insulating layer is formed on the base insulating layer to cover the read wiring patterns, the write wiring patterns and the ground pattern. A ground layer is formed in a region on the first cover insulating layer above the write wiring patterns. A second cover insulating layer is formed on the first cover insulating layer to cover the ground layer.

Abstract: There is provided a multilayer ceramic electronic component to be embedded in a board including: a ceramic body including dielectric layers and having first and second main surfaces opposing one another, first and second lateral surfaces opposing one another, and first and second end surfaces opposing one another; first and second internal electrodes stacked to be spaced apart from both end surfaces of the ceramic body at a predetermined distance with the dielectric layers interposed therebetween, respectively; and first and second external electrodes formed in both end portions of the ceramic body, wherein the first and second external electrodes include first and second base electrodes and first and second terminal electrodes formed on the first and second base electrodes, respectively, and a non-conductive paste layer is formed on both lateral surfaces of the ceramic body.

Abstract: There is provided a multilayer ceramic electronic component including: a multilayer ceramic capacitor including first and second external electrodes formed of a conductive paste on both ends of a ceramic body; and an interposer substrate attached to a mounting surface of the multilayer ceramic capacitor and including first and second connection terminals connected to the first and second external electrodes at both ends of an insulation substrate, respectively, the first and second connection terminals having a double-layer structure including first and second conductive resin layers and first and second plating layers formed on the first and second conductive resin layers.

Abstract: In a capacitor main body, a dimension along the thickness direction of a first region where a first inner electrode and a second inner electrode are provided is t1, a dimension along the thickness direction of a second region that is positioned on the side of a first main surface relative to the first region is t2, and a dimension along the thickness direction of a third region that is positioned on the side of a second main surface relative to the first region is t3. A condition of t2/t1>about 0.15 and a condition of t3/t1>about 0.15 are satisfied.

Abstract: The present invention relates to a low temperature co-fired ceramic substrate with embedded capacitors. According to an embodiment of the present invention, the low temperature co-fired ceramic substrate with embedded capacitors is able to prevent diffusion, peeling or loss of electrodes after low temperature firing by controlling composition ratio of various metals included in the substrate, resulting in good adhesion between the ceramic substrate and the capacitor.

Abstract: There is provided a multilayered ceramic capacitor including a ceramic body including a plurality of dielectric layers and having first and second main surfaces, first and second side surfaces, and first and second end surfaces; a first capacitor part including a first internal electrode exposed to the first end surface and a second internal electrode exposed to the second end surface, and a second capacitor part including a third internal electrode exposed to the first end surface and a fourth internal electrode exposed to the second side surface; an internal connection conductor exposed to the first and second side surfaces; and first to fourth external electrodes formed on the outer surfaces of the ceramic body and electrically connected to the first to fourth internal electrodes and the internal connection conductor, wherein the first capacitor part has capacitance larger than that of the second capacitor part.

Abstract: A microelectronic assembly includes a first substrate having a surface and a first conductive element and a second substrate having a surface and a second conductive element. The assembly further includes an electrically conductive alloy mass joined to the first and second conductive elements. First and second materials of the alloy mass each have a melting point lower than a melting point of the alloy. A concentration of the first material varies in concentration from a relatively higher amount at a location disposed toward the first conductive element to a relatively lower amount toward the second conductive element, and a concentration of the second material varies in concentration from a relatively higher amount at a location disposed toward the second conductive element to a relatively lower amount toward the first conductive element.

Abstract: Conventional printed circuit boards had a problem of being inferior in heat-radiation characteristic, and metal-core printed circuit boards adopted to improve the heat-radiation characteristic had problems in having low rigidity and a tendency to bend. The ductility of the metal can be obstructed, and the metal protected; by covering substantially the whole area of the front and back sides of the metal core, consisting of metal as the main material, with a first ceramic film and a second ceramic film that obstruct the ductility of the aforementioned metal-core; and covering each of the ceramic films with insulated resin films, to cover the fragility of these ceramics.

Abstract: A resistive device includes a resistive layer, a flexible substrate arranged on the resistive layer, and an electrode layer. The electrode layer includes two electrode sections arranged below the resistive layer and separate to each other. Moreover, a method for manufacturing the resistive device with flexible substrate is also disclosed.

Abstract: A method for manufacturing an embedded printed circuit board includes the following steps. First, a circuit substrate is provided. The circuit substrate includes a base, a first wiring layer, and a second wiring layer. The first wiring layer includes a number of electrode connection wires. Second, an opening is defined in the circuit substrate. The opening passes through the base and the second wiring layer. Third, an anisotropic conductive film is adhered onto the electrode connection wires in the opening. Fourth, an electrical element including many electrodes is provided. Fifth, the electrical element is arranged in the opening, with the electrodes respectively spatially correspond to the electrode connection wires, and each electrode is electrically connected to the corresponding electrode connection wire through the anisotropic conductive film, thereby obtaining an embedded printed circuit board.

Abstract: A quartz crystal resonator includes a quartz crystal resonator element, a thermistor, a second layer including a first principal surface and a second principal surface, and a third layer having a through hole. internal terminals are provided on the first principal surface side, and electrode pads are provided in a portion exposed from the through hole on the second principal surface side. The quartz crystal resonator element is attached to the internal terminals, and the thermistor is attached to the electrode pads. Two mounting terminals are provided on a first diagonal line on the third principal surface side of the third layer, and two mounting terminals are provided on a second diagonal line. At least one of the two electrode pads is connected to any one of the two mounting terminals on the second diagonal line through a first conductive film provided on an inner wall of the through hole.

Abstract: An array-type multilayer ceramic electronic component includes a ceramic body including a plurality of first dielectric layers and a plurality of second dielectric layers, first and second internal electrodes disposed on the first dielectric layers and facing each other, third and fourth internal electrodes disposed on the second dielectric layers and facing each other, a first external electrode disposed on a first end surface of the ceramic body and connected to the first internal electrode, a second external electrode disposed on a first side surface of the ceramic body and connected to the second internal electrode, a third external electrode disposed on a second end surface of the ceramic body and connected to the third internal electrode, and a fourth external electrode disposed on a second side surface of the ceramic body and connected to the fourth internal electrode.

Abstract: A multilayer ceramic capacitor may include a ceramic body and an active layer. The ceramic body includes three external electrodes disposed on amounting surface thereof so as to be spaced apart from each other, and first, second, and third lead parts extending from first and second internal electrodes of the ceramic body so as to be exposed to the mounting surface of the ceramic body. One side of at least one of the first, second, and third lead parts connected to the mounting surface of the ceramic body may be at least partially formed as an inclined extension portion that is inclined with respect to an outer periphery of the first or second internal electrode.

Abstract: There is provided a multilayer ceramic capacitor including: a ceramic body having a plurality of dielectric layers stacked in a width direction; a plurality of first and second internal electrodes disposed in the ceramic body to be alternately exposed to the first and second end surfaces of the ceramic body, respectively, with the dielectric layers interposed therebetween; a plurality of first dummy electrodes; a plurality of second dummy electrodes; first and second external electrodes; first and second plating layers; and first and second terminal electrodes.

Abstract: In a multilayer ceramic electronic component, a size of a step portion on a first main surface and a size of a step portion on a second main surface are different from each other. A first outer electrode includes a plating film containing Cu. A length of a portion of the plating film containing Cu that is positioned on the first main surface in a length direction and a length of a portion of the plating film containing Cu that is positioned on the second main surface in the length direction are different from each other.

Abstract: A multilayer ceramic capacitor may include a ceramic body including dielectric layers, first and second internal electrodes disposed in the ceramic body to face each other, the dielectric layer being interposed between the first and second internal electrodes, and first and second external electrodes covering both end surfaces of the ceramic body. The ceramic body may include an active layer as a capacitance forming part and a cover layer as a non-capacitive part disposed on at least one surface of upper and lower surfaces of the active layer, the cover layer including at least one buffer layer, and when a thickness of the cover layer is defined as tc, and a thickness of the buffer layer is defined as ti, ti/tc being in a range of 0.15 to 0.90 (0.15?ti/tc?0.90).

Abstract: There are provided a multilayer ceramic capacitor and a board having the same. The multilayer ceramic capacitor may include: three external electrodes disposed on a mounting surface of a ceramic body to be spaced apart from each other and connected to lead portions of internal electrodes, wherein an interval between adjacent lead portions is 500.7 ?m or less, widths of one-side margin portions of the external electrodes in a length direction of the ceramic body that are not in contact with the corresponding lead portions are 20.2 ?m or more.

Abstract: A multilayer ceramic capacitor may include three external electrodes disposed on a mounting surface of a ceramic body to be spaced apart from one another. When a length of the ceramic body is defined as L, and a width of an active region including a plurality of internal electrodes disposed therein in a width direction of the ceramic body is defined as A, A/L is in a range of 0.64 to 1.14 (0.64?A/L?1.14).

Abstract: A method of making a wiring substrate includes forming a first metal layer on a surface of a support member, the first metal layer having at least one columnar through hole that exposes the surface of the support member, forming a columnar metal layer that fills the columnar through hole, forming an insulating layer on the columnar metal layer and on the first metal layer, forming an interconnection layer on a first surface of the insulating layer such that the interconnection layer is electrically connected to the columnar metal layer through the insulating layer, and forming a protruding part including at least part of the columnar metal layer by removing at least the support member and the first metal layer, the protruding part protruding from a second surface of the insulating layer opposite the first surface and serving as at least part of a connection terminal of the wiring substrate.

Abstract: A surface-mountable electronic device free of leads has a plurality of solderable connection surfaces at its lower side, with at least one of the connection surfaces having a rectangular portion. The outline of this rectangular portion corresponds to a connection surface of the JEDEC Standard MO-236 or of any other standard according to which the respective connection surface should not extend directly up to a side edge of the lower device side. The at least one connection surface furthermore has an extension section which extends, starting from the rectangular portion, in the direction of a side edge of the lower side of the device.

Abstract: A high-frequency module has a multilayer board formed by laminating a plurality of sheets made of a thermoplastic resin material and subjecting the laminated sheets to thermocompression bonding, and an IC chip placed in a cavity provided in the multilayer board. A gap is provided between a side of the IC chip and an inner wall of the cavity. The multilayer board includes a via-hole conductor provided near the inner wall of the cavity for preventing the resin sheets from being softened and flowing into the cavity upon thermocompression bonding.

Abstract: A printed circuit board includes: a substrate; a land that is disposed on a surface of the substrate, and includes a central portion and a plurality of extended portions, the central portion having the same shape and the same size as a land of a surface mount device, and the extended portions being up-and-down symmetry and right-and-left symmetry with respect to a straight line which passes through the center of the central portion; gaps that are disposed on the surface of the substrate, each of the gaps being disposed on a periphery of the central portion and between the extended portions; and a resist that is disposed on the surface of the substrate, and has an opening portion formed at a position corresponding to the central portion and the gaps.

Abstract: An integrated circuit package is provided with a thin-film battery electrically connected to and encapsulated with an integrated circuit die. The battery can be fabricated on a dedicated substrate, on the die pad, or on the integrated circuit die itself.

Abstract: An electronic board includes conducting traces having an upper surface at least partially sunken with respect to a gluing surface of the board. A surface mount technology electronic device for mounting to the board includes insulating windows that define gluing sites within one or more pins. An electronic system is formed by one or more of such surface mount technology electronic devices mounted to electronic board. The devices are attached using a wave soldering technique that flows through channels formed by the sunken conductive traces.

Abstract: An inductive device may include a pair of half-shell magnetically-conductive housings joined together and defining an enclosed cavity between them. The inductive device may also include primary and secondary windings provided spatially within the cavity providing magnetic coupling between them. The windings may be electrically insulated from each other and terminals of the primary and secondary windings may traverse to an exterior of the inductive device.

Abstract: An electronic isolation device is formed on a monolithic substrate and includes a plurality of passive isolation components. The isolation components are formed in three metal levels. The first metal level is separated from the monolithic substrate by an inorganic PMD layer. The second metal level is separated from the first metal level by a layer of silicon dioxide. The third metal level is separated from the second metal level by at least 20 microns of polyimide or PBO. The isolation components include bondpads on the third metal level for connections to other devices. A dielectric layer is formed over the third metal level, exposing the bondpads. The isolation device contains no transistors.

Abstract: A liquid crystal display module is disclosed and it includes a first printed circuit board, a second printed circuit board interconnected by a flat flexible cable, and a timing controller encapsulated within the flat flexible cable. The present invention further includes a liquid crystal display module incorporated with such module. The liquid crystal display module and device can incorporate with a second printed circuit board with reduced size, while the heat dissipating effect is increased, and the overall size of the flat flexible cable is reduced.

Abstract: There is provided a device (1) for surface mounting that has a substrate (10) and a capacitor element loaded on a loading-side surface of the substrate and is integrally molded including the substrate (10) and the capacitor element using a packaging resin. The substrate (10) includes a first terminal electrode (51) electrically connected to a first electrode of the capacitor element and a second terminal electrode (52) electrically connected to a second electrode of the capacitor element, at least part of a mounting-side surface (12) on an opposite side to the loading-side surface of the substrate (10) is exposed on a mounting surface (2) of the device (1), and the first terminal electrode (51) and the second terminal electrode (52) are adjacently disposed around an entire circumference of the mounting surface (2) of the device (1).

Abstract: A multilayer ceramic capacitor may include: a ceramic body including dielectric layers; first and second internal electrodes disposed in the ceramic body; and first and second external electrodes formed to end surfaces of the ceramic body. The ceramic body may includes an active layer, a capacitance formation portion, and a cover layer, a non-capacitance formation portion, the cover layer includes a plurality of dummy electrode layers. When the number of the first and second internal electrodes is defined as AL, a thickness of each of the first and second internal electrodes is defined as AT, a thickness of each of the dummy electrode layers is defined as DT, and the number of the dummy electrode layers is defined as DL, DL is equal to {(T×x)?(AL×AT)}/DT, x being 9.0% or more.

Abstract: A circuit board comprises one or more first electrical conductors (102-107) in a first portion of the thickness of the circuit board, one or more second electrical conductors (108, 109) in a second portion of the circuit board, at least one via-conductor (112) providing a galvanic current path between the first and second electrical conductors, a hole extending through the first and second portions of the circuit board, and an electrically conductive sleeve (114) lining the hole and having galvanic contacts with the second electrical conductors. The thermal resistance from the electrically conductive sleeve to the first electrical conductors is greater than the thermal resistance from the electrically conductive sleeve to the second electrical conductors so as to obtain a reliable solder joint between a part of the electrically conductive sleeve belonging to the first portion of the circuit board and an electrical conductor pin (119) located in the hole.

Abstract: An electronic device and an electronic component thereof include a main body and several pins. One side of the main body has several recesses. Each of the recesses has a first inner width along a first direction. The first direction is substantially parallel to a long side of the main body. The pins are respectively inserted into the recesses. Each of the pins has a first outer width along the first direction. The first outer width is smaller than the first inner width.

Abstract: An electronic apparatus (100) has an electronic device (151), a power supply plane (121) and a power supply plane (122) disposed with a gap (123) therebetween, a connection member (152) that electrically connects the power supply plane (122) and the electronic device (151), a ground plane (141) facing the power supply plane (121) or the power supply plane (122), a connection member (153) that electrically connects the ground plane (141) and the electronic device (151), a plurality of conductor elements (131) that is repeatedly arrayed, and open stubs (111) formed at a location overlapping the gap (123) included in an area surrounded by the conductor elements (131). In addition, at least some of the open stubs (111) face the power supply plane (122) which is not in contact with the open stubs (111).

Abstract: The present invention relates to a circuit arrangement (1) having a prescribed electrical capacitance, comprising a substrate (S) having at least one metallic, electrically conductive conductor (L, Lb, Ls). According to the invention, at least one first conductor strip segment (LA1) is disposed on the substrate (S) and at least some regions of at least one second conductor strip segment (LA2, LA3, LA4) are disposed on the first conductor strip segment (LA1), wherein an electrically insulating layer (iS) is disposed between the conductor strip segments (LA1, LA2, LA3, LA4), forming a dielectric. The invention further relates to a method and a device (2) for producing a circuit arrangement (1) having a prescribed electrical capacitance.

Abstract: A method for manufacturing multilayer printed circuit board includes step below. A metal substrate is provide, the metal substrate includes a number of substrate unit. A first insulating layer is formed on one surface of the metal substrate. The first insulating layer has a number of first through holes. An electrically conductive circuit is formed in each substrate unit. A second insulating layer is formed on the other surface of the metal substrate. The second insulating layer has a number of second through holes. A first metal cylinder is formed in a first through hole and a second metal cylinder is formed in a second through hole. The number of substrate units are folded and laminated, the connected and aligned first metal cylinder and the second metal cylinder communicates the electrically conductive circuits.

Abstract: The invention provides a method for preparing a pattern for an electric circuit comprising the steps of: (a) providing a substrate; (b) providing a pattern of an inhibiting material for an electrical circuit onto said substrate by i) applying a layer of the inhibiting material onto said substrate and mechanically removing locally the layer of the inhibiting material to obtain said pattern; or ii) applying a layer of the inhibiting material onto said substrate, wherein said layer has pre-determined pattern which incompletely covers said substrate; (c) establishing a distribution of particles of a first metal or alloy thereof on the layer of the inhibiting material and the pattern as obtained in step.

Abstract: A sealing member for an electronic component package includes, on another principal surface of a base material constituting the sealing member for the electronic component package, an external terminal electrode, a wiring pattern, and a resin material. The external terminal electrode is to be electrically coupled to an outside of the electronic component package. The wiring pattern is configured to couple an electronic component element on one principal surface of the base material to the external terminal electrode. The resin material is layered over the other principal surface and the wiring pattern. The external terminal electrode is layered over the wiring pattern and the resin material.

Abstract: The present disclosure is directed to orientation-independent device configuration and assembly. An electronic device may comprise conductive pads arranged concentrically on a surface of the device. The conductive pads on the device may mate with conductive pads in a device location in circuitry. Example conductive pads may include at least a first circular conductive pad and a second ring-shaped conductive pad arranged to concentrically surround the first conductive pad. The concentric arrangement of the conductive pads allows for orientation-independent placement of the device in the circuitry. In particular, the conductive pads of the device will mate correctly with the conductive pads of the circuitry regardless of variability in device orientation. In one embodiment, the device may also be configured for use with fluidic self-assembly (FSA). For example, a device housing may be manufactured with pockets that cause the device to attain neutral buoyancy during manufacture.

Abstract: A monolithic-capacitor-mounted structure satisfies Lc>Wc and Lx/Wx<Lc/Wc, where Lx denotes a distance between a first-lengthwise outermost portion of a first-lengthwise outermost one of first through fourth pads and a second-lengthwise outermost portion of a second-lengthwise outermost one of the pads; Wx denotes a distance between a first-widthwise outermost portion of a first-widthwise outermost one of the pads and a second-widthwise outermost portion of a second-widthwise outermost one of the pads; Lc denotes a distance between a first-lengthwise outermost portion of a first-lengthwise outermost one of external electrodes and a second-lengthwise outermost portion of a second-lengthwise outermost one of the external electrodes; and Wc denotes a distance between a first-widthwise outermost portion of a first-widthwise outermost one of the external electrodes and a second-widthwise outermost portion of a second-widthwise outermost one of the external electrodes.

Abstract: There is provided a multilayer ceramic capacitor including: a ceramic body including dielectric layers and internal electrodes; an electrode layer disposed on an outer surface of the ceramic body and electrically connected to the internal electrodes; a first composite resin layer disposed on the electrode layer and including a first conductive powder; and a second composite resin layer disposed on the first composite resin layer and including a second conductive powder different from the first conductive powder.

Abstract: A multilayer ceramic capacitor may include: three external electrodes disposed on amounting surface of a ceramic body to be spaced apart from one another. When a thickness of an active layer including a plurality of first and second internal electrodes disposed therein is defined as AT, and a gap between a first or second lead part of the first internal electrode and a third lead part of the second internal electrode is defined as LG, the following Equation may be satisfied: 0.00044?LG*log [1/AT]?0.00150.

Abstract: Disclosed herein is a device embedded printed circuit board, including: a first core layer having a first via and having a via land for a first connection pad disposed on a lower surface thereof; a build-up layer formed on the first core layer and having a plurality of circuit layers including a second connection pad, a plurality of insulating layer disposed between the plurality of circuit layers, and a second via connecting the plurality of circuit layers; and a second core layer formed on the build-up layer and having a cavity.

Abstract: There are provided a multilayer ceramic electronic component to be embedded in a board and a manufacturing method thereof, and particularly, a multilayer ceramic electronic component to be embedded in a board, in which a thickness of a ceramic body in an entire chip is increased by not allowing for an increase in a thickness of an external electrode while forming a band surface of the external electrode to have a predetermined length or greater for connecting the external electrode to an external wiring through a via hole, such that chip strength may be improved and the occurrence of damage such as breakage, or the like may be prevented, and a manufacturing method thereof, may be provided.

Abstract: A multilayer ceramic capacitor may include a ceramic body including a plurality of dielectric layers; a first internal electrode disposed in the ceramic body and exposed to a first side surface in a width direction of the ceramic body and a second internal electrode disposed in the ceramic body and exposed to the first side surface in the width direction of the ceramic body; and first to third external electrodes disposed on the first side surface in the width direction of the ceramic body.

Abstract: Inductive coupling arising between adjacent vias in interconnect technologies (commonly associated with printed circuit boards or package) can be combatted through the addition of metal plates to vias. The plates generate capacitive coupling that can compensate for the inductive crosstalk normally generated between vias in printed circuit boards or packages. When the added plates of two neighboring vias overlap with each other, a capacitive coupling is generated. By balancing the inductive coupling with capacitive coupling, an effective reduction of far end crosstalk may be obtained.

Abstract: A method for the manufacture of a circuit board containing a component and circuit board containing a component. The invention is based on first manufacturing an intermediate product, which contains the insulator layer of the circuit board and the components, which are set in place inside the insulator layer in such a way that the contact elements of the components face the surface of the intermediate product. After this, the intermediate product is transferred to the circuit-board manufacturing line, on which a suitable number of conductor-pattern layers and, if necessary, insulator layers are manufactured on one or both sides of the intermediate product, in such a way that, when manufacturing the first conductor-pattern layer, the conductor material forms an electrical contact with the contact elements of the components. Alternatively, stages can also be performed on a single manufacturing line.

Abstract: An organic light-emitting display device includes a plurality of pixels on a substrate, and input pads coupled to the plurality of pixels through wirings, the input pads being connected to a circuit board, wherein each of the input pads includes an extension portion extending from a respective wiring, a connection portion separated from the extension portion by a predetermined distance and connected to the circuit board, a resistance portion contacting the extension portion and the connection portion, and a dummy portion on the resistance portion and contacting the connection portion, the dummy portion being insulated from the extension portion.

Abstract: An electronic circuit module includes a substrate with built-in component, a mount component mounted on the substrate with built-in component, a sealing portion covering the mount component, and a shield made of a conductive synthetic resin covering the sealing portion. The substrate with built-in component has a core layer made of a metal, an outer cover made of an insulating synthetic resin, and a first protrusion. The core layer has corners and side faces. The outer cover covers the corners and the side faces, and has a first surface. The first protrusion has a first end face exposed at the outer cover and a second surface adjacent to the first surface, and is formed away from the corners of the side faces to protrude outwardly. The sealing portion covers the mount component. The shield covers the sealing portion, and has a third surface bonded to the first surface and the second surface.

Abstract: A wiring board includes multiple insulating layers including first, second, third, fourth and fifth insulation layers laminated in the order of the first, second, third, fourth and fifth insulation layers. The first insulation layer has a first conductor including plating, the second insulation layer has a second conductor including plating, the third insulation layer has a third conductor including conductive paste, the fourth insulation layer has a fourth conductor including plating, the fifth insulation layer has a fifth conductor including plating, and the first conductor, the second conductor, the third conductor, the fourth conductor and the fifth conductor are formed along the same axis and are electrically continuous with each other.

Abstract: A multilayer electronic component is disclosed with a body having a thickness (T) and a width (W) satisfying the equation T/W>1.0, an upper portion of the body including a first and second internal electrodes with an average width of M1 and a lower portion of the body including a first and second internal electrodes with an average width of M2 satisfying M1>M2.

Abstract: Provided is a method for manufacturing a photo cured material, by which transferring precision can be improved and a small surface roughness can be obtained. The method includes the steps of: placing a photo-curable composition on a substrate; brining a mold into contact with the photo-curable composition; irradiating the photo-curable composition with light; and releasing the mold from the photo-curable composition. The contact is performed in a condensable gas atmosphere, the condensable gas condensing under a temperature condition at the contact and under a pressure condition that the condensable gas receives when the photo-curable composition intrudes gaps between the substrate and the mold or concavities provided on the mold, and the photo-curable composition includes a gas dissolution inhibitor having a rate of weight change with reference to the condensable gas that is ?1.0% to 3.0%.