Abstract: Multiple through holes in a printed circuit board (PCB) are filled with a malleable, electrically conductive material, such as an elastomer containing a concentration of conductive particles. The material in each through hole forms an electrical contact at which a solder ball or pin of a ball grid array (BGA) or pin grid array (PGA) of a microelectronic package, respectively, will be coupled to the PCB.

Abstract: The present invention is for providing a rigid-printed wiring board capable of preventing the burst or void phenomenon of a copper paste, and a production method of the rigid-printed wiring board. A rigid-printed wiring board comprising copper clad laminates with a paper phenol or a paper epoxy used as a base, wherein a through hole is provided in the vicinity of a via hole for filling the copper paste, is provided.

Abstract: Solder bumps are created on a substrate of an electronic assembly having lengths that are longer than the widths. The solder bumps are created by locating solder balls of power or ground connections close to one another so that, upon reflow, the solder balls combine. Signal solder balls however remain separated. Capacitors are created by locating power solder bumps adjacent ground solder bumps and extending parallel to one another.

Abstract: A substrate board structure having a core layer, a metallic layer and a connecting metallic layer. The core layer has a first surface and a second surface. The metallic layer includes a contact pad and a circuit line. The contact pad and the circuit line are separately lain on the first surface of the core layer. The connecting metallic layer is formed on the second surface of the core layer. The connecting metallic layer is electrically connected to both the contact pad and the circuit line.

Abstract: An integrated circuit package and a method of manufacturing the package. A silicon chip is attached to the surface of a substrate or attached to the bottom surface of a cavity in the substrate so that the active surface of the chip is exposed. One or more build-up circuit structures are formed over the substrate. Each build-up circuit structure has at least one insulation layer, at least one patterned circuit layer and a plurality of via openings with conductive material therein so that bonding pads on the active surface of the chip connect electrically with the patterned circuit layer through the vias. To form a ball grid array package, solder balls may also be attached to the solder ball pads on the patterned circuit layer so that the bonding pads on the chip are electrically connected to an external circuit through the build-up circuit structure and the solder balls.

Abstract: An opening is formed in resin by a laser beam so that a via hole is formed. Copper foil, the thickness of which is reduced to 3 &mgr;m by etching to lower the thermal conductivity, is used as a conformal mask. Therefore, an opening is formed in the resin and the number of irradiation of pulse-shape laser beam is reduced. Thus, occurence of undercut of the resin, which forms an interlayer insulating resin layer, can be prevented and the reliability of the connection of the via holes can be improved.

Abstract: The present invention pertains to a multilayer flexible wiring board. The multilayer flexible wiring board including first and second patterned wiring layers, a resin film interposed between a surface of the first wiring layer and a surface of the second wiring layer, and a bump connected to the surface of the second wiring layer, wherein the resin film is adapted to form an opening when the bump to force into the resin film and an ultrasonic wave is applied to the bump and the bump is left in the opening to electrically connect the top of the bump to the first wiring layer.

Abstract: A wiring structure with crossover capability is disclosed. The wiring utilizes a connection stud in a contact layer, beneath the plane of the otherwise-intersecting lines as a crossover. Thus, a first wire in a first metallization layer passes below a second wire in a second metallization layer by overlapping contact with the connection stud in the contact layer. In manufacturing the wiring structure of the present invention, no intervening insulative or via layers are used between the contact layer, the first metallization layer and the second metallization layer. However, care must be taken in device layout on the substrate to ensure that the connection stud is located above isolation areas rather than active device areas.

Abstract: A multi-layer wiring board is produced by laminating a plurality of insulating layers having conductor circuits, wherein the conductor circuits of the insulating layers are electrically connected together through via-holes in insulating connection layers having no conductor circuit, and the regions other than the conductor circuits of the insulating layers and the regions other than the via-holes of the connection layers are directly joined together by press-adhering the insulating resins that constitute the respective layers.

Abstract: A printed wiring board reduced in weight by reducing the size and the thickness of a substrate in its entirety. The printed wiring board includes a rigid substrate 2, comprised of a core material 11 at least one side of which carries a land 23, and flexible substrates 3, 4, 5 and 6 comprised of core materials 33, 36 on at least one surface of which a bump 32 for electrical connection to the land 38 is formed protuberantly. The rigid substrate 2 and the flexible substrates 3 to 6 are molded as one with each other, with the interposition of an adhesive in-between, so that the land and the bump face each other.

Abstract: A multilayered circuit board is constructed such that holes penetrating through second and third dielectric layers, interposed between a pair of electrodes for constructing a capacitor, are filled with a material having a high dielectric constant respectively in a capacitor-forming area, and a plurality of (for example, four) holes are filled with a material having a high magnetic permeability respectively so as to penetrate through first to fifth dielectric layers in a magnetic flux-passing area of a coil constructed by coil electrodes of first to fifth turns in a coil-forming area.

Abstract: In a multilayer printed circuit board having a conductor pattern, covered with an insulation layer having via holes, these via holes are filled with a conductor by means of electroless nickel plating or electroless copper plating.

Abstract: The insulation sheet for use in producing a wiring substrate comprises, as via hole conductors, conductive paste filled in via holes formed through the insulation sheet, and the curing-starting temperature of the conductive paste is lower than the melting-starting temperature of the insulation sheet.

Abstract: A circuit board includes an electrical insulator layer formed of a reinforcer sheet with density distribution in its in-plane direction, an electrical conductor filled in a plurality of inner via holes provided in the electrical insulator layer in its thickness direction, and a wiring layer connected to the electrical conductor. The inner via holes provided in a high-density portion of the reinforcer sheet are formed to have a smaller cross-section than the inner via holes provided in a low-density portion of the reinforcer sheet. In this manner, it is possible to provide a circuit board that can achieve a high-density wiring and an inner via connection resistance with less variation, when a base material including a reinforcer sheet with density distribution in its in-plane direction such as a glass-epoxy base material is used for an insulator layer.

Abstract: A method for fabricating semiconductor components and interconnects includes the steps of providing a substrate, such as a semiconductor die, forming external contacts on opposing sides of the substrate by laser drilling vias through the substrate, and forming conductive members in the vias. The conductive members include enlarged terminal portions that are covered with a non-oxidizing metal. The method can be used to fabricate stackable semiconductor packages having integrated circuits in electrical communication with the external contacts. The method can also be used to fabricate interconnects for electrically engaging packages, dice and wafers for testing or for constructing electronic assemblies.

Abstract: A pin standing resin substrate 311 comprises a resin substrate 313 and many pins 301 soldered (HD) to a pin-pad 317A, the resin substrate comprising such as a resin and having a pin-pad 317AP whose diameter of a portion exposed in a main surface 313A is 0.9 to 1.1 mm. The kovar-made pin 301 is previously heat-treated at 700° C., whereby Vickers hardness is made Hv=around 150, and the pin has a rod-like portion 301A of a diameter being 0.3 mm and an enlarged diameter portion 301B shaped in disk being 0.60 to 0.70 mm and thickness being 0.15 to 0.20 mm, the enlarged diameter portion being formed at one end of the rod-like portion 301A. This enlarged diameter portion 301B is soldered to the pin-pad.

Abstract: A solder resist comprising a thermosetting resin is printed on a surface of an insulating board (7) having a conductor circuit (6). The solder resist is then heat-cured to form an insulating film (1) having a low thermal expansion coefficient. A laser beam (2) is then applied to the portion of the insulating film in which an opening is to be formed, to burn off the same portion for forming an opening (10), whereby the conductor circuit (6) is exposed. This opening may be formed as a hole for conduction by forming a metal plating film on an inner surface thereof. It is preferable that an external connecting pad be formed so as to cover the opening. The film of coating of a metal is formed by using an electric plating lead, which is preferably cut off by a laser beam after the electric plating has finished.

Abstract: The present invention provides a unique, high density, electronic package having a conductive composition for filling vias or through holes to make reliable vertical or Z-connects from a dielectric layer to adjacent electrical circuits. The through holes may be plated or non-plated prior to filling. A description for making high density electronic packaging using this feature is also disclosed.

Abstract: A multilayered circuit board for a semiconductor chip module includes an underlying board, insulating layers, fixed-potential wiring layers, via holes, and metal layers. The underlying board has a major surface made of a metal material to which a fixed potential is applied. The insulating layers are stacked on the major surface of the underlying board and have wiring layers formed on their surfaces. The fixed-potential wiring layers constitute part of the wiring layers formed on the insulating layers. The via holes are formed below the fixed-potential wiring layers to extend through the insulating layers. The metal layers are filled in the via holes so as to make upper ends be connected to the lower surfaces of the fixed-potential wiring layers. One of the insulating layers in contact with the major surface of the underlying board is formed on the underlying board while the lower end of the metal layer is in contact with the major surface of the underlying board.

Abstract: An embodiment of the present invention is a method for wafer level IC packaging that includes the steps of: (a) forming compliant, conductive bumps on metalized bond pads or conductors; and (b) surrounding the compliant, conductive bumps in a supporting layer.

Abstract: A printed wiring board (1) having a cavity (20) for mounting electronic parts therein and a method for manufacturing thereof, comprising: an upper wiring substrate (1A) having flat surfaces on both sides; a lower plate body (1B) being fixed on a reverse side surface of the upper wiring substrate, and being formed with the cavity (20) in a part thereof, for receiving an electronic part (30) within an inside thereof; conductor layers (3) provided on both side surfaces of the upper wiring substrate for mounting electronic parts thereon, by forming plated through-holes (7) or flat through-holes (7′), in particular with in a region of the cavity on the reverse side surface thereof; and external electrodes (5) formed on side-end surface or on a lower-end surface of the printed wiring board, wherein at least an electronic part, for example, hybrid IC, chip-like parts, functional parts, such as SAW filter, sensor parts, etc.

Abstract: An improved structure of a ball-grid array (BGA) package substrate and processes for producing thereof are disclosed, wherein one side of the BGA substrate has a single pattern layer for connecting with solder balls and a heat sink layer is bonded to the other side of the substrate. The heat sink layer provides not only heat dissipation for the substrate, but also patterns for power and/or for ground, so as to diminish the dimension required for the patterns for power and/or for ground on the pattern layer of the substrate. The solder balls for power and/or for ground of the substrate are connected with the heat sink layer through electrically and thermally conductive via holes plugged with conductive paste.

Abstract: An electronic component unit includes an interposer with a plurality of holes and a circuit wiring layer disposed on one surface of the interposer. The electronic component is electrically connected to the circuit wiring layer. A plurality of solder bumps are electrically connected to one surface of the circuit wiring layer through the holes formed in the interposer. The circuit wiring layer is electrically connected to an outside circuit through the solder bumps. A junction interface between the circuit wiring layer and each of the solder bumps is made of ductile metal.

Abstract: A semiconductor device includes a semiconductor chip and a substrate having an interconnecting pattern formed thereover. The substrate has the semiconductor chip mounted on one surface thereof. The substrate has an outline larger than the semiconductor chip. First terminals are formed in a region outside the region of the substrate in which the semiconductor chip is mounted. Second terminals are a part of the interconnecting pattern which exposes its surface opposite to its surface opposing the semiconductor chip in a region closer to a center of the substrate than the first terminals. The semiconductor chip is electrically connected to the first and second terminals.

Abstract: The details of a printed wiring board (PWB) sub-assembly and the method of producing the same are described. The sub-assembly comprises a printed circuit board electrically joined through a plurality of connections to one or more area array devices, such as modules or printed wiring boards. The sub-assembly can serve as a part of an original assembly. The sub-assembly can function as an after market item that can be readily substituted as a replacement for a failed component wherein the dimensional space between the printed circuit board and one or both of the area array devices must provide sufficient clearance for surface mounted devices.

Abstract: An anisotropic electro-conductive adhesive layer 14 including an adhesive 15 made of a thermosetting or thermoplastic resin containing electro-conductive particles 16 dispersed therein is formed on a basic circuit board 11 carrying a first circuit pattern 12. A second circuit pattern 18 is formed on the anisotropic electro-conductive adhesive layer 14. An end of the second circuit pattern 18 is curved into the anisotropic electro-conductive adhesive layer 14 to be electrically connected with first circuit pattern 12 via the electro-conductive particles 16. Thereby, the production process can be simplified and the production cost can be reduced. Also, the micro-circuit patterns can be arranged at a high density.

Abstract: A multilayer printed circuit board is provided which includes a base member having a surface provided with a base wiring pattern, an inner buildup layer laminated on the base member and having a surface formed with an inner buildup wiring pattern, and an outer buildup layer laminated on the surface of the inner buildup layer and having a surface formed with an outer buildup wiring pattern. The wiring patterns are electrically connected to each other through vias. The inner buildup layer is formed of a resin material which is not reinforced by glass fibers, whereas the outer buildup layer is formed of a resin material reinforced by glass fibers.

Abstract: The method comprises forming a plurality of wiring pattern layers on the front surface of a substrate. In the process of forming the wiring pattern layers, an insulator protection film keeps covering over the wiring pattern on the back surface of the substrate. When the formation of the wiring pattern layers has been completed on the front surface of the substrate, a penetrating hole is bored in the cured or hardened insulator protection film. The penetrating hole may be utilized as a conductive via or a conductive through hole. A wiring pattern layer is then formed over the hardened insulator protection film on the back surface of the substrate. It is possible to omit an additional process for removing the insulator protection film. The method contributes to further facilitation of production process and further reduction in production cost.

Abstract: A circuit board is manufactured by filling a via-hole formed in an insulating substrate with conductive material, disposing conductive layers on both sides of the insulating substrate, and forming alloy of component material of the conductive material with component material of the conductive layers. In the circuit board, therefore, the conductive material filled in the via-hole formed in the insulating substrate is securely connected electrically as well as mechanically to the conductive layers on both sides of the insulating substrate with high reliability.

Abstract: A capacitor-mounted metal foil of the present invention is provided with a metal foil and a plurality of capacitors formed on the metal foil. Each of the capacitors includes a conductive layer disposed above the metal foil, and a dielectric layer disposed between the metal foil and the conductive layer.

Abstract: The invention relates to a coaxial conductor having an inner conductor (S), an outer conductor (U) encasing the inner conductor (S) at least partly, and a dielectric (E) placed between the two. The coaxial conductor (K) is formed in a multi-layer circuit board (M) primarily by means of vias (2a-2h) and strip conductors (1a-1i). According to an embodiment of the coaxial conductor of the invention, the inner conductor (S) is formed substantially parallel to the board layers (3a-3e) of the multi-layer circuit board (M), the inner conductor (S) is formed of at least one strip conductor (1a, 1b) or at least one electroconductive via (2a) or a combination of the same, and the outer conductor (U) is formed of at least four electroconductive vias (2b-2h) and at least two strip conductors (1c-1i). The dielectric (E) is at least partly formed of the material of the board layers (3a-3e). The invention relates also to a method for manufacturing this coaxial conductor.

Abstract: An electronic structure. The electronic structure comprises a layer. The layer includes: a cylindrical volume; a fully cured annular volume of a photoimageable dielectric (PID) material circumscribing the cylindrical volume; and a partially cured remaining volume of the PID material circumscribing the annular volume. The cylindrical volume may include a via. The structure can include a power plane.

Abstract: A circuit board is configured so as to include not less than two wiring layers, an insulator layer for electric insulation between the wiring layers, and an inner-via-hole conductive member provided in the insulator layer in a thickness direction of the insulator layer, for electric connection between the wiring layers. The insulator layer is made of a composite material containing an organic resin and a material having a smaller thermal expansion coefficient than that of the organic resin, and includes a surface part, a core part, and a surface part laminated in the stated order, the surface part having a high content of the organic resin, the core part having a low content of the organic resin. The wiring layers have a land portion that is connected with the inner-via-hole conductive member, the land portion being embedded so as to be substantially in contact with the core part, and the inner-via-hole conductive member has a thickness substantially equal to a thickness of the core part.

Abstract: A monolithic electronic component includes a composite body having a plurality of stacked ceramic layers. The ceramic layers include interconnecting conductors provided in each of the ceramic layers, including first terminals, arranged on a first end surface in the stacking direction of the composite body, for defining connections with an interconnection substrate, and second terminals, arranged on a second end surface opposite of the first end surface of the composite, for defining connections with a mounted component. The first terminals are defined by conductor layers provided on the first end surface and the second terminals are defined by exposed end surfaces of terminal via-hole conductors which extend from the inner portion of the composite to the second end surface. The exposed end surfaces of the terminal via-hole conductors are flat and are on substantially the same plane as the second end surface.

Abstract: A multi-layer wiring substrate capable of high density packaging, and a method of manufacturing the same, in which a carrier substrate, in which through holes can be easily formed in high density corresponding substantially to a pitch of connecting terminals in a semiconductor chip, and build-up layers are formed on the substrate with the application of a conventional build-up technique. When the build-up technique for repeatedly forming insulating layers and wiring layers on a carrier substrate is used to manufacture a multi-layer wiring substrate, the carrier substrate is formed in the following manner. First, an insulating resin layer is formed in a copper foil, in which a plurality of first windows are regularly provided, to cover the copper foil, and the resin layer fills the interior of the windows.

Abstract: The present invention relates to a structure for providing an interconnect between layers of a multilayer circuit board. The structure comprises a stack that includes at least one layer and a via opening that extends through at least one layer of the stack. Each individual via opening is filled with a solid conductive plug and each solid conductive plug has a first contact pad and a second contact pad.

Abstract: An opening portion is provided in a connecting portion of a flexure blank, an opening end portion of an insulating base layer is coated with a conductive member without exposing the opening end portion of the insulating base layer in the connecting portion, and a lower surface of the conductive member of the opening portion in the connecting portion of the flexure blank is structured such as to form the same surface as the lower surface of the insulating base layer.

Abstract: A substrate of multilayered structure having a plurality of sets of an insulation layer and a wiring line layer, and having one face for mounting a semiconductor element thereon and the other face on which external connection terminals are to be provided, the face for mounting a semiconductor element being provided with pads to be bonded to an electrode terminal of the semiconductor element, the other face being provided with pads to be bonded to an external connection terminal, such as a terminal formed of a solder ball, and the wiring line layers on both sides of an insulation layer being connected with each other by vias piercing the insulation layer, wherein the surfaces of the pads to be bonded to an electrode terminal of a semiconductor element are flat and are in the same plane. A method of manufacturing such a multilayered substrate is also disclosed.

Abstract: BGA substrate with direct heat dissipating structure The present invention discloses a structure of BGA substrate with direct heat-dissipating structure, said structure comprising: a heat spreader, no less than one insulating resin layer, an upper circuit layer, a lower circuit layer, and a plurality of electrically-conducting plugs. The heat spreader comprises a body part, a loading part, and a junction part. The loading part is the upper region of heat spreader. The junction part is the lower region of the heat spreader. The periphery of said junction part extends outward for forming a protruding edge. The body part is embedded into the central region of the substrate. The upper circuit layer is formed on the surface of said resin layer. The lower circuit layer is formed on lower surface of said resin layer and comprises a plurality of solder pads. The upper and lower circuit layers are conducted by electrically conductive plugs.

Abstract: The present invention aims to connect metal films without forming any opening in a resin film.

Abstract: The invention provides an electronic assembly including a semiconductor chip and a semiconductor package substrate having power and ground shunts. The power and ground shunts of the semiconductor chip include contact pads on a surface thereof that are electrically connected to one another to protect electrical signal contacts on the contact pads from high, low-frequency current. The power shunt in the semiconductor package substrate connects one power plane to another and the ground shunts in the semiconductor package substrate connects one ground plane to another. The power and ground shunts in the semiconductor package substrate dictate terminal pins thereon from high, low-frequency current.

Abstract: A two-metal TAB tape, double-sided CSP tape, and BGA tape in which the tape has an insulating substrate and wiring layers at least on both sides of the insulating substrate, sprocket holes are made at regular intervals in the longitudinal direction along the edges in the direction of the width, through holes are made in the substrate by punching press, the through holes are filled with conductor by punching press, and the conductor is electrically connected to the wiring layers, characterized in that pilot round holes are made among the sprocket holes made in the longitudinal direction. Methods for producing such two-metal TAB tape, double-sided CSP tape, and BGA tape are disclosed.

Abstract: In a multilayer wiring board comprising: an insulating board (for example, a glass board 1); and a wiring layer (for example, wiring patterns 2a, 5a and 8a) superimposed on the insulating board through an insulating film (for example, insulating films 3 and 6), a sum (total film thickness) d (&mgr;m) of the thickness of the insulating films 3 and 6 and the internal stress f (MPa) of the insulating film satisfy the following relational expression (1): d×<700(MPa·&mgr;m)  (1)

Abstract: A chip carrier structure and method for forming the same having a receptor pad formed therein. The structure comprises a circuitized substrate having a conductive element on the surface, an External Dielectric Layer mounted on the circuitized substrate with an opening positioned above the conductive element to form a microvia. The walls of the microvia are first treated to enhance copper adhesion and then are electroplated to provide a receptor pad. Finally, a solder paste is deposited within the microvia to create a solder deposit or bump.

Abstract: The present invention relates to a method and structure for providing an interconnect between layers of a multilayer circuit board.

Abstract: The present invention is for providing a rigid-printed wiring board capable of preventing the burst or void phenomenon of a copper paste, and a production method of the rigid-printed wiring board. A rigid-printed wiring board comprising copper clad laminates with a paper phenol or a paper epoxy used as a base, wherein a through hole is provided in the vicinity of a via hole for filling the copper paste, is provided.

Abstract: A substrate structure for an integrated circuit package. The substrate is electrically connected to a circuit board and an integrated circuit. The substrate includes a plurality of metal sheets and glue. The metal sheets are arranged opposite to each other. Each of the metal sheets includes a first surface and a second surface. The glue is used for sealing the plurality of metal sheet to form the substrate. The first surfaces and second surfaces of the metal sheets are exposed to the outside of the glue so as to form a plurality of signal input terminals for electrically connecting to the integrated circuit and a plurality of signal output terminals for electrically connecting to the circuit board. Thus, the signal output terminals of the metal sheets can be electrically connected to the circuit board smoothly. Furthermore, the signal transmission distance between the integrated circuit and the circuit board can be shortened so that better signal transmission effect can be obtained.

Abstract: To provide electrical conduction between front and back surfaces of a thin film multi-layered circuit board, such as an MCM, at low cost without using a simultaneous firing process for ceramic. The thin film multi-layered circuit board has at least one thin film circuit layer on a first surface of a substrate, wherein a conductor layer is disposed in the lowermost layer of the thin film circuit layer in contact with the first surface of the substrate, and is characterized in that holes for providing the electrical conduction between front and back surfaces of the substrate are formed through the substrate from the first surface to a second surface thereof so that the conductor layer is exposed in the hole, wherein the diameter of the hole is gradually enlarged from the first surface to the second surface.

Abstract: An improved multi-chip module includes a main circuit board having an array of electrical interconnection pads to which are mounted a plurality of IC package units. Each IC package unit includes a pair of IC packages, both of which are mounted on opposite sides of a package carrier. The package units may be mounted on one or both sides of the main circuit board. A first primary embodiment of the invention employs a laminar package carrier having a pair of major planar surfaces. Each planar surface incorporates electrical contact pads. One IC package is surface mounted on each major planar surface, by interconnecting the leads of the package with the contact pads on the planar surface, to form the IC package unit. A second primary embodiment of the invention utilizes a carrier substrate which has a pair of recesses for back-to-back surface mounting of the IC package pair. The two IC packages may be in contact with opposite sides of a heat sink layer embedded within the carrier substrate.

Abstract: The present invention provides a through-hole structure for connecting a connector to a printed circuit board, the through-hole structure comprising a signal through-hole having a conductive layer therein for supplying a signal to the printed circuit board, power through-holes having a conductive layer therein for supplying power to the printed circuit board, and dielectric constant adjusting portions formed among the signal through-hole and the power through-holes. Moreover, the present invention provides a printed circuit board having the above-described through-hole structure formed therein.