Abstract: A package for electrical circuitry and method of making same wherein the package is provided with apertured ceramic side walls. Ceramic layers, which have been previously co-fired together and have an aperture therethrough for receiving a copper-based lead, are positioned in each of the apertures along with a copper-based lead. A Kovar braze washer, which has an aperture therein having approximately the same dimensions as the outside dimensions of the lead is positioned over the lead and against the ceramic layers and brazed to these layers and the lead to provide an hermetic seal. A good electrical conductor is then brazed to the portion of the lead extending external to the package.

Abstract: Disclosed is a chip carrier including a base having terminal slots along the four sides thereof, and terminals each of which having a mounting contact inserted in either terminal slot and a connecting leg disposed out of the respective terminal contact for fastening to a printed circuit board, wherein the base comprises four straight ribs horizontally disposed along the terminal slots at an inner side to keep the connecting leg of every terminal at the same elevation. Each straight rib has grooves spaced corresponding to the terminals slots on tile same side to hold the connecting legs of the terminals in position.

Abstract: A package assembly for an integrated circuit die includes a base having a cavity formed therein for receiving an integrated circuit die. The base has a ground-reference conductor. A number of bonding wires are each connected between respective die-bonding pads on the integrated circuit die and corresponding bonding pads formed on the base. The lid has an electrically conductive layer formed on it to cover the integrated circuit die in the cavity formed in the base. The electrically conductive layer formed on the lid is positioned in close proximity to some of the plurality of bonding wires. The electrically conductive layer formed on the lid is connected to the ground-reference conductor of the base. This arrangement reduces both the self-inductances of the one or more conductors and the mutual inductance between the one or more conductors. With this arrangement the electrically conductive layer formed on the lid is grounded to reduce interference being radiated from the electrically conductive layer.

Abstract: A compliant lead for electromechanically surface mounting an integrated circuit chip package to a substrate. The compliant lead extends from the package and includes at least two regions of different lead thickness. In a first region, a standard lead thickness is employed to ensure the applicability of existing package fabrication techniques. A second region, having a reduced thickness, then extends from the first region and is predefined to encompass an area of the lead expected to undergo greatest stress during thermal cycling. Compliancy is further guaranteed by providing a solder dam within the region of reduced thickness to limit wicking of solder when the package is solder mounted to the substrate. Lead frame fabrication is also discussed.

Abstract: An insulating electrical feed-through connector extending through a wall of aluminum is obtained by using a sintered sleeve comprising phosphate glass in which a conductive pin is inserted. The sleeve is raised to a firing temperature in excess of the dilatometric softening temperature of the vitreous material in the presence of a first effective quantity of alumina between the sleeve and the wall and of a second effective quantity of nickel oxide between the sleeve and the pin, which makes it possible to achieve a simultaneous and direct hermetic sealing of the sleeve to the wall and of the pin to the sleeve.

Abstract: A master-slice type semiconductor chip in the form of a PGA package has a plurality of external pins arranged in a plurality of rows. The external pins of at least the outermost row are electrically connected to an input cell on the semiconductor chip, while the external pins of at least the innermost row is connected to an input/output cell provided on the semiconductor chip. With this arrangement, the wires in the package connected to the input/output cell can have smaller lengths than the wires connected to the input cell, so that crosstalk noises produced by output signals can be reduced.

Abstract: A power semiconductor assembly, particularly a semiconductor switch assembly which has a number of discrete emitter connection pads, comprised of a metal matrix composite housing and a copper or aluminum post with a cross-sectional area sufficiently large to carry the rated current providing a single-point, external connection to all emitter pads. The post passes through and is supported by an insulating ceramic insert such as aluminum oxide in the wall of the metal matrix composite housing. The post is hollowed out in the region where it passes through the ceramic insert in order to reduce the mechanical stress between the post and the insulating insert as a result of the mismatch in their thermal expansion coefficients. Buses on either side of the semiconductor die provide surfaces for connection from the post to the discrete emitter connection pads on the die.

Abstract: A jack-type semiconductor integrated circuit package with a jack-type connector instead of conventional leads. This package comprises a semiconductor chip which is provided with a plurality of bond pads, a jack housing which is adapted to electrically connect the package to a printed circuit board (PCB) and connected to a plurality of connection pins, a resin film which electrically connects the bond pads of the semiconductor chip to the connection pins of the jack housing, bonds the jack housing to the semiconductor chip and contains a plurality of conductive wires and a sealing resin housing which seals both the semiconductor chip and the jack housing and is formed in a predetermined shape by a molding process. The present package makes the operational reliability be improved and is especially suited for providing a high density IC memory chip package.

Abstract: A semiconductor package having outer leads which are not protruded from the package but only exposed to outside. The semiconductor package comprises a semiconductor chip which is formed with a plurality of bond pads at a central portion of its bottom surface, a lead frame including leads connected to bond pads for input/output of the bond pads respectively and bus bars connected to power supplying pads of the bond pads, insulation adhesives for attaching inner leads of the leads and inner leads of the bus bars to a bottom surface of the semiconductor chip formed with the bond pads, metal wires for electrically connecting the inner leads of the leads and the inner leads of the bus bars to the bond pads respectively, and a molding compound enveloping the semiconductor chip assembly with outer leads of the lead frame exposed to outside. The adhesive tapes are removed after a molding procedure.

Abstract: There is provided a module for supporting a plurality of semiconductor devices within an electronic package. The module has a support substrate and an apertured substrate laminated together with a polymer adhesive. A plurality of semiconductor devices are disposed within apertures formed in the apertured substrate and bonded to the support substrate by that same polymer adhesive.

Abstract: In a semiconductor device encapsulation assembly (50; 60), a semiconductor device (21), preferably a pressure transducer, is mounted on a base (11) in a cavity (20) formed by the base and surrounding walls (15). Electrical connections, preferably wire bonds (27), connect the semiconductor device to conductor paths (28) on the base within the cavity. An encapsulation material comprising a thixotropic fluorosiloxane material (51; 61) is applied in the cavity and completely covers the semiconductor device and the electrical connections. This structure enables the semiconductor device to withstand typical automotive contaminants, such as mild acids and gasoline, while also preventing erratic semiconductor device operation due to bubbles which may be drawn into the encapsulation material.

Abstract: A chip carrier for an optical device according to the present invention has a carrier body of insulating material, an external electrode, a glass cover fixed on one end of the carrier body, and a metal cover fixed on the other end of the carrier body. The optical device is connected at an electrode thereof to an inside end of the external electrode by a flip-chip bonding.

Abstract: A ball grid array is formed by mounting and electrically connecting one or more electronic devices to a substrate in which vias are formed to interconnect electrically conductive traces formed in a surface of the substrate to solder ball pads formed at an opposite surface of the substrate. The vias are formed by mechanical or laser drilling. Solder balls are formed on each of the pads and are reflow-attached to, for instance, a printed circuit board. The electronic components can include one or more integrated circuit chips, as well as passive components. The electronic components are attached to the substrate using wirebonding, TAB or flip chip connection. An encapsulating material is applied to encapsulate the electronic devices.

Abstract: A modular construction power circuit arrangement is disclosed which comprises a thin metal plate performing holder and heat sink functions, a multiplicity of electronic devices in the form of semiconductor material chips having metalized pads as their terminals, a printed circuit board attached to the thin metal plate, electric conductors between the metalized pads and the printed circuit on the board, terminating connectors which form a part of the printed circuit board for connecting the circuit arrangement to external circuits, and a plastics material body which conglomerates a portion of the thin metal plate, the semiconductor material chips, and the printed circuit board. At least one of the semiconductor material chips is attached directly to the thin metal plate and extends therefrom through an opening in the printed circuit board.

Abstract: A charge coupled device package with a glass lid is provided. The package includes a charge coupled device having a plurality of conductive bumps on its bond pads, an insulating tape bonded to the inside of the conductive bumps on the charge coupled device, a plurality of metal lines each connected at an end thereof to each of the conductive bumps and at the outer end thereof to a signal terminal of a circuit board and adapted for transmitting an electric signal of the charge coupled device to the outside, and a glass lid provided with the plurality of metal lines on opposite sides of its lower surface and bonded to an upper surface of the insulating tape on the charge coupled device. The sealing part of a sealing resin is provided between a lower periphery of the glass lid and an upper surface of the charge coupled device.

Abstract: An edge-mounted integrated circuit device (10 ) includes a semiconductor die (11) and a lead frame (15) attached to the semiconductor die (11). The lead frame (15) includes a plurality of leads (14) electrically connected to the semiconductor die and lead frame supports (16, 18). A package (12) encapsulates the semiconductor die and a portion of the lead frame (15). The leads (14) extend from the package (12) and are bent to present a face for surface mount connection to conductors on a substrate. The supports (16, 18) extend from the package (12) for contacting the substrate to support the device (10) in position for soldering the leads (14) to conductors on the substrate.

Abstract: An apparatus is described for electrically connecting flip chips to a flexible printed circuit substrate. The apparatus comprises (1) providing solder paste to a plurality of active contact pads located on the flexible printed circuit substrate, (2) placing the flip chips on the substrate such that solder bumps located on the flip chips are in registration with the solder paste on the active contact pads, and (3) heating the resulting assembly as a whole so that the solder paste on each active contact pad fellows to form an electrical connection with its corresponding solder bump.

Abstract: An electronic device adaptive to mounting on a printed wiring board, which has outer leads that are not subject to be deformed by external force, which helps improve positioning precision when it is mounted, and which can be transported at a reduced cost. A plurality of conductor leads connected to an electronic circuit provided in the electronic device extend along a peripheral surface of the package, and at least the ends of the conductor leads are fixed to the peripheral surface of the package to constitute input/output terminals of the electronic circuit. Preferably, the conductor leads are formed on a flexible film, bent along the peripheral surface of the package together with the film and are fixed to a bottom surface of the package via the film. Preferably, furthermore, a film in the form of a tape is employed, and a plurality of packages are arranged and supported on the film while maintaining a predetermined distance between one another.

Abstract: A plastic-molded-type semiconductor device includes a plurality of semiconductor chips, metallic wires connected to the semiconductor chips, leads connected to the metallic wires, and an insulating member interposed between the semiconductor chips and sealed in a resin member. Circuit formed surfaces of the semiconductor chips are directed in the same direction, and one or more of the semiconductor chips serve as a base on which the other semiconductor chips are mounted through the insulating member. One ends of the leads are bonded to the insulating member, and electrodes pad of each semiconductor chip are not covered by the other semiconductor chips, the insulating member and the leads, and therefore are exposed to the surface of the insulating member. In this device, the provision of a tab is omitted, and the laminated chips can be contained in a package thinner than a conventional package.

Abstract: An integrated circuit package which utilizes a standard TAB tape that can couple a lead frame to one of a number of integrated circuit dies that have different outer dimensions. The TAB tape includes a sheet of polyimide which supports a plurality of conductive leads. The sheet has a rectangular center opening which provides clearance for the IC die. Adjacent to each edge of the center opening are a plurality of equally spaced contact openings which expose portions of the leads. The leads are coupled to the integrated circuit by attaching the contact portions to the surface pads of the die. The contact openings are located at various distances from the center opening so that the tape can accommodate different die sizes. The leads of the TAB tape are also attached to a lead frame through lead frame openings in the polyimide.

Abstract: The present invention relates to a film carrier for semiconductor devices, the film carrier comprising a dielectric film 1 having at least one opening 9 formed therein, and a support ring 2 disposed in the opening and made of a material the same as that of the dielectric film, the support ring 2 being thinner than other portions, without deteriorating the entire mechanical strength of the film carrier, the electric characteristics at the support ring can differ from the electrical characteristic at the other portions of the film carrier.

Abstract: A method for making multi-layer ceramic packages. The method provides for attaching contact pins to a ceramic substrate after the application of an intermediate metal layer and an outer metal layer. This eliminates plating the contact pins with an intermediate metal layer and an outer metal layer, thereby saving material and process time.

Abstract: The present invention provides a method and an apparatus for manufacturing a pin grid array package assembly. According to this invention, the leads of the pin grid array package assembly are removably inserted into an electrically conductive plate containing detachable pin-clasp contacts. The plate clamps onto the ends of the leads, thereby forming a common electrical contact for the electroplating process. After the electroplating process has been completed and prior to shipping the package, the plate is detached without requiring the step of cutting ends of the leads from the plate.

Abstract: An electronic device (10) encased within a moulded package body (11) has a leadframe (12) extending therefrom. In order to protect the leads (16) for the electronic device a guard ring (14) is provided on the leadframe. By making the guard ring independently of the moulded package body and fitting it separately to the leadframe one can deal with packages of any size in a simple manner and irrespective of the material of the package body (11).

Abstract: An apparatus and method for simultaneously mounting lead strip segments onto each side of a rectangular ceramic substrate. Four lead strip mounting assemblies are equally spaced 90 degrees apart around a central vertically oriented substrate support so that each assembly is perpendicular an edge of a substrate on the support. Lead strip feed assemblies located adjacent each mounting assemblies cuts lead strip segments and feeds the lead strip segments into the mounting assemblies. The four mounting assemblies simultaneously mount the lead strip segments on the substrate.

Abstract: A semiconductor device of the present invention accommodates a large semiconductor chip in a downsized package without impairing its reliability. The semiconductor chip is bonded on a relatively small die pad. Common inner leads and a plurality of inner leads are disposed opposite and spaced from the semiconductor chip by a gap ranging from 0.1 mm to 0.4 mm and the gap between the semiconductor chip and the common inner leads and the plurality of inner leads is filled with a resin which forms part of a resin package.

Abstract: An integrated circuit package characterized by an interposer including a thin, flexible, planar insulator having a plurality of substantially radial traces provided on one side thereof. The other side of the insulator is attached to the die attach pad of a lead frame, and an integrated circuit die is attached within a die attach area of the assembly. A first set of wires couples bonding pads of the die to the traces, and a second set of wires couples the traces to bonding fingers of the lead frame. The bonding fingers, interposer, die, and both sets of wires are then encapsulated in plastic. The interposer can be advantageously manufactured in a tape automated bonding (TAB) process to provide a low cost, high performance, and versatile lead frame assembly.

Abstract: A electrically interconnected assembly includes an electronic component, such as an integrated circuit chip, having a first pattern of contact sites and includes a substrate having a second pattern of contact sites corresponding to the first pattern. The electronic component is demountably connected to the substrate by a bump-and-socket arrangement at each pair of contact sites. One of the contact sites has a raised bump that is received within a depressed area of the other contact site. The raised bumps are pressed into the depressed areas, forming a ring of contact to electrically and mechanically connect the electronic component to the substrate. Preferably, the depressed areas are formed in a compliant material that allows some deformation but not so much as to allow the raised bumps to bottom out against the depressed areas. The assembly may be used in forming multi-chip modules having demountable integrated circuit chips.

Abstract: An IC card includes a substrate, semiconductor devices mounted on at least one of the major surfaces of the substrate and a casing in which the substrate with the semiconductor devices mounted on it is housed. The casing includes a frame and panels bonded to the frame on the opposite sides of the frame by means of adhesive layers. The semiconductor devices are prevented from being bonded to the panel via the adhesive layers at locations on the adhesive layers facing the semiconductor devices.

Abstract: A semiconductor package comprising a semiconductor chip received in and attached to a cavity of a base made of a ceramic or aluminum, by means of an adhesive, a lid fixedly attached to the upper surface of the semiconductor chip, the lid having a plurality of solder bumps being in contact with bonding pads of the semiconductor chip and a plurality of metal contacts formed on the solder bumps of the lid. The lid comprises an insulating polyimide film or a rectangular plate made of a nonconductive ceramic material. The semiconductor package eliminates the use of a lead frame and metal wires, thereby enabling the manufacture thereof to be simplified. It also achieves a simplification, a lightness, a thinness, a compactness in construction. With the simplified construction, a reduction in manufacture cost and an improvement in productivity are achieved. In manufacturing semiconductor devices, the semiconductor package also provides an improvement in the degree of dense integration.

Abstract: An integrated circuit package that permits high density packaging of circuit chips. The integrated circuit package has a base substrate support member with an upper and a lower surface. A cavity is located in its upper surface and a similar cavity is located in its lower surface. Two circuit chips are located in each cavity that are connected together in back to back relationship. The cavities are closed or sealed by lids that are bonded to mounting surfaces that are located on the base substrate support member and surround the cavities. A series of terminating leads are located on two sides of the base substrate support member that are electrically connected to the circuit chips. A single cavity embodiment is also set forth that is designed for use when a lesser density is acceptable or desired.

Abstract: The invention includes a flat, planar, single piece copper footprint including a first portion for mounting an aluminum bond pad, and a third portion for mounting a semi-conductor device, and a second portion, interposed between the first and third portions, which is recessed and includes arcuate-shaped sides. The recessed arcuate-shaped sides of the second portion of the copper footprint act as a solder stop preventing solder from flowing from the first portion to the third portion or vice versa.

Abstract: There is provided an electronic package where the package components define a cavity. A semiconductor device and a portion of a leadframe occupy part of the cavity. Substantially the remainder of the cavity is filled with a compliant polymer, such as a silicone gel. Since the cavity is no longer susceptible to gross leak failure, the seal width of adhesives used to assemble the package may be reduced, thereby increasing the area available for mounting the semiconductor device.

Abstract: A CCD package and a method for assembling a CCD package utilizing a TAB process. The method comprises the steps of preparing a tape for TAB which has outer leads, inner leads and die bonding paddles, bonding a chip on the paddles and then bonding the free ends of the inner leads on the bonding pads of the chip, connecting the inner leads and the outer leads through insulations, adding a light shield layer beneath the chip, and attaching a glass lid to the surface portions of the inner leads positioned just above the chip. Accordingly, packages of light, laminated and simple structure can be obtained, thereby advantageously enabling the compactness of products utilizing CCD elements. Also, the process is also simplified, thereby decreasing the cost of producing CCD elements.

Abstract: A corrector ring maintains the coplanarity of the tips of the leads of a quad flat pack QFP package during shipping and handling. A first snap-fit or adhesively-fixed ring member has an inner peripheral surface which engages the lower walls of the QFP package. The ring member also has an outer peripheral surface which engages the inner surfaces of the resilient leads of the QFP package. A second snap-fit adhesively-fixed ring member is held in place over the outer surfaces of the leads.

Abstract: Electrical parasitic parameters can lead to reflections and switching noise in a circuit causing signal distortions. A stripline configuration semiconductor device (10) can be manufactured to reduce the overall parasitic parameters, especially inductance, of a device. In one embodiment, a semiconductor die (12) having a grounded backside (20) is directly bonded with an electrically conductive adhesive (22) to a metal base (16), thus grounding the metal base. The die is also electrically connected to a leadframe (14) by wire bonds (24). An electrically insulating adhesive (28) is used to seal a metal lid (18) to the metal base with the die and leadframe disposed between the lid and base, thus forming a protective package body. The lid is grounded to a ground lead (26) of the leadframe with a solder bridge (30). An additional advantage to having a metal package body is that it provides shielding for the device.

Abstract: A hermetic package particularly adapted for high density interconnect (HDI) electronic systems employs a ceramic substrate which serves as a base for the hermetic package. The substrate comprises a cofired body including buried conductors which provide electrical continuity between a set of inner contact points and a set of outer contact points bridging a seal ring that comprises either a solder seal or a weldable seal for the hermetic package lid. The outer contact points may be directly connected to a leadframe. The leadframe leads, after severing, can be directly attached to a printed circuit board.

Abstract: A low cost Surface Mount Carrier (SMC) for carrying integrated circuit chips mounted thereon. The carrier, or interposer, is a thin-small single layer or, a multi-layer deck of printed circuit board (FR-4) material with at least one direct chip attach (DCA) site for mounting a semiconductor chip. The DCA site has chip bonding pads wherein the integrated circuit chip's pads are wire bonded to or soldered to the carrier. The bonding pads are connected to wiring pads through interlevel vias and wiring lands or traces which may be on one of several wiring planes. The carrier is connected to the next level of packaging through the wiring pads.

Abstract: An improved printed circuit board (PCB) for interconnecting integrated circuit devices includes a lead frame sandwiched between two multilayer substrates. Integrated circuit devices are mounted on the top of the upper substrate and on the bottom of the lower substrate to provide increased packaging density. Thus, according to the present invention, it is possible to provide a simply constructed electronic component mounting PCB which facilitates the design of circuits, and affords excellent connection reliability, which can readily form a heat radiating structure, and in which the thermal matching with the electronic component is excellent.

Abstract: A semiconductor device having an IC (Integrated Circuit) chip packaged on a circuit board, and a cap for hermetically sealing the chip. The cap is bonded to the circuit board at the edges of an open end thereof and bonded to the chip at the underside or bottom thereof. To accurately position the chip on the circuit board, the circuit board is provided with a groove or a shoulder in a position where it faces the edges of the open end of the cap. After the chip has been positioned on the circuit board, the cap is bonded to the circuit board via the groove or the shoulder.

Abstract: A capacitor is disposed within a semiconductor device assembly atop a plastic layer pad, beneath which passes a pair of leads connected to a semiconductor device. The capacitor is connected to the pair of leads, such as by soldering, spot welding or conductive epoxy through cutouts in the pad. In one embodiment, the cutouts extend into the pad from inner and outer edges thereof. In another embodiment, the cutouts are holes through the pad. A plurality, such as four, capacitors are conveniently disposed atop a corresponding plurality of pads, and are connected to a corresponding plurality of pairs of leads within the semiconductor device assembly. By positioning the capacitor(s) as closely to the semiconductor device as possible, the efficacy of the capacitor(s) is maximized. Method and apparatus are disclosed.

Abstract: An integrated circuit packaging system with an integrated circuit die mounted onto a substrate having a top side ground plane between the integrated circuit and the substrate, a bottom side ground plane and short high frequency connections between the two ground planes. The top side ground plane decreases signal degradation due to reflections by providing high frequency ground access close to the die and by providing a transmission line for bond wires. A grid of conductive vias through the substrate improves thermal conductivity and provides the short high frequency current path for the top side ground plane. The die is separated from the top side ground plane by a dielectric layer which also has a conductive layer next the die to provide a back bias voltage.

Abstract: After a semiconductor die is placed onto a leadframe and electrically connected to the die, the die and the ends of the leads adjacent to the die are encased in a packaged body. The exposed ends of the leads are trimmed so that the leads are of desired lengths for leadforming, or for connection to substrates or sockets. The ends of the leads are enclosed in a protective body, so that when the package is tested and handled, the protective body reduces undesirable bending of the leads. By trimming the leads before forming the protective body, the leadframe used need not be larger than those normally used.

Abstract: A semiconductor package comprising a connection pad device for electrically connecting at least a part of chip pads of a semiconductor chip with the corresponding inner leads of a lead frame. The connection pad device comprises a film as a connection pad device body, a plurality of copper foil wirings each having one end positioned to correspond to each chip pad of the semiconductor chip and the other end positioned to correspond to each inner lead of the lead frame, a plurality of first jumper pads protruded from the film, each of the first jumper pads being connected to one end of each corresponding copper foil wiring and wire-bonded to each corresponding chip pad, and a plurality of second jumper pads protruded from the film, each of the second jumper pads being connected to the other end of each corresponding copper foil wiring and wire-bonded to each corresponding inner lead.

Abstract: A multi-chip module board includes a multi-chip module substrate; a first multi-chip module designed and assembled into the substrate; and a space on the substrate configured to receive an additional add-on multi-chip module, memory module or component module and to operatively connect the add-on module to the first multi-chip module. The first multi-chip module contains integrated and discrete circuit elements necessary to provide basic functionality required by the board user. Space and connecting structure is provided on the module board for the connection of add-on modules which provide additional or peripheral functionality to the board. The connecting structures included on the module board and the add-on modules are designed to permit the attachment of any one of several different function add-on modules to a location on the module board.

Abstract: A method of manufacturing inversion ICs includes the steps of connecting a first electrode pad group of a semiconductor chip to a second lead group via wires, connecting a second electrode pad group of the semiconductor chip to a first lead group via wires, sealing the semiconductor chip, the first and second lead groups, and the wires in a resin so that the outer lead portions of the leads are exposed, and bending the outer lead portions of the leads toward the bottom surface of the semiconductor chip.

Abstract: A method and apparatus for enclosing an optically active integrated circuit die mounted on a region of a printed circuit substrate within either a unitary optical plastic lens element and enclosure or a discrete lens element and enclosure formed with mechanical standoff tabs and positioning pins for attaching and securing the unitary or discrete enclosure to the circuit substrate. The mechanical tabs of the enclosure have catches that snap in place into receiving apertures in the substrate so as to position the molded plastic lens over the optically active integrated circuit device at a predetermined distance providing the desired focal length. The molded plastic lens of the optical plastic enclosure protects the optically active integrated circuit from damage and images light thereon or therefrom. In a preferred embodiment, the side walls of the plastic enclosure contact the surface of the substrate and enclose the die and the region that the die is mounted on.

Abstract: A packaged semiconductor device has, according to one embodiment of the present invention, a semiconductor pellet having an electronic circuit therein and electrode pads formed on a principal surface of the pellet, a plurality of electrical connection bumps provided on the electrode pads, a plurality of heat dissipation bumps provided at the principal surface of the pellet and electrically insulated from the electronic circuit and the electrode pads, electrical connection leads for the electronic circuit, heat dissipators for the electronic circuit and a packaging material for sealing pellet, the electrical connection bumps, the heat dissipation bumps and parts of the electrical connection leads and the heat dissipator. One or more of the heat dissipation bumps are arranged relatively nearer to the electronic circuit than the electrical connection bumps for thermal coupling to the electronic circuit.

Abstract: The invention is concerned with a method and an apparatus for working a clad material used as a reed frame for a flat package type integrated circuit. When metal foils of a predetermined size is superimposed at a predetermined position on a strip-like material, press contacted and rolled to produce a continuous clad material, and reference holes are bored in the clad material, not only the relative position between the reference holes but also the relative position between the reference holes and the metal foils previously applied to the clad material may be set accurately. Even if the pitch distances between the reference holes provided in the clad material differ from one another, press working by the metal mold may be continuously performed using these reference holes.

Abstract: A ceramic package for containing a semiconductor chip including a heat radiating plate, a base plate for wiring, and a ceramic package for containing a semiconductor chip. The package contains a ceramic board, a ceramic cap and a metal lead frame. The heat radiating plate and the ceramic board are made of silicon nitride sintered body, which is characterized in that the number of grain boundaries per a 10 .mu.m straight line drawn in an arbitrary section of the sintered (polycrystal) body is 20 or fewer.