Abstract: A plastic-molded-type semiconductor device having a high degree of integration encases a plurality of semiconductor chips in a package unit with each chip situated perpendicular to the substrate for mounting. On a surface of each chip containing circuits or on a reverse surface of the same, a lead frame is attached with an insulating material interposed therebetween. The chip and lead frame are connected with each other by using wire. The lead frame is arranged perpendicularly to another lead frame provided in parallel and connected therewith by welding. A printed circuit board may be used in place of said latter lead frame. By arranging the chips in projections made of resin, the thermal resistance of the semiconductor device is decreased. The present invention is particularly effective for a memory IC.

Abstract: A high frequency transmission line structure has a reference potential plane conductor layer, a plurality of strip line conductors, a dielectric material layer interposed between the reference potential plane conductor layer and the strip line conductors and a shielding conductor unit provided between adjacent two strip line conductors. The shielding conductor unit includes first and second slender conductor portions extending substantially in a direction parallel with a lengthwise direction of the strip line conductors and connected to be integral with each other at their first ends. The second ends of the first and second slender conductor portions being electrically connected with the reference potential plane conductor layer.

Abstract: A plurality of circuit boards are used and frames are attached to the circuit boards to surround the peripheral portions thereof. Since connection terminals electrically connected to the respective circuit boards are attached to the respective frames, a semiconductor device having semiconductor elements mounted at high density can be formed by stacking the first and second frames on each other and setting the respective connection terminals in contact with each other to electrically connect the circuit boards to each other.

Abstract: Circuit board terminals suitable for coupling high voltage, high current wires, such as 240 volts, 50 amps, to a circuit board is shown in which for each wire a block 24 of electrically conductive material is formed with a pair of ribs 48, 50 which interfit with a corresponding pair of slots 54, 56 in the circuit board 12. A bore 40 formed through the block from one sidewall to an opposed sidewall is adapted to receive the high voltage, high current wire which is clamped against the block by a set screw 44 received in a threaded bore 42 which communicates with the bore extending between the sidewalls. Another threaded member 60 is received through a bore 58 in the circuit board disposed between the two slots and into a threaded bore 62 in the bottom of the block disposed on one side of the circuit board with the head 62 of the threaded member engaging the high voltage, high current trace 22 or 14 on the opposite side of the circuit board. A layer of solder 68 is then placed over the head and onto the trace.

Abstract: The invention minimizes openings or cracks near the position at which a solder tail of a lead frame extends through a wall of a case molded about the lead frame and through which wall the solder tail extends, so as to prevent leakage through the wall near the solder tail. To accomplish this, a double-bend is formed in the solder tail before encapsulation of the lead frame. The double-bend comprises a first downward right-angle bend just outside the case wall, and an adjacent distally-spaced opposite bend such that the distal end portion of the solder tail extends substantially parallel to the plane of the lead frame. Subsequently, an anvil is positioned to support the portion of the lead tail between the case wall and the first downward bend in the solder tail, while a forming tool forces the distal end portion of the soldering tail downward to the desired final position.

Abstract: A ceramic chip carrier is disclosed which preferably includes a ceramic substrate having a circuitized surface, at least one semiconductor chip mounted on the circuitized surface, and at least one pin which is mechanically and electrically connected to a contact pad on the circuitized surface. Each mechanical/electrical connection between a pin and a contact pad includes a conventional solder connection. In addition, each such solder connection is at least partially encapsulated in a material, including an epoxy resin, which is chosen in relation to the solder connection to enable the solder connection to withstand a standard thermal fatigue test.

Abstract: Disclosed are a flexible wiring board in which the thickness of at least one part of the insulating film support to be bent in actual use of the board is made thinner than that of the other parts of it and the surfaces of the conductive patterns containing the part to be bent are covered each with a silicone rubber coveray, and a method of preparing the board. The board has sufficient flexibility enough to be well bent at the determined part in actual use thereof with ensuring the reliability of connection at the bent part.

Abstract: According to one aspect of the present invention, a semiconductor chip, which can be mounted in a zigzag in-line type package (ZIP) partially using a tabless lead frame, includes bonding pads arranged on the chip so that the chip can be applied also to other different types of packages. These different types of packages include a small out-line J-bent type package (SOJ) which uses a lead frame with tab, and a dual in-line type package (DIP) which uses a tabless lead frame. Further, a plurality of bonding pad pairs are provided amongst the bonding pads on the chip, each pad of such bonding pad pairs having the same function as the other pad associated therewith thereby duplicating a common function in different bonding pads on the semiconductor chip so as to make the semiconductor chip compatible with a variety of or different types of packages.

Abstract: External electrode terminal parts and a plastic terminal supporting body are individually formed, and the terminal parts are inserted into through holes of the terminal supporting body, thereby completing a terminal holder. Each of the terminal parts has a stopper portion at a predetermined position in its longitudinal direction, such that the stopper portion is wider than the width of the hole in the terminal supporting body. Hence, the distance between the terminal supporting body and the end of the terminal parts is defined when the terminal parts are inserted into holes of the terminal supporting body. In addition, since the terminal parts include a spring portion which abuts against the inner wall of the hole in the terminal supporting body when inserted therein, the terminal parts cannot slip out of the terminal supporting body.

Abstract: The present invention discloses a package for electronic components which reduces the unwanted electronic noise generated by the package and which can be fabricated by conventional manufacturing techniques. Accordingly, a lid for a package housing is fabricated from beryllium oxide and contains a small hole. During assembly, a wire attached to one of the electronic components is inserted through the hole of this lid, and the lid is attached by conventional methods. Finally, the wire protruding through the hole is soldered to the lid, which completes the sealing of the housing and which provides for a hermetic environment for the enclosed electronic components.

Abstract: A semi-conductor package having an insulator formed by a supporting portion, a mounting portion and connecting members, and a layer of electrically conductive material on the insulator in a pattern forming a pad and inner leads connected to the pad by supporting bars. A chip is attached on the pad, and the inner leads are wire-connected to the chip. The pad is vertically offset from the inner leads and the chip is supported in recessed fashion on the pad which shortens the length of the connecting wires whereby the wire-connecting efficiency and the structural stability are improved.

Abstract: A Demountable Tape-Automated Bonding System for providing connections to a chip is disclosed. The chip is attached to or is held in place on a TAB frame that includes a generally flexible dielectric film which bears a pattern of conductive traces. A multitude of closely-spaced contacts which protrude downward from the chip contact the conductive traces on the TAB frame. The chip may be maintained in its proper location on the TAB frame by either a bonding agent or by compressive forces supplied by a cap which is fastened to the TAB frame and to a substrate, such as a printed circuit board, below the TAB frame. The substrate carries an array of conductive traces around the edges of the substrate. These traces match the traces on the TAB frame. The conductor traces on the TAB frame and on the substrate are held in contact with each other by compressive forces supplied by the cap which is fastened to the TAB frame and to the substrate.

Abstract: A lead frame for mounting a circuit component includes plural terminal legs for connection with a circuit. At least two of the terminal legs have pads for connection with the circuit component which has wire leads. The lead frame pads and wire leads are of materials which are incompatible for welding. A rivet of a material compatible for welding with the component lead wires is mounted in the pad of each terminal leg for connection with the circuit element. A weld secures each component lead wire with one of the rivets.

Abstract: A small bore or a cut portion is formed in a leading end portion of a lead terminal extended from a package main body. A gas produced when the leading end portion is contacted with and soldered to a land provided on a printed wiring board is allowed to escape through the small bore or the cut portion and, therefore, solder is easy to enter between the lead terminal and the land, which improves the soldering performance of the lead terminal. Also, the provision of the small bore or cut portion increases the area of a peripheral portion of the lead terminal to be in contact with the solder to thereby increasing the strength of the soldering.

Abstract: A hermetically sealed package for a microelectronic device, such as a solid-state image sensor, includes a ceramic housing defining a cavity in a major surface thereof and metal terminals extending through side edges thereof to the cavity. A microelectronic device is in the cavity and electrically connected to the terminals. A cover plate extends over the cavity and over a portion of the major surface around the cavity. An amalgam of a mixture of a liquid metal and a powdered metal is between the cover plate and the housing surface. The amalgam bonds the cover plate to the housing and forms a hermetical seal therebetween.

Abstract: A lid (2) for an electronic circuit housing (4) has inner (24) and outer (22) laminated layers that are formed from two different materials, joined to each other and bowed outward from the housing (4) so that the inner layer (24) is under tensile bending stress at the interface between the layers, and the outer layer (22) is under compressive bending stress at the interface. This forms a pre-stress on the lid that resists external loads, and causes the lid to deflect under loading in a linear, predictable and recoverable fashion. The lid is preferably formed by thermal bonding of two materials having different coefficients of thermal expansion, with the bow forming as the materials cool. In one example two different metals are used, and in another a metal is bonded to a glass-ceramic tape.

Abstract: An improved semiconductor package (10) having a segmented lead frame (14) and (514) is disclosed. The preferred segmented lead frame (14) is divided into essentially identical segments (27) which have planes (22) attached to at least some of the associated individual leads (28). Segmentation of the lead frame (14) allows for the use of planes in inexpensive plastic and ceramic packages. Segmentation further allows the use of inexpensive aluminized stripes (42) to aluminize portions of individual leads (28) even in quad package configurations. An alternate equally preferred segmented lead frame (514) is provided for those applications wherein asymmetrical lead frames are required. Segmentation of the alternate segmented lead frame (514) permits the use of planes (522) and (552), while also limiting the cost of producing the alternate lead frame (514) especially when the etching method of production is required.

Abstract: A process for the assembly of a pin grid array electronic package by vacuum lamination is provided. A vacuum is applied to the package components at the same time the components are bonded with a dielectric sealant. The sealant flow into holes formed in the package base is improved thereby electrically isolating terminal pins which pass through the holes.

Abstract: A flat package for semiconductor integrated circuit devices allows edge-mounting and surface-mount. The package may be molded plastic containing a semiconductor chip, and flat leads extend from one edge of the package. The leads are bent to provide an area to solder to conductors on a PC board. Mechanical positioning, mechanical support and spacing are provided by studs extending from the edge of the package adjacent the leads. The studs have stops formed at a position even with flat outer surfaces of the bent leads; the portion outward of the stops fits into holes in the PC board.

Abstract: A fully-populated Pin Grid Array (PGA) is vacuum-chucked to a pedestal, without mechanical clamping. The pedestal includes a cylindrical shaft having a vacuum passageway extending its length, and a vacuum reservoir block mounted atop the shaft, and an alignment/fixture plate mounted atop the vacuum reservoir block. The alignment/fixture plate is provided with holes extending partially through the plate, at least about its periphery, for receiving the outermost rows/columns of pins of the PGA, while maintaining a vacuum seal. In one embodiment, a central portion of the alignment/fixture plate is provided with a large through-opening for receiving the remaining pins of the PGA. In another embodiment, the central portion of the alignment/fixture plate is provided with a plurality of individual through holes corresponding to the remaining pins of the PGA. In this manner, the PGA is held securely and well aligned within a wire bonder, while avoiding damaging the pins.

Abstract: A ceramic-glass integrated circuit package utilizing low temperature sealing glass and having reduced lead to lead capacitance. The inventive package includes a cap and a base. The base includes a ceramic base substrate, a first layer of conductive material adjacent the ceramic base substrate to serve as a ground plane, and a second layer of conductive material adjacent the ceramic base to serve as a power plane. A glass material is selectively deposited on the base substrate to form at least one discrete void for housing an integrated circuit chip, and a lead frame having a plurality of leads is embedded in the glass material and electrically connected to the ground and power planes but physically separated therefrom. In one embodiment, integral decoupling capacitors are further included on the base substrate. Incorporation of ground and power planes and decoupling capacitors into a ceramic-glass integrated circuit package adapts these low cost packages to high-speed applications.

Abstract: A generic chip carrier is described which includes, as integral parts, a voltage bus and a plurality of terminating resistors connected between the voltage bus and signal traces on the carrier. The voltage bus wraps around the chip carrier, thus providing a large area of metal. Through the selective use of the terminating resistors, the generic carrier can be customized for a particular type of integrated circuit, i.e., source or destination termination of signals. A signal trace may be customized by "opening" the terminating resistor with a current spike applied by a standard electrical probe. Spare bonding pads and terminating resistors are placed at intervals about the periphery of the carrier as insurance against defective or mistakenly removed terminating resistors.

Abstract: A ceramic package for a memory semiconductor accommodates therein the memory semiconductor and is sealingly closed by an ultraviolet ray transmissible ceramic lid. The ceramic lid is made of a polycrystalline alumina and formed with at least one groove in a sealing portion with the ceramic package. With the arrangement, the ceramic package is superior in sealing strength, air-tightness and ultraviolet ray transmission and can easily accommodate any increase of memory amount of semiconductor elements.

Abstract: A card-independent method of forming a module for subsequent attachment to a card body includes increasing both the area and the height of contact pads on an integrated circuit die and includes forming a leadframe in which contact sites are electrically connected to the contact pads of the die by Z-axis epoxy. The epoxy is unidirectionally conductive, so that the epoxy as a mechanical link, an electrical link, and acts as an overcoating of the active side of the die A die-alignment layer having a center cavity properly positions the contact pads of the die relative to contact sites of the leadframe.

Abstract: The package (10) of the integrated circuit (11) includes a TAB carrier (12), the supply conductors (15b) of which comprise shielding elements between groups of signal conductors and have a length that is largely shunted via a corresponding potential conductor plane (26b) of the decoupling device (24) of the package.

Abstract: A microwave circuit component (40) has terminals and is mounted on a principal surface (38) of a substrate (34) received in a cavity (45) of a housing (35) with a additional surface (39) brought into contact with a bottom surface (44) of the cavity. With a part projected outwardly of the cavity for connection to an external conductor, a contact pin (36) is movably received in an insulator support member (37) placed in the cavity and is urged to one of the terminals. It is possible to bring the principal surface into contact with the bottom surface. In this event, the contact pin may be urged to the additional surface with the terminal extended from the principal surface to the back surface.

Abstract: A lead assembly and method for forming electrical connections between pads on an integrated circuit chip and pads on a circuit board includes small diameter wires adhesively bonded to a supporting tape. The wires may be inwardly fanned to form connections between relatively widely spaced circuit board pads and relatively closely spaced chip pads.

Abstract: A flexible printed circuit board for use in a display unit of a camera, which includes a flexible substrate with a printed circuit pattern, a die of an integrated circuit chip mounted on said substrate for driving the display drive, a plurality of wires, and resin sealant for covering said integrated circuit chip. The flexible substrate has first terminals to be in contact with a display device and second terminals in electric connections to said first terminals, respectively. The die of the integrated circuit chip includes a plurality of connecting terminals. The plurality of wires are for bonding said connecting terminals of the integrated circuit chip to said second terminals of said printed circuit pattern.

Abstract: A quadrate semiconductor element in the form of a quad flat package, a bare chip, and the like mounted on a substrate has a plurality of first terminals electrically connected through connecting wires to corresponding second terminals which are disposed on the substrate around the semiconductor element. The second terminals are disposed on the substrate such that the number of second terminals per unit area is less at locations near the corners of the quadrate semiconductor element than at the other portions of the substrate. This arrangement enlarges the effective wiring area for the connecting wires at the corners, thus greatly improving wiring efficiency.

Abstract: An enclosure providing an evacuated region about an array of microelectronic vacuum devices including a substrate, a first encapsulation member defining a cavity, a second encapsulation member defining a cavity and mating with the first encapsulation member so as to define an encapsulated region, a ledge formed in the first encapsulation member for supporting the substrate and defining a communicating passage between the cavities and a sealing agent disposed between the mating surfaces of the encapsulation members to effect a vacuum seal such that when the encapsulated region is evacuated it will be at the same vacuum levels throughout to eliminate differential pressure induced deformation of the substrate. The evacuated substrate enclosure further provides for assembly without an evacuated environment.

Abstract: A heat-resistant package for electrical components comprises a housing composed of a plurality of independent side walls made of heat resistant ceramic material. Sealed-in leads are provided in one or more of the side walls. After, the leads are installed the ends of the side walls are brazed together to form a closed ring and that ring is brazed to the housing bottom wall. Also, a continuous metal ring may be brazed to the tops of the side walls. The brazings provide hermetic seals between the housing walls and they, along with the seal ring, provide compliance between the walls making the housing resistant to thermal shocks.

Abstract: A package for enclosing and mounting a multichip module to a printed wiring board including a ceramic base with an elevated peripheral ledge constructed of a material, having a coefficient of thermal expansion differing substantially from the coefficient of thermal expansion of the material of a serpentine sidewall mounted to the base, and having a lid mounted to the top of the sidewall. The package includes electrical contacts extending through the ledge for connecting the multichip module to the circuit board. The sidewall is a series of interconnected short segments having acute angles at their interconnection forming a pleated shape.

Abstract: A ceramic chip carrier is disclosed which includes a ceramic substrate having a circuitized surface, at least one semiconductor chip mounted on the circuitized surface, and a lead frame or edge clip which is mechanically and electrically connected to contact pads on the circuitized surface. Each mechanical/electrical connection between the lead frame or edge clip and the contact pads includes a conventional solder connection. In addition, each such solder connection is at least partially encapsulated in a material, including an epoxy resin, which is chosen in relation to the solder connection to enable the solder connection to withstand a standard thermal fatigue test.

Abstract: A leadless pad array chip carrier package is disclosed, employing a printed circuit board (22) having an array of solder pads (34) on the bottom side. A semiconductor device (24) is electrically wire bonded (49) and attached with conductive adhesive (47) to the metallization patterns (43, 25) of the printed circuit board (22). A protective plastic cover (26) is transfer molded about the semiconductor device (24) covering substantially all of the top side of the printed circuit board (22).

Abstract: There is provided an electronic package assembly having a die attach paddle bonded to the package base by a compliant adhesive. A recessed channel formed in the base is partially overlapped by the die attach paddle. During package sealing, excess adhesive accumulates in the recessed channel, eliminating bridging of the adhesive to the leadframe.

Abstract: A heat sink and method for heat sinking a package containing electronic components is described. The heat sinking is accomplished by use of a cooling plate located beneath a circuit board. The package having leads extending from more than one side of the package is positioned on the cooling plate so that the leads from the sides of the package can be electrically coupled to conductors on the circuit board wherein the circuit board is disposed about at least two and preferably three sides of the package. The package is secured to the cooling plate by a spring clip. The spring clip permits flexible positioning of the package relative to the cooling plate including positioning the package in close proximity of the edge of the cooling plate. Thermal conduction between the package and the cooling plate can be enhanced by the presence of a compressible thermally-conducting material.

Abstract: To bridge the gap between a semiconductor die and the leads of a leadframe, an insulating bridging and support member is used to support the die. The member has thereon conductive traces connected to the die. Provided in the interior portion of the member away from its edges are connecting structures such as holes, slots or grooves. The leads have bent end portions engaging the holes, slots or grooves. The bent end portions are soldered or otherwise connected to the inner surfaces of the holes, slots or grooves by soldering to electrically connect the leads to the traces and to physically attach the member to the leadframe. The above-described structure permits the bonding sites between adjacent leads to the member to be greater than lead spacing of the leadframe. The leads are in the shape of elongated rods of uniform cross-section to maximize the lead density possible around the bridging and support member.

Abstract: A semiconductor device such as a semiconductor memory has a semiconductor chip bonded to an upper surface of a lead frame die pad, a polyimide film bonded to the upper surface of the semiconductor chip, and a quartz plate having a recess defined in a lower surface thereof, the quartz plate being bonded to an upper surface of the polyimide film with the recess being positioned over the integrated circuit of the semiconductor chip. The recess provides a gap between the polyimide film and the quartz plate for absorbing compressive stresses applied to the semiconductor device. The polyimide film, rather than the quartz plate, may have the recess. A plurality of leads are connected to the electrodes of the semiconductor chip by connecting wires. The lead frame, the semiconductor chip, the polyimide film, the quartz plate, the leads, and the connecting wires are sealed in a resin case.

Abstract: A process for hermetically sealing a cap (7) to a package base (1), on which a semiconductor chip (2) is mounted, by an adhesive resin. First, the base (1) is coated with a thermosetting silicone resin (10) along a frame-shaped abutting portion, then the silicone resin is completely hardened and becomes a silicone rubber, and thereafter, the silicone rubber is coated with a thermosetting sealing resin (11) having a good adhesion with the slicone rubber. The cap is then abutted against the base, and the base and cap are heated while a pressure is exerted thereon to press the base and the cap toward each other.

Abstract: A tube-shaped tray that comprises adjacent compartments for semiconductor devices disposed linearly along the length of the tray. Each compartment consists of a die-shaped bottom container having a supporting structure conforming to the specified geometry of the leads in the formed semiconductor device. A film of protective and lubricating material is provided for placement on top of the device in each compartment, so that a forming tool can freely and safely cooperate with the supporting structure of the die-shaped bottom container to form the leads of the semiconductor device according to the desired specifications. The tray also includes a slidable retaining cover to prevent spillage and damage of the packaged devices.

Abstract: A semiconductor package comprises a ceramic base component, a plurality of bonding pads of an electrically conductive metallic material, first and second electrically conductive buses, a signal shielding component which contains first and second electrically conductive plates electrically insulated from each other by a high temperature dielectric material wherein the shielding component is bonded to the base component outward of the bonding pad and the buses. A layer of a dielectric material covers the surface of the shielding component and a glass frit is bonded to the layer of dielectric material. The frit has the leads that extend from a metallic lead frame embedded in its outer surface. The leads, the dielectric layer and the signal shielding component are in substantial alignment The leads are electrically connected to the bonding pad and the first and second electrically conductive layers are connected to the first and second electrically conductive buses.

Abstract: A hybrid package in which Kovar feedthroughs are friction welded to an aluminum housing. Friction welding produces a very strong weld joint which resists the thermal stresses induced between the aluminum housing and Kovar feedthroughs by the large difference in their coefficients of thermal expansion. Friction welding also produces a very small heat affected zone, while brazing, soldering and other types of welding produce large heat affected zones which can cause annealing problems. The aluminum package is easy to machine, light in weight and provides good heat dissipation for the hybrid microcircuits in the package.

Abstract: A surface-mount network device which is to be mounted on a mounting substrate is disclosed. This device has an insulating substrate having wirings and passive elements. A plurality of lead terminals sandwich the insulating substrate from an end face of the insulating substrate. Terminal connection conductors are formed on the main surfaces of the insulating substrate and connect the lead terminals and at least one of the wirings and the passive elements. Sealing material cover at least connecting portions between the terminal connection conductors and the lead terminals. End portions of the lead terminals are bent to extend in a direction substantially parallel to the mounting substrate. This device is to be mounted vertically on the mounting substrate through the bent end portions of the lead terminals.

Abstract: After a semiconductor die is placed onto a leadframe and electrically connected to the die, the die and the ends of the leads adjacent to the die are encased in a packaged body. The exposed ends of the leads are trimmed so that the leads are of desired lengths for leadforming, or for connection to substrates or sockets. The ends of the leads are enclosed in a protective body, so that when the package is tested and handled, the protective body reduces undesirable bending of the leads. By trimming the leads before forming the protective body, the leadframe used need, not be larger than those normally used.

Abstract: An improved system for the production of semiconductor devices is described. The invention incorporates conventional, known die attach technology and tape automated bonding technology with known technology for the selective placement of electroconductive material upon a polymer film, which is then enclosed in the same film, to create a system whereby typical integrated circuit die can be simultaneously attached, physically and electrically, to typical lead frames and lead fingers and other lead terminals, to produce a highly reliable integrated circuit, with low inductance between the die and the lead terminals, which may then be encapsulated and trimmed and formed, in known ways, to complete the assembled package.

Abstract: A method of packaging an integrated circuit chip having an active surface with a pattern of input/output pads. A package member is positioned to frame the integrated circuit chip, leaving a gap between the active chip surface and an interconnect support surface of the package member. A filler material is deposited within the gap, simultaneously fixing the chip to the package member and providing a bridge that is coplanar with the active and interconnect support surfaces. A pattern of conductive printed circuit interconnects is preferably photolithographically formed from the input/output pads to an edge of the package member. The resulting structure can then be electrically connected to a substrate, such as a printed circuit board, by bonding the interconnects to contact sites on the substrate. Optionally, a number of integrated circuit chips can be connected to a single package member to form a multi-chip module.

Abstract: A device for mounting a flat package on a circuit board, comprises a rectangular base frame attached to the circuit board, a rectangular clamping frame and a cover frame for releasable locking engagement with the base frame for retaining the clamping frame in pressing engagement with a flat package mounted on the circuit board within the base frame. The clamping frame has recesses formed in respective corners and lands forming stop surfaces with elastic strip locating grooves formed on opposite sides thereof. Further elastic strip locating grooves and elastic strip anchoring grooves of constricted cross-sectional size, extend along a lower, clamping face and on the undersides of the lugs. The base frame has contact guiding wall surfaces extending downwardly and inwardly from respective corners thereof for retaining the flat package contacts in precise alignment with respect pads of the circuit board.

Abstract: A semiconductor device (10) having first and second wiring layers (30, 33) on opposite surfaces of a carrier substrate (12) interconnected through vias (32) formed in the carrier substrate (12) electrically coupling an electronic component (18) to a mounting substrate through compliant solder balls (26) displaced away from vias (32), the semiconductor device (10) characterized by a standard size carrier substrate (12) having high performance electrical package interconnections (24) and good heat dissipation. Improved electrical performance is obtained by providing independent wiring layers (30, 33) each having a lead trace layout specifically designed for a particular electronic component (18) and a particular board connection requirement while using a standard size package outline. Assembly costs are reduced by providing a plastic package mold (36) over a standard size carrier substrate (12) capable of supporting a variety of different electronic components (18) themselves having varying dimensions.

Abstract: A package for electronic components and especially hybrid components comprises a base, an enclosure formed by lateral walls and a lid having the function of hermetically sealing the package while bearing on a top end of the lateral walls. At least one lateral wall having through-holes for conductors which serve to establish a connection between the interior of the package and the exterior is provided with at least one longitudinal groove in an upper portion located between the through-holes and the top end of the wall.

Abstract: The exposed portions of the leads of a semiconductor chip package are first bent in a forming process so that the ends of the leads are in proper positions to be attached to and electrically connected to contacts on a printed circuit board. Intermediate portions of the leads between the distal ends and the package body for connection to the printed circuit board and the package body are enclosed and fixed in position by a carrier body to hold the leads in position and to reduce the effects of any bending in destroying the coplanarity of the distal lead ends of the package. The package with the carrier body may be mounted onto the printed circuit board without first removing the carrier body. After the distal ends of the leads have been soldered to the printed circuit board, the carrier body is then removed.