Electrical Contact Material Patents (Class 204/192.17)
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Patent number: 6340417Abstract: The uniformity, density and directionality of an ionized metal plasma is significantly improved by positioning a cylindrical target between an RF coil and the chamber wall and wafers above and below the coil at opposite ends of the sputtering chamber. Ions generated by electron impact are attracted to the biased substrates, thereby providing essentially void free interconnections through insulating layers having through holes with very high aspect ratios.Type: GrantFiled: March 14, 1996Date of Patent: January 22, 2002Assignee: Advanced Micro Devices, Inc.Inventor: Zoran Krivokapic
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Publication number: 20020005348Abstract: A deposition system in a semiconductor fabrication system provides at least one electron gun which injects energetic electrons into a semiconductor fabrication chamber to initiate and sustain a relatively high density plasma at extremely low pressures. In addition to ionizing atoms of the extremely low pressure gas, such as an argon gas at 100 microTorr, for example, the energetic electrons are also believed to collide with target material atoms sputtered from a target positioned above a substrate, thereby ionizing the target material atoms and losing energy as a result of the collisions. Preferably, the electrons are injected substantially tangentially to the walls of a chamber shield surrounding the plasma in a magnetic field generally parallel to a central axis of the semiconductor fabrication chamber connecting the target to and the substrate.Type: ApplicationFiled: March 7, 1997Publication date: January 17, 2002Inventors: ZHENG XU, SESHADRI RAMASWAMI
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Patent number: 6338776Abstract: The present invention is directed to allowing a work piece to stabilize in regard to temperature and humidity/water content prior to precision operations so as to minimize any problems resulting from dimensional changes.Type: GrantFiled: February 24, 2000Date of Patent: January 15, 2002Assignee: Honeywell International Inc.Inventor: Richard J. Pommer
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Patent number: 6334249Abstract: A method of minimizing the volume of the depressions 240 in aluminum cavity filling processes, by-depositing a conformal first layer of aluminum alloy 220 by chemical vapor deposition, long-throw sputtering, collimated sputtering, or ionized physical vapor deposition, to partially fill the cavity 202. This layer is preferably deposited at low temperature (eg. less than 300 degrees C.) and lower deposition pressure (if deposited by sputtering). Subsequently, a second layer of aluminum alloy 230 is deposited by sputtering at temperatures greater than 350 degrees C. and at high power (e.g. greater than 10 kW) to close the mouth of cavity 202. The second layer of aluminum 230 is then forced into the remaining volume of the cavity 202. As part of the cavity 202 is filled with aluminum, alloy 220 before the high pressure aluminum extrusion/reflow, less material is required to be transported into the cavity 202. Therefore, a smaller depression 240 above the cavity is produced.Type: GrantFiled: April 22, 1998Date of Patent: January 1, 2002Assignee: Texas Instruments IncorporatedInventor: Wei-Yung Hsu
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Publication number: 20010052456Abstract: A magnetron especially advantageous for low-pressure plasma sputtering or sustained self-sputtering having reduced area but full target coverage. The magnetron includes an outer pole of one magnetic surrounding an inner pole of the other polarity with a gap therebetween. The magnetron is small, primarily located on one side of the central axis, about which it is rotated. The total magnetic flux of the outer pole is at least 1.5 times that of the inner pole. Different shapes include a racetrack, an ellipse, an egg shape, a triangle, and a triangle with an arc conforming to the target periphery. The invention allows increased ionization of the sputtered atoms.Type: ApplicationFiled: July 30, 2001Publication date: December 20, 2001Inventor: Jianming Fu
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Publication number: 20010047932Abstract: The present invention is a semiconductor metallization process for providing complete via fill on a substrate and a planar metal surface, wherein the vias are free of voids and the metal surface is free of grooves. In one aspect of the invention, a refractory layer is deposited onto a substrate having high aspect ratio contacts or vias formed thereon. A PVD metal layer, such as PVD Al or PVD Cu, is then deposited onto the refractory layer at a pressure below about 1 milliTorr to provide a conformal PVD metal layer. Then the vias or contacts are filled with metal, such as by reflowing additional metal deposited by physical vapor deposition on the conformal PVD metal layer. The process is preferably carried out in an integrated processing system that includes a long throw PVD chamber, wherein a target and a substrate are separated by a long throw distance of at least 100 mm, and a hot metal PVD chamber that also serves as a reflow chamber.Type: ApplicationFiled: June 28, 1999Publication date: December 6, 2001Applicant: Applied Materials, Inc.Inventors: SANG-HO YU, YONGHWA CHRIS CHA, MURALI ABBURI, SHRI SINGHVI, FUFA CHEN
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Patent number: 6326052Abstract: A ceramic capacitor having an improved electrode soldering performance, little or no diffusion of solder even in the case of being used under a high temperature environment and a reduced characteristic deterioration is provided. The dry plating electrodes have a three-layer structure. First layers of the electrodes are respectively provided on both surfaces of a ceramic element assembly and made of any one or more of Cu, Ni-Cu alloy and Zn. Second layers of the electrodes are respectively provided on the surfaces of the first layers and made of a material different from the material of the first layers and any one or more of Cr, Ni-Cr alloy, Fe-Cr alloy, Co-Cr alloy, Ti, Zn, Al, W, V and Mo. Third layers of the electrodes are respectively provided on the surfaces of the second layers and made of any one or more of Cu, Ni-Cu alloy, Ag and Au.Type: GrantFiled: January 18, 2000Date of Patent: December 4, 2001Assignee: Murata Manufacturing Co., Ltd.Inventors: Mitsuru Nagashima, Kazuhiro Yoshida, Masanobu Kishi, Makoto Murata
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Patent number: 6323119Abstract: The present invention provides a method of depositing an amorphous fluorocarbon film using a high bias power applied to the substrate on which the material is deposited. The invention contemplates flowing a carbon precursor at rate and at a power level so that equal same molar ratios of a carbon source is available to bind the fragmented fluorine in the film thereby improving film quality while also enabling improved gap fill performance. The invention further provides for improved adhesion of the amorphous fluorocarbon film to metal surfaces by first depositing a metal or TiN adhesion layer on the metal surfaces and then stuffing the surface of the deposited adhesion layer with nitrogen. Adhesion is further improved by coating the chamber walls with silicon nitride or silicon oxynitride.Type: GrantFiled: October 10, 1997Date of Patent: November 27, 2001Assignee: Applied Materials, Inc.Inventors: Ming Xi, Turgut Sahin, Yaxin Wang
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Publication number: 20010040264Abstract: A method of forming a multi-layer structure over an insulating layer comprises the steps of: selectively depositing a barrier layer on a predetermined region of an insulating layer by use of a first deposition mask; selectively depositing a metal seed layer made of a metal which is different in substance from the barrier layer by use of a second deposition mask, so that the metal seed layer extends not only on an entire surface of the barrier layer but also a peripheral region positioned outside the predetermined region of the insulating layer; and forming a metal plating layer made of the metal as the seed layer, so that the metal layer is adhered on the metal seed layer whereby the metal plating layer is separated from the barrier layer and also from the insulating layer.Type: ApplicationFiled: July 31, 2001Publication date: November 15, 2001Inventor: Nobukazu Ito
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Patent number: 6315872Abstract: Coils for use within high density plasma chambers are provided that do not electrically disconnect or short circuit following repeated depositions and that produce films having reduced in-film defect densities. To reduce in-film defect densities, dielectric inclusion content, porosity, grain size and surface roughness of a coil are reduced, while the mechanical strength of the coil is increased so as to both decrease defect generation and thermal creep rate (e.g., to prevent electrical disconnection or short circuiting of the coil following repeated depositions).Type: GrantFiled: October 8, 1999Date of Patent: November 13, 2001Assignee: Applied Materials, Inc.Inventors: Vikram Pavate, Murali Narasimhan
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Publication number: 20010035343Abstract: The invention provides a fine pattern forming method in which a pattern interval of a resist pattern is narrowed, and a fine pattern forming material can be certainly formed on a surface of the resist pattern. In the method, a first resist layer containing a material generating acid by heating or light irradiation is coated on a substrate, is exposed through a pattern, and is developed. A developing solution is washed by a washing solution to form a first resist frame, and in a state where the washing solution is adhered to the substrate, a fine pattern forming material containing a material, which is cross-linked by the existence of acid, is coated on the substrate. Acid is generated in the first resist frame by heating or light irradiation, and the first resist frame is covered with a cross-linked layer generated on an interface between the first resist frame and the fine pattern forming material.Type: ApplicationFiled: April 6, 2001Publication date: November 1, 2001Applicant: TDK CorporationInventor: Akifumi Kamijima
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Publication number: 20010030125Abstract: Ti and TiN layers are formed on an integrated circuit substrate using a titanium target in non-nitrided mode in a hollow cathode magnetron apparatus. Neither a collimator nor a shield is used. Ti and TiN layers are deposited in vias and trenches having aspect ratios up to 5:1.Type: ApplicationFiled: March 14, 2000Publication date: October 18, 2001
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Patent number: 6299739Abstract: This invention provides a method of forming a metal wiring film excellent in EM resistance and low electric resistance. In a method of forming a wiring structure by filming and covering the surface of the insulating film of a substrate to be treated having a hole or groove formed thereon with a metallic material such as copper, aluminum, silver or the like, thereby filling the hole or groove inner part with the metallic material to form a wiring structure, the substrate to be treated is exposed to a high temperature under a high-pressure gas atmosphere after the continuous filming and covering with the metallic material along the inner surface profile of the hole or groove, whereby the surface diffusion phenomenon of the metallic material is promoted to reform the metal film into a film structure as the surface area of the metal film is minimized.Type: GrantFiled: April 20, 1999Date of Patent: October 9, 2001Assignee: Kabushiki Kaisha Kobe Seiko ShoInventors: Takao Fujikawa, Takahiko Ishii, Yutaka Narukawa, Makoto Kadoguchi, Yasushi Mizusawa, Tomoyasu Kondou, Yuji Taguchi
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Publication number: 20010027020Abstract: A method of fabricating a semiconductor device comprises the steps of: (a) forming a mask layer over an upper surface of a semiconductor substrate such that the mask layer has an aperture penetrating the mask layer and having an inclined lateral wall so as to make the aperture inverted taper shaped; (b) forming a first dielectric layer at a first area over the upper surface of the semiconductor substrate within the aperture by sputtering at a first sputtering incidence direction; and (c) forming a first electrode layer at a second area over the upper surface of the semiconductor substrate within the aperture by sputtering at a second sputtering incidence direction which is different from the first sputtering incidence direction.Type: ApplicationFiled: January 23, 2001Publication date: October 4, 2001Applicant: Oki Electric Industry Co., Ltd.Inventor: Shinichi Hoshi
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Patent number: 6284329Abstract: A method for attaching adherent metal components, particularly a copper film, on at least one surface of a polyimide substrate is provided. The method comprises the steps of: exposing at least one surface of the polyimide substrate to a reactive gas plasma that provides a level of ion bombardment of the polyimide surface sufficient to disrupt at least a portion of the imide groups on the surface and to form reactive carboxylate groups, carbonyl groups and other carbon-oxygen functional groups on the surface; and then depositing a metal film onto the chemically-modified surface without intervening exposure to air. The present invention also provides a copper-coated polyimide product comprising a polyimide substrate having a substantially smooth and chemically-modified surface and a copper film directly attached to the surface, i.e., the product is free of a polymeric adhesive layer or tie coat between the surface of the polyimide substrate and the copper film.Type: GrantFiled: August 18, 1999Date of Patent: September 4, 2001Assignee: International Business Machines CorporationInventors: Luis J. Matienzo, Kim J. Blackwell, Frank D. Egitto, Allan R. Knoll
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Patent number: 6284106Abstract: A method for producing flat panels for TFT or plasma display applications includes forming a sputter source within a sputter coating chamber, the source having at least two electrically mutually isolated stationery bar-shaped target arrangements. A controlled magnet arrangement provided under each target with a time-varying magnetron field.Type: GrantFiled: June 5, 2000Date of Patent: September 4, 2001Assignee: Unaxis Trading AGInventors: Walter Haag, Pius Grunenfelder, Urs Schwendener, Markus Schlegel, Siegfried Krassnitzer
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Publication number: 20010018137Abstract: We have discovered that, by depositing a tantalum layer upon a substrate at a temperature of at least 325° C., it is possible to obtain an ultra low resistivity which is lower than that previously published in the literature. In addition, it is possible deposit a TaxNy film having an ultra low resistivity by depositing the TaxNy film upon a substrate at a temperature of at least 275° C., wherein x is 1 and y ranges from about 0.05 to about 0.18. These films having an ultra low resistivity are obtained at temperatures far below the previously published temperatures for obtaining higher resistivity films. A combination of elevated substrate temperature and ion bombardment of the film surface during deposition enables the use of lower substrate temperatures while maintaining optimum film properties.Type: ApplicationFiled: January 25, 2001Publication date: August 30, 2001Applicant: Applied Materials, Inc.Inventors: Tony Chiang, Peijun Ding, Barry Chin
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Patent number: 6277249Abstract: A target and magnetron for a plasma sputter reactor. The target has an annular trough facing the wafer to be sputter coated. Various types of magnetic means positioned around the trough create a magnetic field supporting a plasma extending over a large volume of the trough. For example, the magnetic means may include magnets disposed on one side within a radially inner wall of the trough and on another side outside of a radially outer wall of the trough to create a magnetic field extending across the trough, to thereby support a high-density plasma extending from the top to the bottom of the trough. The large plasma volume increases the probability that the sputtered metal atoms will become ionized. The magnetic means may include a magnetic coil, may include additional magnets in back of the trough top wall to increase sputtering there, and may include confinement magnets near the bottom of the trough sidewalls.Type: GrantFiled: March 2, 2000Date of Patent: August 21, 2001Assignee: Applied Materials Inc.Inventors: Praburam Gopalraja, Jianming Fu, Fusen Chen, Girish Dixit, Zheng Xu, Sankaram Athreya, Wei D. Wang, Ashok K. Sinha
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Patent number: 6274008Abstract: A target and magnetron for a plasma sputter reactor. The target has an annular vault facing the wafer to be sputter coated. Various types of magnetic means positioned around the vault create a magnetic field supporting a plasma extending over a large volume of the vault. An integrated copper via filling process includes a first step of highly ionized sputter deposition of copper, a second step of more neutral, lower-energy sputter deposition of copper to complete the seed layer, and electroplating copper into the hole to complete the metallization.Type: GrantFiled: October 2, 2000Date of Patent: August 14, 2001Assignee: Applied Materials, Inc.Inventors: Praburam Gopalraja, Jianming Fu, Fusen Chen, Girish Dixit, Zheng Xu, Sankaram Athreya, Wei D. Wang, Ashok K. Sinha
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Patent number: 6274253Abstract: In one aspect, the invention includes a processing method, comprising: a) providing a substrate having a high aspect ratio opening therein; b) forming a metal-comprising layer over the opening; c) providing a first pressure against the metal-comprising layer; and d) ramping the pressure that is against the metal-comprising layer to a second pressure at a rate of from about 1 atmosphere per second about 100 atmospheres per second.Type: GrantFiled: November 13, 1998Date of Patent: August 14, 2001Assignee: Micron Technology, Inc.Inventor: John H. Givens
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Publication number: 20010009222Abstract: A method of forming a fine wiring pattern by sputtering and patterning which is characterized in that the potential difference between the anode and cathode in the sputtering apparatus is lower than 570V. The resulting fine wiring pattern is free of defects due to splash. This method is effective particularly in the production of array substrates for the flat-panel display device which needs aluminum fine lines to meet the requirement for finer pixels and larger display area.Type: ApplicationFiled: January 13, 1999Publication date: July 26, 2001Applicant: Kiyotsugu MizouchiInventors: KIYOTSUGU MIZOUCHI, HIROSHI TSUJI
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Patent number: 6258219Abstract: A method of deposition for W or TiW on a silicon wafer in a physical vapor deposition chamber equipped with a clamping ring without incurring arcing problem between the wafer and the clamping ring by utilizing a novel two-step high-pressure/low-pressure process in which a first depositing step is carried out at a relatively high pressure above 11 mTorr so as to form an electrical bridge between the wafer and the clamping ring and a second depositing step is carried out at a lower pressure so as to form a high-quality conductive film.Type: GrantFiled: January 13, 1995Date of Patent: July 10, 2001Assignee: Applied Materials, Inc.Inventor: Mark A. Mueller
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Publication number: 20010006147Abstract: A method for treating a silicon substrate is described. The silicon substrate is placed into a sputtering equipment. A sputtering step is performed to simultaneously dry clean and amorphize the silicon substrate surface by using the sputtering equipment. A titanium film is deposited on the silicon substrate by the sputtering equipment.Type: ApplicationFiled: February 6, 2001Publication date: July 5, 2001Inventor: Su-Chen Fan
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Publication number: 20010004048Abstract: A method for manufacturing a metal composite strip for the production of electrical contact components. A film made of tin or a tin alloy is first applied onto an initial material made of an electrically conductive base material. A film of silver is then deposited thereonto. Copper or a copper alloy is preferably used as the base material. The tin film can be applied in the molten state, and the silver film by electroplating. Furthermore, both the tin film and the silver film can be deposited by electroplating. A further alternative provides for manufacturing the tin film in the molten state and the silver film by cathodic sputtering. The diffusion operations which occur in the coating result in a homogeneous film of a tin-silver alloy. This formation can be assisted by way of a heat treatment of the composite strip.Type: ApplicationFiled: January 30, 2001Publication date: June 21, 2001Inventors: Udo Adler, Klaus Schleicher
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Patent number: 6248220Abstract: A radio frequency sputtering apparatus and a film forming method using the same are disclosed. The method includes the steps of floating a shield adjacent to the substrate, applying an RF power to the substrate as well as the target to induce a self-bias voltage to the target and the substrate, and restricting a plasma discharge region in accordance with the ionization of a process gas to an adjacency to the target, thereby decreasing the bombarding of the film on the wafer by positive ions of the plasma and negative ions from the target.Type: GrantFiled: March 18, 1999Date of Patent: June 19, 2001Assignee: Hyundai Electronics Industries Co., Ltd.Inventor: Jeong-Min Seon
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Publication number: 20010001436Abstract: A method for depositing a multi-layered protective and decorative coating on an article comprising first depositing at least one coating layer on the article by electroplating, removing the electroplated article from the electroplating bath and subjecting it to pulse blow drying to produce a spot-free surface on the electroplated article, and then depositing, by physical vapor deposition, at least one vapor deposited coating layer on the electroplated article.Type: ApplicationFiled: June 17, 1999Publication date: May 24, 2001Applicant: Dennis FosterInventors: DENNIS FOSTER, LARRY M. MCHUGH, HEINRICH ANDREAS MOEBIUS
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Patent number: 6231725Abstract: An apparatus for sputtering material onto a workpiece, composed of: a chamber; a first target disposed in the chamber for sputtering material onto the workpiece; a holder for holding the workpiece in the chamber; a plasma generation area between the target and the holder; a coil for inductively coupling energy into the plasma generation area for generating and sustaining a plasma in the plasma generation area; and a second target disposed in the chamber below the first target and above the coil for sputtering material onto the workpiece.Type: GrantFiled: August 4, 1998Date of Patent: May 15, 2001Assignee: Applied Materials, Inc.Inventors: Jaim Nulman, Zheng Xu
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Patent number: 6228228Abstract: A display as for images and/or information comprises a plurality of light-emitting fibers disposed in side-by-side arrangement to define a viewing surface. Each light-emitting fiber includes a plurality of light-emitting elements disposed along its length, each having two electrodes between which are applied electrical signals to cause the light-emitting element to emit light to display a pixel or sub-pixel of the image and/or information. The light-emitting fiber includes an electrical conductor disposed along its length to serve as a first electrode, a layer of light-emissive material disposed thereon, and a plurality of electrical contacts disposed on the light-emissive material to serve as the second electrodes of the light-emitting elements, and are formed in a continuous process wherein a transparent fiber passes through a plurality of processing chambers for receiving the electrical conductor, the light-emissive layer and the plurality of electrical contacts thereon.Type: GrantFiled: October 15, 1999Date of Patent: May 8, 2001Assignee: Sarnoff CorporationInventors: Bawa Singh, William Ronald Roach, William Chiang
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Patent number: 6228229Abstract: A method and apparatus for generating a plasma by inductively coupling electromagnetic energy into the plasma. In one embodiment, first and second antenna coils are disposed about the circumference of the plasma containment area. The first and second antenna coils are relatively spaced along the longitudinal axis of the plasma containment area. A current is generated in the first and second antenna coils. A phase shift regulating network establishes a difference between the phase of the current in the first antenna and the phase of the current in the second antenna. The phase difference corresponds to the phase difference required to launch a helicon wave in the plasma. In a second embodiment, a chamber shield is made of a conductive material and is coupled to the RF source such that the shield functions as an RF antenna. The shield may be coupled in series to a coil surrounding the shield to increase the resultant flux density.Type: GrantFiled: March 27, 1998Date of Patent: May 8, 2001Assignee: Applied Materials, Inc.Inventors: Ivo J. Raaijmakers, Bradley O. Stimson, John Forster
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Patent number: 6228186Abstract: Improved targets for use in DC_magnetron sputtering of aluminum or like metals are disclosed for forming metallization films having low defect densities. Methods for manufacturing and using such targets are also disclosed. Conductivity anomalies such as those composed of metal oxide inclusions can induce arcing between the target surface and the plasma. The arcing can lead to production of excessive deposition material in the form of splats or blobs. Reducing the content of conductivity anomalies and strengthening the to-be-deposited material is seen to reduce production of such splats or blobs. Other splat limiting steps include smooth finishing of the target surface and low-stress ramp up of the plasma.Type: GrantFiled: October 14, 1999Date of Patent: May 8, 2001Assignee: Applied Materials, Inc.Inventors: Vikram Pavate, Keith J. Hansen, Glen Mori, Murali Narasimhan, Seshadri Ramaswami, Jaim Nulman
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Patent number: 6220204Abstract: A film deposition apparatus to which the present invention is applied comprises a vacuum chamber 11, a plasma beam generator 13, a main hearth 30 which is disposed within the vacuum chamber and which serves as an anode containing a vaporizable material Cu, and an auxiliary anode 31 surrounding the main hearth, the auxiliary anode being formed of an annular permanent magnet 35 and a coil 36. A Cu film is formed on a substrate 41 placed opposite to the main hearth.Type: GrantFiled: June 9, 1999Date of Patent: April 24, 2001Assignee: Sumitomo Heavy Industries, Ltd.Inventors: Hiroyuki Makino, Masaru Tanaka, Kiyoshi Awai, Toshiyuki Sakemi
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Patent number: 6217715Abstract: Internal surfaces of a vacuum chamber are coated with a metal or metal oxide to reduce pump down time and base pressure. The metal is sputter deposited within a partially assembled chamber from a target which comprises the metal. The chamber is then configured to process a substrate such as a silicon wafer.Type: GrantFiled: February 6, 1997Date of Patent: April 17, 2001Assignee: Applied Materials, Inc.Inventors: Bingxi Sun, Imran Hashim
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Patent number: 6217951Abstract: An impurity solid including boron as impurity and a solid sample to which boron is introduced are held in a vacuum chamber. Ar gas is introduced into the vacuum chamber to generate plasma composed of the Ar gas. A voltage allowing the impurity solid to serve as a cathode for the plasma is applied to the impurity solid and the impurity solid is sputtered by ions in the plasma, thereby mixing boron included in the impurity solid into the plasma composed of Ar gas. A voltage allowing the solid sample to serve as a cathode for the plasma is applied to the solid sample, and boron mixed into the plasma is introduced to the surface portion of the solid sample.Type: GrantFiled: October 21, 1996Date of Patent: April 17, 2001Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Bunji Mizuno, Hiroaki Nakaoka, Michihiko Takase, Ichiro Nakayama
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Patent number: 6217721Abstract: An aluminum sputtering process, particularly useful for filling vias and contacts of high aspect ratios formed through a dielectric layer and also usefull for forming interconnects that are highly resistant to electromigration. A liner or barrier layer is first deposited by a high-density plasma (HDP) physical vapor deposition (PVD, also called sputtering) process, such as is done with an inductively coupled plasma. If a contact is connected at its bottom to a silicon element, the first sublayer of the liner layer is a Ti layer, which is silicided to the silicon substrate. The second sublayer comprises TiN, which not only acts as a barrier against the migration of undesirable components into the underlying silicon but also when deposited with an HDP process and biased wafer forms a dense, smooth crystal structure. The third sublayer comprises Ti and preferably is graded from TiN to Ti. Over the liner layer, an aluminum layer is deposited in a standard, non-HDP process.Type: GrantFiled: April 5, 1996Date of Patent: April 17, 2001Assignee: Applied Materials, Inc.Inventors: Zheng Xu, John Forster, Tse-Yong Yao, Jaim Nulman, Fusen Chen
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Patent number: 6214177Abstract: A method of producing a silicon aluminum sputtering target is provided. The target is formed from a powder base of between about 80% to about 95% by weight silicon and about 5% to about 20% by weight aluminum which is placed in a containment unit, heated under vacuum and then sealed. The base is then subjected to a pressure greater than about 3000 psi and heated to a temperature between about 1076° F. and about 1652° F. such that some, but not more than 30%, of the resulting target is formed from liquid phase silicon-aluminum.Type: GrantFiled: December 22, 1999Date of Patent: April 10, 2001Assignee: Ultraclad CorporationInventor: Joseph C. Runkle
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Patent number: 6210547Abstract: A process for altering surface properties of a mass of metal alloy solder comprising a first metal and a second metal. The process comprises exposing the mass to energized ions to preferentially sputter atoms of the first metal to form a surface layer ratio of first metal to second metal atoms that is less than the bulk ratio. The solder may be located on the surface of a substrate, wherein the process may further comprise masking the substrate to shield all but a selected area from the ion beam. The sputtering gas may comprises a reactive gas such as oxygen and the substrate may be an organic substrate. The process may further comprise simultaneously exposing the organic substrate to energized ions of the reactive gas to roughen the organic substrate surface.Type: GrantFiled: August 24, 1999Date of Patent: April 3, 2001Assignee: International Business Machines CorporationInventors: Frank D. Egitto, Edmond O. Fey, Luis J. Matienzo, David L. Questad, Rajinder S. Rai, Daniel C. Van Hart
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Patent number: 6211065Abstract: The present invention provides a method of depositing an amorphous fluorocarbon film using a high bias power applied to the substrate on which the material is deposited. The invention contemplates flowing a carbon precursor at rate and at a power level so that equal same molar ratios of a carbon source is available to bind the fragmented fluorine in the film thereby improving film quality while also enabling improved gap fill performance. The invention further provides for improved adhesion of the amorphous fluorocarbon film to metal surfaces by first depositing a metal or TiN adhesion layer on the metal surfaces and then stuffing the surface of the deposited adhesion layer with nitrogen. Adhesion is further improved by coating the chamber walls with silicon nitride or silicon oxynitride.Type: GrantFiled: October 10, 1997Date of Patent: April 3, 2001Assignee: Applied Materials, Inc.Inventors: Ming Xi, Eugene Tzou, Lie-Yea Cheng, Turgut Sahin, Yaxin Wang
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Patent number: 6210545Abstract: An inventive method for forming a thin film comprises the steps of preparing a sputter-target of a material which is fully oxidized and crystallized to a perovskite structure, sputter-depositing a thin film on top of a sample with the target in an inert gas atmosphere, and annealing the thin film in non-oxygen ambient. With the use of such a target, it is possible to reduce the negative ion effect during the sputter deposition and to eliminate the presence of oxygen during the annealing process.Type: GrantFiled: November 23, 1999Date of Patent: April 3, 2001Assignee: International Business Machines CorporationInventors: Mukta Farooq, Robert A. Rita, Stephen M. Rossnagel
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Patent number: 6204171Abstract: A process is disclosed for manufacturing a film that is a smooth and has large nitride grains of a diffusion barrier material selected from a group consisting of tungsten alloys of Group III and Group IV early transition metals and molybdenum alloys of Group III and Group IV early transition metals. The diffusion barrier material is preferably selected from a group consisting of ScyMz, ZryMz, ZrvScyMz, ZrvNbyMz, ZruScvNbyMz, NbyMz, NbvScyMz, TiyMz, TivScyMz, TivNbyMz, and TivZryMz, where M is one of tungsten and molybdenum. Under the process, a nitride of the diffusion barrier material is deposited by physical vapor deposition in an environment of nitrogen.Type: GrantFiled: May 23, 1997Date of Patent: March 20, 2001Assignee: Micron Technology, Inc.Inventor: Yongjun Hu
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Patent number: 6203673Abstract: A thin-film microstructure sensor includes a substrate having an insulation layer. A thin-film platinum temperature-sensitive resistor is provided on the insulation layer of the substrate, the thin-film platinum temperature-sensitive resistor comprising a platinum layer, the platinum layer having a maximum crystal grain size above a reference grain size of 800 Å. The thin-film platinum temperature-sensitive resistor is formed by a sputtering process to provide a temperature coefficient of resistance TCR above a reference TCR level of 3200 ppm.Type: GrantFiled: November 30, 1999Date of Patent: March 20, 2001Assignees: Ricoh Company, Ltd., Ricoh Elemex CorporationInventors: Hiroyoshi Shoji, Takayuki Yamaguchi, Junichi Azumi, Yukito Sato, Morimasa Kaminishi
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Patent number: 6200432Abstract: A substrate which has been heated to a predetermined temperature by a heating unit during sputtering is transferred into an unload-lock chamber having a vacuum pump system and a vent gas introducing system. The unload-lock chamber is provided with a cooling stage which makes surface contact with the substrate so as to forcedly cool the substrate to a predetermined temperature. The substrate is placed on the cooling stage and forcedly cooled. After the substrate is cooled to the predetermined temperature or lower, the vent gas introducing system is operated so that the interior of the unload-lock chamber is returned to the atmospheric pressure ambient. Since the substrate under a high temperature condition does not make contact with the atmospheric pressure ambient, film properties are prevented from being varied.Type: GrantFiled: November 10, 1999Date of Patent: March 13, 2001Assignee: Anelva CorporationInventors: Masahiko Kobayashi, Nobuyuki Takahashi
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Patent number: 6200433Abstract: The present invention generally provides a copper metallization method for depositing a conformal barrier layer and seed layer in a plasma chamber. The barrier layer and seed layer are preferably deposited in a plasma chamber having an inductive coil and a target comprising the material to be sputtered. One or more plasma gases having high molar masses relative to the target material are then introduced into the chamber to form a plasma. Preferably, the plasma gases are selected from xenon, krypton or a combination thereof.Type: GrantFiled: November 1, 1999Date of Patent: March 13, 2001Assignee: Applied Materials, Inc.Inventors: Peijun Ding, Rong Tao, Barry Chin, Dan Carl
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Patent number: 6187150Abstract: A method for manufacturing a thin film photovoltaic device comprising a transparent conductive film, a thin film photovoltaic unit, and a back transparent conductive film and a back metal electrode which are successively formed on a substrate, wherein the back transparent conductive film is formed by sputtering comprising steps of forming an initial back transparent conductive film under a pressure of 5×10−2 Torr or more for 1 to 30 seconds in the initial stage and forming a main back transparent conductive film having the remainder thickness under a pressure reduced to {fraction (1/10)} the initial pressure or less.Type: GrantFiled: October 7, 1999Date of Patent: February 13, 2001Assignee: Kaneka CorporationInventors: Masashi Yoshimi, Kenji Yamamoto
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Patent number: 6176981Abstract: A plasma reactor for physical vapor deposition (PVD), also known as sputtering, which is adapted so that the atomic species sputtered from the target can self-sustain the plasma without the need of a working gas such as argon. The method is particularly useful for sputtering copper. According to the invention, a bias ring arranged around the wafer and rising somewhat above it is positively electrically biased to control the plasma potential, and hence to control the energy and directionality of the ions being sputter deposited on the wafer. The bias ring may be a separate biasing element which can be positioned at a selected height above the wafer.Type: GrantFiled: November 16, 1998Date of Patent: January 23, 2001Assignee: Applied Materials, Inc.Inventors: Liubo Hong, John Forster, Jianming Fu
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Patent number: 6176983Abstract: The present invention provides methods of forming a semiconductor workpiece. One method of forming a semiconductor device in accordance with the present invention includes: providing a semiconductor workpiece; forming a via within the semiconductor workpiece, the via including plural sidewalls joining a bottom surface at respective plural corners; first sputtering a process layer upon at least a portion of the bottom surface using ionized metal plasma physical vapor deposition; and following the sputtering of the process layer, second sputtering at least some of the process layer towards the corners within the via.Type: GrantFiled: September 3, 1997Date of Patent: January 23, 2001Assignee: VLSI Technology, Inc.Inventors: Subhas Bothra, Dipankar Pramanik, Samit Sengupta
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Patent number: 6176978Abstract: The present invention provides a method of reducing particles within a deposition chamber without affecting bias voltage repeatability in subsequently processed wafers. Particularly, it has been discovered that within a high density plasma deposition chamber, the first wafer processed following deposition of a pasting layer may exhibit inconsistent quality as compared to subsequently processed wafers. It has further been discovered that such altered quality arises due to inconsistent bias voltage coupling between a wafer support and a wafer positioned thereon. To maintain consistent bias voltage coupling a transitional layer is deposited within the deposition chamber as part of the pasting process. It is believed the transitional layer affects the chamber's environment (chamber surfaces and atmosphere) which in turn affects bias voltage coupling between the wafer support and a wafer positioned thereon. Preferably the transitional layer is the same layer deposited on production wafers.Type: GrantFiled: August 18, 1997Date of Patent: January 23, 2001Assignee: Applied Materials, Inc.Inventor: Kenny King-tai Ngan
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Patent number: 6171659Abstract: Process for the depositing, onto a substrate, of a coating essentially constituted of an electronic conductor compound, in which the said coating is formed by producing alternatively, on the one hand, in at least one depositing zone, one or several deposits of a determined thickness of an electronic conductor element on the substrate, and, on the other hand, in at least one reaction zone, one or several reactions of the element thus deposited with ions of a reactive gas which are implanted into the deposit of the above-mentioned element over approximately this entire thickness determined in a way as to form, preferably with the totality of this element, the said compound, the above-mentioned ions being submitted to a kinetic energy below 2000 V, while the aforesaid thickness of the deposit of the element is determined as a function of the kinetic energy applied in such a way as to allow the implantation of these ions over approximately this entire thickness.Type: GrantFiled: July 11, 1997Date of Patent: January 9, 2001Assignee: Recherche et d{acute over (e)}veloppement du groupe Cockerill Sambre, en abr{acute over (e)}g{acute over (e)}Inventors: Pierre Vanden Brande, Alain Weymeersch
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Patent number: 6171453Abstract: A mark shielding ring for use in a physical vapor deposition chamber and a method for using such ring are disclosed. The mark shielding ring may be suitably used for shielding alignment marks or any other marks provided on the top surface of a wafer along a peripheral region. The novel mark shielding ring includes an alignment means for mechanically joining a shielding ring to a wafer pedestal on which the ring is positioned. Any up-and-down motion of the wafer pedestal therefore does not change the alignment between the shielding ring and the pedestal and therefore the function of the shielding ring for protecting an alignment mark can be insured.Type: GrantFiled: December 2, 1998Date of Patent: January 9, 2001Assignee: Taiwan Semiconductor Manufacturing Co., LtdInventors: Chen Fang Chung, Shuang Ming Jeng
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Patent number: 6171455Abstract: Improved targets for use in DC_magnetron sputtering of aluminum or like metals are disclosed for forming metallization films having low defect densities. Methods for manufacturing and using such targets are also disclosed. Conductivity anomalies such as those composed of metal oxide inclusions can induce arcing between the target surface and the plasma. The arcing can lead to production of excessive deposition material in the form of splats or blobs. Reducing the content of conductivity anomalies and strengthening the to-be-deposited material is seen to reduce production of such splats or blobs. Other splat limiting steps include smooth finishing of the target surface and low-stress ramp up of the plasma.Type: GrantFiled: October 14, 1999Date of Patent: January 9, 2001Assignee: Applied Materials Inc.Inventors: Vikram Pavate, Keith J. Hansen, Glen Mori, Murali Narasimhan, Seshadri Ramaswami, Jaim Nulman