Electrical Contact Material Patents (Class 204/192.17)
  • Patent number: 7316867
    Abstract: A thin film for an anode of a lithium secondary battery having a current collector and an anode active material layer formed thereon is provided. The anode active material layer is a multi-layered thin film formed by stacking a silver (Ag) layer and a silicon-metal (Si-M) layer having silicon dispersed in a base made from metal reacting with silicon while not reacting with lithium. The cycle characteristic of the thin film for an anode can be improved by suppressing the volumetric expansion and shrinkage of Si occurring during charging/discharging cycles. Thus, a lithium secondary battery with improved life characteristics by employing the thin film for an anode, which greatly improves the chemical, mechanical stability of the interface between an electrode and an electrolyte.
    Type: Grant
    Filed: November 29, 2004
    Date of Patent: January 8, 2008
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Young-sin Park, Joo-yeal Oh, Hong-koo Baik, Sung-man Lee
  • Patent number: 7294241
    Abstract: A method of sputtering a Ta layer comprised of alpha phase Ta on a Cu layer. An embodiment includes a Ta sputter deposition on a Cu surface at a substrate temperature less than 200° C. Another embodiment has a pre-cooling step at a temperature less than 100° C. prior to Ta layer sputter deposition. In another non-limiting example embodiment, a pre-clean step comprising an inert gas sputter is performed prior to the tantalum sputter. Another non-limiting example embodiment provides a semiconductor structure comprising: a semiconductor structure; a copper layer over the semiconductor structure; a tantalum layer on the copper layer; the tantalum layer comprised alpha phase Ta; a metal layer on the tantalum layer.
    Type: Grant
    Filed: January 3, 2003
    Date of Patent: November 13, 2007
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Chim Seng Seet, Bei Chao Zhang, San Leong Liew, John Sudijono, Lai Lin Clare Yong
  • Patent number: 7291251
    Abstract: A method of making a coated article is provided, where the coated article may be used in a window or the like and may have at least one infrared (IR) reflecting layer in a low-E coating. The IR reflecting layer may be of silver or the like. In certain example embodiments, at least krypton (Kr) gas is used in sputter-depositing a silver inclusive IR reflecting layer. It has been found that the use of Kr gas in sputtering Ag targets results in an IR reflecting layer having improved resistance and emittance properties.
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: November 6, 2007
    Assignee: Centre Luxembourgeois de Recherches pour le Verre et la Ceramique S.A. (C.R.V.C.)
    Inventors: Jochen Butz, Uwe Kriltz, Sebastian Bobrowski
  • Patent number: 7244670
    Abstract: A method and an apparatus for fabricating an integrated circuit entail directing a vapor flux toward a substrate surface from a plurality of directions associated with a plurality of azimuth angles, and selecting a deposition angle of the vapor flux, relative to a normal incidence, to obtain a substantially conformal film. The surface feature can be associated with, for example, one or more vias and/or one or more trenches.
    Type: Grant
    Filed: June 18, 2004
    Date of Patent: July 17, 2007
    Assignee: Rensselaer Polytechnic Institute
    Inventors: Tansel Karabacak, Toh-Ming Lu, John Robert Barthel
  • Patent number: 7156960
    Abstract: A method for the deposition of a metal layer on a substrate (1) uses a cold plasma inside an enclosure (7) heated to avoid the formation of a metal deposit at its surface. The enclosure has an inlet (21) and an outlet (22) for the substrate with a source of metal vapor between them, made up of an electrode to form a plasma (6) with the substrate or a separate electrically conducting element as a counter-electrode. The deposition metal is introduced in the liquid state in a retention tank (8) and is maintained as a liquid at an essentially constant level during the formation of the metal layer on the substrate. An Independent claim is included for the device used to put this method of coating a substrate into service.
    Type: Grant
    Filed: August 23, 2001
    Date of Patent: January 2, 2007
    Assignee: Cold Plasma Applications, CPA, SPRL
    Inventors: Pierre Vanden Brande, Alain Weymeersch
  • Patent number: 7150810
    Abstract: A sputtering target includes a backing plate, a copper target provided on the backing plate, and a protection layer formed of a corrosion-resistant metal on the surface of the copper target The protection layer depresses oxidation of the copper target and the adhesion of particles to a substrate due to the release of a deposited layer on the surface of the shielding plate.
    Type: Grant
    Filed: February 24, 2003
    Date of Patent: December 19, 2006
    Assignee: Fujitsu Limited
    Inventor: Takashi Hasegawa
  • Patent number: 7111382
    Abstract: Methods are provided for forming current perpendicular to the plane thin film read heads. In one embodiment, the method comprises the steps of forming a lower sensor lead, forming a lower sensor lead cladding of a low sputter yield material on the lower sensor lead, forming a sensor element on the lower sensor lead cladding, and forming an upper sensor lead coupled to the sensor element. The low sputter yield material helps to reduce redeposition of the lower sensor lead material onto side walls of the sensor element as the sensor element is being formed.
    Type: Grant
    Filed: June 18, 2002
    Date of Patent: September 26, 2006
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Kenneth E. Knapp, Ronald A. Barr, Lien-Chang Wang, Benjamin P. Law, James Spallas
  • Patent number: 7041200
    Abstract: In a magnetron sputtering chamber, a substrate is placed in the chamber and a deposition shield is maintained about the substrate to shield internal surfaces in the chamber. The deposition shield has a textured surface that may be formed by a hot pressing process or by a coating process, and that allows the accumulated sputtered residues to stick thereto without flaking off. An electrical power is applied to a high density sputtering target facing the substrate to form a plasma in the chamber while a rotating magnetic field of at least about 300 Gauss is applied about the target to sputter the target. Advantageously, the sputtering process cycle can be repeated for at least about 8,000 substrates without cleaning the internal surfaces in the chamber, and even while still generating an average particle count on each processed substrate of less than 1 particle per 10 cm2 of substrate surface area.
    Type: Grant
    Filed: April 19, 2002
    Date of Patent: May 9, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Hien-Minh Huu Le, Keith A. Miller, Hoa T. Kieu, Kenny King-Tai Ngan
  • Patent number: 7037595
    Abstract: A thin layer of hafnium oxide or stacking of thin layers comprising hafnium oxide layers for producing surface treatments of optical components, or optical components, in which at least one layer of hafnium oxide is in amorphous form and has a density less than 8 gm/cm3. The layer is formed by depositing on a substrate without energy input to the substrate.
    Type: Grant
    Filed: November 15, 1999
    Date of Patent: May 2, 2006
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Bernard Andre, Jean Dijon, Brigitte Rafin
  • Patent number: 7018515
    Abstract: A dual-position magnetron that is rotated about a central axis in back of a sputtering target, particularly for sputtering an edge of a target of a barrier material onto a wafer and cleaning material redeposited at a center of the target. During target cleaning, wafer bias is reduced. In one embodiment, an arc-shaped magnetron is supported on a pivot arm pivoting on the end of a bracket fixed to the rotary shaft. A spring biases the pivot arm such that the magnetron is urged towards and overlies the target center. Centrifugal force at increased rotation rate overcomes the spring bias and shift the magnetron to an outer position with the long magnetron dimension aligned with the target edge. Mechanical stops prevent excessive movement in either direction. Other mechanisms include linear slides and actuators.
    Type: Grant
    Filed: September 23, 2004
    Date of Patent: March 28, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Tza-Jing Gung, Hong S. Yang, Anantha K. Subramani, Maurice E. Ewert, Keith A. Miller, Vincent E. Burkhart
  • Patent number: 7011733
    Abstract: In a sputtering apparatus, target particles to be deposited onto a substrate are selectively ionized relative to other particles in the deposition chamber. For example, titanium or titanium-containing target particles are selectively ionized, while inert particles, such as argon atoms, remain substantially unaffected. Advantageously, one or more optical ionizers, such as lasers, are used to create one or more ionization zones within the deposition chamber in which such selective ionization takes place.
    Type: Grant
    Filed: June 1, 2004
    Date of Patent: March 14, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Gurtej S. Sandhu
  • Patent number: 7005239
    Abstract: A method of forming a metal line includes the steps of forming a metal layer on a substrate in a chamber while maintaining a chamber pressure for a plasma to be equal to or smaller than 0.8 Pa, and coating a photoresist on the metal layer.
    Type: Grant
    Filed: December 16, 2002
    Date of Patent: February 28, 2006
    Assignee: LG.Philips LCD Co., Ltd.
    Inventor: Hu Kag Lee
  • Patent number: 6974984
    Abstract: Methods of depositing various metal layers adjacent to a ferroelectric polymer layer are disclosed. In one embodiment, a collimator may be used during a sputtering process to filter out charged particles from the material that may be deposited as a metal layer. In various embodiments, a metal layer may contain at least one of an intermetallic layer, an amorphous intermetallic layer, and an amorphized intermetallic layer.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: December 13, 2005
    Assignee: Intel Corporation
    Inventors: Hitesh Windlass, Ebrahim Andideh, Daniel C. Diana, Mark Richards, William C. Hicks
  • Patent number: 6971165
    Abstract: An improved method for manufacturing a matching pair of electrodes comprises the steps of: fabricating a first electrode with a substantially flat surface; depositing islands of an oxidizable material over regions of the surface; depositing a layer of a third material over the surface of the first electrode to form a second electrode; separating the first electrode from the second electrode; oxidizing the islands of oxidizable material, which causes the islands to expand; bringing the upper electrode and the lower electrode into close proximity, whereupon the expanded island of oxidizable material touches the upper surface and creates an insulating gap between the two surfaces, thereby forming a matching pairs of electrodes.
    Type: Grant
    Filed: April 17, 2003
    Date of Patent: December 6, 2005
    Assignee: Borealis Technical Limited
    Inventor: Avto Tavkhelidze
  • Patent number: 6969472
    Abstract: A method for manufacturing hemi-cylindrical and hemi-spherical micro structures is provided. A pattern is formed onto a substrate, and a layer of material is subsequently grown onto the substrate. Due to growth characteristics, the layer will form radially symmetric features when grown to an appropriate thickness.
    Type: Grant
    Filed: April 25, 2001
    Date of Patent: November 29, 2005
    Assignee: LSI Logic Corporation
    Inventors: Dmitri V. Vezenov, John M. Guerra, Leonard Wan, Paul F. Sullivan
  • Patent number: 6969448
    Abstract: A method for fabricating a metallization structure is presented. The method preferably includes ion metal plasma depositing a wetting layer within a cavity defined in a dielectric layer. The wetting layer preferably includes titanium. The method preferably further includes sputter depositing a bulk metal layer within the cavity and upon the wetting layer. Sputter depositing of the bulk metal layer is preferably performed in a single deposition chamber at least until the cavity is substantially filled.
    Type: Grant
    Filed: December 30, 1999
    Date of Patent: November 29, 2005
    Assignee: Cypress Semiconductor Corp.
    Inventor: Gorley L. Lau
  • Patent number: 6951814
    Abstract: Methods of forming a metal wiring layer on an integrated circuit include forming an insulating pattern including a recess region on an integrated circuit substrate. A metal layer is formed in the recess region and on a top surface of the insulting pattern. The metal layer is removed from the top surface of the insulating pattern adjacent the recess region and from an upper portion of the recess region. An aluminum film is formed on the metal layer at a process temperature less than a reflow temperature of the metal layer to substantially fill the upper portion of the recess region after removing the metal layer. A metal film is formed on the aluminum film at a process temperature less than the reflow temperature of the etched metal layer.
    Type: Grant
    Filed: August 27, 2003
    Date of Patent: October 4, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung-hee Kim, Gil-heyun Choi, Ju-young Yun, Jung-hun Seo
  • Patent number: 6923692
    Abstract: Electrical connectors incorporate a composite coating of molybdenum disulfide and a metal, preferably tin, for one or both of the contact surfaces of the electrical connector. The coating provides for a low coefficient of friction, low contact resistance, and good electrical conductivity, as well as good mechanical properties. The coating also reduces the insertion force of the electrical connectors, thereby increasing the number of possible terminal pairs and/or reducing terminal bending and breakage for a manually mated connector. The coating can be deposited on copper, tin-plated copper, tin alloy-plated copper or other metallic substrates, using any of several physical vapor deposition methods.
    Type: Grant
    Filed: April 22, 2003
    Date of Patent: August 2, 2005
    Assignee: Yazaki Corporation
    Inventor: Daniel A. Niebauer
  • Patent number: 6902656
    Abstract: A cavity forming formed in an encapsulation structure under a vacuum in a vacuum chamber is sealed with a capping layer. A stiff protective layer under tensile stress is deposited on the capping layer prior to venting the vacuum chamber to atmospheric pressure. The capping layer is preferably aluminum or an aluminum alloy, and the protective layer is preferably ?-TiN having a suitable high Young's modulus.
    Type: Grant
    Filed: May 24, 2002
    Date of Patent: June 7, 2005
    Assignee: DALSA Semiconductor Inc.
    Inventors: Luc Ouellet, Robert Antaki, Yves Tremblay
  • Patent number: 6899796
    Abstract: A two-step method of filling copper into a high-aspect ratio via or dual-damascene structure. The first step sputters at a low temperature of no more than 100° C. and with at least portions of high wafer bias, thereby filling a lower half of the hole. The initial copper sputtering is preferably performed through multiple cycles of low-level and high-level pedestal bias to deposit copper on exposed corners and to sputter resulting overhangs from the corners while depositing deep in the hole. The second step may include either electrochemical plating or sputtering performed at a higher temperature, e.g., at least 200° C. and with lower wafer bias to complete the hole filling. In another aspect of the invention, diffusion promoting gas such as hydrogen is added to the copper sputter plasma.
    Type: Grant
    Filed: May 1, 2003
    Date of Patent: May 31, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Wei D. Wang, Anantha K. Subramani, Jianming Fu, Praburam Gopalraja, Jick M. Yu, Fusen Chen
  • Patent number: 6893541
    Abstract: A DC magnetron sputter reactor for sputtering copper, its method of use, and shields and other parts promoting self-ionized plasma (SIP) sputtering, preferably at pressures below 5 milliTorr, preferably below 1 milliTorr. Also, a method of coating copper into a narrow and deep via or trench using SIP for a first copper layer. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. The SIP copper layer can act as a seed and nucleation layer for hole filling with conventional sputtering (PVD) or with electrochemical plating (ECP). For very high aspect-ratio holes, a copper seed layer is deposited by chemical vapor deposition (CVD) over the SIP copper nucleation layer, and PVD or ECP completes the hole filling. The copper seed layer may be deposited by a combination of SIP and high-density plasma sputtering. For very narrow holes, the CVD copper layer may fill the hole.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: May 17, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Tony P. Chiang, Yu D. Cong, Peijun Ding, Jianming Fu, Howard H. Tang, Anish Tolia
  • Patent number: 6887353
    Abstract: Disclosed herein is a barrier layer structure useful in forming copper interconnects and electrical contacts of semiconductor devices. The barrier layer structure comprises a first layer of TaNx which is applied directly over the substrate, followed by a second layer of Ta. The TaNx/Ta barrier layer structure provides both a barrier to the diffusion of a copper layer deposited thereover, and enables the formation of a copper layer having a high <111> crystallographic content so that the electromigration resistance of the copper is increased. The TaNx layer, where x ranges from about 0.1 to about 1.5, is sufficiently amorphous to prevent the diffusion of copper into the underlying substrate, which is typically silicon or a dielectric such as silicon dioxide.
    Type: Grant
    Filed: December 19, 1997
    Date of Patent: May 3, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Peijun Ding, Tony Chiang, Barry L. Chin
  • Patent number: 6878416
    Abstract: A color shifting composition and method useful as a coating on a surface. The composition comprises a layer of piezoelectric material disposed on the surface and a layer of electrically conductive disposed on the layer of piezoelectric material. A mechanism is included for changing an electromagnetic property of the layer of piezoelectric material. Thus, the surface has a first reflective or refractive property at one setting of the mechanism and another reflective or refractive property at another setting of the mechanism. In the illustrative embodiment, the layer of piezoelectric material and the layer of electrically conductive material are sufficiently thin to be transparent to electromagnetic energy in the frequencies of interest. In the illustrative embodiment, the mechanism for changing an electromagnetic property of the layer of piezoelectric material is a source of the electrical potential.
    Type: Grant
    Filed: March 14, 2003
    Date of Patent: April 12, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Jeffrey Daniel Hall
  • Patent number: 6875321
    Abstract: An array of auxiliary magnets is disclosed that is positioned along sidewalls of a magnetron sputter reactor on a side towards the wafer from the target. The magnetron preferably is a small, strong one having a stronger outer pole of a first magnetic polarity surrounding a weaker outer pole of a second magnetic polarity and rotates about the central axis of the chamber. The auxiliary magnets preferably have the first magnetic polarity to draw the unbalanced magnetic field component toward the wafer. The auxiliary magnets may be either permanent magnets or electromagnets.
    Type: Grant
    Filed: August 22, 2003
    Date of Patent: April 5, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Peijun Ding, Rong Tao, Zheng Xu
  • Patent number: 6849166
    Abstract: In a manufacturing method for a piezoelectric actuator a first electrode layer is formed on substrate, a ferroelectric thin film is formed on the first electrode layer, and an inorganic protective layer 4 is formed on the ferroelectric thin film. Then, the inorganic protective layer 4 and the ferroelectric thin film are heat-treated under an oxygen containing atmosphere, and a second electrode layer is formed on an oxidation diffusion layer, wherein the oxidation diffusion layer is formed on a surface of the ferroelectric thin film as a result of component diffusion of the ferroelectric thin film and oxidation of the inorganic protective layer 4 due to the heat treatment. By using this method, it is possible to improve ferroelectricity without deterioration or cracking of a surface of the ferroelectric thin film.
    Type: Grant
    Filed: February 3, 2003
    Date of Patent: February 1, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Hiroyuki Kita
  • Patent number: 6841202
    Abstract: The invention concerns a device and a method for coating and/or surface modification of objects in a vacuum using a plasma, where there is the possibility of coating or modifying variform objects on all sides without a large expense for plant or process engineering being necessary. In accordance with the invention, a box structure (1) of an electrically conductive material that forms a vacuum chamber or can be inserted into a vacuum chamber is used. Objects (2) can be introduced into the box structure to at least one closable opening (8) at a distance from the inner wall. In addition, there are at least one opening (3) for supply and at least one opening (4) for removal of the operating gas as well as one opening (6,6?) for introduction of energy for generation of a glow discharge and the box structure (1) has a potential that is electrically negative with respect to the plasma generated by the glow discharge.
    Type: Grant
    Filed: July 28, 1999
    Date of Patent: January 11, 2005
    Assignee: Fraunhofer-Gesellschaft zur Forderung
    Inventor: Thomas Jung
  • Patent number: 6837979
    Abstract: The present invention provides a method and apparatus for plating a conductive material to a substrate and also modifying the physical properties of a conductive film while the substrate is being plated. The present invention further provides a method and apparatus that plates a conductive material on a workpiece surface in a “proximity” plating manner while a pad type material or other fixed feature is making contact with the workpiece surface in a “cold worked” manner. In this manner, energy stored in the cold worked regions of the plated layer is used to accelerate and enhance micro-structural recovery and growth. Thus, large grain size is obtained in the plated material at a lower annealing temperature and a shorter annealing time.
    Type: Grant
    Filed: June 6, 2002
    Date of Patent: January 4, 2005
    Assignee: ASM-Nutool Inc.
    Inventors: Cyprian Emeka Uzoh, Homayoun Talieh
  • Patent number: 6822158
    Abstract: A thin-film solar cell including a transparent electrode layer, a semiconductor photovoltaic conversion layer, a rear transparent electrode layer and a rear reflective metal layer, said layers being formed in this order on a transparent substrate, wherein the rear transparent electrode has a two-layer structure of an ITO or ZnO:Ga layer and a ZnO:Al layer formed in this order on the semiconductor photovoltaic conversion layer.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: November 23, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takashi Ouchida, Hitoshi Sannomiya
  • Publication number: 20040222083
    Abstract: A method for treating a silicon substrate is described. The silicon substrate is placed into a sputtering equipment. A sputtering step is performed to simultaneously dry clean and amorphize the silicon substrate surface by using the sputtering equipment. A titanium film is deposited on the silicon substrate by the sputtering equipment.
    Type: Application
    Filed: January 29, 2004
    Publication date: November 11, 2004
    Inventor: Su-Chen Fan
  • Patent number: 6814838
    Abstract: The invention relates to a vacuum treatment chamber for work pieces which comprises at least one induction coil for at least co-generating a treatment plasma in a discharge chamber which is located in the interior of the coil. It also comprises a screen which is arranged between the discharge chamber and the coil, and which is coaxial in relation to the axis of the coil. The screen comprises slots which have a directional component which is parallel to the coil axis. The screen is formed by a self-contained body. The slots are provided along at least the main part of the body's circumference in a slot density per circumferential length unit of S=(number of slots)/cm equaling 0.5≦S.
    Type: Grant
    Filed: March 29, 2001
    Date of Patent: November 9, 2004
    Assignee: Unaxis Balzers Aktiengesellschaft
    Inventor: Juergen Weichart
  • Patent number: 6815003
    Abstract: A method for fabricating an electrode for lithium secondary battery formed by depositing a thin film composed of active material capable of lithium storage and release, on a metallic foil to be used as a current collector, in which the surface of the metallic foil is roughened through wet-etching and then the thin film is deposited on the roughened surface.
    Type: Grant
    Filed: November 29, 2001
    Date of Patent: November 9, 2004
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Hiromasa Yagi, Koji Endo, Hisaki Tarui, Hiroshi Okano, Shingo Nakano
  • Patent number: 6811662
    Abstract: A sputtering apparatus is provided. The sputtering apparatus comprises cooling water system having a temperature-controlling device for controlling the temperature of the sidewalls of the reaction chamber. During the deposition process of titanium/titanium nitride, the sidewall temperature of the chamber is controlled at about 50° C.˜70° C. for reducing the difference of temperature distribution in the chamber so that the reaction temperature within the reaction chamber can be rendered substantially uniform.
    Type: Grant
    Filed: August 22, 2003
    Date of Patent: November 2, 2004
    Assignee: Powership Semiconductor Corp.
    Inventor: Yu-Cheng Liu
  • Publication number: 20040211667
    Abstract: The gas sensor device of the semiconductor film type comprises, on a single face of it, at least one gas sensor, a resistive heating film and pads for electrical contact of the sensors and of the resistive heating film; the heating element, the gas sensor film and the contact pads are made entirely by sputter deposition.
    Type: Application
    Filed: April 23, 2004
    Publication date: October 28, 2004
    Applicant: SACMI COOPERATIVA MECCANICI IMOLA Soc. Coop. ar.l.
    Inventors: Giorgio Sberveglieri, Elisabetta Comini, Guido Faglia, Camilla Baratto, Matteo Falasconi
  • Publication number: 20040211661
    Abstract: A method for depositing a barrier or coating layer (34) in a semiconductor recessed structure (28) within a substrate (20) using a plasma process (62) that includes alternating depositing steps (64) and resputtering steps (66). The depositing step (64) deposits a barrier layer (34), including a thick bottom region (38) and a sidewall region (40) along the recessed structure (28) surface. The resputtering step (66) reduces the barrier layer (34) thickness in the bottom region (38) and increases the barrier layer (34) thickness in the otherwise thinly covered portions of the substrate sidewall region (40). Control of powers ranges supplied to the sputtering target (14) and the substrate (20) achieve the depositing and resputtering steps. The process applies also to other coating layers than barrier layers (34), providing a uniform sidewall coverage and thin bottom coverage, e.g., for permalloy deposition in MRAM devices and dual gate electrode formation in CMOS devices.
    Type: Application
    Filed: April 23, 2003
    Publication date: October 28, 2004
    Inventors: Da Zhang, Dean J. Denning, Peter L. G. Ventzek
  • Publication number: 20040188240
    Abstract: Novel processes for the in-situ nitridation of metal layers particularly for the subsequent formation of metal salicides. In one embodiment, the nitridation process comprises connecting a remote plasma generator to a rapid thermal processing (RTP) chamber and introducing nitrogen plasma into the chamber as the metal layer is converted into a nitridated metal salicide layer in gate regions on a substrate. In a second embodiment, a remote plasma generator is connected to a physical vapor deposition (PVD) chamber and nitrogen plasma is introduced into the chamber during metal sputter formation of the metal layer. In a third embodiment, the metal layer is first deposited on the silicon or polysilicon and then nitrided using a decoupled plasma nitridation (DPN) process. The metal salicide is formed by subjecting the nitridated metal salicide to a thermal anneal process.
    Type: Application
    Filed: March 28, 2003
    Publication date: September 30, 2004
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Wei Chang, Mei-Yun Wang
  • Publication number: 20040188242
    Abstract: A method of manufacturing an electromagnetic interference shield (3) includes the steps of: preparing a substrate (30) and at least one target module (1), and mounting them in a sputtering chamber (100), wherein each target module has a target (10) bonded thereto, and the target is made from an electrically conductive material; evacuating the sputtering chamber to a predetermined degree of vacuum; introducing a working gas into the sputtering chamber to a predetermined gas pressure level; applying a voltage to the target module using a power supply (2), thus activating a magnetron sputtering process between the target module and the substrate, and depositing at least one electrically conductive layer (31) from the target module onto the substrate until a desired thickness is achieved on the substrate.
    Type: Application
    Filed: March 29, 2004
    Publication date: September 30, 2004
    Inventor: Ga-Lane Chen
  • Publication number: 20040188239
    Abstract: An iPVD apparatus (20) is programmed to deposit material (10) onto semiconductor substrates (21) by cycling between deposition and etch modes within a vacuum chamber (30). Static magnetic fields are kept to a minimum during at least the etch modes, at least less than 150 Gauss, typically less than 50 Gauss, and preferably in the range of 0-10 Gauss. Static magnetic fields during deposition modes may be more than 150 Gauss, in the range of 0-50 Gauss, or preferably 20-30 Gauss, and may be the same as during etch modes or switched between a higher level during deposition modes and a lower level, including zero, during etch modes. Such switching may be by switching electromagnet current or by moving permanent magnets, by translation or rotation. Static magnetic fields are kept to a minimum during at least the etch modes, at least less than 150 Gauss, typically less than 50 Gauss, and preferably in the range of 1-10 Gauss. The modes may operate at different power and pressure parameters.
    Type: Application
    Filed: March 5, 2004
    Publication date: September 30, 2004
    Inventors: Rodney Lee Robison, Jacques Faquet, Bruce Gittleman, Tugrul Yasar, Frank Cerio, Jozef Brcka
  • Patent number: 6793779
    Abstract: A method of filling trenches or vias on a semiconductor workpiece surface with copper using sputtering techniques. A copper wetting layer and a copper fill layer may both be applied by sputtering techniques. The thin wetting layer of copper is applied at a substrate surface temperature ranging between about 20° C. to about 250° C., and subsequently the temperature of the substrate is increased, with the application of the sputtered copper fill layer beginning at above at least about 200° C. and continuing while the substrate temperature is increased to a temperature as high as about 600° C. Preferably the substrate temperature during application of the sputtered fill layer ranges between about 300° C. and about 500° C.
    Type: Grant
    Filed: February 20, 2003
    Date of Patent: September 21, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Peijun Ding, Tony Chiang, Barry L. Chin
  • Patent number: 6790323
    Abstract: A magnetron especially advantageous for low-pressure plasma sputtering or sustained self-sputtering having reduced area but full target coverage. The magnetron includes an outer pole face surrounding an inner pole face with a gap therebetween. The outer pole of the magnetron of the invention is smaller than that of a circular magnetron similarly extending from the center to the periphery of the target and has a substantially larger total magnetic intensity. Thereby, sputtering at low pressure and high ionization fraction is enabled.
    Type: Grant
    Filed: July 30, 2001
    Date of Patent: September 14, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Jianming Fu, Praburam Gopalraja, Fusen Chen, John Foster
  • Patent number: 6790776
    Abstract: The invention generally provides a method for preparing a surface for electrochemical deposition comprising forming a high conductance barrier layer on the surface and depositing a seed layer over the high conductance barrier layer. Another aspect of the invention provides a method for filling a structure on a substrate, comprising depositing a high conductance barrier layer on one or more surfaces of the structure, depositing a seed layer over the barrier layer, and electrochemically depositing a metal to fill the structure.
    Type: Grant
    Filed: December 10, 2001
    Date of Patent: September 14, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Peijun Ding, Tony Chiang, Tse-Yong Yao, Barry Chin
  • Publication number: 20040173452
    Abstract: Metal may be deposited into trenches, vias, or other wafer openings using a physical vapor deposition chamber under vacuum. Sonic energy may be applied directly to the wafer having the openings to be filled. As a result, pinching off of the openings may be reduced or eliminated.
    Type: Application
    Filed: March 6, 2003
    Publication date: September 9, 2004
    Inventors: Justin K. Brask, Mark L. Doczy, Robert B. Turkot
  • Publication number: 20040168908
    Abstract: A conductive barrier layer may be formed within high aspect ratio openings by a two-step ionizing sputter deposition. The first step is performed at low pressure and low bias power to obtain good coverage of upper portions of the openings. In the second step, the bias power and the pressure are raised to improved directionality of the particles while at the same time increasing the scatter events so that an increased deposition rate at critical structure areas is obtained, thereby achieving a good coverage at lower sidewall areas.
    Type: Application
    Filed: July 22, 2003
    Publication date: September 2, 2004
    Inventors: Michael Friedemann, Volker Kahlert
  • Patent number: 6784222
    Abstract: An electroconductive coating composition which function as a sealer/primer includes (a) a radiation curable, polymerizable compound, (b) a photoinitiator and (c) a conductive pigment. The conductive pigment may be a mixture of pigment including a blend of conductive pigments as well as conductive pigment. Conductivity enhancers may, also, be added. The polymerizable compound is, preferably, a U curable acrylate functional compound which may be monofunctional or polyfunctional. The composition is particularly useful for sealing and priming SMC panels.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: August 31, 2004
    Inventors: Frank David Zychowski, Joseph C. Sgro
  • Publication number: 20040166693
    Abstract: The invention described herein relates to new titanium-comprising materials which can be utilized for forming titanium alloy sputtering targets. The titanium alloy sputtering targets can be reactively sputtered in a nitrogen-comprising sputtering atmosphere to form an alloy TiN film, or alternatively in a nitrogen-comprising and oxygen-comprising sputtering atmosphere to form an alloy TiON thin film. The thin films formed in accordance with the present invention can have a non-columnar grain structure, low electrical resistivity, high chemical stability, and barrier layer properties comparable to those of TaN for thin film Cu barrier applications. Further, the titanium alloy sputtering target materials produced in accordance with the present invention are more cost-effective for semiconductor applications than are high-purity tantalum materials and have superior mechanical strength suitable for high-power sputtering applications.
    Type: Application
    Filed: February 19, 2004
    Publication date: August 26, 2004
    Inventors: Jianxing Li, Stephen Turner, Lijun Yao
  • Publication number: 20040154914
    Abstract: A sputtering conductor target is provided, which includes: a center portion; an edge portion around the center portion and having a thickness larger than the center portion; and an inclined portion disposed between the center portion and the edge portion and making an angle of about 30°-70° with a normal to a top surface of the edge portion.
    Type: Application
    Filed: December 24, 2003
    Publication date: August 12, 2004
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kwan-Young Cho, Dae-Yoep Park, Sang-Ho Son
  • Publication number: 20040150696
    Abstract: The invention includes a method of forming mixed-phase compressive tantalum thin films using nitrogen residual gas. The method of the present invention may include selecting a pressure of nitrogen residual gas during plasma sputtering corresponding to a predefined ratio of beta- to alpha-tantalum. The method may be performed at substrate temperatures less than 300° C. Mixed-phase compressive tantalum thin films and fluid ejection devices are also disclosed.
    Type: Application
    Filed: February 5, 2003
    Publication date: August 5, 2004
    Inventor: Arjang Fartash
  • Publication number: 20040134768
    Abstract: A method of filling copper into a high-aspect ratio via by a plasma sputter process and allowing the elimination of electrochemical plating. In one aspect of the invention, the sputtering is divided into a first step performed at a low temperature of no more than 100° C. and with at least portions of high wafer bias, thereby filling a lower half of the hole, and a second step performed at a higher temperature, e.g., at least 200° C. and with at least portions of low wafer bias to complete the hole filling. In another aspect of the invention, diffusion promoting gas such as hydrogen is added to the copper sputter plasma. In still another aspect, copper sputtering, even in the final fill phase, is performed through multiple cycles of low-level and high-level pedestal bias to deposit copper on exposed corners and to sputter from the corners.
    Type: Application
    Filed: January 10, 2003
    Publication date: July 15, 2004
    Inventors: Wei D. Wang, Anantha K. Subramani, Jianming Fu, Praburam Gopalraja, Jick M. Yu, Fusen Chen
  • Publication number: 20040134769
    Abstract: A two-step method of filling copper into a high-aspect ratio via or dual-damascene structure. The first step sputters at a low temperature of no more than 100° C. and with at least portions of high wafer bias, thereby filling a lower half of the hole. The initial copper sputtering is preferably performed through multiple cycles of low-level and high-level pedestal bias to deposit copper on exposed corners and to sputter resulting overhangs from the corners while depositing deep in the hole. The second step may include either electrochemical plating or sputtering performed at a higher temperature, e.g., at least 200° C. and with lower wafer bias to complete the hole filling. In another aspect of the invention, diffusion promoting gas such as hydrogen is added to the copper sputter plasma.
    Type: Application
    Filed: May 1, 2003
    Publication date: July 15, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Wei D. Wang, Anantha K. Subramani, Jianming Fu, Praburam Gopalraja, Jick M. Yu, Fusen Chen
  • Patent number: 6762121
    Abstract: A method of ensuring against deterioration of an underlying silicide layer over which a refractory material layer is deposited by physical vapor deposition (PVD) or chemical vapor deposition (CVD) is realized by first providing a continuous polysilicon layer prior to the refractory material deposition. The continuous polysilicon layer, preferably no thicker than 50 Å, serves a sacrificial purpose and prevents interaction between any fluorine that is released during the refractory material deposition step from interacting with the underlying silicide.
    Type: Grant
    Filed: April 4, 2001
    Date of Patent: July 13, 2004
    Assignee: International Business Machines Corporation
    Inventors: Jonathan D. Chapple-Sokol, Randy W. Mann, William J. Murphy, Jed H. Rankin, Daniel S. Vanslette
  • Publication number: 20040129558
    Abstract: A method of metal sputtering, comprising the following steps. A wafer holder and inner walls of a chamber are coated with a seasoning layer comprised of: a) a material etchable in a metal barrier layer etch process; or b) an insulating or non-conductive material. A wafer having two or more wafer conductive structures is placed upon the seasoning layer coated wafer holder. The wafer is cleaned wherein a portion of the seasoning layer is re-deposited upon the wafer over and between adjacent wafer conductive structures. A metal barrier layer is formed over the wafer. The wafer is removed from the chamber and at least two adjacent upper metal structures are formed over at least one portion of the metal barrier layer.
    Type: Application
    Filed: January 6, 2003
    Publication date: July 8, 2004
    Applicant: Megic Corporation
    Inventors: Hsien-Tsung Liu, Chien-Kang Chou, Ching-San Lin