With Measuring, Testing, Or Inspecting Patents (Class 216/84)
  • Patent number: 8580133
    Abstract: Disclosed herein are methods of controlling the etching of a layer of silicon nitride relative to a layer of silicon dioxide. In one illustrative example, the method includes providing an etch bath that is comprised of an existing etchant adapted to selectively etch silicon nitride relative to silicon dioxide, performing an etching process in the etch bath using the existing etchant to selectively remove a silicon nitride material positioned above a silicon dioxide material on a plurality of semiconducting substrates, determining an amount of the existing etchant to be removed based upon a per substrate silicon loading of the etch bath by virtue of etching the plurality of substrates in the etch bath and determining an amount of new etchant to be added to the etch bath based upon a per substrate silicon loading of the etch bath by virtue of etching the plurality of substrates in the etch bath.
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: November 12, 2013
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Berthold Reimer, Claudia Wolf
  • Patent number: 8574449
    Abstract: Quickly making changes to etching conditions suppresses the production yield of printed wiring boards from being deteriorated. Disclosed is a method comprising: an etching step that comprises: preparing a conductor-clad base material continuous in a certain direction, the conductor-clad base material (1) having an insulating layer and one or more conductive layers formed on main surfaces of the insulating layer; and subjecting a predetermined region of a conductor layer of one main surface of the conductor-clad base material (1) to an etching process thereby to form a wiring pattern (1a) to be of a product and an inspection pattern (1b) to be used for inspection; a measuring step that measures a line width of the inspection pattern after the etching step; and a control step that controls an etching condition in the etching step based on the measured line width.
    Type: Grant
    Filed: May 2, 2012
    Date of Patent: November 5, 2013
    Assignee: Fujikura Ltd.
    Inventors: Hirohito Watanabe, Taiji Ogawa, Eriko Tomonaga
  • Patent number: 8569174
    Abstract: Methods of determining a polishing endpoint are described using spectra obtained during a polishing sequence. In particular, techniques for using only desired spectra, faster searching methods and more robust rate determination methods are described.
    Type: Grant
    Filed: February 22, 2008
    Date of Patent: October 29, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Harry Q. Lee, Boguslaw A. Swedek, Dominic J. Benvegnu, Jeffrey Drue David
  • Patent number: 8563335
    Abstract: A method of controlling a polishing operation includes polishing a substrate, during polishing obtaining a sequence over time of measured spectra from the substrate with an in-situ optical monitoring system, for each measured spectrum from the sequence of measured spectra applying a Fourier transform to the measured spectrum to generate a transformed spectrum thus generating a sequence of transformed spectra, for each transformed spectrum identifying a peak of interest from a plurality of peaks in the transformed spectrum, for each transformed spectrum determining a position value for the peak of interest in the transformed spectrum thus generating a sequence of position values, and determining at least one of a polishing endpoint or an adjustment of a pressure to the substrate from the sequence of position values.
    Type: Grant
    Filed: April 23, 2012
    Date of Patent: October 22, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Dominic J. Benvegnu, Boguslaw A. Swedek
  • Publication number: 20130256273
    Abstract: A substrate treatment apparatus includes: a chamber; a substrate being treated with a treatment liquid in the chamber; a temperature measuring unit which measures an internal air temperature of the chamber and/or a temperature of the treatment liquid; a temperature adjusting unit which changes the internal air temperature and/or the temperature of the treatment liquid; a storage unit which stores a map defining a relationship between the air temperature and the treatment liquid temperature so that a treatment liquid temperature level for a given air temperature level is lower than the given air temperature level; and a temperature controlling unit which sets a target value of the internal air temperature of the chamber or the temperature of the treatment liquid based on the map and a measurement value detected by the temperature measuring unit, and controls the temperature adjusting unit based on the target value.
    Type: Application
    Filed: March 25, 2013
    Publication date: October 3, 2013
    Applicant: DAINIPPON SCREEN MFG. CO., LTD.
    Inventors: Atsuyasu MIURA, Hiroaki ISHII
  • Patent number: 8545712
    Abstract: In a method of manufacturing semiconductor wafers, front and back surfaces of the semiconductor wafers are simultaneously polished with a double-side polishing machine that includes: a carrier for accommodating the semiconductor wafer; and an upper press platen and a lower press platen for sandwiching the carrier. The method includes: accommodating the semiconductor wafer in the carrier while a thickness of the semiconductor wafer is set to be larger than a thickness of the carrier by 0 ?m to 5 ?m; and polishing the semiconductor wafer while feeding a polishing slurry to between the surfaces of the semiconductor wafer and surfaces of the press platens. In the polishing, an allowance of both surfaces of the semiconductor wafer is set at 5 ?m or less in total.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: October 1, 2013
    Assignee: Sumco Techxiv Corporation
    Inventors: Hiroshi Takai, Kenji Satomura, Yuichi Nakayoshi, Katsutoshi Yamamoto, Kouji Mizowaki
  • Patent number: 8535552
    Abstract: A method for evaluating center segregation of a continuous cast slab is provided. The method of the present invention includes (A) creating a center segregation image of a slab using an etching solution comprising a picric acid (C6H3N3O7), a cupric chloride (CuCl2), sodium laurylbenzenesulfonate (C18H29SO3Na) and the remainder of distilled water; and (B) evaluating the center segregation of a slab by scanning the image and applying the following Formula. The method creates an image of center segregation even for low-carbon steel having carbon (C) in an amount of 0.04 wt % or less as well as ultra low-sulfur steel having sulfur (S) in an amount of 50 ppm or less.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: September 17, 2013
    Assignee: Hyundai Steel Company
    Inventors: Sukhyun Yoo, Wonjae Cho, Jutae Choi, Kaeyoung Lee, Kyoungho So
  • Patent number: 8501026
    Abstract: A method for determining a minimum tension compensation stress which will have a membrane of a thickness of less than or equal to one micrometer, secured to a frame, having, in the absence of any external stress, a desired deflection. The membrane can be made as planar as possible in absence of any external stress, and its thickness can be less than or equal to one micrometer.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: August 6, 2013
    Assignee: Commissariat à l'énergie atomique et aux énergies alternatives
    Inventors: Christophe Constancias, Bernard Dalzotto, Frank Fournel, Philippe Michallon, Hubert Moriceau, Valerie Pouteau
  • Patent number: 8496841
    Abstract: Disclosed are a nano patterning method for fabricating a surface plasmon color filter having a transmissive pattern which selectively transmits light of specific wavelengths, and methods for fabricating a surface plasmon color filter and a liquid crystal display (LCD) device using the same. Used are a stamp which provides a partial electrification region, and a template, thiol-terminated nanospheres which can be self-assembled, thereby fabricating nano holes having a two-dimensional period and arranged in a hexagonal lattice. This may be applied onto a large area of a substrate, and may implement simplified processes and reduced fabrication costs.
    Type: Grant
    Filed: March 30, 2011
    Date of Patent: July 30, 2013
    Assignee: LG Display Co., Ltd.
    Inventor: Min-Sung Yoon
  • Patent number: 8466071
    Abstract: An object of the present invention is to provide a method for etching a single wafer, which effectively realizes a high flatness of wafer and an increase in productivity thereof. In a method for etching a single wafer, a single thin disk-like wafer sliced from a silicon single crystal ingot is spun, and a front surface of the wafer is etched with an etching solution supplied thereto. In the method, a plurality of supply nozzles are disposed above and opposite to the front surface of the wafer at different portions in the radial direction of the wafer, respectively; and then one or more conditions selected from the group consisting of temperatures, kinds, and supply flow rates of etching solutions from the plurality of supply nozzles are changed.
    Type: Grant
    Filed: January 24, 2007
    Date of Patent: June 18, 2013
    Assignee: Sumco Corporation
    Inventors: Sakae Koyata, Tomohiro Hashii, Katsuhiko Murayama, Kazushige Takaishi, Takeo Katoh
  • Patent number: 8440573
    Abstract: A method is provided for processing a wafer used in fabricating semiconductor devices. The method can comprise forming high-aspect ratio features on the wafer, which is followed by wet processing and drying. During drying, pattern collapse can occur. This pattern collapse can be repaired to allow for additional processing of the wafer. In some instance, pattern collapse can be repaired via etching where the etching breaks bonds that can have formed during pattern collapse.
    Type: Grant
    Filed: January 26, 2010
    Date of Patent: May 14, 2013
    Assignee: Lam Research Corporation
    Inventors: Katrina Mikhaylichenko, Denis Syomin, Qian Fu, Glenn W. Gale, Shenjian Liu, Mark H. Wilcoxson
  • Patent number: 8440093
    Abstract: The presence of a detectable entity within a detection volume of a microfabricated elastomeric structure is sensed through a change in the electrical or magnetic environment of the detection volume. In embodiments utilizing electronic detection, an electric field is applied to the detection volume and a change in impedance, current, or combined impedance and current due to the presence of the detectable entity is measured. In embodiments utilizing magnetic detection, the magnetic properties of a magnetized detected entity alter the magnetic field of the detection volume. This changed magnetic field induces a current which can reveal the detectable entity. The change in resistance of a magnetoresistive element may also reveal the passage of a magnetized detectable entity.
    Type: Grant
    Filed: October 11, 2006
    Date of Patent: May 14, 2013
    Assignee: Fuidigm Corporation
    Inventors: Hany Nassef, Geoff Facer, Marc Unger
  • Patent number: 8409997
    Abstract: A method and system for controlling a silicon nitride etching bath provides the etching bath including phosphoric acid heated to an elevated temperature. The concentration of silicon in the phosphoric acid is controlled to maintain a desired level associated with a desired silicon nitride/silicon oxide etch selectivity. Silicon concentration is measured while the silicon remains in soluble form and prior to silica precipitation. Responsive to the measuring, fresh heated phosphoric acid is added to the etching bath when necessary to maintain the desired concentration and silicon nitride:silicon oxide etch selectivity and prevent silica precipitation. The addition of fresh heated phosphoric acid enables the etching bath to remain at a steady state temperature. Atomic absorption spectroscopy may be used to monitor the silicon concentration which may be obtained by diluting a sample of phosphoric acid with cold deionized water and measuring before silica precipitation occurs.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: April 2, 2013
    Assignee: Taiwan Semiconductor Maufacturing Co., Ltd.
    Inventors: Zin-Chang Wei, Tsung-Min Huang, Ming-Tsao Chiang Chiang, Cheng-Chen Calvin Hsueh
  • Patent number: 8372296
    Abstract: Provided is a manufacturing method for a thermal head, including: bonding a flat upper substrate in a stacked state onto a flat supporting substrate including a heat-insulating concave portion open to one surface thereof so that the heat-insulating concave portion is closed (bonding step (SA2)); thinning the upper substrate bonded onto the supporting substrate by the bonding step (SA2) (plate thinning step (SA3)); measuring a thickness of the upper substrate thinned by the plate thinning step (SA3) (measurement step (SA4)); deciding a target resistance value of heating resistors based on the thickness of the upper substrate, which is measured by the measurement step (SA4) (decision step (SA5)); and forming, at positions of a surface of the upper substrate thinned by the plate thinning step (SA3), the heating resistors having the target resistance value determined by the decision step (SA5), the positions being opposed to the heat-insulating concave portion (resistor forming step (SA6)).
    Type: Grant
    Filed: August 3, 2010
    Date of Patent: February 12, 2013
    Assignee: Seiko Instruments Inc.
    Inventors: Noriyoshi Shoji, Norimitsu Sanbongi, Toshimitsu Morooka, Keitaro Koroishi
  • Patent number: 8357286
    Abstract: Versatile methods of refining a first and a second layer of a workpiece are discussed. New refining methods and refining apparatus are disclosed. The new refining methods can help improve yield and appreciably change the cost of manufacture for refining of workpieces. The methods can be applied to workpieces having extremely close tolerances such as semiconductor wafers. New methods of control are also discussed. Methods use controllers, processors, computers, and processor readable memory devices are discussed. Use of stored information is to make changes in process control are discussed. Use of process models are discussed for refining. Determining a changed process control with stored information from first and second layers of a workpiece is disclosed. A changed process control can make an appreciable changes to the cost of manufacture of a workpiece.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: January 22, 2013
    Assignee: SemCon Tech, LLC
    Inventor: Charles J. Molnar
  • Patent number: 8313947
    Abstract: A method of testing a contact structure including exposing a gold layer of at least one contact structure of a support structure to a solution including glacial acetic acid and nitric acid; and determining a porosity of the gold layer of at least one contact structure after the exposing.
    Type: Grant
    Filed: June 18, 2010
    Date of Patent: November 20, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Rama I. Hegde
  • Patent number: 8309470
    Abstract: Methods, apparatus, and systems are provided for efficiently reclaiming solvents used to clean surfaces of semiconductor wafers, etc. More particularly, embodiments of the present invention provide an in-situ reclaim approach that utilizes condensing mechanisms to reclaim evaporated solvent components. In these embodiments, the condensing can occur within a proximity head itself and/or along a vacuum line running from the proximity head to a vacuum tank. Other embodiments of the present invention provide an in-situ reclaim approach that prevents the evaporation of solvents at the onset by maintaining appropriate equilibrium gas phase concentrations between the liquid chemistries and gases used to process wafer surfaces.
    Type: Grant
    Filed: December 18, 2006
    Date of Patent: November 13, 2012
    Assignee: Lam Research Corporation
    Inventor: Robert O'Donnell
  • Patent number: 8298435
    Abstract: An etching method. The method includes etching a first plurality of silicon wafers in a first enchant, each silicon wafer having SiO2 and Si3N4 deposited thereon, where the etching includes dissolving a quantity of the SiO2 and a quantity of the Si3N4 in the first echant. A quantity of insoluble SiO2 precipitates. A ratio of a first etch rate of Si3N4 to a first etch rate of SiO2 is determined to be less than a predetermined threshold. A portion of the first etchant is combined with a second etchant to form a conditioned etchant. A second plurality of silicon wafers is etched in the conditioned etchant. A ratio of a second etch rate of Si3N4 to a second etch rate of SiO2 in the conditioned etchant is greater than the threshold. A method for exchanging an etching bath solution and a method for forming a selective etchant are also disclosed.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: October 30, 2012
    Assignee: International Business Machines Corporation
    Inventors: Russell Herbert Arndt, Paul F. Findeis, Charles Jesse Taft
  • Patent number: 8268185
    Abstract: A method of analyzing a quartz member includes the step of supplying an etchant to the quartz member so as to etch the quartz member. The method also includes analyzing the etchant used in the supplying step. The etchant is supplied to a concave etchant receiving portion that is formed in the quartz member prior to the supplying step and has an inner wall thereof formed of the quartz member.
    Type: Grant
    Filed: May 28, 2007
    Date of Patent: September 18, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Kazuya Dobashi, Teruyuki Hayashi, Kohei Tsugita, Misako Saito
  • Publication number: 20120211468
    Abstract: An exemplary embodiment discloses a process for cleaning semiconductor fabrication equipment parts with non-metallic surfaces. The process optionally includes providing a semiconductor fabrication part with a non-metallic surface to be cleaned and applying a dilute aqueous solution to remove contamination from the non-metallic surface. The aqueous solution optionally includes dilute amounts of hydrofluoric acid, nitric acid and hydrogen peroxide. The dilute amounts would optionally be in the ranges of 0.5-1.5% wt. hydrofluoric acid, 0.1-0.5% wt. nitric acid and 1-10% wt. hydrogen peroxide.
    Type: Application
    Filed: April 27, 2012
    Publication date: August 23, 2012
    Inventor: Samantha Tan
  • Publication number: 20120199555
    Abstract: A substrate processing apparatus includes a high-speed supply system having a relatively small opening for ejecting a processing liquid through the relatively small opening to supply the processing liquid into a processing bath, and a low-speed supply system having a relatively large opening for ejecting the processing liquid through the relatively large opening to supply the processing liquid into the processing bath. While an etching process is in progress, the processing liquid is supplied through the high-speed supply system. This decreases a difference in concentration of a liquid chemical component in the processing liquid within the processing bath to improve the uniformity of the etching process. While the etching process is not in progress, on the other hand, the processing liquid is supplied through the low-speed supply system. This improves the efficiency of the replacement of the processing liquid within the processing bath.
    Type: Application
    Filed: April 20, 2012
    Publication date: August 9, 2012
    Inventor: Atsushi Osawa
  • Patent number: 8216384
    Abstract: Embodiments of the current invention describe a cleaning solution for the removal of high dose implanted photoresist, along with methods of applying the cleaning solution to remove the high dose implanted photoresist and combinatorially developing the cleaning solution.
    Type: Grant
    Filed: November 6, 2009
    Date of Patent: July 10, 2012
    Assignee: Intermolecular, Inc.
    Inventors: Nitin Kumar, Guizhen Zhang
  • Publication number: 20120138572
    Abstract: Disclosed is an end point detecting method of metal etching and a device thereof. The end point detecting method of metal etching comprises: performing scan to a metal film to acquire a proportion of a transparency area of the metal film in a scanned area; judging whether the proportion of the transparency area reaches a predetermined value or not; and confirming a current etching time of the metal film as an etching end point time when the predetermined value is reached. The device comprises an acquirement module, a judgment module and a confirmation module. The acquirement module performs scan to the metal film to acquire the proportion of the transparency area. The judgment module judges whether the proportion reaches the predetermined value or not. The confirmation module confirms the current etching time of the metal film as the etching end point time when the proportion reaches the predetermined value.
    Type: Application
    Filed: August 28, 2011
    Publication date: June 7, 2012
    Applicant: Shenzhen China Star Optoelectronics Technology Co. LTD.
    Inventors: CHIN-WEN WANG, Chengming He
  • Patent number: 8182709
    Abstract: By creating a temperature profile across a polishing pad, a respective temperature profile may be obtained in a substrate to be polished, which may result in a respective varying removal rate across the substrate for a chemically reactive slurry material or for an electro-chemically activated polishing process. Hence, highly sensitive materials, such as material comprising low-k dielectrics, may be efficiently polished with a high degree of controllability.
    Type: Grant
    Filed: June 4, 2008
    Date of Patent: May 22, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jens Heinrich, Gerd Marxsen
  • Patent number: 8173037
    Abstract: A wafer polish monitoring method and device for detecting the end point of the polishing of a conductive film with high precision and accuracy by monitoring the variation of the film thickness of the conductive film without adverse influence of slurry or the like after the film thickness of the conductive film decreases to an extremely small film thickness defined by the skin depth. A high-frequency transmission path is formed in a portion facing the conductive film on the surface of the wafer, the polishing removal state of the conductive film is evaluated based at least on the transmitted electromagnetic waves passing through the high-frequency transmission path or the reflected electromagnetic waves that are reflected without passing through the high-frequency transmission path, and the end point of the polishing removal and the point equivalent to the end point of the polishing removal are detected.
    Type: Grant
    Filed: January 10, 2008
    Date of Patent: May 8, 2012
    Assignee: Tokyo Semitsu Co. Ltd
    Inventors: Takashi Fujita, Toshiyuki Yokoyama, Keita Kitade
  • Patent number: 8163186
    Abstract: A method of manufacturing magnetic heads comprises the step of: fabricating a magnetic head substructure by forming a plurality of components of the magnetic heads on a single substrate, wherein a plurality of rows of pre-head portions that will be the respective magnetic heads later are aligned in the substructure; and fabricating the magnetic heads by separating the pre-head portions from one another through cutting the substructure. In the step of fabricating the substructure, a plurality of indicators are formed, each of the indicators serving as a reference for indicating the location of a region ABS in which the medium facing surfaces of the magnetic heads are to be formed.
    Type: Grant
    Filed: June 9, 2008
    Date of Patent: April 24, 2012
    Assignee: Headway Technologies, Inc.
    Inventors: Yoshitaka Sasaki, Hiroyuki Itoh, Shigeki Tanemura, Hironori Araki
  • Patent number: 8153017
    Abstract: A substrate treating apparatus for heating a treating solution formed of a chemical and a diluent, and immersing substrates in the treating solution for treatment.
    Type: Grant
    Filed: August 19, 2008
    Date of Patent: April 10, 2012
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventor: Takashi Izuta
  • Patent number: 8137574
    Abstract: The present invention is to provide a processing method for manufacturing a highly flat and highly smooth glass substrate with good productivity. A highly flat and highly smooth glass substrate is obtained with good productivity by processing of a glass substrate, which comprises a step of measuring the surface shape of the glass substrate prior to processing, a step of processing the surface of the substrate by changing a processing condition for each site (first processing step), and a step of finish-polishing the surface of the glass substrate that has been subjected to the first processing step (second processing step).
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: March 20, 2012
    Assignee: Asahi Glass Company, Limited
    Inventors: Koji Otsuka, Hiroshi Kojima, Masabumi Ito
  • Patent number: 8137575
    Abstract: The invention relates to a control of etching processes of insulating substrates by means of gloss measurement. By this method a surface roughness can be achieved which leads to good adhesion of metals layers deposited in subsequent metallization steps. This method is particularly suited for the production of printed circuit boards.
    Type: Grant
    Filed: October 19, 2005
    Date of Patent: March 20, 2012
    Assignee: Atotech Deutschland GmbH
    Inventors: Merten Piel, Brigitte Steder, legal representative, Rolf Piel, legal representative, Elke Piel, legal representative, Lutz Stamp, Christiane Moepert
  • Patent number: 8133418
    Abstract: In order to allow for aligning a relative position between a transferred object and a stamper with high accuracy without providing an alignment pattern in the transferred object, there are provided: a pattern transfer method, including: when adjusting the relative position between the stamper and the transferred object, a step of detecting at least two or more edge positions of the transferred object and calculating an arbitrary point from the detected edge positions; a step of detecting a position of the stamper from an edge of the stamper or an alignment mark formed in the stamper; and a step of adjusting the relative position between the transferred object and the stamper from the arbitrary point and the position of the stamper; and an imprint device using the same.
    Type: Grant
    Filed: August 3, 2007
    Date of Patent: March 13, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Ando, Susumu Komoriya, Masahiko Ogino, Akihiro Miyauchi
  • Patent number: 8105499
    Abstract: A mask fixture for etching an item includes: a top fixture disposed over the item, including a reservoir centered within the top fixture for containing an etchant; a bottom fixture underneath the item to be etched including a recessed surface area centered within the bottom fixture; and an etch-resistant window for holding the item to be etched, the etch-resistant window disposed entirely within the recessed surface area. In addition, a small via centered within and intersecting both the top and bottom fixtures acts as a path for a high intensity light beam.
    Type: Grant
    Filed: July 14, 2008
    Date of Patent: January 31, 2012
    Assignee: International Business Macines Corporation
    Inventor: Arthur Wood Ellis
  • Patent number: 8105851
    Abstract: Provided is a method of removing a nitride material from a semiconductor wafer. The method includes monitoring a silicon concentration level in a chemical solution. The chemical solution may include a phosphoric acid. The method includes adjusting the silicon concentration level in response to the monitoring. The method includes heating the chemical solution. The method includes applying the heated chemical solution to a wafer surface in a manner so that a temperature of the heated chemical solution is within a predefined temperature range throughout the wafer surface. The method includes etching a nitride material of the wafer using the heated chemical solution.
    Type: Grant
    Filed: September 23, 2010
    Date of Patent: January 31, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shao-Yen Ku, Chung-Ru Yang, Chi-Ming Yang
  • Patent number: 8088298
    Abstract: Methods and apparatus for spectrum-based endpointing. An endpointing method includes selecting two or more reference spectra. Each reference spectrum is a spectrum of white light reflected from a film of interest on a first substrate and has a thickness greater than a target thickness. The reference spectra is selected for particular spectra-based endpoint determination logic so that the target thickness is achieved when endpoint is called by applying the particular spectra-based endpoint logic. The method includes obtaining two or more current spectra. Each current spectrum is a spectrum of white light reflected from a film of interest on a second substrate when the film of interest is being subjected to a polishing step and has a current thickness that is greater than the target thickness. The method includes determining, for the second substrate, when an endpoint of the polishing step has been achieved.
    Type: Grant
    Filed: July 29, 2008
    Date of Patent: January 3, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Boguslaw A. Swedek, Dominic J. Benvegnu, Jeffrey D. David
  • Publication number: 20110294234
    Abstract: Methods and devices for etching a device precursor are provided. For example, a method includes: providing a substrate, determining a temperature associated with the substrate, and etching a metal oxide layer of the substrate, wherein the etching is controlled based on the determined temperature.
    Type: Application
    Filed: June 7, 2010
    Publication date: December 1, 2011
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Niels KUHR, Ursula SCHMIDT
  • Patent number: 8066897
    Abstract: A method for manufacturing a current perpendicular to plane magnetoresistive sensor that allows for dynamic adjustment of free layer biasing to compensate for variations in thickness of an electrically insulating layer that separates the hard bias layers from the free layer. During fabrication of the sensor, the actual thickness of the insulation layers is measured. Then, to maintain a desired magnetic stabilization of the free layer one of three options can be utilized. Option one; adjust the stripe height target to maintain the desired magnetic stabilization. Option two; adjust the hard magnet thickness to maintain the desired magnetic stabilization. Option three; use a combination of option one and option two, adjusting both the stripe height target and the hard magnet thickness to maintain the desired magnetic stabilization.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: November 29, 2011
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventor: Arley Cleveland Marley
  • Patent number: 8048330
    Abstract: By providing an interlayer dielectric material with different removal rates, a desired minimum material height above gate electrode structures of sophisticated transistor devices of the 65 nm technology or 45 nm technology may be obtained. The reduced removal rate above the gate electrode may thus provide enhanced process robustness during the planarization of the interlayer dielectric layer stack prior to the formation of contact elements.
    Type: Grant
    Filed: May 28, 2008
    Date of Patent: November 1, 2011
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Ralf Richter, Thomas Foltyn, Anthony Mowry
  • Patent number: 8038895
    Abstract: A method for detection of mechanical defects in a semiconductor ingot section which has at least one planar surface, and a thickness at right angles to this surface of 1 cm to 100 cm, involves scanning the planar surface by at least one ultrasound head which is coupled via a liquid coupling medium to the planar surface and, at each measurement point (x,y) producing at least one ultrasound pulse which is directed at the planar surface of the ingot section, recording the ultrasound-pulse echo as a function of time, such that an echo from the planar surface, an echo from a surface opposite the planar surface, and further echoes are detected, with the positions (xp, yp, zp) of mechanical defects in the ingot section being determined from the further echoes.
    Type: Grant
    Filed: June 19, 2007
    Date of Patent: October 18, 2011
    Assignee: Siltronic AG
    Inventors: Ludwig Koester, Peter Czurratis, Klaus Kraemer
  • Patent number: 7998358
    Abstract: A polishing system receives one or more target parameters for a selected peak in a spectrum of light, polishes a substrate, measures a current spectrum of light reflected from the substrate while the substrate is being polished, identifies the selected peak in the current spectrum, measures one or more current parameters of the selected peak in the current spectrum, compares the current parameters of the selected peak to the target parameters, and ceases to polish the substrate when the current parameters and the target parameters have a pre defined relationship.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: August 16, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Dominic J. Benvegnu, Bogdan Swedek, David J. Lischka
  • Patent number: 7993936
    Abstract: By evaluating a status signal on the basis of a fault detection classification mechanism in an electrochemical etch tool, a corresponding failure status of the tool may be obtained for each single substrate, thereby significantly reducing the risk of significant yield loss compared to conventional strategies. The fault detection and classification mechanism may be advantageously applied to the electrochemical removal of underbump metallization layers during the formation of solder bump structures.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: August 9, 2011
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Kerstin Siury, Niels Rackwitz, Joern Schnapke, Frank Kuechenmeister
  • Patent number: 7988876
    Abstract: To reduce and homogenize the thickness of a semiconductor layer which lies on the surface of an electrically insulating material, the surface of the semiconductor layer is exposed to the action of an etchant whose redox potential is adjusted as a function of the material and the desired final thickness of the semiconductor layer, so that the material erosion per unit time on the surface of the semiconductor layer due to the etchant becomes less as the thickness of the semiconductor layer decreases, and is only from 0 to 10% of the thickness per second when the desired thickness is reached. The method is carried out without the action of light or the application of an external electrical voltage.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: August 2, 2011
    Assignee: Siltronic AG
    Inventors: Diego Feijoo, Oliver Riemenschneider, Reinhold Wahlich
  • Patent number: 7989348
    Abstract: A polishing method that carries out a multi-step polishing process with improved polishing conditions (polishing recipe) while omitting measurement of the surface conditions of a substrate, as carried out between polishing steps thereby increasing the throughput.
    Type: Grant
    Filed: August 23, 2006
    Date of Patent: August 2, 2011
    Assignee: Ebara Corporation
    Inventors: Kuniaki Yamaguchi, Tsuneo Torikoshi
  • Publication number: 20110180512
    Abstract: A method is provided for reformulating a chemical mechanical planarization (CMP) slurry for use in conjunction with a CMP tool having an active cycle during which the tool is being used to planarize a substrate, and a rinse cycle during which the tool is being rinsed. The method comprises (a) receiving a feed stream from the CMP tool, at least a portion of the feed stream comprising abrasive particles disposed in a liquid medium; (b) during at least a portion of the rinse cycle, sending the feedstream received from the CMP tool to a first location; and (c) during at least a portion of the active cycle, sending the feedstream received from the CMP tool to a second location where the feedstream undergoes processing to reformulate the slurry.
    Type: Application
    Filed: January 20, 2011
    Publication date: July 28, 2011
    Inventors: Shaun C. Bosar, Martin Boehm, Robert Edward Johnston
  • Patent number: 7981309
    Abstract: The spectral reflectance spectrum of an object of polishing that has reached the polishing endpoint is found ahead of time, the spectral reflectance spectrum of the object of polishing is found during polishing, and the correlation coefficient of these is seen as parameter 1. Meanwhile, the sum of the absolute values of the difference between the first order differentials of these is seen as parameter 2. Then, when parameter 1 is in a range exceeding a specific value, and parameter 2 is at its minimum, it is concluded that the polishing endpoint has been reached. Thus, it is possible to provide a method for detecting the polishing endpoint in a highly reliable CMP polishing apparatus.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: July 19, 2011
    Assignee: Nikon Corporation
    Inventors: Takehiko Ueda, Hosei Nakahira, Akira Ishikawa
  • Patent number: 7967995
    Abstract: The invention provides a method of processing a substrate using multilayer processing sequences and Multi-Layer/Multi-Input/Multi-Output (MLMIMO) models and libraries that can include one or more masking layer creation procedures, one or more pre-processing measurement procedures, one or more Partial-Etch (P-E) procedures, one or more Final-Etch (F-E) procedures, and one or more post-processing measurement procedures.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: June 28, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Merritt Funk, Radha Sundararajan, Hyung Joo Lee, Daniel Prager, Asao Yamashita
  • Patent number: 7943526
    Abstract: The present invention relates in general terms to the treatment or processing of substrate surfaces. In particular, the invention relates to processes for modifying the surface of silicon wafers.
    Type: Grant
    Filed: March 22, 2004
    Date of Patent: May 17, 2011
    Assignee: Rena Sondermaschinen GmbH
    Inventor: Franck Delahaye
  • Patent number: 7910014
    Abstract: A chemical processing bath and system used in semiconductor manufacturing utilizes a dynamic spiking model that essentially constantly monitors chemical concentration in the processing bath and adds fresh chemical on a regular basis to maintain chemical concentrations at desirable levels. Etch rates and etch selectivities are maintained at desirable levels and contamination from undesirable precipitation is avoided. The system and method automatically compare concentration levels to a plurality of control limits associated with various technologies and identify the technology or technologies that may undergo processing.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: March 22, 2011
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tai-Yung Yu, Yu-Sheng Su, Li Te Hsu, Jin Lin Liang, Shih Cheng Yeh, Pin Chia Su
  • Publication number: 20110056913
    Abstract: Methods and apparatus for isotropically etching a metal from a work piece, while recovering and reconstituting the chemical etchant are described. Various embodiments include apparatus and methods for etching where the recovered and reconstituted etchant is reused in a continuous loop recirculation scheme. Steady state conditions can be achieved where these processes are repeated over and over with occasional bleed and feed to replenish reagents and/or adjust parameters such as pH, ionic strength, salinity and the like.
    Type: Application
    Filed: August 30, 2010
    Publication date: March 10, 2011
    Inventors: Steven T. Mayer, David W. Porter
  • Patent number: 7901588
    Abstract: An etching process is employed to selectively pattern the top magnetic film layer, the tunnel barrier, and the pinned bottom magnetic layer of a magnetic thin film structure. The pinned bottom magnetic film layer has an antiferromagnetic layer or a Ru spacer formed thereunder. The etching process employs various etching steps that selectively remove various layers of the magnetic thin film structure stopping on the antiferromagnetic layer or the Ru spacer. The progress of this etching process can be monitored by measuring the electrochemical potential difference of a part or wafer containing a magnetic structure with respect to a reference electrode simultaneously with the selective etching process.
    Type: Grant
    Filed: July 16, 2007
    Date of Patent: March 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: Eugene J. O'Sullivan, Daniel Worledge
  • Patent number: 7897056
    Abstract: Disclosed are an apparatus for etching or stripping a substrate of a liquid crystal display device and a method thereof. The present invention includes carrying out an etching or stripping process on substrates using an etchant in a first etchant tank, counting a number of the substrates etched or stripped using the etchant in the first etchant tank, checking readiness of a second etchant tank at a predetermined point in time before the counted number reaches a maximum substrate number set up previously for the etchant tanks, and carrying out the etching or stripping process on the substrates using an etchant in the second etchant tank when the second etchant tank is in readiness for use and the counted number reaches the maximum substrate number.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: March 1, 2011
    Assignee: LG Display Co., Ltd.
    Inventors: Won Jae Lee, Dug Jang Lee
  • Patent number: 7883635
    Abstract: A substrate treating apparatus for treating substrates with a treating solution having a mixture of a chemical and a diluent.
    Type: Grant
    Filed: March 11, 2009
    Date of Patent: February 8, 2011
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventor: Hiroaki Takahashi