With Measuring, Testing, Or Inspecting Patents (Class 216/84)
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Patent number: 7879251Abstract: A thin film removing device and a thin film removing method are capable of removing straight parts of a thin film formed on a square substrate from corners of the substrate, and of suppressing the formation of mists. An approach stage 20 having flat stage plates 23 capable of being disposed substantially flush with the surface of a substrate M mounted on a support table 22 is positioned close to the substrate M mounted on the support table 22. Removing nozzles 30 jet a solvent toward edge parts of the substrate M and suck a solution produced by dissolving part of the resist in the solvent while the removing nozzles 30 are moved along side edges of the substrate M and the approach stage 20 disposed close to the substrate M. Thus, the removing nozzles 30 jet the solvent uniformly over the edge parts and corners of the substrate M and suck the solution without changing modes of jetting the solvent and sucking the solution.Type: GrantFiled: October 26, 2007Date of Patent: February 1, 2011Assignee: Tokyo Electron LimitedInventors: Shinji Kobayashi, Norihisa Koga
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Patent number: 7875198Abstract: A method of deriving etching correction values for the patterns of a photomask and a method of fabricating a photomask are described. The former method includes the following steps. The layout data of the photomask are provided, and local etching correction values of respective patterns are determined from the pattern configurations at respective areas of the photomask. A global etching correction value is determined from a wafer coverage ratio calculated mainly from the layout data. The local etching correction values of the respective patterns are added with the global etching correction value to obtain total etching correction values of the respective patterns. In the method of fabricating a photomask, the layout data are subjected to an etching correction based on the total etching correction values of the respective patterns and then to an optical proximity correction, and the photomask patterns are formed based on the resulting layout data.Type: GrantFiled: November 6, 2006Date of Patent: January 25, 2011Assignee: MACRONIX International Co., Ltd.Inventors: Chao-Lung Lo, Sunwook Jung
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Patent number: 7871249Abstract: Methods and systems for chemical management. In one embodiment, a blender is coupled to a processing system and configured to supply an appropriate solution or solutions to the system. Solutions provided by the blender are then reclaimed from the system and subsequently reintroduced for reuse. The blender may be operated to control the concentrations of various constituents in the solution prior to the solution being reintroduced to the system for reuse. Some chemicals introduced to the system may be temperature controlled. A back end vacuum pump subsystem separates gases from liquids as part of a waste management system.Type: GrantFiled: October 12, 2006Date of Patent: January 18, 2011Assignees: Air Liquide Electronics U.S. LP, Air Liquide Electronics Systems SAInventors: Karl J. Urquhart, Georges Guarneri, Jean-Louis Marc, Norbert Fanjat, Laurent Langellier, Christophe Colin
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Patent number: 7842189Abstract: A processing apparatus includes counters each used to measure the length of RF discharge time over which power is applied to a consumable component in correspondence to a specific type of processing executed in a processing chamber, a storage to store wear coefficient information indicating wear coefficients each corresponding to one of the plurality of types of processing, and a control unit that obtains information indicating RF discharge time lengths measured by the counters in correspondence to the individual types of processing, obtains the wear coefficients corresponding to the individual types of processing indicated in the wear coefficient information stored in the storage, calculates a wear index value for the consumable component based upon the RF discharge time lengths and the wear coefficients corresponding to the individual types of processing, and executes consumable component management processing based upon the calculated wear index value.Type: GrantFiled: January 19, 2006Date of Patent: November 30, 2010Assignee: Tokyo Electron LimitedInventor: Ryotaro Midorikawa
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Patent number: 7829406Abstract: Disclosed is a method of manufacturing a semiconductor device, which includes forming an insulating film above a semiconductor substrate having a recess and stopper film formed above the semiconductor substrate excluding the recess, thereby filling the recess with the insulating film, performing a first polishing by polishing the insulating film by means of a chemical mechanical polishing method using a first polishing liquid containing cerium oxide and first anionic surfactant, thereby obtaining a flattened surface, and performing a second polishing by polishing the flattened insulating film using a second polishing liquid containing cerium oxide and a second anionic surfactant having a smaller molecular weight than that of the first anionic surfactant under a polishing condition which differs from that of the first polishing, thereby exposing the stopper film.Type: GrantFiled: September 11, 2008Date of Patent: November 9, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Shunsuke Doi, Yukiteru Matsui
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Publication number: 20100258530Abstract: A substrate processor enables realization of a proper process by combining advantages of a remote plasma and a plasma generated in an entire processing chamber. The substrate processor includes a conductive member (10) which is installed surrounding a processing space (1) and grounded to the earth and a pair of electrodes (4) installed inside the conductive member (10). A primary coil of an insulating transformer (7) is connected to a high-frequency power supply unit (14) and a secondary coil is connected to the electrodes (4). A switch (13) is connected to the connection line connecting the secondary coil to the electrodes (4). By setting up/cutting off the connection of the line to the earth with use of the switch (13), the region where the plasma is generated in the processing space (1) can be changed.Type: ApplicationFiled: June 22, 2010Publication date: October 14, 2010Inventors: Kazuyuki TOYODA, Nobuhito Shima, Nobuo Ishimaru, Yoshikazu Konno, Motonari Takebayashi, Takaaki Noda, Norikazu Mizuno
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Publication number: 20100233510Abstract: Refurbishing used or damaged engineering components is performed using a subtractive surface engineering process to remove material from worn or damaged critical surfaces. The method involves initially performing the process on the component to remove a first quantity of material from the surfaces, inspecting the surface of the component to determine the extent of damage and subsequently further performing the process to remove a further quantity of material if necessary.Type: ApplicationFiled: August 28, 2008Publication date: September 16, 2010Inventors: Gary Sroka, Lane W. Winkelmann, Mark D. Michaud
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Patent number: 7764377Abstract: Methods and apparatus for spectrum-based endpointing. An endpointing method includes selecting a reference spectrum. The reference spectrum is a spectrum of white light reflected from a film of interest on a first substrate and has a thickness greater than a target thickness. The reference spectrum is empirically selected for particular spectrum-based endpoint determination logic so that the target thickness is achieved when endpoint is called by applying the particular spectrum-based endpoint logic. The method includes obtaining a current spectrum. The current spectrum is a spectrum of white light reflected from a film of interest on a second substrate when the film of interest is being subjected to a polishing step and has a current thickness that is greater than the target thickness. The method includes determining, for the second substrate, when an endpoint of the polishing step has been achieved. The determining is based on the reference and current spectra.Type: GrantFiled: August 26, 2005Date of Patent: July 27, 2010Assignee: Applied Materials, Inc.Inventors: Dominic J. Benvegnu, Jeffrey Drue David, Bogdan Swedek
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Patent number: 7731861Abstract: A liquid drop discharge head includes a chip 21 that is formed by separation of a silicon wafer 20. The silicon wafer 20 has a first direction and a second direction which are mutually intersected. The chip 21 is separated from the silicon wafer 20 by etching the wafer along a separation line 22 parallel to the first direction of the wafer and by dicing the wafer 20 along a separation line 23 parallel to the second direction of the wafer.Type: GrantFiled: June 19, 2006Date of Patent: June 8, 2010Assignee: Ricoh Company, Ltd.Inventors: Kenichiroh Hashimoto, Tadashi Mimura
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Publication number: 20100102032Abstract: The invention relates to an installation for marking, at the exit of a forming machine (3), transparent or translucent objects running horizontally, in succession, in front of a marking station (7) that comprises a device (9) for producing a laser beam to ensure marking of the objects. According to the invention, the installation comprises:—means (13) for determining the position of each of the objects along at least one direction transverse to the running direction (D) of the objects, these means (13) being placed upstream of the marking station relative to the running direction,—means for displacement of the focusing plane of the laser beam, along a transverse direction relative to the running direction (D),—means (21) for driving the displacement means, connected to the determining means (13), and that make it possible to adjust, as a function of the position of each object to be marked, the focusing plane of the laser beam in order to optimize the marking of the objects by the laser beam.Type: ApplicationFiled: October 18, 2007Publication date: April 29, 2010Inventor: Guillaume Bathelet
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Patent number: 7700488Abstract: A wafer processing method. The method includes providing a semiconductor wafer. The semiconductor wafer includes (i) a semiconductor layer and (ii) a dopant layer on top of the semiconductor layer. The dopant layer comprises dopants. The method further includes removing the dopant layer from the semiconductor wafer. No chemical etching is performed on the dopant layer before said removing the dopant layer is performed.Type: GrantFiled: January 16, 2007Date of Patent: April 20, 2010Assignee: International Business Machines CorporationInventors: Steven Ross Codding, Joseph R. Greco, Timothy Charles Krywanczyk
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Patent number: 7691279Abstract: A method of producing a glass substrate for a mask blank has the steps of measuring a convex/concave profile of a surface of the glass substrate, controlling a flatness of the surface of the glass substrate to a value not greater than a predetermined reference value by specifying the degree of convexity of a convex portion present on the surface of the glass substrate with reference to a result of measurement obtained in the profile measuring step and executing local machining upon the convex portion under a machining condition depending upon the degree of convexity, and polishing, after the flatness control step, the surface of the glass substrate subjected to the local machining. The surface of the glass substrate subjected to the local machining is subjected to acid treatment after the flatness control step and before the polishing step.Type: GrantFiled: March 26, 2004Date of Patent: April 6, 2010Assignee: Hoya CorporationInventor: Kesahiro Koike
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Patent number: 7686973Abstract: A wafer etching and impurity analysis method is presented in which a wafer is held in a vessel having gas introduction and exhaust ports, a solution including a mixture of hydrofluoric acid and nitric acid alone or together with sulfuric acid is bubbled with a carrier gas without being heated, which generates a gas containing vaporized hydrofluoric acid and nitric acid, and the inside of the vessel is purged so that the amount of gas supplied is kept constant at all times. All or a specific portion of the wafer is cooled to a specific temperature. Consequently, the gas is condensed on the surface of the wafer, which allows the required portion of the wafer to be etched. The method reduces the amount of liquid needed for residue recovery, the amount of admixed silicon during impurity analysis, and the concentration time.Type: GrantFiled: April 24, 2007Date of Patent: March 30, 2010Assignee: Sumitomo Mitsubishi Silicon CorporationInventors: Katsuya Hirano, Hiroshi Horie
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Patent number: 7678288Abstract: A method of manufacturing bonded substrate structures. The method includes providing a first substrate comprising a first surface region and processing the first surface region to form a first pattern region using a first photolithographic stepper characterized by a first tolerance criteria for alignment. The method also includes providing a second substrate comprising a second surface region and processing the second surface region through at least one masking process to form a second pattern region using a second photolithographic stepper characterized by a second tolerance criteria for alignment.Type: GrantFiled: December 3, 2004Date of Patent: March 16, 2010Assignee: Miradia Inc.Inventors: Xiao Yang, Kegang Huang, Yuxiang Wang, Howard Woo
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Patent number: 7678289Abstract: A method of indicating the progress of a sacrificial material removal process, the method, comprising; freeing a portion of a member, the member being disposed in a cage and laterally surrounded by the sacrificial material; and preventing the freed portion of the member from floating away by retaining the freed member.Type: GrantFiled: March 11, 2008Date of Patent: March 16, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventors: Stephen Jalrus Potochnik, Kenneth James Faase
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Patent number: 7638263Abstract: An overlay accuracy measurement vernier and a method of forming the same. According to one embodiment, the method of forming the overlay accuracy measurement vernier includes the steps of forming a first vernier pattern in a predetermined region on a semiconductor substrate; etching the semiconductor substrate using the first vernier pattern as a mask, forming a trench of a first depth; forming a second vernier pattern having a width wider than that of the first vernier pattern, the second vernier pattern including the first vernier pattern; performing an etch process using the second vernier pattern as a mask, thus forming a trench of a second depth, which has a step of a predetermined width; stripping the first and second vernier patterns and then forming an insulating film to bury the trench; and, etching the insulating film so that the semiconductor substrate of the vernier region is exposed.Type: GrantFiled: June 30, 2006Date of Patent: December 29, 2009Assignee: Hynix Semiconductor Inc.Inventor: Guee Hwang Sim
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Publication number: 20090302000Abstract: A pattern forming method according to an embodiment of the present invention includes forming, on a substrate, a base pattern having a space part, adjusting a width of the space part to make a bottom width of the space part closer to an upper width of the space part, and forming a modified base pattern having a space part whose bottom width is smaller than the bottom width of the space part of the base pattern, by a process of forming a deposition film on the substrate and the base pattern, and a process of removing the deposition film from a bottom of the space part of the base pattern.Type: ApplicationFiled: June 4, 2009Publication date: December 10, 2009Inventor: Shinichi ITO
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Patent number: 7629259Abstract: A method for aligning a reticle is provided. A first patterned layer with a first alignment grid is formed. Sidewall layers are formed over the first patterned layer to perform a first shrink. The first alignment grid after shrink is etched into an etch layer to form an etched first alignment grid. The patterned layer is removed. An optical pattern of a second alignment grid aligned over the etched first alignment grid is measured. The optical pattern is used to determine whether the second alignment grid is aligned over the etched first alignment grid.Type: GrantFiled: June 21, 2005Date of Patent: December 8, 2009Assignee: Lam Research CorporationInventor: S. M. Reza Sadjadi
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Publication number: 20090294405Abstract: A method of producing an oscillator includes a first step, a second step and a third step. In the first step, an oscillator is formed in a substrate immersed in an etchant, by wet etching. In the second step, the wet etching is stopped. In the third step, the oscillation of the oscillator in the etchant is excited, and the oscillating condition of the excited oscillator relevant to a target frequency of the oscillator is detected. The third step is performed at least once prior to the second step.Type: ApplicationFiled: May 29, 2009Publication date: December 3, 2009Applicant: CANON KABUSHIKI KAISHAInventor: Toshiyuki Ogawa
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Patent number: 7625495Abstract: Methods and devices for mechanical and/or chemical-mechanical planarization of semiconductor wafers, field emission displays and other microelectronic substrate assemblies. One method of planarizing a microelectronic substrate assembly in accordance with the invention includes pressing a substrate assembly against a planarizing surface of a polishing pad at a pad/substrate interface defined by a surface area of the substrate assembly contacting the planarizing surface. The method continues by moving the substrate assembly and/or the polishing pad with respect to the other to rub at least one of the substrate assembly and the planarizing surface against the other at a relative velocity. As the substrate assembly and polishing pad rub against each other, a parameter indicative of drag force between the substrate assembly and the polishing pad is measured or sensed at periodic intervals.Type: GrantFiled: January 27, 2006Date of Patent: December 1, 2009Assignee: Micron Technology, Inc.Inventors: Jim Hofmann, Gundu M. Sabde, Stephen J. Kramer, Scott E. Moore
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Publication number: 20090277875Abstract: A method known in prior art for determining the occupation of the surface of a silica glass component with impurities comprises taking a sample, a process in which at least some of the surface of the silica glass component is brought in contact with an acidic desorption solution, and surface impurities that are to be analyzed are accumulated therein and are subjected to an element-specific analysis. The aim of the invention is to create a method which is based on said method, allows the occupation of the surface of silica glass components to be determined accurately and reproducibly, and is suited for determining small amounts of impurities within the order of magnitude of 1010 atoms/cm2 also directly in situ. Said aim is achieved by the fact that taking the sample encompasses contacting the component surface with an acidic desorption solution containing water, nitric acid, and hydrofluoric acid, the nitric acid concentration in the desorption solution amounting to 1.Type: ApplicationFiled: December 12, 2006Publication date: November 12, 2009Applicant: HERAEUS QUARZGLAS GMBH & CO.KGInventors: Karl-Heinz Wiedemann, Juergen Weber
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Patent number: 7608547Abstract: Provided are an etchant used for a transparent conductive oxide layer and a method for fabricating a liquid crystal display (LCD) using the etchant. The etchant includes 2-5 wt % sulfuric acid, 0.02-10 wt % hydrogen sulfate of alkali metal, and deionized water as the remainder.Type: GrantFiled: July 13, 2006Date of Patent: October 27, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Hong-sick Park, Shi-yul Kim, Jong-hyun Choung, Won-suk Shin
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Patent number: 7578889Abstract: Systematic and effective methodology to clean capacitively coupled plasma reactor electrodes and reduce surface roughness so that the cleaned electrodes meet surface contamination specifications and manufacturing yields are enhanced. Pre-cleaning of tools used in the cleaning process helps prevent contamination of the electrode being cleaned.Type: GrantFiled: March 30, 2007Date of Patent: August 25, 2009Assignee: Lam Research CorporationInventors: Hong Shih, Yaobo Yin, Shun Jackson Wu, Armen Avoyan, John E. Daugherty, Linda Jiang
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Publication number: 20090166331Abstract: A method for manufacturing a current perpendicular to plane magnetoresistive sensor that allows for dynamic adjustment of free layer biasing to compensate for variations in thickness of an electrically insulating layer that separates the hard bias layers from the free layer. During fabrication of the sensor, the actual thickness of the insulation layers is measured. Then, to maintain a desired magnetic stabilization of the free layer one of three options can be utilized. Option one; adjust the stripe height target to maintain the desired magnetic stabilization. Option two; adjust the hard magnet thickness to maintain the desired magnetic stabilization. Option three; use a combination of option one and option two, adjusting both the stripe height target and the hard magnet thickness to maintain the desired magnetic stabilization.Type: ApplicationFiled: December 28, 2007Publication date: July 2, 2009Inventor: Arley Cleveland Marley
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Patent number: 7540800Abstract: A rough-polishing method for conducting a rough polishing before mirror-finish polishing on a semiconductor wafer (W) using a polishing apparatus (1) includes a first polishing step for polishing the semiconductor wafer using slurry containing colloidal silica supplied by a slurry supplying unit (4) and a second polishing step for polishing the semiconductor wafer using alkali solution provided by mixing deionized water supplied from a deionized-water supplying unit (5) and alkali concentrate solution supplied by an alkali-concentrate-solution supplying unit (6). The pH value of the alkali solution and polishing time in the second polishing step are determined based on the load current value of the polishing table (2) in the first polishing step.Type: GrantFiled: September 28, 2007Date of Patent: June 2, 2009Assignee: Sumco Techxiv CorporationInventors: Kazuaki Kozasa, Tomonori Kawasaki, Kosuke Miyoshi
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Publication number: 20090101626Abstract: An etching method. The method includes etching a first plurality of silicon wafers in a first enchant, each silicon wafer having SiO2 and Si3N4 deposited thereon, where the etching includes dissolving a quantity of the SiO2 and a quantity of the Si3N4 in the first echant. A quantity of insoluble SiO2 precipitates. A ratio of a first etch rate of Si3N4 to a first etch rate of SiO2 is determined to be less than a predetermined threshold. A portion of the first etchant is combined with a second etchant to form a conditioned etchant. A second plurality of silicon wafers is etched in the conditioned etchant. A ratio of a second etch rate of Si3N4 to a second etch rate of SiO2 in the conditioned etchant is greater than the threshold. A method for exchanging an etching bath solution and a method for forming a selective etchant are also disclosed.Type: ApplicationFiled: October 19, 2007Publication date: April 23, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Russell Herbert Arndt, Paul F. Findeis, Charles Jesse Taft
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Patent number: 7517469Abstract: Systems, devices and methods of measuring a flow of a liquid stream for a semiconductor process are provided. The liquid stream is delivered through a liquid delivery nozzle. The nozzle is adapted to deliver the liquid stream for the semiconductor process. The free stream extends from an upstream location near the nozzle to a downstream location. The stream is marked at the upstream location and measured at the downstream location to determine the flow.Type: GrantFiled: April 28, 2006Date of Patent: April 14, 2009Assignee: Sokudo Co., Ltd.Inventors: Harald Herchen, Erica Porras, Tetsuya Ishikawa
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Publication number: 20090084759Abstract: A method and system of location specific processing on a substrate is described. The method comprises acquiring metrology data for a substrate, and computing correction data for adjusting a first region of the metrology data on the substrate. Thereafter, a first gas cluster ion beam (GCIB) for treating the high gradient regions is established, and the first GCIB is applied to the substrate according to the correction data. The method further comprises optionally acquiring second metrology data following the applying of the first GCIB, and computing second correction data for adjusting a second region of the metrology data, or the second metrology data, or both on the substrate. Thereafter, a second gas cluster ion beam (GCIB) for treating the second region is established, and the second GCIB is applied to the substrate according to the second correction data.Type: ApplicationFiled: September 28, 2007Publication date: April 2, 2009Applicant: TEL Epion Inc.Inventors: Ruairidh MacCRIMMON, Nicolaus J. Hofmeester, Steven P. Caliendo
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Patent number: 7491342Abstract: The present invention provides a bonded substrate fabricated to have its final active layer thickness of 200 nm or lower by performing the etching by only 1 nm to 1 ?m with a solution having an etching effect on a surface of an active layer of a bonded substrate which has been prepared by bonding two substrates after one of them having been ion-implanted and then cleaving off a portion thereof by heat treatment. SC-1 solution is used for performing the etching. A polishing, a hydrogen annealing and a sacrificial oxidation may be respectively applied to the active layer before and/or after the etching. The film thickness of this active layer can be made uniform over the entire surface area and the surface roughness of the active layer can be reduced as well.Type: GrantFiled: April 2, 2004Date of Patent: February 17, 2009Assignees: Sumco Corporation, Industry-University Cooperation Foundation, Hanyang UniversityInventors: Eiji Kamiyama, Takeo Katoh, Jea Gun Park
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Publication number: 20090026172Abstract: In the dry etching method and dry etching apparatus relating to the present invention, high frequency electric power is applied to upper and lower electrodes from high frequency power sources to generate plasma and etch an object on the electrode in a vacuum chamber into which a process gas is introduced via a gas inlet and the interior of which is maintained for a specific pressure by an exhaust unit. An etching rate estimation equation is created using apparatus parameters including an emission intensity ratio obtained by dividing an emission intensity of a plasma emission wavelength by an emission intensity of an inert gas. An estimated etching rate is calculated using the etching rate estimation equation. An estimated etching time to achieve a proper etching quantity is calculated based on the estimated etching rate and used for the control, reducing the production variation of fine devices.Type: ApplicationFiled: July 25, 2008Publication date: January 29, 2009Inventors: Masaki KITABATA, Shin-ichi Imai
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Patent number: 7481945Abstract: During the polishing of a wafer 2, the wafer 2 is illuminated with measuring light emitted from a light source 21, and the spectroscopic intensity of the reflected light is detected by a linear sensor 31. The signal processing part 11 monitors the polishing state of the wafer 2 on the basis of detection signals from the sensor 31, and detects the polishing endpoint of the wafer 2. The shutter mechanism control part 14 controls the motor 13b of the shutter mechanism 13 in response to the polishing endpoint detection signal from the signal processing part 11, and causes a light blocking member 13a to advance into the light path of the measuring light, so that the measuring light is blocked with respect to the wafer 2. As a result, the effect of the measuring light used for the monitoring of the polishing state on the object of polishing can be reduced.Type: GrantFiled: November 7, 2001Date of Patent: January 27, 2009Assignee: Nikon CorporationInventor: Eiji Matsukawa
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Publication number: 20080308530Abstract: A substrate treating apparatus for heating a treating solution formed of a chemical and a diluent, and immersing substrates in the treating solution for treatment.Type: ApplicationFiled: August 19, 2008Publication date: December 18, 2008Inventor: Takashi Izuta
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Publication number: 20080302762Abstract: A disclosed method of analyzing a quartz member includes steps of supplying an etchant to an etchant receiving portion formed concavely in the quartz member so as to etch the quartz member; and analyzing the etchant used in the supplying step.Type: ApplicationFiled: May 28, 2007Publication date: December 11, 2008Applicant: TOKYO ELECTRON LIMITEDInventors: Kazuya Dobashi, Teruyuki Hayashi, Kohei Tsugita, Misako Saito
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Publication number: 20080264905Abstract: Methods and systems for measuring a characteristic of a substrate or preparing a substrate for analysis are provided. One method for measuring a characteristic of a substrate includes removing a portion of a feature on the substrate using an electron beam to expose a cross-sectional profile of a remaining portion of the feature. The feature may be a photoresist feature. The method also includes measuring a characteristic of the cross-sectional profile. A method for preparing a substrate for analysis includes removing a portion of a material on the substrate proximate to a defect using chemical etching in combination with an electron beam. The defect may be a subsurface defect or a partially subsurface defect. Another method for preparing a substrate for analysis includes removing a portion of a material on a substrate proximate to a defect using chemical etching in combination with an electron beam and a light beam.Type: ApplicationFiled: April 28, 2008Publication date: October 30, 2008Inventors: Mehran Nasser-Ghodsi, Mark Borowicz, Dave Bakker, Mehdi Vaez-Iravani, Prashant Aji, Rudy F. Garcia, Tzu Chin Chuang
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Patent number: 7435355Abstract: A liquid-based gravity-driven etching-stop technique for controlling structure dimension is provided, where opposite etching trenches in cooperation with an etching-stop solution are used for controlling the dimension of a microstructure on the wafer level. In an embodiment, opposite trenches surrounding the microstructure are respectively etched on sides of the wafer, and the trench depth on the side of the wafer, on which the microstructure is, is equal to the design dimension of the microstructure. Contrarily, it is unnecessary to define the trench depth on the back-side of the chip. In the final step of the fabrication process, when the device is etched, such that the trenches on the sides communicate with each other to separate the microstructure from the whole wafer automatically and thereby shift from the etchant into the etching-stop solution to stop etching.Type: GrantFiled: October 5, 2005Date of Patent: October 14, 2008Assignee: Industrial Technology Research InstituteInventors: Wei-Chin Lin, Hui-Ling Chang, Ching-Hsiang Tsai, Chao-Chiun Liang, Gen-Wen Hsieh, Yuh-Wen Lee
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Publication number: 20080179293Abstract: A method and system for controlling a silicon nitride etching bath provides the etching bath including phosphoric acid heated to an elevated temperature. The concentration of silicon in the phosphoric acid is controlled to maintain a desired level associated with a desired silicon nitride/silicon oxide etch selectivity. Silicon concentration is measured while the silicon remains in soluble form and prior to silica precipitation. Responsive to the measuring, fresh heated phosphoric acid is added to the etching bath when necessary to maintain the desired concentration and silicon nitride:silicon oxide etch selectivity and prevent silica precipitation. The addition of fresh heated phosphoric acid enables the etching bath to remain at a steady state temperature. Atomic absorption spectroscopy may be used to monitor the silicon concentration which may be obtained by diluting a sample of phosphoric acid with cold deionized water and measuring before silica precipitation occurs.Type: ApplicationFiled: January 25, 2007Publication date: July 31, 2008Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Zin-Chang Wei, Tsung-Min Huang, Ming-Tsao Chiang, Cheng-Chen Calvin Hsueh
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Patent number: 7395611Abstract: A system and method of moving a meniscus from a first surface to a second surface includes forming a meniscus between a head and a first surface. The meniscus can be moved from the first surface to an adjacent second surface, the adjacent second surface being parallel to the first surface. The system and method of moving the meniscus can also be used to move the meniscus along an edge of a substrate.Type: GrantFiled: September 21, 2006Date of Patent: July 8, 2008Assignee: Lam Research CorporationInventors: James P. Garcia, John M. de Larios, Michael Ravkin, Fred C. Redeker, Carl Woods
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Publication number: 20080156773Abstract: To provide an end point detection method applying a resonance phenomenon, an end point detection apparatus, and a chemical mechanical polishing apparatus on which the detection apparatus is loaded for monitoring variation in the thickness of an electrically conductive film in real time, reliably detecting a polishing end point of the electrically conductive film at high accuracy, without generating noise, low power consumption, and capable of reducing the cost.Type: ApplicationFiled: September 27, 2007Publication date: July 3, 2008Inventors: Keita Kitade, Osamu Matsushita, Takashi Fujita, Toshiyuki Yokoyama
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Patent number: 7393790Abstract: A method is disclosed for preparing carrier wafers for semiconductor device manufacture. The method includes the steps of sorting a plurality of standard carrier wafer blanks into batches by thickness to define a batch of starting carrier wafers that are within a predetermined tolerance of one another, reducing the thickness of the sorted carrier wafers to within 10 microns of a final target thickness, and polishing the sorted carrier wafers to the final target thickness. The polished carrier wafers are mounted to device precursor wafers having at least one semiconductor epitaxial layer on a substrate by joining one surface of a carrier wafer to the epitaxial layer on a substrate. The thickness of the device precursor wafer is then reduced by removing material from the device precursor substrate opposite the joined epitaxial layer.Type: GrantFiled: September 9, 2005Date of Patent: July 1, 2008Assignee: Cree, Inc.Inventors: Jeffrey Carl Britt, Michael Paul Laughner, Craig William Hardin
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Patent number: 7384569Abstract: Disclosed are photolithographic systems and methods, and more particularly systems and methodologies that enhance imprint mask feature resolution. An aspect generates feedback information that facilitates control of imprint mask feature size and resolution via employing a scatterometry system to detect resolution enhancement need, and decreasing imprint mask feature size and increasing resolution of the imprint mask via a trim etch procedure.Type: GrantFiled: August 2, 2004Date of Patent: June 10, 2008Assignee: Advanced Micro Devices, Inc.Inventors: Srikanteswara Dakshina-Murthy, Bhanwar Singh, Ramkumar Subramanian
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Patent number: 7371686Abstract: A method and an apparatus for polishing a semiconductor wafer are provided. An initial thickness of the semiconductor wafer is actually measured to obtain a measured initial thickness value. First and second inter-positions are then set or determined with reference to the measured initial thickness value. The first and second inter-positions are predetermined taking into account any variation in the initial thickness of the semiconductor wafer. A polishing process is carried out under control to a motion of a polishing pad toward a stage, on which the semiconductor pad is held.Type: GrantFiled: June 14, 2005Date of Patent: May 13, 2008Assignee: Oki Electric Industry Co., Ltd.Inventor: Kentarou Arai
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Publication number: 20080099443Abstract: A polishing system receives one or more target parameters for a selected peak in a spectrum of light, polishes a substrate, measures a current spectrum of light reflected from the substrate while the substrate is being polished, identifies the selected peak in the current spectrum, measures one or more current parameters of the selected peak in the current spectrum, compares the current parameters of the selected peak to the target parameters, and ceases to polish the substrate when the current parameters and the target parameters have a pre defined relationship.Type: ApplicationFiled: October 31, 2006Publication date: May 1, 2008Inventors: Dominic J. Benvegnu, Bogdan Swedek, David J. Lischka
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Patent number: 7361286Abstract: A method of detecting an etching end-point includes the steps of: forming a mask on a pattern area of an etching object; forming an etching indicator on an etching area of the etching object, which is not covered by the mask; etching the etching object using the mask; and evaluating the size of a remaining object covered by the mask using the etching indicator.Type: GrantFiled: September 8, 2005Date of Patent: April 22, 2008Assignee: Samsung Electronics Co., Ltd.Inventors: Young-Hyun Kim, Yu-Dong Bae, Jung-Kee Lee, In Kim
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Patent number: 7361600Abstract: According to the present invention, a chemical and mechanical polishing apparatus (100) for a sample such as a wafer includes a built-in inspection apparatus (25) incorporated therein. The polishing apparatus (100) further comprises a load unit (21), a chemical and mechanical polishing unit (22), a cleaning unit (23), a drying unit (24) and an unload unit (26). The chemical and mechanical polishing apparatus (100) receives a sample from a preceding step (107), carries out respective processes for the sample by said respective units disposed within the polishing apparatus (100) and then transfers the processed sample to a subsequent step (109). Sample loading and unloading means and a sample transfer means are no more necessary for transferring the sample between respective units.Type: GrantFiled: November 1, 2002Date of Patent: April 22, 2008Assignee: Ebara CorporationInventors: Tohru Satake, Nobuharu Noji
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Patent number: 7354733Abstract: We disclose methods of sorting or separating mixtures of living cells (e.g., eukaryotic, prokaryotic, mammalian, pathogenic, bacterial, viral, etc.). We perform our methods by activating cell-selective photophoric labels, which photosensitize and chemically reduce a photosensitive metal compound to form metal grains, particles or crystals. The metal adheres to the cells and forms the basis for sorting or separating different cell types. Photophoric labels may include chemiluminescent agents such as peroxidase enzymes activated with peroxidase substrates capable of luminescence. Photosensitive metal compounds may be present in a light-sensitive matrix or emulsion containing photosensitizable metal compounds, which form metal grains, particles or crystals upon exposure to a developer solution. Developer solutions are formulated to substantially allow living cells to remain viable after exposure to the developing solution.Type: GrantFiled: March 26, 2002Date of Patent: April 8, 2008Assignee: Cellect Technologies Corp.Inventors: Shmuel Bukshpan, Gleb Zilberstein
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Patent number: 7340372Abstract: In order to determine the dielectric constant of a layer deposited on a semiconductor wafer (2), the density of the layer is obtained. To obtain that density, the wafer (2) without the layer is weighed in a weighing chamber (4) in which a weighing pan (7) supports the wafer on a weighing balance. The weight of the wafer is determined taking into account the buoyancy exerted by the air on the wafer (2). Then the layer is deposited on the wafer (2) and the weighing operation repeated. Alternatively a reference wafer may be used. If the material of the layer is known, the weight of the layer can be used to derive its density using a thickness measurement. Alternatively, if the density is known, the thickness can be obtained.Type: GrantFiled: November 21, 2005Date of Patent: March 4, 2008Assignee: Metryx LimitedInventor: Robert John Wilby
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Publication number: 20080035610Abstract: The substrate processing apparatus includes a first etching mode and a second etching mode. In the first etching mode, a first nozzle is positioned at a first processing position and a chemical solution is supplied from the first nozzle to a top rim portion of the rotating substrate. In the second etching mode, a second nozzle is positioned at a second processing position and DIW is supplied to the top rim portion to which the chemical solution adheres, while the chemical solution is supplied from the first nozzle positioned at the first processing position to the top rim portion of the rotating substrate. The etching mode is selectively switched between the two etching modes in accordance with a property of the thin film adhering to the substrate.Type: ApplicationFiled: July 6, 2007Publication date: February 14, 2008Inventors: Katsuhiko MIYA, Akira IZUMI
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Publication number: 20080035609Abstract: A system (FIG. 5) and methods for selectively etching silicon nitride in the presence of silicon oxide that provide high selectivity while stabilizing silicon oxide etch rates. The invention comprises a processing chamber (10), dispense lines (20, 21, 22), feed lines (30, 31, 32), a recirculation line (40), a process controller (200), a concentration sensor (50), a particle counter (55), and a bleed line (90). The invention dynamically controls the concentration ratio of the components of the etchant being used and/or dynamically controls the particle count within the etchant during the processing of the at least one substrate. As a result etchant bath life is increased and etching process parameters are more tightly controlled.Type: ApplicationFiled: December 30, 2004Publication date: February 14, 2008Inventors: Ismail Kashkoush, Gim-Syang Chen, Richard Novak
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Patent number: 7312154Abstract: A method of polishing a semiconductor layer formed on a transparent substrate is described, the method including measuring the thickness of the semiconductor from the substrate side of the semiconductor layer simultaneously with the polishing, and using the thickness measurement to modify the polishing.Type: GrantFiled: December 20, 2005Date of Patent: December 25, 2007Assignee: Corning IncorporatedInventors: Jeffrey Scott Cites, Charles Michael Darcangelo, Steven Joseph Gregorski, Richard Orr Maschmeyer, Mark Andrew Stocker, John Christopher Thomas
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Publication number: 20070272146Abstract: An apparatus for measuring ejection uniformity of a slit nozzle comprises a liquid distributor that distributes liquid for each predetermined interval with respect to a widthwise direction of the slit nozzle, the liquid being ejected from the slit nozzle; and a liquid measuring unit that measures an amount of liquid distributed by the liquid distributor.Type: ApplicationFiled: May 17, 2007Publication date: November 29, 2007Applicant: K.C. TECH CO., LTD.Inventor: Kang Il Cho