Simultaneous Bonding Of Multiple Joints (e.g., Dip Soldering Of Printed Circuit Boards) Patents (Class 228/180.1)
  • Patent number: 10446479
    Abstract: A semiconductor device has a substrate. A plurality of conductive vias is formed through the substrate. A conductive layer is formed over the substrate. An insulating layer is formed over conductive layer. A portion of the substrate is removed to expose the conductive vias. A plurality of vertical interconnect structures is formed over the substrate. A first semiconductor die is disposed over the substrate. A height of the vertical interconnect structures is less than a height of the first semiconductor die. An encapsulant is deposited over the first semiconductor die and the vertical interconnect structures. A first portion of the encapsulant is removed from over the first semiconductor die while leaving a second portion of the encapsulant over the vertical interconnect structures. The second portion of the encapsulant is removed to expose the vertical interconnect structures. A second semiconductor die is disposed over the first semiconductor die.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: October 15, 2019
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Pandi C. Marimuthu, Yaojian Lin, Kang Chen, Yu Gu, Won Kyoung Choi
  • Patent number: 10440831
    Abstract: A conductive pattern formation method includes: a step of patterning a base member with an ink in which conductive particulates are distributed to form a pattern; a step of making a conductive developer act on the pattern; and a pressurization step of pressurizing the pattern.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: October 8, 2019
    Assignee: KONICA MINOLTA, INC.
    Inventors: Dai Suwama, Sayaka Morita, Keita Saito, Midori Shimomura
  • Patent number: 10365142
    Abstract: An environment sensor arranged in a measuring chamber disposed in a circuit board receiving portion does not affect a flow of air through a bypass passage, and thus does not affect detection accuracy of a flow rate detection element arranged in the bypass passage. A recessed portion is disposed in a side surface of a base parallel to a flow direction A of intake air passing through a main passage and a communication port of the measuring chamber is disposed in the recessed portion, and thus the measuring chamber is unlikely to be infiltrated by fouling substances, water droplets, and the like contained in the intake air. The communication port has a small length dimension L, and thus an environment parameter of the intake air is likely to propagate to the measuring chamber and high levels of detection response, detection accuracy, and reliability are ensured for the environment sensor.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: July 30, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Naoyuki Kishikawa, Yuji Ariyoshi, Masahiro Kawai, Shinichiro Hidaka, Kazuto Akagi
  • Patent number: 10290512
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a semiconductor substrate and a first conductive bump. The semiconductor substrate has an integrated circuit and an interconnection metal layer, and a tilt surface is formed on an edge of the semiconductor substrate. The first conductive bump is electrically connected to the integrated circuit via the interconnection metal layer, and is disposed on the tilt surface, wherein a profile of the first conductive bump extends beyond a side surface of the edge of the semiconductor layer.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: May 14, 2019
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Po-Chun Lin, Chin-Lung Chu
  • Patent number: 10249970
    Abstract: A memory device is provided. The memory device includes a substrate, a first interface connector, a second interface connector and a plurality of memory chips. The substrate includes a first edge, a second edge, a third edge and a fourth edge. The first interface connector is disposed on the first edge, wherein the first interface connector includes a plurality of first edge-board contacts, and the first edge-board contacts extend toward a first direction. The second interface connector is disposed on the second edge, the second interface connector includes a plurality of second edge-board contacts, and the second edge-board contacts extend toward a second direction. The memory chips are disposed on the substrate, wherein the second interface connector is located between the memory chips and the first interface connector in the first direction.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: April 2, 2019
    Assignee: SILICON MOTION, INC.
    Inventor: Sheng-Liu Lin
  • Patent number: 10237973
    Abstract: Signal transmission characteristics in a case where a conductive pin is inserted into a through hole to perform connection with an external circuit are improved. A multilayer wiring substrate includes a front layer and a rear layer, and includes a plurality of layers in an inner layer. A conductive portion is provided in each of the layers, and a wiring is disposed on the rear layer. The conductive pin for connection with the external circuit is inserted into the through hole. A land is disposed around the through hole on the rear layer, and the land and the conductive pin are connected to each other through solder.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: March 19, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takashi Tokoro
  • Patent number: 10199760
    Abstract: An electronic device may include a substrate including a first surface facing a first direction, and a second surface facing a second direction, the second direction being opposite to the first direction; a first connector arranged on the first surface, wherein the first connector includes a first hollow member extending in the first direction; a first movable conductive member inserted in the first hollow member and movable in the first direction; and a first elastic member for supporting the first movable conductive member; a second connector arranged on the second surface and aligned with the first connector in the first direction, wherein the second connector includes a second hollow member extending in the first direction, a second movable conductive member inserted into the second hollow member and movable in the first direction, and a second elastic member for supporting the second movable conductive member.
    Type: Grant
    Filed: September 22, 2016
    Date of Patent: February 5, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chungsoon Park, Junghyun Kang, Hyunmin Seo, Seung-Ho Lee, So-Young Lee
  • Patent number: 10149419
    Abstract: A component mounting apparatus includes a mounting unit that mounts an electronic component on a board, at least one component supply unit that supplies chip solder, and a control unit that controls the mounting unit to mount the chip solder, which is supplied from the component supply unit, on the board, based on production data in which a size of chip solder is instructed for each component terminal.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: December 4, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Katsuhiko Itoh, Masanori Ikeda, Kenji Okamoto
  • Patent number: 10141215
    Abstract: An apparatus includes a needle and a needle actuator to move the needle to a position at which the needle presses an electrically-actuatable element into contact with a circuit trace. When the needle presses the electrically-actuatable element into contact with the circuit trace, a dampener, arranged with the needle and the needle actuator, dampens a force applied to the electrically-actuatable element.
    Type: Grant
    Filed: November 3, 2016
    Date of Patent: November 27, 2018
    Assignee: Rohinni, LLC
    Inventors: Justin Wendt, Andrew Huska, Cody Peterson, Clinton Adams, Sean Kupcow
  • Patent number: 10134663
    Abstract: This invention provides a multi-pin semiconductor device as a low-cost flip-chip BGA. In the flip-chip BGA, a plurality of signal bonding electrodes in a peripheral area of the upper surface of a multilayer wiring substrate are separated into inner and outer ones and a plurality of signal through holes coupled to a plurality of signal wirings drawn inside are located between a plurality of rows of signal bonding electrodes and a central region where a plurality of bonding electrodes for core power supply are located so that the chip pad pitch can be decreased and the cost of the BGA can be reduced without an increase in the number of layers in the multilayer wiring substrate.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: November 20, 2018
    Assignee: Renesas Electronics Corporation
    Inventors: Shinji Baba, Toshihiro Iwasaki, Masaki Watanabe
  • Patent number: 10074919
    Abstract: Embodiments of the present disclosure may relate to a printed circuit board (PCB) that includes a first outer layer and a second outer layer opposite the first outer layer. The PCB may further include a routing layer between the first outer layer and the second outer layer, and an interconnect positioned within the first outer layer and coupled with the routing layer. The interconnect may include a contact within an opening in the first outer layer, wherein the contact is within a plane defined by an outer surface of the first outer layer. The interconnect may further include a plated via directly coupled with the contact and the routing layer. Other embodiments may be described or claimed.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: September 11, 2018
    Assignee: INTEL CORPORATION
    Inventors: Zhen Zhou, Daqiao Du, Anne M. Sepic, Kai Xiao
  • Patent number: 10076070
    Abstract: A component mounting apparatus includes a mounting unit that mounts an electronic component on a board, at least one component supply unit that supplies chip solder, and a control unit that controls the mounting unit to mount the chip solder, which is supplied from the component supply unit, on the board, based on production data in which a size of chip solder to be mounted on each electrode of the board is instructed.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: September 11, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Katsuhiko Itoh, Masanori Ikeda, Kenji Okamoto
  • Patent number: 10046409
    Abstract: A method of making an electrical connection includes soldering using channels in a receptacle to direct hot air (or another hot gas) to effect soldering where the electrical connection is to be made. The connection may be made between device electrical contacts of an electrical device, and other contacts, such as receptacle contacts of the receptacle. The connection may be a blind connection, one in which the connected ends of the contacts are hidden or unable to be directly physically accessed, when the connection is made. The electrical connection may be made between device contacts of an electrical device that is inserted into the receptacle, and receptacle electrical contacts that are part of the receptacle. The channels for directing the hot gas to where the soldering occurs may be parts of the receptacle, for example being produced during additive manufacture of the receptacle.
    Type: Grant
    Filed: September 8, 2016
    Date of Patent: August 14, 2018
    Assignee: Raytheon Company
    Inventors: Matthew H. Summers, Jeremy C. Danforth, David G. Garrett, Dmitry V. Knyazev, Stephen M. Bagg, Gaines S. Gibson
  • Patent number: 10034390
    Abstract: A method includes forming a plurality of metal posts. The plurality of metal posts is interconnected to form a metal-post row by weak portions between neighboring ones of the plurality of metal posts. The weak portions include a same metal as the plurality of metal posts. A majority of each of the plurality of metal posts is separated from respective neighboring ones of the plurality of metal posts. An end portion of each of the plurality of metal posts is plated with a metal. The plurality of metal posts is disposed into a metal post-storage. The method further includes retrieving one of the metal posts from a metal-post storage, and bonding the one of the metal posts on a metal pad.
    Type: Grant
    Filed: January 22, 2016
    Date of Patent: July 24, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Li Hsiao, Su-Chun Yang, Chih-Hang Tung, Da-Yuan Shih, Chen-Hua Yu
  • Patent number: 10010981
    Abstract: Materials having increased mobility after heating are disclosed. In one particular exemplary embodiment, the materials may be realized as a material which has reduced apparent molecular weight and/or viscosity and thus increased mobility after a heating process, and which consequently allows material residue to be more easily removed during subsequent cleaning processes. Such a material may be useful in any industrial process which requires heating the material followed by removing material residue.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: July 3, 2018
    Assignee: Indium Corporation
    Inventors: Ning-Cheng Lee, Runsheng Mao
  • Patent number: 9977191
    Abstract: An optical device includes a substrate including a waveguide array formed therein, each waveguide having a reflective surface; a lens array unit including a waveguide-side lens array arranged facing the waveguide array so each lens of the lens array is aligned with the corresponding reflective surface; and a connector unit including an optical transmission path-side lens array arranged and fixed so each lens of the lens array is aligned with the corresponding lens in the waveguide-side lens array, the plurality of inserted optical transmission paths aligned with the corresponding lens in the optical transmission path-side lens array.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: May 22, 2018
    Assignee: International Business Machines Corporation
    Inventors: Shigeru Nakagawa, Hidetoshi Numata, Yoichi Taira
  • Patent number: 9865551
    Abstract: Provided herein are multilayer structures having a reduced propensity to warp upon curing of certain components thereof. In one aspect, there are provided multilayer assemblies comprising a plurality of the above-described multilayer structures. In another aspect, there are provided methods for reducing wafer warpage upon cure of molding compositions applied thereto. In yet another aspect, there are provided methods for preparing wafers having substantially no warpage upon cure thereof.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: January 9, 2018
    Assignee: Henkel IP & Holding GmbH
    Inventors: Tadashi Takano, Gina Hoang
  • Patent number: 9853408
    Abstract: A solder pre-form for soldering a coaxial cable to a connector body is provided with a plurality of flux grooves on a cable side and a connector side. The solder pre-form may also have a plurality of holes between the cable and connector sides. In a method of use, flux is applied to the flux grooves and the solder pre-form applied to encircle the outer conductor which is then inserted into the connector body and the solder pre-form melted to complete the solder interconnection. Where holes are present, flux may be applied to the connector side, passing through the holes also to the cable side.
    Type: Grant
    Filed: October 25, 2016
    Date of Patent: December 26, 2017
    Assignee: CommScope Technologies LLC
    Inventor: Kendrick Van Swearingen
  • Patent number: 9827635
    Abstract: A fixture assembly for use with fine wire laser soldering. The fixture includes a holding and support fixture and a wire securing and tensioning fixture. The holding and support fixture has a wire holding member and a retention member. The wire holding member and the retention member cooperate with wires prior to the wires being soldered. The wire securing fixture has wire tensioning projections and wire retention members. The wire tensioning projections and wire retention members cooperate with the wires to provide tension to the wire prior to the wires being soldered.
    Type: Grant
    Filed: October 9, 2015
    Date of Patent: November 28, 2017
    Assignee: TE Connectivity Corporation
    Inventors: Huadong Wu, Yasser M. Eldeeb
  • Patent number: 9812424
    Abstract: A process of forming an electronic device includes providing a wire comprising a first ball at an end thereof, operating on the first ball to modify a surface of the first ball to form a modified surface, moving the first ball to a first location on a die, and bonding the first ball along the modified surface to the first location of the die. In an embodiment, the process further includes moving a bonding tool including the wire away from the die while the wire remains bonded to the die.
    Type: Grant
    Filed: May 2, 2016
    Date of Patent: November 7, 2017
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Harold G. Anderson, Cang Ngo
  • Patent number: 9700316
    Abstract: A mounting member for a surgical stapler is fabricated from a plastic. The mounting member has a proximal end portion and a distal end portion. The proximal end portion has a pair of vertical projections configured to be coupled to a proximal body portion of a loading unit of a surgical stapler. The distal end portion includes a pair of walls extending distally from the proximal end portion. Each wall has a boss and a strut. The boss defines a transverse bore therethrough configured to be rotatably coupled to a cartridge assembly of the loading unit. The strut extends from the proximal end portion to the boss.
    Type: Grant
    Filed: October 1, 2014
    Date of Patent: July 11, 2017
    Assignee: Covidien LP
    Inventors: Venkata Ramana Mohan, Rajasekhar Nukala
  • Patent number: 9680207
    Abstract: An antenna module applied to an electronic device including a wireless communication controller and a body that includes an opening. The antenna module includes a first inductance component and a metal case. The first inductance component includes a first end and a second end, and the first end of the first inductance component is electrically connected to an end of the wireless communication controller. The metal case includes a first connection point and a second connection point. The first connection point is electrically connected to the second end of the first inductance component, and the second connection point is a preset distance away from the first connection point and electrically connected to the wireless communication controller.
    Type: Grant
    Filed: May 5, 2015
    Date of Patent: June 13, 2017
    Assignee: SMART APPROACH CO., LTD.
    Inventors: Hsin-Lung Lin, Chia-Liang Hung, Jhih-Yao You
  • Patent number: 9553079
    Abstract: A flip chip assembly is disclosed that includes a die with die circuitry and a plurality of electrical contacts electrically connected to the die circuitry. A substrate includes electrical contacts that are juxtaposed with and electrically connected to corresponding die electrical contacts. A passive component is disposed between the die and the substrate, and includes a dielectric disposed between a first electrode and a second electrode. The first electrode is electrically connected to a first of the die electrical contacts and a corresponding substrate electrical contact, and the second electrode is electrically connected to a second of the die electrical contacts and a corresponding substrate electrical contact.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: January 24, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jean Audet, Luc G. Guerin, Richard Langlois, Stephan L. Martel, Sylvain E. Ouimet
  • Patent number: 9539881
    Abstract: The invention relates to a heating module for a supplemental electric heating device for heating an airflow, comprising at least one heat-conductive bar against which at least one electric resistor is arranged. The heat-conductive bar is partially electrically insulated by an insulating coating in order to prevent potential short-circuits and to ensure proper operation and optimal safety when heating the passenger compartment of a vehicle.
    Type: Grant
    Filed: October 11, 2012
    Date of Patent: January 10, 2017
    Assignee: VALEO SYSTEMES THERMIQUES
    Inventors: Jean Gatinois, Pierre Derveloy, Laurent Tellier
  • Patent number: 9531095
    Abstract: A communication structure with connecting assembly is described. The communication structure comprises a housing base, a circuit board, a connecting assembly and a cover body wherein the connecting assembly comprises a plurality of conducting terminals, an adapting board coupled to the conducting terminals, and a first connecting socket coupled to the adapting board. The communication structure stably and electrically connected to another communication structure by the connecting assembly and at least two communication structures are electrically connected together to construct a communication system for conveniently expending more communication nodes.
    Type: Grant
    Filed: March 17, 2016
    Date of Patent: December 27, 2016
    Assignee: VIEWMOVE TECHNOLOGIES, INC.
    Inventors: Shyh-Biau Jiang, Li-Yeh Liu, Dong-Liang Lee, Chuan-Fu Huang, Yun-Sheng Hsiao
  • Patent number: 9508676
    Abstract: A semiconductor package structure having hollow chamber includes a bottom substrate having a bottom baseboard and a bottom metal layer formed on a disposing area of the bottom baseboard, a connection layer formed on the bottom metal layer, and a top substrate. The bottom metal layer has at least one corner having a first and a second outer lateral surface, and an outer connection surface. A first extension line is formed from a first extreme point of the first outer lateral surface, and a second extension line is formed from a second extreme point of the second outer lateral surface. A first exposing area of the bottom baseboard is formed by connecting the first and second extreme points and a cross point of the first and second extreme points. The top substrate connects to the connection layer to form a hollow chamber between the top and bottom substrates.
    Type: Grant
    Filed: September 9, 2015
    Date of Patent: November 29, 2016
    Assignee: CHIPBOND TECHNOLOGY CORPORATION
    Inventors: Cheng-Hung Shih, Yung-Wei Hsieh, Shu-Chen Lin, Fu-Yen Ho, Yen-Ting Chen
  • Patent number: 9485809
    Abstract: The invention relates to a heating rod, comprising a housing made of metal, a heating element disposed in the housing, and a contact plate, which is seated against the heating element with a front and which protrudes from the housing. It is provided according to this disclosure that the contact plate is an aluminum sheet having an anodized back and the contact plate comprises projections for positioning the heating element.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: November 1, 2016
    Assignee: BorgWarner Ludwigsburg GmbH
    Inventors: Victor Ritzhaupt, Alexander Dauth, Michael Luppold
  • Patent number: 9474145
    Abstract: A substrate for a semiconductor package and a method for manufacturing a semiconductor package are disclosed. The substrate comprises a surface, and package unit regions arranged on the surface in a row direction to form a plurality of rows. The package unit regions of an n+1-th row are arranged offset in a row direction from the package unit regions of an n-th row. The method includes molding semiconductor chips and spaces between the substrate and the semiconductor chips on the package unit regions of the last row at substantially the same time.
    Type: Grant
    Filed: June 2, 2015
    Date of Patent: October 18, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: JinGyu Kim, Hyun Lee
  • Patent number: 9324658
    Abstract: A system for interconnecting at least two die each die having a plurality of conducting layers and dielectric layers disposed upon a substrate which may include active and passive elements. In one embodiment there is at least one interconnect coupling at least one conducting layer on a side of one die to at least one conducting layer on a side of the other die. Another interconnect embodiment is a slug having conducting and dielectric layers disposed between two or more die to interconnect between the die. Other interconnect techniques include direct coupling such as rod, ball, dual balls, bar, cylinder, bump, slug, and carbon nanotube, as well as indirect coupling such as inductive coupling, capacitive coupling, and wireless communications. The die may have features to facilitate placement of the interconnects such as dogleg cuts, grooves, notches, enlarged contact pads, tapered side edges and stepped vias.
    Type: Grant
    Filed: April 18, 2013
    Date of Patent: April 26, 2016
    Assignee: GULA CONSULTING LIMITED LIABILITY COMPANY
    Inventor: Ernest E. Hollis
  • Patent number: 9318313
    Abstract: A semiconductor structure includes at least a semiconductor body, a delimiting structure delimiting a cup-shaped recess in the body and a conductive region in the recess. The conductive region is made of a low-melting-temperature material, having a melting temperature lower than that of the materials forming the delimiting structure.
    Type: Grant
    Filed: April 24, 2013
    Date of Patent: April 19, 2016
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alberto Pagani, Federico Giovanni Ziglioli
  • Patent number: 9240382
    Abstract: A system for interconnecting at least two die each die having a plurality of conducting layers and dielectric layers disposed upon a substrate which may include active and passive elements. In one embodiment there is at least one interconnect coupling at least one conducting layer on a side of one die to at least one conducting layer on a side of the other die. Another interconnect embodiment is a slug having conducting and dielectric layers disposed between two or more die to interconnect between the die. Other interconnect techniques include direct coupling such as rod, ball, dual balls, bar, cylinder, bump, slug, and carbon nanotube, as well as indirect coupling such as inductive coupling, capacitive coupling, and wireless communications. The die may have features to facilitate placement of the interconnects such as dogleg cuts, grooves, notches, enlarged contact pads, tapered side edges and stepped vias.
    Type: Grant
    Filed: April 18, 2013
    Date of Patent: January 19, 2016
    Assignee: Sagacious Investment Group, L.L.C.
    Inventor: Ernest E. Hollis
  • Patent number: 9224550
    Abstract: A copper substrate for use as a contact having Sn plating, nickel plating and Au plating overlying the substrate. A combination of Sn plating is applied over a copper substrate; nickel plating is applied over the Sn plating; and Au plating is applied over the nickel plating to form a stack. The stack is then processed by a vapor phase Sn reflow step that results in the formation of intermetallics and eliminates stannous oxide layers that may otherwise form on the tin layer. The intermetallic layers provide excellent corrosion resistance, and serve as diffusion barriers to prevent the further migration of either Ni atoms or Cu atoms into the Sn, and Sn atoms outwardly into either the Ni or the Cu. Regardless of the thickness, the interfaces are substantially free of oxides, in particular tin oxide, and not prone to delamination.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: December 29, 2015
    Assignee: TYCO ELECTRONICS CORPORATION
    Inventor: George Jyh-Shann Chou
  • Patent number: 9180540
    Abstract: A solar cell module comprises a solar cell die that is soldered to a substrate. The substrate comprises one or more power contacts. A power conductor is soldered to a power contact, thereby electrically coupling the power conductor to the solar cell die. A pre-heat module heats a first side of the substrate at a first area to a first temperature for a first duration. Then, a solder heat source solders a power conductor to a power contact at a second area of the substrate at a second temperature for a second duration. The resulting solder connection at the power conductor is less prone to cold-solder defects. The temperature of the pre-heat module is controlled to promote curing of an RTV sealant used in the manufacture of the solar cell module. The temperature of the solder heat source is controlled to avoid burning and degrading of the RTV sealant.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: November 10, 2015
    Assignee: Flextronics AP, LLC
    Inventors: Dason Cheung, Mario Lopez Ruiz, Richard Loi, Murad Kurwa
  • Patent number: 9148958
    Abstract: An electronic device includes an electronic component including a plurality of terminals and a circuit board on which the electronic component is mounted. The circuit board includes a board body, a plurality of electrode pads arranged on the board body, each of the electrode pads being connected to each of the terminals by solder, a first solder resist formed on the board body and having a plurality of first openings, each of the first openings accommodating each of the electrode pads, and a second solder resist formed on the first solder resist and having a plurality of second openings, each of the second openings being larger than each of the first openings and communicating with each of the first openings.
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: September 29, 2015
    Assignee: FUJITSU LIMITED
    Inventors: Yoshiyuki Hiroshima, Akiko Matsui, Mitsuhiko Sugane, Takahide Mukoyama, Tetsuro Yamada, Takahiro Ooi
  • Patent number: 9073154
    Abstract: A soldering flux which is suitable as a no-clean post flux in flow soldering and which can prevent the formation of whiskers which tends to occur when soldering electronic parts to a printed circuit board using a lead-free solder (such as Sn-3.0Ag-0.5Cu) having a higher Sn content and a higher melting point than the eutectic solder contains, in addition to a rosin as a base resin and an activator, 0.2-4 mass % of at least one compound selected from acid phosphate esters and derivatives thereof. The formation of whiskers can be more effectively prevented by carrying out soldering in a nitrogen atmosphere.
    Type: Grant
    Filed: December 12, 2007
    Date of Patent: July 7, 2015
    Assignees: Senju Metal Industry Co., Ltd., Denso Corporation
    Inventors: Yuji Kawamata, Takashi Hagiwara, Hiroyuki Yamada, Kazuyuki Hamamoto
  • Publication number: 20150146399
    Abstract: An embodiment of a method of attaching a semiconductor die to a substrate includes placing a bottom surface of the die over a top surface of the substrate with an intervening die attach material. The method further includes contacting a top surface of the semiconductor die and the top surface of the substrate with a conformal structure that includes a non-solid, pressure transmissive material, and applying a pressure to the conformal structure. The pressure is transmitted by the non-solid, pressure transmissive material to the top surface of the semiconductor die. The method further includes, while applying the pressure, exposing the assembly to a temperature that is sufficient to cause the die attach material to sinter. Before placing the die over the substrate, conductive mechanical lock features may be formed on the top surface of the substrate, and/or on the bottom surface of the semiconductor die.
    Type: Application
    Filed: November 25, 2013
    Publication date: May 28, 2015
    Inventors: LAKSHMINARAYAN VISWANATHAN, L.M. Mahalingam, David F. Abdo, Jaynal A. Molla
  • Patent number: 9004343
    Abstract: In a reflow soldering apparatus, air heated by heaters is blown by fans onto a printed circuit board. Temperature controllers that control temperature of the heaters supply operation amount thereof to a calculation unit that calculates consumed electric energy of soldering apparatus. Inverters that control revolution of fans supply a value of current to the calculation unit. A control unit supplies a coefficient of the consumed electric energy to the calculation unit. The calculation unit calculates a total amount of consumed electric energy of the reflow soldering apparatus based on the operation amount, value of current and coefficient of the consumed electric energy thus obtained. A display unit displays on an operation screen the total amount of consumed electric energy of the reflow soldering apparatus, which has been calculated by the calculation unit.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: April 14, 2015
    Assignee: Senju Metal Industry Co., Ltd.
    Inventors: Hiroyuki Inoue, Tadayoshi Ohtashiro
  • Patent number: 8991680
    Abstract: The electrode array is a device for making electrical contacts with cellular tissue or organs. The electrode array includes an assembly of electrically conductive electrodes arising from a substrate where the electrodes are hermetically bonded to the substrate. A method of manufacture of an electrode array and associated circuitry is disclosed where the braze preform tab disappears during the braze bonding process and is completely drawn into the substrate feedthrough holes such that the braze perform tab is completely involved in the braze joint and is no longer connecting the adjacent electrodes.
    Type: Grant
    Filed: August 16, 2011
    Date of Patent: March 31, 2015
    Assignee: Alfred E. Mann Foundation for Scientific Research
    Inventors: Joseph H. Schulman, Guangqiang Jiang, Charles L. Byers
  • Patent number: 8991681
    Abstract: A die bonder and a bonding method are disclosed which make it possible to provide high-quality products, particularly even if a die is rotated through predetermined degrees relative to an already-bonded die and then laminated. In the die bonder and bonding method in which a die is picked up from a wafer by a pick-up head which then places the die on an alignment stage, and the die is picked up from the alignment stage by a bonding head which then bond the die onto a substrate or an already-bonded die, a posture of the die is rotated through predetermined degrees on a plane parallel to a plane on which the bonding is performed, before the bonding head picks up the die from the alignment stage.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: March 31, 2015
    Assignee: Hitachi High-Tech Instuments Co., Ltd.
    Inventors: Hiroshi Maki, Masayuki Mochizuki, Yukio Tani, Takehito Mochizuki
  • Publication number: 20150048148
    Abstract: A method and apparatus for self-assembling a part on a substrate are disclosed herein. In some embodiments, a method includes placing a substrate having a first binding site capable of generating a first magnetic field and having a first shaped surface with a first droplet conformably disposed thereon into a first fluid; placing a part having a second binding site capable of generating a second magnetic field and having a second shaped surface with a second droplet conformably disposed on the second shaped surface into the first fluid; and attracting the part towards the first binding site such that an equilibrium is formed between an attractive force and a repulsive force such that the part is free to rotate about the first binding site to minimize the repulsive force when the first and second shaped surfaces rotate into an alignment causing the part to aligned with the first binding site.
    Type: Application
    Filed: September 26, 2014
    Publication date: February 19, 2015
    Applicant: The United States of America as represented by the Secretary of the Army
    Inventor: Christopher James Morris
  • Patent number: 8944309
    Abstract: A solder joint may be used to attach components of an organic vapor jet printing device together with a fluid-tight seal that is capable of performance at high temperatures. The solder joint includes one or more metals that are deposited over opposing component surfaces, such as an inlet side of a nozzle plate and/or an outlet side of a mounting plate. The components are pressed together to form the solder joint. Two or more of the deposited metals may be capable of together forming a eutectic alloy, and the solder joint may be formed by heating the deposited metals to a temperature above the melting point of the eutectic alloy. A diffusion barrier layer and an adhesion layer may be included between the solder joint and each of the components.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: February 3, 2015
    Assignee: The Regents of The University of Michigan
    Inventors: Stephen R. Forrest, Gregory McGraw
  • Patent number: 8939347
    Abstract: The present disclosure relates to the field of fabricating microelectronic packages, wherein magnetic particles distributed within a solder paste may be used to form a magnetic intermetallic compound interconnect. The intermetallic compound interconnect may be exposed to a magnetic field, which can heat a solder material to a reflow temperature for attachment of microelectronic components comprising the microelectronic packages.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: January 27, 2015
    Assignee: Intel Corporation
    Inventors: Rajasekaran Swaminathan, Ravindranath V. Mahajan
  • Patent number: 8934999
    Abstract: A robotic processing system includes a microprocessor-controlled workpiece processor having a mobile processing element to be positioned independently in three orthogonal dimensions with respect to each of a plurality of target locations on a workpiece, with each particular target location of the plurality of target locations including an element to be processed, the mobile processing element processing the element at each particular target location by first moving to an initial location that is offset from the particular target location in a single dimension and then second moving along the single dimension towards the element at the particular target location until a contact signal is detected; and a control, coupled to the workpiece and to the mobile processing element, communicating the contact signal to the workpiece processor when the processing element makes physical contact with the element at the particular target location.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: January 13, 2015
    Assignee: Tesla Motors, Inc.
    Inventor: Nicholas R. Kalayjian
  • Publication number: 20150008254
    Abstract: A bond head for a thermocompression bonder is provided. The bond head includes a tool configured to hold a workpiece to be bonded, a heater configured to heat the workpiece to be bonded, and a chamber proximate the heater. The chamber is configured to receive a cooling fluid for cooling the heater.
    Type: Application
    Filed: June 25, 2014
    Publication date: January 8, 2015
    Inventors: Matthew B. Wasserman, Michael P. Schmidt-Lange
  • Patent number: 8899289
    Abstract: When joining a processing target substrate and a supporting substrate together by suction-holding the processing substrate and the supporting substrate respectively on a first holding unit and a second holding unit arranged to face each other and pressing the second holding unit toward the first holding unit while heating the substrates by heating mechanisms of the holding units, the present invention preheats at least the processing target substrate before suction-holding the processing target substrate on the first holding unit to suppress generation of particles when joining the processing target substrate and the supporting substrate together so as to properly perform the joining of the processing target substrate and the supporting substrate.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: December 2, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Masatoshi Deguchi, Masatoshi Shiraishi, Shinji Okada
  • Publication number: 20140301042
    Abstract: An electronic device is attached to a first surface of a board which includes vias. A heat sink precursor for the electronic device is attached to the second surface of the electronic board. The heat sink precursor includes a cavity facing the vias. A wave of solder paste is applied to the second surface. The solder paste penetrates into the cavity of the heat sink precursor and flows by capillary action through the vias to weld a thermal radiator and/or electronic contact of the electronic device to the vias. The solder paste further remains in the cavity to form a corresponding heat sink.
    Type: Application
    Filed: March 26, 2014
    Publication date: October 9, 2014
    Applicant: STMicroelectronics S.r.l.
    Inventors: Cristiano Gianluca Stella, Rosalba Cacciola, Giuseppe Luigi Malgioglio
  • Publication number: 20140291006
    Abstract: A printed circuit board solder mounting method of solder-jointing a first-land formed on a first-printed-circuit-board and a second-land formed on a second-printed-circuit-board together, includes: filling a solder-filling-hole with cream solder, the solder-filling-hole provided so as to be open in a planar region of the first-land; arranging a solder-drawing-hole so that the solder-drawing-hole and the solder-filling-hole face each other, the solder-drawing-hole being formed so as to be open in a planar region of the second region, having a center position to be superposed on a center position of the solder-filling-hole, and having a solder wettability higher than a solder wettability of the solder-filling-hole; melting the cream solder in the solder-filling-hole by reflow heating and causing at least part of the cream solder to ascend to the solder-drawing-hole facing the solder-filling-hole; and jointing the first-land and the second-land together by solidifying the cream solder interposed between the firs
    Type: Application
    Filed: January 6, 2014
    Publication date: October 2, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Keiichi YAMAMOTO, Takahiro KITAGAWA
  • Publication number: 20140263583
    Abstract: A method includes placing a plurality of first package components over second package components, which are included in a third package component. First metal connectors in the first package components are aligned to respective second metal connectors of the second package components. After the plurality of first package components is placed, a metal-to-metal bonding is performed to bond the first metal connectors to the second metal connectors.
    Type: Application
    Filed: April 19, 2013
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Li Hsiao, Da-Yuan Shih, Chih-Hang Tung, Chen-Hua Yu
  • Patent number: 8833637
    Abstract: A device using the live welding method for aluminum electrolytic cell overhauling under series full current consists of short-circuit buses at the bottom of the cell (1), pillar buses (2), an anode bus (3), a balance bus (4), a inter-cell standby bus (5), a door-shaped pillar clamp (6), an arcuate clamp (7) of anode buses, a current conversion switch (8, a mechanical switching device (9) for the short-circuit port, a voltage sensor and wires thereof (10), a temperature sensor and wires thereof (11), a system (12) for data acquiring, displaying, analyzing and alarming, an A-side welding area (13), a B-side welding area (14) and compression-joint points (15) on pillar soft belts of overhauling cells; and the live welding method comprises the following steps: when welding is required to be performed in some zone, the currents of short-circuit buses at the bottom of the cell (1) and pillar buses (2) which influence the welding area most are cut off, the serial currents are shunted to other pillar buses (2), other
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: September 16, 2014
    Assignee: China Aluminum International Engineering Corporation Limited
    Inventors: Tao Yang, Bin Cao
  • Patent number: 8826527
    Abstract: Disclosed herein is a printed circuit board, including: a substrate including an insulation layer in which a cavity is formed; an electronic component mounted in the cavity of the substrate and having connection terminals; an insulation material layer formed on one side of the substrate to bury the electronic component; a first circuit layer formed on the other side of the substrate and including a connection pattern connecting with the connection terminals of the electronic component; and a second circuit layer formed on the insulation material layer. The printed circuit board is advantageous in that it can prevent the warpage thereof and ensure the reliability of electrical connection between an electronic component and a circuit layer by adjusting the thickness, thermal expansion coefficient and elastic modulus of insulation layer or the insulating material.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: September 9, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Jin Seon Park