Simultaneous Bonding Of Multiple Joints (e.g., Dip Soldering Of Printed Circuit Boards) Patents (Class 228/180.1)
  • Patent number: 12262480
    Abstract: A coating device includes a container, a driving device, and a control section. The container accommodates a liquid coating agent to be applied to multiple mounting portions of a board on which a component is to be mounted. The driving device horizontally moves and lifts and lowers a pin member between the container and the positioned board. The control section drives and controls the driving device to dip the pin member in the coating agent to apply the coating agent to each of the multiple mounting portions using the coating agent held by a distal end portion of the pin member.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: March 25, 2025
    Assignee: FUJI CORPORATION
    Inventor: Jinya Imura
  • Patent number: 12246387
    Abstract: Device (1) for displacing at least one assembly (2, 2?) between a provisioning zone (3) and a working zone (4) of at least one process chamber (5) of a process chamber apparatus (6) for soldering, in particular for reflow soldering, comprising at least one displacement device (7), wherein the at least one assembly (2, 2?) carries out, at least in sections, a displacement movement (9), or such a displacement movement (9) can be carried out, such that the at least one assembly (2, 2?) is displaced by means of a force (8), in particular pushing force, which is transmitted or generated by the displacement device (7), in particular directly, and acts on the assembly (2, 2?).
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: March 11, 2025
    Assignee: Siegfried Hofmann GmbH
    Inventors: Daniel Feseker, Michael Deuerling, Michael Förste, Kai Fuhrmann, Johannes Günther, Benedikt Bechmann, Heinz Nolden
  • Patent number: 12214447
    Abstract: Methods and apparatus for applying molten solder are disclosed. A system for applying solder to a workpiece includes a conveyor for moving a first workpiece along a machine direction, and a first selective soldering nozzle to apply solder to the first workpiece while the first workpiece is moving along the machine direction. The system can also include a flux application area to apply flux to bottoms of workpieces, a heating area to heat the bottoms of the workpieces, and a conveyor to convey the workpieces. The workpiece can constantly move through multiple areas, such as a flux application area, a heating area, and a selective soldering area. As such, two or more areas can operate on the workpiece simultaneously and while the workpiece is moving. The method includes applying solder from the first selective soldering nozzle to the first workpiece while the first workpiece is moving along the machine direction.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: February 4, 2025
    Assignee: Nordson Corporation
    Inventors: Gregory E. Goodell, Carlos E. Bouras, Michael A. Cable
  • Patent number: 12131845
    Abstract: A wiring member includes: a flat wiring member including a sheet member, and a plurality of wire-like transmission members fixed on the sheet member in a parallel state; and a protective member configured to accommodate the flat wiring member. The protective member includes a placement surface on which the sheet member is placed. The sheet member includes a disposition region in which the plurality of wire-like transmission members are disposed. The sheet member is placed on the placement surface so that at least the disposition region extends along the placement surface.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: October 29, 2024
    Assignees: AUTONETWORKS TECHNOLOGIES, LTD., SUMITOMO WIRING SYSTEMS, LTD., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Tetsuya Nishimura, Taku Umehara, Shintaro Sumida, Miyu Aramaki
  • Patent number: 12127350
    Abstract: A method for soldering an SMD component to a circuit carrier in a positionally stable manner, includes: a) providing a circuit carrier including a printed circuit board (PCB) contact surface, which is coated with a soldering paste (SP); b) applying an adhesive point onto the circuit carrier wherein the adhesive point delimits the PCB contact surface coated with SP; c) placing an SMD component, which includes a component contact surface, on the PCB contact surface coated with SP wherein the component contact surface contacts the PCB contact surface via the SP and the SMD component rests on the SP without contacting the adhesive point; d) waiting to complete a curing process of the adhesive point; and e) heating, melting and subsequently cooling the SP to produce an electric, thermal and/or a mechanical connection between the component and PCB contact surfaces, wherein the SMD component is allowed to vertically sink in molten SP and is mechanically restricted from drifting horizontally on the molten SP by means
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: October 22, 2024
    Assignee: ZKW Group GmbH
    Inventors: Christoph Haiden, Johannes Spitzer, Christoph Rainer
  • Patent number: 12111497
    Abstract: A stress compensating pick-up tool for aligning a companion chip with a host chip includes a tool tip and an actuator. The tool tip holds the companion chip, and includes a first tip portion and a second tip portion. The actuator applies a force to the tool tip, wherein the force causes the first tip portion and the second tip portion to rotate in opposite directions with respect to one another to optically align a portion of the companion chip with a corresponding portion of the host chip.
    Type: Grant
    Filed: June 7, 2023
    Date of Patent: October 8, 2024
    Assignee: Ciena Corporation
    Inventors: Raphael Beaupré-Laflamme, Simon Savard
  • Patent number: 11916039
    Abstract: Techniques are disclosed for facilitating interconnecting semiconductor devices. In one example, a method of interconnecting a first substrate to a second substrate is provided. The method includes forming a first plurality of contacts on the first substrate. The method further includes forming an insulative layer on the first substrate. The method further includes forming a second plurality of contacts on the second substrate. The method further includes joining the first plurality of contacts to the second plurality of contacts to form interconnects between the first substrate and the second substrate. When the first and second substrates are joined, at least a portion of each of the interconnects is surrounded by the insulative layer. Related systems and devices are also provided.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: February 27, 2024
    Assignee: Teledyne FLIR Commercial Systems, Inc.
    Inventors: Richard E. Bornfreund, Edward K. Huang
  • Patent number: 11916003
    Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a first substrate; a second substrate; and an array of interconnects electrically coupling the first substrate to the second substrate. In an embodiment, the array of interconnects comprises first interconnects, wherein the first interconnects have a first volume and a first material composition, and second interconnects, wherein the second interconnects have a second volume and a second material composition, and wherein the first volume is different than the second volume and/or the first material composition is different than the second material composition.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: February 27, 2024
    Assignee: Intel Corporation
    Inventors: Xiao Lu, Jiongxin Lu, Christopher Combs, Alexander Huettis, John Harper, Jieping Zhang, Nachiket R. Raravikar, Pramod Malatkar, Steven A. Klein, Carl Deppisch, Mohit Sood
  • Patent number: 11888132
    Abstract: A battery assembly comprising a thermal exchange device and a plurality of batteries arranged into a plurality of battery groups is disclosed. The thermal exchange device comprises a thermal contact surface which is in thermal contact with a heat transfer network, and a thermal exchange surface which is configured to perform heat exchange. The heat transfer network comprises the plurality of inter-battery connectors which are in electrical contact with battery terminals of the batteries forming the battery assembly. The inter-battery connectors are in physical and thermal contact with the thermal contact surface of the thermal exchange device to facilitate transfer of heat from the battery terminals to the thermal contact surface and are electrically insulated from the thermal exchange surface or the thermal exchange device.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: January 30, 2024
    Inventor: Yui Lung Tong
  • Patent number: 11848155
    Abstract: A multilayer ceramic capacitor includes a capacitor main body including a multilayer body and external electrodes, the multilayer body including dielectric layers and internal electrode layers stacked alternately, each of the external electrodes being provided on an end surface in a length direction of the multilayer body and being connected to the internal electrode layers, and two interposers on one surface in a stacking direction of the capacitor main body and spaced apart from each other in the length direction, the interposers including bonding surfaces bondable to the one surface of the capacitor main body and including inner edge portions which are opposite to each other and each having a length longer than a length in a width direction of the multilayer body.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: December 19, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masato Kimura
  • Patent number: 11831364
    Abstract: Provided is a multiple-input multiple-output (MIMO) antenna having a lightweight stacked structure. According to one aspect of the present invention, there is provided a MIMO antenna assembly having a lightweight stacked structure, in which a calibration network, which was provided between antenna elements and filters in the related art, is provided on one printed circuit board (PCB), together with a power amplifier and a digital circuit, and filters are closely coupled to the bottom of the PCB on which the feeding network is provided. The present invention employs a strategy in which an antenna assembly is reduced to a compact size while managing phase deviation caused due to filters at an acceptable level.
    Type: Grant
    Filed: July 4, 2021
    Date of Patent: November 28, 2023
    Assignee: KMW INC.
    Inventors: Duk Yong Kim, Bae Mook Jeong, Chang Woo Yoo, Young Chan Moon, Nam Shin Park, Bum Sik Park, Min Seon Yun, Min Sik Park, Sung Ho Jang
  • Patent number: 11818850
    Abstract: A flux dotting tool is provided that includes: a housing having an internal space and a plurality of through-holes extending from the internal space to an outside of the housing; a plurality of flux pins disposed in the internal space to correspond to the plurality of through-holes, respectively, wherein each of the plurality of flux pins includes a flux holding portion extending in a first direction and that is exposed to the outside of the housing, and a flux blocking structure protruding in a second direction, perpendicular to the first direction, from a side surface of the flux holding portion, and the flux blocking structure is configured to limit a flux wetting region; and an elastic structure disposed on the plurality of flux pins in the internal space and configured to impart elastic force in the first direction.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: November 14, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seungjin Lee, Jongbeom Park
  • Patent number: 11742296
    Abstract: An electronic package and a manufacturing method thereof, which embeds an electronic structure acting as an auxiliary functional component and a plurality of conductive pillars in an encapsulation layer, and disposes an electronic component on the encapsulation layer, so as to facilitate electrical transmission with the electronic component in a close range.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: August 29, 2023
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Wei-Jhen Chen, Chih-Hsun Hsu, Yuan-Hung Hsu, Chih-Nan Lin, Chang-Fu Lin, Don-Son Jiang, Chih-Ming Huang, Yi-Hsin Chen
  • Patent number: 11736156
    Abstract: Provided is a multiple-input multiple-output (MIMO) antenna having a lightweight stacked structure. According to one aspect of the present invention, there is provided a MIMO antenna assembly having a lightweight stacked structure, in which a calibration network, which was provided between antenna elements and filters in the related art, is provided on one printed circuit board (PCB), together with a power amplifier and a digital circuit, and filters are closely coupled to the bottom of the PCB on which the feeding network is provided. The present invention employs a strategy in which an antenna assembly is reduced to a compact size while managing phase deviation caused due to filters at an acceptable level.
    Type: Grant
    Filed: July 4, 2021
    Date of Patent: August 22, 2023
    Assignee: KMW INC.
    Inventors: Duk Yong Kim, Bae Mook Jeong, Chang Woo Yoo, Young Chan Moon, Nam Shin Park, Bum Sik Park, Min Seon Yun, Min Sik Park, Sung Ho Jang
  • Patent number: 11721658
    Abstract: Semiconductor devices having mechanical pillar structures, such as angled pillars, that are rectangular and oriented with respect to a semiconductor die to reduce bending stress and in-plane shear stress at a semiconductor die to which the angled pillars are attached, and associated systems and methods, are disclosed herein. The semiconductor device can include angled pillars coupled to the semiconductor die and to a package substrate. The angled pillars can be configured such that they are oriented relative to a direction of local stress to increase section modulus.
    Type: Grant
    Filed: October 6, 2021
    Date of Patent: August 8, 2023
    Assignee: Micron Technology, Inc.
    Inventor: Shams U. Arifeen
  • Patent number: 11679444
    Abstract: Disclosed in the present application is a cooling system for a reflow furnace, the reflow furnace comprising a heating zone, and the cooling system being used to regulate a temperature of the heating zone, the cooling system comprising: at least one gas inlet and at least one gas discharge port, the at least one gas inlet and the at least one gas discharge port being disposed on the heating zone; a blowing apparatus; at least one gas intake pipeline, an inlet of the at least one gas intake pipeline being connected to the blowing apparatus, an outlet of the at least one gas intake pipeline being connected to the at least one gas inlet, the at least one gas intake pipeline being able to controllably establish fluid communication between the blowing apparatus and the at least one gas inlet; and at least one gas discharge pipeline, an inlet of the at least one gas discharge pipeline being connected to the at least one gas discharge port, an outlet of the at least one gas discharge pipeline being connected to the
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: June 20, 2023
    Assignee: Illinois Tool Works Inc.
    Inventors: Shenghu Yan, Peng Shu, Dong Zhang
  • Patent number: 11683984
    Abstract: A heat conversion device according to an embodiment of the present invention comprises: a frame comprising multiple unit modules arranged in a first direction and in a second direction intersecting with the first direction, respectively, and a first cooling water inflow tube and a first cooling water discharge tube formed along the first direction so as to support the multiple unit modules; multiple second cooling water inflow tubes connected to the first cooling water inflow tube and arranged on one side of the multiple unit modules along the second direction; and multiple second cooling water discharge tubes connected to the first cooling water discharge tube and arranged on the other side of the multiple unit modules along the second direction. Each unit module comprises a cooling water passage chamber, a first thermoelectric module arranged on a first surface of the cooling water passage chamber, and a second thermoelectric module arranged on a second surface of the cooling water passage chamber.
    Type: Grant
    Filed: July 4, 2019
    Date of Patent: June 20, 2023
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Un Hak Lee, Jong Hyun Kang
  • Patent number: 11676843
    Abstract: A method and system for connecting electronic assemblies and/or for manufacturing workpieces, having a plurality of modules for connecting the electronic assemblies, includes at least one module configured as a loading station and/or unloading station. At least one further module is configured as a manufacturing station. A manufacturing workpiece carrier is provided for accommodating the electronic assemblies and/or the workpieces, and is movable in automated manner by way of a conveying unit from the loading station via the manufacturing station to the unloading station. The system is configured in particular for assembly line production. In a secondary aspect, a foil/film transfer unit is proposed which provides automated application of foils/films as a process cover in the loading station.
    Type: Grant
    Filed: October 2, 2020
    Date of Patent: June 13, 2023
    Assignee: PINK GMBH THERMOSYSTEME
    Inventors: Stefan Müssig, Christoph Oetzel
  • Patent number: 11647593
    Abstract: A printed circuit board has an in-pad via. In a first step, a component is mounted on a first surface of a printed circuit board. A screen to be used in a second step has openings at positions corresponding to those of a plurality of pads on a second surface and has a recess positioned to overlap an in-pad via. Solder cream is applied from above the screen, and the screen is removed. Then, a component is mounted on the second surface.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: May 9, 2023
    Assignee: Sony Interactive Entertainment Inc.
    Inventors: Kazuki Sasao, Katsushi Wada
  • Patent number: 11607742
    Abstract: The present disclosure provides a reflow oven, which comprises: a soldering section configured to treat a circuit board to be soldered and provided with N soldering sub-zones; a purification section comprising M purification sub-zones, wherein each of the M purification sub-zones is in communication with one of the N soldering sub-zones, and M is less than or equal to N; a controllable discharge pipeline and K discharge branch pipes, each of the K discharge branch pipes communicating one of the M purification sub-zones with the controllable discharge pipeline; and a valve device configured to, at the inlet thereof, connect with the outlet of the controllable discharge pipeline to control open/close of the communication between the controllable discharge pipeline and the external environment. The reflow oven provided by the present disclosure can work in an air mode and in an inert gas mode.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: March 21, 2023
    Assignee: Illinois Tool Works Inc.
    Inventor: Yuwei Wang
  • Patent number: 11541610
    Abstract: A method of aligning a first and a second structure, the first structure comprising one or more first surface relief features and a channel system communicating with a surface of the first structure at one or more of the first surface relief features, the second structure comprising one or more second surface relief features shaped complementarily to the first surface relief features; the method comprising: generating suction in the channel system to draw the first and second structures together in a drawing direction; wherein, when the first and second structures are drawn together, the interaction between one or more of the first surface relief features and one or more of the second surface relief features aligns the structures in a plane perpendicular to the drawing direction such that the first and second surface relief features mate.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: January 3, 2023
    Assignee: Huber+Suhner Polatls Limited
    Inventors: Peter John Wilkinson, Daping Chu
  • Patent number: 11541472
    Abstract: Apparatus and methods are disclosed for transferring solder to a substrate. A substrate belt moves one or more substrates in a belt direction. A decal has one or more through holes in a hole pattern that hold solder. Each of the solder holes can align with respective locations on one of the substrates. An ultrasonic head produces an ultrasonic vibration in the solder in a longitudinal direction perpendicular to the belt direction. The ultrasonic head and substrate can be moved together in the longitudinal direction to maintain the ultrasonic head in contact with the solder while the ultrasonic head applies the ultrasonic vibration. Various methods are disclosed including methods of transferring the solder with or without external heating.
    Type: Grant
    Filed: January 29, 2020
    Date of Patent: January 3, 2023
    Assignee: International Business Machines Corporation
    Inventors: Jae-Woong Nah, Stephen L. Buchwalter, Peter A. Gruber, Paul Alfred Lauro, Da-Yuan Shih
  • Patent number: 11510348
    Abstract: A shield case for covering an electronic component includes a top panel portion made of a metal plate, a plurality of terminal leg portions formed to project in a direction intersecting with the top panel portion from a peripheral edge portion thereof, and a side plate portion formed to project in the direction intersecting with the top panel portion from a peripheral edge portion of the top panel portion other than the plurality of terminal leg portions. Each of the plurality of terminal leg portions includes a leg portion that stretches from the top panel portion, a joint portion that extends in a direction intersecting with the leg portion from a distal end of the leg portion, and a terminal portion with a ring-shaped cross-sectional surface that has a projecting support abutting on the leg portion from a distal end of the joint portion.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: November 22, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Shigeki Yamauchi
  • Patent number: 11508531
    Abstract: A photovoltaic device (10) is provided that comprises serially arranged photovoltaic device cells (10A, 10B). Each cell having a transparent electrode layer region electrical conductors (121A, . . . , 124A) forming an electric contact with the transparent electrode layer region, a photo-voltaic stack portion (14A, 14B) that extends over the transparent electrode region (11A, 11B) and over an insulated portion of the electrical conductors, a further electrode region (15A, 5B) that extends over the photovoltaic stack portion (14A,14B). A further electrode region (15A) of a photovoltaic device cell (10A) extends over electric contacts formed by exposed ends (12B1) of the electrical conductors of a subsequent photovoltaic device cell (10B).
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: November 22, 2022
    Assignee: Nederlandse Organisatie voor toegepast-natuurwetenschappelijk onderzoek TNO
    Inventors: Adrianus Petrus Langen, Herbert Lifka, Ike Gerke De Vries
  • Patent number: 11502010
    Abstract: Embodiments are generally directed to module installation on printed circuit boards with embedded trace technology. An embodiment of a printed circuit board includes one or more layers including a top layer; multiple embedded traces that are contained in an area of a surface of a first layer of the one or more layers of the printed circuit board; and a first module, the first module being installed on the plurality of printed traces in the area.
    Type: Grant
    Filed: October 1, 2016
    Date of Patent: November 15, 2022
    Assignee: Intel Corporation
    Inventors: Quan Qi, Carlton E. Hanna
  • Patent number: 11458558
    Abstract: The invention relates to a soldering nozzle for the simultaneous selective wave soldering of at least two spaced-apart rows of solder joints in a soldering installation, with a base portion which can be arranged on a nozzle plate, and with a wave portion which forms the solder wave during operation and which has a peripheral wall having a free upper side, and with at least one separating strip which can be inserted into the wave portion and which can be wetted with solder, wherein the at least one separating strip is formed as a frameless separating strip. The invention also relates to a soldering installation having a nozzle plate and having at least one soldering nozzle.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: October 4, 2022
    Assignee: ERSA GmbH
    Inventor: Alexander Leisering
  • Patent number: 11399431
    Abstract: Provided is a land for a surface mounted component that includes a plurality of land regions respectively having different width. Land regions included in the plurality of land regions are combined with one another with centers in a width direction aligned in order conforming to the widths and are jointed into one land. A cutout shape is provided in a center in the width direction on a side opposed to an adjacent or overlapping side of a land region having a larger width of adjacent or partially overlapping two land regions in the plurality of land regions joined into the one land.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: July 26, 2022
    Assignee: SONY CORPORATION
    Inventor: Norikimi Moriuchi
  • Patent number: 11389888
    Abstract: A wave soldering machine includes a housing and a conveyor configured to deliver a printed circuit board through the housing. The wave soldering machine further includes a wave soldering station coupled to the housing. The wave soldering station includes a reservoir of solder material, and a wave solder nozzle assembly configured to create a solder wave. The wave solder nozzle assembly has a nozzle core frame and an exit wing, the exit wing being rotatable about a hinge with respect to the nozzle core frame to adjust a flow of a solder wave. A linear actuator is connected via a linkage to the exit wing to allow the linear actuator to adjust an orientation of the exit wing with respect to the nozzle core frame.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: July 19, 2022
    Assignee: Illinois Tool Works Inc.
    Inventor: Jonathan M. Dautenhahn
  • Patent number: 10950577
    Abstract: An embodiment package includes a first integrated circuit die, an encapsulent around the first integrated circuit die, and a conductive line electrically connecting a first conductive via to a second conductive via. The conductive line includes a first segment over the first integrated circuit die and having a first lengthwise dimension extending in a first direction and a second segment having a second lengthwise dimension extending in a second direction different than the first direction. The second segment extends over a boundary between the first integrated circuit die and the encapsulant.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: March 16, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Cheng-Hsien Hsieh, Li-Han Hsu, Wei-Cheng Wu, Hsien-Wei Chen, Der-Chyang Yeh, Chi-Hsi Wu, Chen-Hua Yu
  • Patent number: 10881002
    Abstract: A capacitor module that suppresses the occurrence of solder cracking includes a substrate having a first principal surface and a second principal surface opposite to each other in a thickness direction, and capacitor elements mounted on at least the first principal surface of the substrate, wherein the substrate has a first pad electrode solder-bonded to a first terminal electrode provided at one end side of the capacitor elements and a second pad electrode solder-bonded to a second terminal electrode provided at the other end side of the capacitor elements, and penetrating holes are provided at positions, which overlap a pair of boundary lines that define a boundary between at least a region between the first pad electrode and the second pad electrode and an outside of the region in a plan view, and pass through the substrate in the thickness direction.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: December 29, 2020
    Assignee: TDK CORPORATION
    Inventor: Kenji Furukawa
  • Patent number: 10727168
    Abstract: Consistent with an example embodiment, there is a package assembly structure. The structure comprises a lead frame having a topside surface and an opposite under-side surface; the lead frame includes a die attach paddle, wherein a die attach region is defined on the opposite under-side surface. Pad landings surround the die attach region. A plurality of locking pins are arranged at predetermined locations about the die attach paddle, on the top side surface. The plurality of locking pins may be formed integrally in the lead frame and project upward from the top side surface.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: July 28, 2020
    Assignee: NXP B.V.
    Inventors: Bodin Kasemset, Peeradech Khunpukdee, Krassavan Tantirittisak
  • Patent number: 10662057
    Abstract: A method of attaching a MEMS die to a surface includes centering and rotationally aligning a solder perform on a solder surface of a body, centering and rotationally aligning a MEMS die on the solder preform, and heating the solder perform in a reflow process until the solder is molten and surface tension of the molten solder moves the MEMS die to a position where the surface tensions balance, and the MEMS die is centered on, and rotationally aligned with, the solder surface of the body.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: May 26, 2020
    Assignee: DunAn Microstaq, Inc.
    Inventors: Wayne C. Long, Joe A. Ojeda, Gengxun K. Gurley, Joseph L. Nguyen
  • Patent number: 10615526
    Abstract: A surface-mount connector includes, a connector body, connection terminals provided to the connector body that are placed on terminal solder portions on a surface of a circuit board, and a positioning portion provided to the connector body that includes a solder portion being press-fitted into a through-hole of the circuit board with the connection terminals placed on the terminal solder portions.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: April 7, 2020
    Assignee: FUJITSU LIMITED
    Inventor: Yasushi Masuda
  • Patent number: 10607957
    Abstract: A package structure includes a first dielectric layer, semiconductor device(s) attached to the first dielectric layer, and an embedding material applied to the first dielectric layer so as to embed the semiconductor device therein, the embedding material comprising one or more additional dielectric layers. Vias are formed through the first dielectric layer to the at least one semiconductor device, with metal interconnects formed in the vias to form electrical interconnections to the semiconductor device. Input/output (I/O) connections are located on one end of the package structure on one or more outward facing surfaces thereof to provide a second level connection to an external circuit. The package structure interfits with a connector on the external circuit to mount the package perpendicular to the external circuit, with the I/O connections being electrically connected to the connector to form the second level connection to the external circuit.
    Type: Grant
    Filed: October 11, 2017
    Date of Patent: March 31, 2020
    Assignee: General Electric Company
    Inventors: Arun Virupaksha Gowda, Paul Alan McConnelee, Shakti Singh Chauhan
  • Patent number: 10446479
    Abstract: A semiconductor device has a substrate. A plurality of conductive vias is formed through the substrate. A conductive layer is formed over the substrate. An insulating layer is formed over conductive layer. A portion of the substrate is removed to expose the conductive vias. A plurality of vertical interconnect structures is formed over the substrate. A first semiconductor die is disposed over the substrate. A height of the vertical interconnect structures is less than a height of the first semiconductor die. An encapsulant is deposited over the first semiconductor die and the vertical interconnect structures. A first portion of the encapsulant is removed from over the first semiconductor die while leaving a second portion of the encapsulant over the vertical interconnect structures. The second portion of the encapsulant is removed to expose the vertical interconnect structures. A second semiconductor die is disposed over the first semiconductor die.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: October 15, 2019
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Pandi C. Marimuthu, Yaojian Lin, Kang Chen, Yu Gu, Won Kyoung Choi
  • Patent number: 10440831
    Abstract: A conductive pattern formation method includes: a step of patterning a base member with an ink in which conductive particulates are distributed to form a pattern; a step of making a conductive developer act on the pattern; and a pressurization step of pressurizing the pattern.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: October 8, 2019
    Assignee: KONICA MINOLTA, INC.
    Inventors: Dai Suwama, Sayaka Morita, Keita Saito, Midori Shimomura
  • Patent number: 10365142
    Abstract: An environment sensor arranged in a measuring chamber disposed in a circuit board receiving portion does not affect a flow of air through a bypass passage, and thus does not affect detection accuracy of a flow rate detection element arranged in the bypass passage. A recessed portion is disposed in a side surface of a base parallel to a flow direction A of intake air passing through a main passage and a communication port of the measuring chamber is disposed in the recessed portion, and thus the measuring chamber is unlikely to be infiltrated by fouling substances, water droplets, and the like contained in the intake air. The communication port has a small length dimension L, and thus an environment parameter of the intake air is likely to propagate to the measuring chamber and high levels of detection response, detection accuracy, and reliability are ensured for the environment sensor.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: July 30, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Naoyuki Kishikawa, Yuji Ariyoshi, Masahiro Kawai, Shinichiro Hidaka, Kazuto Akagi
  • Patent number: 10290512
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a semiconductor substrate and a first conductive bump. The semiconductor substrate has an integrated circuit and an interconnection metal layer, and a tilt surface is formed on an edge of the semiconductor substrate. The first conductive bump is electrically connected to the integrated circuit via the interconnection metal layer, and is disposed on the tilt surface, wherein a profile of the first conductive bump extends beyond a side surface of the edge of the semiconductor layer.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: May 14, 2019
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Po-Chun Lin, Chin-Lung Chu
  • Patent number: 10249970
    Abstract: A memory device is provided. The memory device includes a substrate, a first interface connector, a second interface connector and a plurality of memory chips. The substrate includes a first edge, a second edge, a third edge and a fourth edge. The first interface connector is disposed on the first edge, wherein the first interface connector includes a plurality of first edge-board contacts, and the first edge-board contacts extend toward a first direction. The second interface connector is disposed on the second edge, the second interface connector includes a plurality of second edge-board contacts, and the second edge-board contacts extend toward a second direction. The memory chips are disposed on the substrate, wherein the second interface connector is located between the memory chips and the first interface connector in the first direction.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: April 2, 2019
    Assignee: SILICON MOTION, INC.
    Inventor: Sheng-Liu Lin
  • Patent number: 10237973
    Abstract: Signal transmission characteristics in a case where a conductive pin is inserted into a through hole to perform connection with an external circuit are improved. A multilayer wiring substrate includes a front layer and a rear layer, and includes a plurality of layers in an inner layer. A conductive portion is provided in each of the layers, and a wiring is disposed on the rear layer. The conductive pin for connection with the external circuit is inserted into the through hole. A land is disposed around the through hole on the rear layer, and the land and the conductive pin are connected to each other through solder.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: March 19, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takashi Tokoro
  • Patent number: 10199760
    Abstract: An electronic device may include a substrate including a first surface facing a first direction, and a second surface facing a second direction, the second direction being opposite to the first direction; a first connector arranged on the first surface, wherein the first connector includes a first hollow member extending in the first direction; a first movable conductive member inserted in the first hollow member and movable in the first direction; and a first elastic member for supporting the first movable conductive member; a second connector arranged on the second surface and aligned with the first connector in the first direction, wherein the second connector includes a second hollow member extending in the first direction, a second movable conductive member inserted into the second hollow member and movable in the first direction, and a second elastic member for supporting the second movable conductive member.
    Type: Grant
    Filed: September 22, 2016
    Date of Patent: February 5, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chungsoon Park, Junghyun Kang, Hyunmin Seo, Seung-Ho Lee, So-Young Lee
  • Patent number: 10149419
    Abstract: A component mounting apparatus includes a mounting unit that mounts an electronic component on a board, at least one component supply unit that supplies chip solder, and a control unit that controls the mounting unit to mount the chip solder, which is supplied from the component supply unit, on the board, based on production data in which a size of chip solder is instructed for each component terminal.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: December 4, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Katsuhiko Itoh, Masanori Ikeda, Kenji Okamoto
  • Patent number: 10141215
    Abstract: An apparatus includes a needle and a needle actuator to move the needle to a position at which the needle presses an electrically-actuatable element into contact with a circuit trace. When the needle presses the electrically-actuatable element into contact with the circuit trace, a dampener, arranged with the needle and the needle actuator, dampens a force applied to the electrically-actuatable element.
    Type: Grant
    Filed: November 3, 2016
    Date of Patent: November 27, 2018
    Assignee: Rohinni, LLC
    Inventors: Justin Wendt, Andrew Huska, Cody Peterson, Clinton Adams, Sean Kupcow
  • Patent number: 10134663
    Abstract: This invention provides a multi-pin semiconductor device as a low-cost flip-chip BGA. In the flip-chip BGA, a plurality of signal bonding electrodes in a peripheral area of the upper surface of a multilayer wiring substrate are separated into inner and outer ones and a plurality of signal through holes coupled to a plurality of signal wirings drawn inside are located between a plurality of rows of signal bonding electrodes and a central region where a plurality of bonding electrodes for core power supply are located so that the chip pad pitch can be decreased and the cost of the BGA can be reduced without an increase in the number of layers in the multilayer wiring substrate.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: November 20, 2018
    Assignee: Renesas Electronics Corporation
    Inventors: Shinji Baba, Toshihiro Iwasaki, Masaki Watanabe
  • Patent number: 10076070
    Abstract: A component mounting apparatus includes a mounting unit that mounts an electronic component on a board, at least one component supply unit that supplies chip solder, and a control unit that controls the mounting unit to mount the chip solder, which is supplied from the component supply unit, on the board, based on production data in which a size of chip solder to be mounted on each electrode of the board is instructed.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: September 11, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Katsuhiko Itoh, Masanori Ikeda, Kenji Okamoto
  • Patent number: 10074919
    Abstract: Embodiments of the present disclosure may relate to a printed circuit board (PCB) that includes a first outer layer and a second outer layer opposite the first outer layer. The PCB may further include a routing layer between the first outer layer and the second outer layer, and an interconnect positioned within the first outer layer and coupled with the routing layer. The interconnect may include a contact within an opening in the first outer layer, wherein the contact is within a plane defined by an outer surface of the first outer layer. The interconnect may further include a plated via directly coupled with the contact and the routing layer. Other embodiments may be described or claimed.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: September 11, 2018
    Assignee: INTEL CORPORATION
    Inventors: Zhen Zhou, Daqiao Du, Anne M. Sepic, Kai Xiao
  • Patent number: 10046409
    Abstract: A method of making an electrical connection includes soldering using channels in a receptacle to direct hot air (or another hot gas) to effect soldering where the electrical connection is to be made. The connection may be made between device electrical contacts of an electrical device, and other contacts, such as receptacle contacts of the receptacle. The connection may be a blind connection, one in which the connected ends of the contacts are hidden or unable to be directly physically accessed, when the connection is made. The electrical connection may be made between device contacts of an electrical device that is inserted into the receptacle, and receptacle electrical contacts that are part of the receptacle. The channels for directing the hot gas to where the soldering occurs may be parts of the receptacle, for example being produced during additive manufacture of the receptacle.
    Type: Grant
    Filed: September 8, 2016
    Date of Patent: August 14, 2018
    Assignee: Raytheon Company
    Inventors: Matthew H. Summers, Jeremy C. Danforth, David G. Garrett, Dmitry V. Knyazev, Stephen M. Bagg, Gaines S. Gibson
  • Patent number: 10034390
    Abstract: A method includes forming a plurality of metal posts. The plurality of metal posts is interconnected to form a metal-post row by weak portions between neighboring ones of the plurality of metal posts. The weak portions include a same metal as the plurality of metal posts. A majority of each of the plurality of metal posts is separated from respective neighboring ones of the plurality of metal posts. An end portion of each of the plurality of metal posts is plated with a metal. The plurality of metal posts is disposed into a metal post-storage. The method further includes retrieving one of the metal posts from a metal-post storage, and bonding the one of the metal posts on a metal pad.
    Type: Grant
    Filed: January 22, 2016
    Date of Patent: July 24, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Li Hsiao, Su-Chun Yang, Chih-Hang Tung, Da-Yuan Shih, Chen-Hua Yu
  • Patent number: 10010981
    Abstract: Materials having increased mobility after heating are disclosed. In one particular exemplary embodiment, the materials may be realized as a material which has reduced apparent molecular weight and/or viscosity and thus increased mobility after a heating process, and which consequently allows material residue to be more easily removed during subsequent cleaning processes. Such a material may be useful in any industrial process which requires heating the material followed by removing material residue.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: July 3, 2018
    Assignee: Indium Corporation
    Inventors: Ning-Cheng Lee, Runsheng Mao
  • Patent number: 9977191
    Abstract: An optical device includes a substrate including a waveguide array formed therein, each waveguide having a reflective surface; a lens array unit including a waveguide-side lens array arranged facing the waveguide array so each lens of the lens array is aligned with the corresponding reflective surface; and a connector unit including an optical transmission path-side lens array arranged and fixed so each lens of the lens array is aligned with the corresponding lens in the waveguide-side lens array, the plurality of inserted optical transmission paths aligned with the corresponding lens in the optical transmission path-side lens array.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: May 22, 2018
    Assignee: International Business Machines Corporation
    Inventors: Shigeru Nakagawa, Hidetoshi Numata, Yoichi Taira