Simultaneous Bonding Of Multiple Joints (e.g., Dip Soldering Of Printed Circuit Boards) Patents (Class 228/180.1)
  • Patent number: 7975371
    Abstract: The present invention carries out the vacuum deposition by setting a deposition angle between a single mask set including a shadow mask having a plurality of slits and a deposition source to form a lower terminal layer, a dielectric layer, an inner electrode layer, and an upper terminal layer at once under a vacuum state generated once, or adjusts slit patterns by relatively moving upper and lower mask sets that respectively include shadow masks having a plurality of slits and face each other to form a lower terminal layer, a dielectric layer, an inner electrode layer, and an upper terminal layer at once under a vacuum state generated once.
    Type: Grant
    Filed: June 21, 2006
    Date of Patent: July 12, 2011
    Assignee: Sehyang Industrial Co., Ltd.
    Inventor: Jae-Ho Ha
  • Publication number: 20110157897
    Abstract: A light emitting diode module includes: a printed circuit board including an upper circuit layer, a lower metal layer, an insulating layer, and a plurality of through holes; a metallic heat sink formed with a plurality of chip-support portions and disposed below the printed circuit board; a thermal connection layer that has lower and upper surfaces respectively bonded to the heat sink and the lower metal layer of the printed circuit board; and a plurality of light emitting diode chips, each of which is placed in contact with and bonded to one of the chip-support portions and each of which is electrically connected to the upper circuit layer. A method for making the light emitting diode module is also disclosed.
    Type: Application
    Filed: December 15, 2010
    Publication date: June 30, 2011
    Applicant: Bright LED Electronics Corp.
    Inventors: Tsung-Jen Liao, Chung-Kai Wang, Yuan-Hsin Liu, Yao-Tsung Hsu
  • Patent number: 7947933
    Abstract: A ceramic heater comprising a ceramic body, a heat generating resistor buried in the ceramic body, an electrode pad that is electrically connected to the heat generating resistor and is formed on the surface of the ceramic body and a lead member bonded onto the electrode pad.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: May 24, 2011
    Assignee: Kyocera Corporation
    Inventors: Ryuichi Nagasako, Osamu Hamada, Koji Sakamoto
  • Publication number: 20110089224
    Abstract: An inexpensive lead-free solder which prevents the occurrence of tin pest at extremely low temperatures and which has good wettability and impact resistance has a composition consisting essentially of, in mass %, Cu: 0.5-0.8%, Bi: at least 0.1% and less than 1%, Ni: 0.02-0.04%, and a remainder of Sn.
    Type: Application
    Filed: April 21, 2009
    Publication date: April 21, 2011
    Inventors: Tsukasa Ohnishi, Toshihiko Taguchi
  • Patent number: 7913894
    Abstract: A solder machine includes a top flat carrier that holds PWBs just above a solder bath. Opposed edges of the carrier are coupled to a frame and each edge can be independently raised or lowered by a respective piston. Also, the base of the frame can pivot along one of its edges to provide a second degree of freedom of motion to the top flat carrier in dipping the PWBs relative to the solder bath, thereby providing a solder machine with a relatively small footprint that nonetheless can achieve precise soldering of PWBs.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: March 29, 2011
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventors: Esteban Arturo Alvarez Serrano, Julián Martinez Fonseca, Horman Armando Millán Sánchez
  • Patent number: 7900807
    Abstract: In a conductive ball mounting apparatus for mounting one conductive ball on each of a plurality of pads which are provided on a substrate and on which an adhesive is formed, the conductive ball mounting apparatus includes: a conductive ball container for containing a plurality of conductive balls therein and having an opening to pass through the plurality of conductive balls; a substrate holder disposed over the conductive ball container to face the opening, and holding the substrate in such a manner that the plurality of conductive balls and the plurality of pads face each other and the substrate is disposed over the conductive ball container with a space therebetween; and a conductive ball supplying unit for supplying the plurality of conductive balls to the plurality of pads via the opening by moving up the plurality of conductive balls.
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: March 8, 2011
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kiyoaki Iida, Kazuo Tanaka, Norio Kondo, Hideaki Sakaguchi, Mitsutoshi Higashi
  • Publication number: 20110051758
    Abstract: A high power laser source comprises at least a bar of laser diodes with a first coefficient of thermal expansion (CTEbar), a submount onto which said laser bar is affixed with a second coefficient of thermal expansion (CTEsub), and a cooler onto which said submount is affixed with a third coefficient of thermal expansion (CTEcool). The submount/cooling assembly exhibits an effective fourth coefficient of expansion (CTEeff). According to the invention, mechanical stress exerted to the laser bar improves reliability and optical performance. To effect this, CTEeff must differ from CTEbar, CTEeff?CTEbar. Preferably, CTEeff should differ by a predetermined amount from CTEbar. The difference is achieved in two ways: either by selecting CTEsub>CTEbar and CTEsub?CTEcool, or by selecting CTEsub<CTEbar and CTEsub<CTEcool. Thereby, all coefficients must be selected such that CTEeff differs from CTEbar: CTEeff?CTEbar, preferably by a percentage of 5% or by a predetermined amount of +/?3-4×10?7K?1.
    Type: Application
    Filed: September 1, 2010
    Publication date: March 3, 2011
    Applicant: OCLARO TECHNOLOGY PLC
    Inventors: Martin KREJCI, Norbert LICHTENSTEIN, Stefan WEISS, Julien BOUCART, René TODT
  • Publication number: 20110049222
    Abstract: A quick-loading soldering apparatus for soldering PCBs comprises a rotatable deck which has a plurality of angularly spaced PCB work sites. While a first PCB work site is angularly positioned for pre-loading and pre-heating PCB components at a pre-loading station, a second PCB work site is angularly positioned for soldering pre-loaded PCB components at a soldering station. Correct rotation of the deck is ensured by a sensor mounted on the deck. If the rotation angle is correct, locator pins provided externally of the deck become actionable by an operator to register the deck prior to the PCB being soldered.
    Type: Application
    Filed: August 12, 2010
    Publication date: March 3, 2011
    Inventor: Alexander James Ciniglio
  • Publication number: 20110041317
    Abstract: Some embodiments of the present invention are generally directed to testing connections of a memory device to a circuit board or other device. In one embodiment, a memory device that is configured to facilitate continuity testing between the device and a printed circuit board or other device is disclosed. The memory device includes a substrate and two connection pads that are electrically coupled to one another via a test path. A system and method for testing the connections between a memory device and a circuit board or other device are also disclosed, as are additional techniques for detecting excess temperature and enabling special functionalities using multi-stage connection pads.
    Type: Application
    Filed: November 2, 2010
    Publication date: February 24, 2011
    Applicant: Micron Technology, Inc.
    Inventor: Thomas Kinsley
  • Patent number: 7861908
    Abstract: A component mounting apparatus includes a component feeder that feeds a component with its bump electrodes facing down, a mounting head that mounts the component onto a substrate, a supporting base that secures the substrate, and a positioning device that aligns the component with the substrate. The mounting head includes an ultrasonic vibration generator, an ultrasonic vibration propagation member that conveys the ultrasonic vibration provided by the ultrasonic vibration generator to a working face holding the component as vibration parallel thereto, a pressure loader that applies a pressure load to the working face from a position immediately thereabove in the direction perpendicular thereto, and a heater that heats the vicinity of the working face. Thereby, ultrasonic bonding is carried out with high reliability even if the component has a number of bump electrodes on its face.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: January 4, 2011
    Assignee: Panasonic Corporation
    Inventors: Shozo Minamitani, Takaharu Mae, Yasuharu Ueno, Akira Yamada, Shinji Kanayama, Makoto Akita, Nobuhisa Watanabe, Akira Mori, Hiroyuki Naito, Shinya Marumo, Makoto Morikawa
  • Publication number: 20100264541
    Abstract: A method is disclosed which includes forming a layer of conductive material above a substrate, forming a masking layer above the layer of conductive material, performing a first etching process on the layer of conductive material with the masking layer in place, removing the masking layer and, after removing the masking layer, performing an isotropic etching process on the layer of conductive material to thereby define a plurality of piercing bond structures positioned on the substrate.
    Type: Application
    Filed: June 30, 2010
    Publication date: October 21, 2010
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Teck Kheng Lee
  • Patent number: 7815122
    Abstract: A method of making an electronic label including a chip (1) provided with two contact strips (2, 3) onto which a conducting wire (4) is welded in a single operation. The segment of conducting wire (4) forming the antenna is then cut between the two contact strips (2, 3) of chip (1). The group of chip and antenna thus realized may then be encapsulated between two sheets of a fibrous or plastic material.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: October 19, 2010
    Inventor: Pierre-Alain Bauer
  • Patent number: 7805834
    Abstract: The present invention includes methods for making liquid crystalline polymer (LCP) interconnect structures using a high temperature and low temperature single sided LCP, where both the high and low temperature LCP are provided with a z-axis connection. The single sided conductive layer is a bus layer to form z-axis conductive stud within the high and low temperature LCP. High and low temperature LCP layers are etched or built up to form circuit patterns and subsequently bonded together to form final multilayer circuit pattern where the low temperature LCP melts to form both dielectric to dielectric bond to high temperature LCP circuit layer, and dielectric to conductive bond.
    Type: Grant
    Filed: August 3, 2007
    Date of Patent: October 5, 2010
    Assignee: Georgia Tech Research Corporation
    Inventors: George E. White, Madhavan Swaminathan, Venkatesh Sundaram, Sidharth Dalmia
  • Patent number: 7807073
    Abstract: A conductor composition being able to easily secure the conductivity at the same level as an Ag bulk at low temperature process, a mounting substrate utilizing the conductor composition and a mounting structure utilizing the conductor composition are provided. In a mounting structure, wherein one or more electrodes (11) of a mounting substrate (10) and one or more surface mounting components (20) are connected through a conductor composition (30), and one or more surface wirings (14) of the mounting substrate (10), one or more inner-layer wirings (13) and one or more via conductors (12) are formed with the conductor composition, the conductor composition contains conductive particles with electrical conductivity, and the conductive particles are composed of low crystallized Ag fillers with the crystal size of 10 ?m or less.
    Type: Grant
    Filed: May 17, 2007
    Date of Patent: October 5, 2010
    Assignee: DENSO CORPORATION
    Inventors: Masashi Totokawa, Yuji Ootani, Hirokazu Imai, Akira Shintai
  • Patent number: 7784669
    Abstract: Briefly, a novel material process is disclosed wherein one or more nucleation modifiers are added, in trace amounts, to a lead-free tin-rich solder alloy to produce a solder composition with reduce or suppressed undercooling temperature characteristics. The modifier being a substance which facilitates the reduction of extreme anisotropic properties associated with body-centered-tetragonal tin based lead-free solder. The addition of the nucleation modifiers to the solder alloy does not materially effect the solder composition's melting point. As such, balls of solder with the nucleated composition freeze while other solder balls within the array remain in the melt. This effectively enables one substrate to be pinned to another substrate by one or more predetermined solder balls to secure the package while the remaining solder joints are in the liquid state.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: August 31, 2010
    Assignee: International Business Machines Corporation
    Inventors: Gareth G. Hougham, Kamalesh K. Srivastava, Sung K. Kang, Da-Yuan Shih, Brian R. Sundlof, S. Jay Chey, Donald W. Henderson, David R. Di Milia, Richard P. Ferlita, Roy A. Carruthers
  • Patent number: 7758350
    Abstract: An electrical connector for electrically connecting a first electronic device to a second electronic device includes a housing that includes a plurality of solder retention channels that hold a plurality of solder segments in a vertical orientation such that at least a vertical surface and one end of each solder segment are exposed. The solder retention channels are formed in first and second opposing rows with an open space formed therebetween. The exposed vertical surfaces of the solder segments face one another.
    Type: Grant
    Filed: February 27, 2008
    Date of Patent: July 20, 2010
    Assignee: Teka Interconnection Systems
    Inventors: James R. Zanolli, Joseph S. Cachina
  • Patent number: 7759613
    Abstract: A reflowing apparatus for mounting parts on a printed wiring board, has a fixed heating portion for blowing the hot air to the printed wiring board, and a moving heating portion for locally varying the temperature of the hot air blown by the fixed heating portion to the printed wiring board.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: July 20, 2010
    Assignee: Fujitsu Limited
    Inventor: Kenji Iketaki
  • Patent number: 7750475
    Abstract: A Sn—Ag—Cu based lead-free solder ball which does not undergo yellowing of its surface when formed into a solder bump on an electrode of an electronic part such as a BGA package. The solder ball has excellent wettability and does not form voids at the time of soldering, even when it has a minute diameter such as 0.04-0.5 mm. It has a composition comprising 1.0-4.0 mass % of Ag, 0.05-2.0 mass % of Cu, 0.0005-0.005 mass % of P, and a remainder of Sn.
    Type: Grant
    Filed: October 6, 2004
    Date of Patent: July 6, 2010
    Assignee: Senju Metal Industry Co., Ltd.
    Inventors: Daisuke Souma, Takahiro Roppongi, Hiroshi Okada, Hiromi Kawamata
  • Patent number: 7751924
    Abstract: An apparatus for placing solder bumps on a mold plate includes: a solder fill head configured for dispensing molten solder onto the mold plate, the solder fill head also configured for relative movement over the mold plate; and a control mechanism configured for controlling positions of the solder fill head relative to the mold plate.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: July 6, 2010
    Assignee: International Business Machines Corporation
    Inventors: Timothy J Chainer, Peter A Gruber, Dennis G Manzer
  • Patent number: 7743963
    Abstract: A solderable cover for solder attachment to an electronic substrate comprises a non-solderable cover defining an attachment pattern, a solderable metal layer in the shape of the attachment pattern, and a layer of adhesive bonding the solderable metal layer to the attachment pattern of the non-solderable cover, wherein the adhesive exhibits bond strength and resiliency sufficient to maintain the solderable metal layer attached to the non-solderable cover when raised in temperature to a melting temperature of a solder.
    Type: Grant
    Filed: February 28, 2006
    Date of Patent: June 29, 2010
    Assignee: Amerasia International Technology, Inc.
    Inventor: Kevin Kwong-Tai Chung
  • Patent number: 7703661
    Abstract: Briefly, a novel material process is disclosed wherein one or more nucleation modifiers are added, in trace amounts, to a lead-free tin-rich solder alloy to produce a solder composition with reduced or suppressed undercooling temperature characteristics. The modifier being a substance which facilitates the reduction of extreme anisotropic properties associated with body-centered-tetragonal tin based lead-free solder. The addition of the nucleation modifiers to the solder alloy does not materially effect the solder composition's melting point. As such, balls of solder with the nucleated composition freeze while other solder balls within the array remain in the melt. This effectively enables one substrate to be pinned to another substrate by one or more predetermined solder balls to secure the package while the remaining solder joints are in the liquid state.
    Type: Grant
    Filed: May 23, 2007
    Date of Patent: April 27, 2010
    Assignee: International Business Machines Corporation
    Inventors: Gareth G. Hougham, Kamalesh K. Srivastava, Sung K. Kang, Da-Yuan Shih, Brian R. Sundlof, S. Jay Chey, Donald W. Henderson, David R. Di Milia, Richard P. Ferlita, Roy A. Carruthers
  • Patent number: 7690550
    Abstract: In a reflow soldering apparatus comprising a conveyor 4 to transport circuit boards 5 mounted with electronic components into multiple chambers 1, 2 and 3, and fans 6 installed in the chambers 1, 2 and 3, the centers of the impellers in the adjacent fans 6 are not on a single perpendicular plane along the transport line of the conveyor and arrayed offset to the left and right. This apparatus may also employ a structure wherein the centers of the impellers in the adjacent fans are not on a single horizontal plane and arrayed offset up and down. Further, it may also employ a structure wherein the fans are arranged with their rotation shafts inclined.
    Type: Grant
    Filed: May 1, 2003
    Date of Patent: April 6, 2010
    Assignee: Yokota Technica Limited Company
    Inventor: Yatsuharu Yokota
  • Patent number: 7637415
    Abstract: A method for manufacturing a printed circuit board includes providing a board including a plurality of electrical traces, a first surface, and a second surface opposite the first surface. The method further includes providing at least one surface mount component having a plurality of electrical terminals. The method also includes applying an adhesive on the first surface of the board, and adhering the surface mounting component to the first surface. The method also includes wave soldering the surface mount component on the first surface to the board to encapsulate at least a portion of the electrical terminals of the surface mount component with a lead-free solder.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: December 29, 2009
    Assignee: General Electric Company
    Inventor: John Steven Holmes
  • Publication number: 20090310320
    Abstract: A standoff contact array is disposed between a mounting substrate of a flip-chip package and a board. The standoff contact array is formable by mating a low-profile solder bump on the mounting substrate with a low-profile solder paste on the board. Thereafter, the standoff contact array is formed by reflowing the low-profile solder paste on the board against the low-profile solder bump on the mounting substrate.
    Type: Application
    Filed: June 16, 2008
    Publication date: December 17, 2009
    Inventors: Weston Roth, Kevin Byrd, Damion Searls, James D. Jackson
  • Patent number: 7631796
    Abstract: A solder machine includes a top flat carrier that holds PWBs just above a solder bath. Opposed edges of the carrier are coupled to a frame and each edge can be independently raised or lowered by a respective piston. Also, the base of the frame can pivot along one of its edges to provide a second degree of freedom of motion to the top flat carrier in dipping the PWBs relative to the solder bath, thereby providing a solder machine with a relatively small footprint that nonetheless can achieve precise soldering of PWBs.
    Type: Grant
    Filed: December 4, 2007
    Date of Patent: December 15, 2009
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventors: Esteban Arturo Alvarez Serrano, Julian Martinez Fonseca, Hozman Armando Millán Sánchez
  • Patent number: 7604152
    Abstract: A soldering technology, particularly a lead-free soldering technology, that can secure the reliability of a whole electronic device is provided. In a method for manufacturing a printed circuit board for electronic devices with a substrate to which a plurality of electronic parts having connection terminals with different metal compositions are connected by soldering, a plurality of solder pastes comprising solder components with different compositions are used, and when the electronic parts are connected by soldering to the substrate, a solder paste having a solder component with a different composition is used for each of the metal compositions for the connection terminals of the electronic parts.
    Type: Grant
    Filed: January 27, 2006
    Date of Patent: October 20, 2009
    Assignee: Fujitsu Limited
    Inventors: Masayuki Ochiai, Hiroki Uchida, Toshiya Akamatsu
  • Patent number: 7568610
    Abstract: A method of soldering electronic component (6) having solder bumps (7) formed thereon to substrate (12), wherein bumps (7) are pressed against a flux transferring stage on which a thin film is formed of flux (10) containing metal powder (16) of good wettability to solder so as to cause metal powder (16) to penetrate oxide films (7a) and embed in the surfaces on the bottom parts of bumps (7), and bumps (7) in this state are positioned and mounted to electrodes (12a) on substrate (12). Substrate (12) is then heated to melt bumps (7) and allow the melted solder to flow and spread along the surfaces of metal powder (16) toward electrodes (12a). The method can thus provide solder bonding portions of high quality without any soldering defect and deterioration of the insulating property.
    Type: Grant
    Filed: June 22, 2005
    Date of Patent: August 4, 2009
    Assignee: Panasonic Corporation
    Inventors: Tadahiko Sakai, Tadashi Maeda
  • Publication number: 20090184155
    Abstract: Provided is a method for mounting a Printed Circuit Board (PCB). The method includes providing a solder cream on a predetermined region of a bottom surface of the PCB except for a region requiring insulation, mounting the PCB on a mounting region of a housing on which the PCB is to be mounted, and fixedly coupling the PCB to the housing by melting and hardening the solder cream provided on the bottom surface of the PCB.
    Type: Application
    Filed: January 21, 2009
    Publication date: July 23, 2009
    Applicant: KMW INC.
    Inventors: Duk-Yong KIM, Yoon-Yong KIM, Hee-Sung GO
  • Patent number: 7562804
    Abstract: Methods of manufacturing optical transceiver modules using lead frame connectors that connect optical sub-assemblies to printed circuit boards. The lead frame connectors include a conductive lead structure that is encased in an insert injection molded plastic casing. The lead frame connector is aligned with the leads that protrude from the back end of the corresponding optical sub-assembly (OSA). The leads pass through corresponding holes in the lead frame connector and are soldered to the conductors of the lead frame assembly. Once the soldering has been performed, the combined OSA and lead frame connector becomes a surface mount device that can then be mounted to the PCB. Assembling an optical transceiver using the lead frame connectors is generally less expensive and more reliable compared to the use of conventional flexible printed circuit board connectors.
    Type: Grant
    Filed: March 26, 2004
    Date of Patent: July 21, 2009
    Assignee: Finisar Corporation
    Inventor: Donald A. Ice
  • Publication number: 20090179067
    Abstract: A solder machine includes a top flat carrier that holds PWBs just above a solder bath. Opposed edges of the carrier are coupled to a frame and each edge can be independently raised or lowered by a respective piston. Also, the base of the frame can pivot along one of its edges to provide a second degree of freedom of motion to the top flat carrier in dipping the PWBs relative to the solder bath, thereby providing a solder machine with a relatively small footprint that nonetheless can achieve precise soldering of PWBs.
    Type: Application
    Filed: December 4, 2007
    Publication date: July 16, 2009
    Inventors: Esteban Arturo Alvarez Serrano, Julian Martinez Fonseca, Hozman Armando Millan Sanchez
  • Patent number: 7546682
    Abstract: A method for repairing a circuit board having defective pre-soldering bumps is proposed. Firstly, the circuit board having a plurality of pre-soldering bumps on a surface thereof is provided, wherein at least one of the pre-soldering bumps has a defect. Then, a micro-electroplating process or a micro-electrolyzing process is performed by a micro-electrode nearby the defective pre-soldering bump, so as to repair the defective pre-soldering bump. Therefore, the present invention is able to enhance the process yield and reduce the production cost.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: June 16, 2009
    Assignee: Phoenix Precision Technology Corporation
    Inventors: Shih-Ping Hsu, Chao Wen Shih
  • Patent number: 7536762
    Abstract: A method for manufacturing a board assembly comprises the steps of: tin-plating a first terminal and a copper-made second terminal that are formed on a circuit board; mounting an electronic component on the circuit board by means of gold-tin eutectic bonding between a gold electrode of the electronic component and the tin-plated first terminal; forming a copper-tin alloy on a surface of the second terminal by heating the circuit board after the mounting step; and bonding the second terminal having the copper-tin alloy formed on its surface to a terminal of another board by means of a thermosetting conductive adhesive.
    Type: Grant
    Filed: January 30, 2006
    Date of Patent: May 26, 2009
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Koji Imai, Yuji Shinkai
  • Patent number: 7537728
    Abstract: A manufacturing method for a material increases the effectiveness of a component so the component can be present in an amount which does not produce undesirable effects. A material is prepared containing the component in a first concentration. The component is at least partially removed to lower the concentration of the component to a second concentration. The concentration of the component may then be increased to a third concentration above the second concentration.
    Type: Grant
    Filed: June 14, 2004
    Date of Patent: May 26, 2009
    Assignee: Senju Metal Industry Co., Ltd.
    Inventor: Minoru Ueshima
  • Patent number: 7534978
    Abstract: A process chamber of an installation for the thermal treatment of printed circuit boards is described. The process chamber may include a fan wheel supported on a shaft parallel to the printed circuit boards, the fan wheel being disposed between two walls of the process chamber. The fan wheel is open at its two end faces and the two end faces are at such a distance from the walls of the process chamber that gas flows in unimpeded in two substreams between the end faces of the fan wheel and the walls and flows out from the cylindrical surface of the fan wheel over the length thereof and in the extent of the process chamber in the form of a ribbon-shaped gas stream, the gas stream being directed essentially in the cross section through a channel onto the printed circuit boards.
    Type: Grant
    Filed: June 11, 2003
    Date of Patent: May 19, 2009
    Assignee: SEHO Systemtechnik GmbH
    Inventors: Rolf Ludwig Diehm, Rudolf Ullrich
  • Publication number: 20090108052
    Abstract: A fiber optic device for enabling soldering is described. The fiber optic device includes an entry portion comprising an optical fiber bundle for receiving a single light beam wherein the optical fiber bundle splits the light beam into a plurality of separate portions, each of the separate portions for enabling soldering. The fiber optic device further includes an exit portion for emitting each of the plurality of separate portions of the light beam in a pattern to enable soldering at a plurality of locations simultaneously utilizing the single light beam.
    Type: Application
    Filed: October 31, 2007
    Publication date: April 30, 2009
    Inventor: Xiangyang FENG
  • Patent number: 7513032
    Abstract: A method of mounting an electronic part to a substrate, comprising: a substrate feed transporting step transporting the substrate 10 supplied to a substrate transport start position to a mounting unit 12; an electronic part supplying step supplying the electronic part 11 to the mounting unit 12; a mounting step mounting the electronic part 11 to the substrate by the mounting unit 12; and a substrate return transporting step transporting the substrate 10 to a substrate discharge position on which the electronic part has been mounted in the mounting step, wherein in the substrate feed transporting step, a carrier 100 is heated during a period when transported over a predetermined distance from the substrate transport start position; and the substrate feed transporting step, the mounting step, and the substrate return transporting step are performed while the substrate 10 is held by the carrier 100 heated during the predetermined distance.
    Type: Grant
    Filed: January 19, 2005
    Date of Patent: April 7, 2009
    Assignee: Fujitsu Limited
    Inventors: Koichi Shimamura, Kazuyuki Ikura
  • Patent number: 7506795
    Abstract: Apparatus and methods are provided for thermally coupling a heat dissipation device to a microelectronic device. A reflowable thermal interface material is applied between the back side of a microelectronic die and a heat dissipation device. Heat and pressure is conducted through the heat dissipation device to the interface material and producing thereby liquefaction followed by solidification of the interface material, the solidification occurring progressively from the center to the peripheral edge. A thermal compression bonding apparatus is provided comprising a bonding head adapted to apply heat and pressure to the heat dissipation device whereby providing the desired thermal profile to effect solidification of the interface material from the center outward.
    Type: Grant
    Filed: December 13, 2004
    Date of Patent: March 24, 2009
    Assignee: Intel Corporation
    Inventor: Steve M. Mayer
  • Patent number: 7490403
    Abstract: In a soldering method for soldering an electronic component including a palladium or palladium alloy layer formed on a surface of the electronic component and also including a soldering lead terminal onto a printed wiring board including a soldering land and plated through hole, a solder layer containing tin and zinc as main components is formed on the surfaces of the land through hole by a HAL treatment. The lead terminal is inserted and mounted in the through hole. The printed wiring board is brought into contact with jet flows of a solder containing tin and zinc as the main components to thereby supply a solder to the land and through hole.
    Type: Grant
    Filed: December 5, 2006
    Date of Patent: February 17, 2009
    Assignees: NEC Infrontia Corporation, NEC Toppan Circuit Solutions Toyoma, Inc., Soldercoat Co., Ltd., Maruya Seisakusbo Co., Ltd., Nihon Den-netsu Keiki Co., Ltd.
    Inventors: Kazuhiko Tanabe, Hiroaki Terada, Masahiro Sugiura, Tetsuharu Mizutani, Keiichiro Imamura, Takashi Tanaka
  • Patent number: 7490402
    Abstract: The present invention provides a number of techniques for laminating and interconnecting multiple substrates to form a multilayer package or other circuit component. A solder bump may be formed on the conductive pad of at least one of two or more substrates. The solder bump preferably is formed from an application of solder paste to the conductive pad(s). Adhesive films may be positioned between the surfaces of the substrates having the conductive pads, where the adhesive films include apertures located substantially over the conductive pads such that the conductive pads and/or solder bumps confront each other through the aperture. The two or more substrates then may be pressed together to mechanically bond the two or more substrates via the adhesive films. The solder bump(s) may be reflowed during or after the lamination to create a solder segment that provides an electrical connection between the conductive pads through the aperture in the adhesive films.
    Type: Grant
    Filed: September 25, 2007
    Date of Patent: February 17, 2009
    Assignee: General Dynamics Advanced Information Systems, Inc.
    Inventors: Deepak K. Pai, Ronald R. Denny
  • Patent number: 7476564
    Abstract: A flip-chip packaging process is disclosed. The present invention is featured in forming a copper pillar on a wafer, forming a solder on a substrate; and enabling the solder to substantially cover the entire externally-exposed surface of the copper pillar, thereby connecting the copper pillar to the substrate. The copper pillar of the present invention can be such as a prism or a cylinder.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: January 13, 2009
    Assignee: Advanced Semiconductor Engineering Inc.
    Inventors: Chien-Fan Chen, Yi-Hsin Chen
  • Publication number: 20080302560
    Abstract: A method of manufacturing a printed wiring board with solder bumps includes forming a solder-resist layer having small and large apertures exposing a respective conductive pad of the printed wiring board, loading a solder ball in each of the small and large apertures using a mask with aperture areas corresponding to the apertures of the solder-resist layer, forming a first bump having a first height, from the solder ball in the small aperture, and a second bump having a second height, from the solder ball in the large aperture, the first height being greater than the second height, and pressing a top of the first bump such that the first height becomes substantially the same as the second height. A multilayer printed wiring board includes a solder-resist layer with apertures of differing sizes and solder bumps having substantially equal volumes but a difference in height no greater than 10 ?m.
    Type: Application
    Filed: May 13, 2008
    Publication date: December 11, 2008
    Applicant: IBIDEN CO., LTD
    Inventors: Katsuhiko Tanno, Youichirou Kawamura
  • Publication number: 20080290142
    Abstract: Briefly, a novel material process is disclosed wherein one or more nucleation modifiers are added, in trace amounts, to a lead-free tin-rich solder alloy to produce a solder composition with reduce or suppressed undercooling temperature characteristics. The modifier being a substance which facilitates the reduction of extreme anisotropic properties associated with body-centered-tetragonal tin based lead-free solder. The addition of the nucleation modifiers to the solder alloy does not materially effect the solder composition's melting point. As such, balls of solder with the nucleated composition freeze while other solder balls within the array remain in the melt. This effectively enables one substrate to be pinned to another substrate by one or more predetermined solder balls to secure the package while the remaining solder joints are in the liquid state.
    Type: Application
    Filed: May 23, 2007
    Publication date: November 27, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gareth G. Hougham, Kamalesh K. Srivastava, Sung K. Kang, Da-Yuan Shih, Brian R. Sundlof, S. Jay Chey, Donald W. Henderson, David R. Di Milia, Richard P. Ferlita, Roy A. Carruthers
  • Patent number: 7456438
    Abstract: A nitride-based semiconductor LED which is flip-chip bonded on a lead pattern of a sub-mount through a bump ball comprises a substrate; a light-emitting structure formed on the substrate; an electrode formed on the light-emitting structure; a protective film formed on the resulting structure having the electrode formed therein, the protective film exposing the electrode surface corresponding to a portion which is connected to the lead pattern of the sub-mount through a bump ball; and a grid-shape buffer film formed on the electrode surface exposed through the protective film.
    Type: Grant
    Filed: October 17, 2006
    Date of Patent: November 25, 2008
    Assignee: Samsung Electro-Mechanics Co., ltd.
    Inventors: Hyuk Min Lee, Hyoun Soo Shin, Chang Wan Kim, Yong Chun Kim
  • Publication number: 20080272180
    Abstract: A heat spreader module has a pedestal, a heat spreader member joined to the pedestal by a first active hard brazing material, an intermediate layer joined to the heat spreader member by a second active hard brazing material, an insulating board joined to the intermediate layer by a third active hard brazing material, and a circuit board joined to the insulating board by a fourth active hard brazing material. The first through fourth active hard brazing materials are supplied such that the active hard brazing materials have a thickness ranging from 3 to 20 ?m when the components of the heat spreader module are joined together under pressure, and contain an active element in an amount ranging from 400 to 1000 ?g/cm2.
    Type: Application
    Filed: July 11, 2008
    Publication date: November 6, 2008
    Applicant: NGK Insulators, Ltd.
    Inventors: Takahiro ISHIKAWA, Masayuki SHINKAI, Makoto MIYAHARA, Shuhei ISHIKAWA, Nobuaki NAKAYAMA, Seji YASUI
  • Publication number: 20080268676
    Abstract: An electrical connector for electrically connecting a first electronic device to a second electronic device includes a housing that includes a plurality of solder retention channels that hold a plurality of solder segments in a vertical orientation such that at least a vertical surface and one end of each solder segment are exposed. The solder retention channels are formed in first and second opposing rows with an open space formed therebetween. The exposed vertical surfaces of the solder segments face one another.
    Type: Application
    Filed: February 27, 2008
    Publication date: October 30, 2008
    Applicant: Teka Interconnections Systems, Inc.
    Inventors: James R. Zanolli, Joseph S. Cachina
  • Patent number: 7427423
    Abstract: A method of fabricating solder assemblies for forming solder connections that include a dielectric base having a non solder-wettable surface, a plurality of solder-wettable pads exposed to said surface, and an electrically conductive potential plane element having a non solder-wettable surface overlying the surface of the base in proximity to the pads but spaced from said pads. The non-wettable surface of the potential plane element may include a metal such as nickel or a metal oxide. The potential plane element thus performs the functions of a solder mask to prevent solder from forming short circuits between adjacent pads, and may also act as a ground plane, power plane or shielding element.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: September 23, 2008
    Assignee: Tessera, Inc.
    Inventors: Masud Beroz, Belgacem Haba
  • Publication number: 20080217383
    Abstract: A screen plate having a plurality of openings is placed on a suspension substrate in which a plurality of conductive pads are formed. Conductive paste is moved in one direction on an upper surface of the screen plate, so that the conductive paste is applied onto the conductive pads through the openings. A recess that is inwardly bent is formed in each of the openings of the screen plate.
    Type: Application
    Filed: March 6, 2008
    Publication date: September 11, 2008
    Applicant: NITTO DENKO CORPORATION
    Inventor: Takahiko YOKAI
  • Patent number: 7410090
    Abstract: A system, method, and apparatus of providing conductive bonding material into a plurality of cavities in a circuit supporting substrate is disclosed. The method comprises placing a fill head in substantial contact with a circuit supporting substrate. The circuit supporting substrate includes at least one cavity. A linear motion or a rotational motion is provided to at least one of the circuit supporting substrate and the fill head while the fill head is in substantial contact with the circuit supporting substrate. Conductive bonding material is forced out of the fill head toward the circuit supporting substrate. The conductive bonding material is provided into the at least one cavity contemporaneous with the at least one cavity being in proximity to the fill head.
    Type: Grant
    Filed: April 21, 2006
    Date of Patent: August 12, 2008
    Assignee: International Business Machines Corporation
    Inventors: Steven A. Cordes, Peter A. Gruber, John U. Knickerbocker, James L. Speidell
  • Publication number: 20080179382
    Abstract: Disclosed are methodologies for producing lead type electrical components. Components are placed in a lead frame with termination paste applied to selected portions of the component. Upon firing of the assembled lead frame and electrical components, the electrical components are concurrently terminated, and provided with strongly secured leads.
    Type: Application
    Filed: January 10, 2008
    Publication date: July 31, 2008
    Applicant: AVX Corporation
    Inventors: John L. Galvagni, Thomas J. Brown
  • Publication number: 20080173698
    Abstract: Certain examples disclosed herein are directed to materials that are designed for use in interconnects of electrical devices such as, for example, printed circuit boards and solar cells. In certain examples, a two-step solder may be used to reduce stresses on the materials used in the production of the electrical devices.
    Type: Application
    Filed: October 17, 2007
    Publication date: July 24, 2008
    Inventors: Michael T. Marczi, Paul Koep, Michel A. de Monchy, Martinus N. Finke, Brian Lewis