Simultaneous Bonding Of Multiple Joints (e.g., Dip Soldering Of Printed Circuit Boards) Patents (Class 228/180.1)
  • Patent number: 9553079
    Abstract: A flip chip assembly is disclosed that includes a die with die circuitry and a plurality of electrical contacts electrically connected to the die circuitry. A substrate includes electrical contacts that are juxtaposed with and electrically connected to corresponding die electrical contacts. A passive component is disposed between the die and the substrate, and includes a dielectric disposed between a first electrode and a second electrode. The first electrode is electrically connected to a first of the die electrical contacts and a corresponding substrate electrical contact, and the second electrode is electrically connected to a second of the die electrical contacts and a corresponding substrate electrical contact.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: January 24, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jean Audet, Luc G. Guerin, Richard Langlois, Stephan L. Martel, Sylvain E. Ouimet
  • Patent number: 9539881
    Abstract: The invention relates to a heating module for a supplemental electric heating device for heating an airflow, comprising at least one heat-conductive bar against which at least one electric resistor is arranged. The heat-conductive bar is partially electrically insulated by an insulating coating in order to prevent potential short-circuits and to ensure proper operation and optimal safety when heating the passenger compartment of a vehicle.
    Type: Grant
    Filed: October 11, 2012
    Date of Patent: January 10, 2017
    Assignee: VALEO SYSTEMES THERMIQUES
    Inventors: Jean Gatinois, Pierre Derveloy, Laurent Tellier
  • Patent number: 9531095
    Abstract: A communication structure with connecting assembly is described. The communication structure comprises a housing base, a circuit board, a connecting assembly and a cover body wherein the connecting assembly comprises a plurality of conducting terminals, an adapting board coupled to the conducting terminals, and a first connecting socket coupled to the adapting board. The communication structure stably and electrically connected to another communication structure by the connecting assembly and at least two communication structures are electrically connected together to construct a communication system for conveniently expending more communication nodes.
    Type: Grant
    Filed: March 17, 2016
    Date of Patent: December 27, 2016
    Assignee: VIEWMOVE TECHNOLOGIES, INC.
    Inventors: Shyh-Biau Jiang, Li-Yeh Liu, Dong-Liang Lee, Chuan-Fu Huang, Yun-Sheng Hsiao
  • Patent number: 9508676
    Abstract: A semiconductor package structure having hollow chamber includes a bottom substrate having a bottom baseboard and a bottom metal layer formed on a disposing area of the bottom baseboard, a connection layer formed on the bottom metal layer, and a top substrate. The bottom metal layer has at least one corner having a first and a second outer lateral surface, and an outer connection surface. A first extension line is formed from a first extreme point of the first outer lateral surface, and a second extension line is formed from a second extreme point of the second outer lateral surface. A first exposing area of the bottom baseboard is formed by connecting the first and second extreme points and a cross point of the first and second extreme points. The top substrate connects to the connection layer to form a hollow chamber between the top and bottom substrates.
    Type: Grant
    Filed: September 9, 2015
    Date of Patent: November 29, 2016
    Assignee: CHIPBOND TECHNOLOGY CORPORATION
    Inventors: Cheng-Hung Shih, Yung-Wei Hsieh, Shu-Chen Lin, Fu-Yen Ho, Yen-Ting Chen
  • Patent number: 9485809
    Abstract: The invention relates to a heating rod, comprising a housing made of metal, a heating element disposed in the housing, and a contact plate, which is seated against the heating element with a front and which protrudes from the housing. It is provided according to this disclosure that the contact plate is an aluminum sheet having an anodized back and the contact plate comprises projections for positioning the heating element.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: November 1, 2016
    Assignee: BorgWarner Ludwigsburg GmbH
    Inventors: Victor Ritzhaupt, Alexander Dauth, Michael Luppold
  • Patent number: 9474145
    Abstract: A substrate for a semiconductor package and a method for manufacturing a semiconductor package are disclosed. The substrate comprises a surface, and package unit regions arranged on the surface in a row direction to form a plurality of rows. The package unit regions of an n+1-th row are arranged offset in a row direction from the package unit regions of an n-th row. The method includes molding semiconductor chips and spaces between the substrate and the semiconductor chips on the package unit regions of the last row at substantially the same time.
    Type: Grant
    Filed: June 2, 2015
    Date of Patent: October 18, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: JinGyu Kim, Hyun Lee
  • Patent number: 9324658
    Abstract: A system for interconnecting at least two die each die having a plurality of conducting layers and dielectric layers disposed upon a substrate which may include active and passive elements. In one embodiment there is at least one interconnect coupling at least one conducting layer on a side of one die to at least one conducting layer on a side of the other die. Another interconnect embodiment is a slug having conducting and dielectric layers disposed between two or more die to interconnect between the die. Other interconnect techniques include direct coupling such as rod, ball, dual balls, bar, cylinder, bump, slug, and carbon nanotube, as well as indirect coupling such as inductive coupling, capacitive coupling, and wireless communications. The die may have features to facilitate placement of the interconnects such as dogleg cuts, grooves, notches, enlarged contact pads, tapered side edges and stepped vias.
    Type: Grant
    Filed: April 18, 2013
    Date of Patent: April 26, 2016
    Assignee: GULA CONSULTING LIMITED LIABILITY COMPANY
    Inventor: Ernest E. Hollis
  • Patent number: 9318313
    Abstract: A semiconductor structure includes at least a semiconductor body, a delimiting structure delimiting a cup-shaped recess in the body and a conductive region in the recess. The conductive region is made of a low-melting-temperature material, having a melting temperature lower than that of the materials forming the delimiting structure.
    Type: Grant
    Filed: April 24, 2013
    Date of Patent: April 19, 2016
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alberto Pagani, Federico Giovanni Ziglioli
  • Patent number: 9240382
    Abstract: A system for interconnecting at least two die each die having a plurality of conducting layers and dielectric layers disposed upon a substrate which may include active and passive elements. In one embodiment there is at least one interconnect coupling at least one conducting layer on a side of one die to at least one conducting layer on a side of the other die. Another interconnect embodiment is a slug having conducting and dielectric layers disposed between two or more die to interconnect between the die. Other interconnect techniques include direct coupling such as rod, ball, dual balls, bar, cylinder, bump, slug, and carbon nanotube, as well as indirect coupling such as inductive coupling, capacitive coupling, and wireless communications. The die may have features to facilitate placement of the interconnects such as dogleg cuts, grooves, notches, enlarged contact pads, tapered side edges and stepped vias.
    Type: Grant
    Filed: April 18, 2013
    Date of Patent: January 19, 2016
    Assignee: Sagacious Investment Group, L.L.C.
    Inventor: Ernest E. Hollis
  • Patent number: 9224550
    Abstract: A copper substrate for use as a contact having Sn plating, nickel plating and Au plating overlying the substrate. A combination of Sn plating is applied over a copper substrate; nickel plating is applied over the Sn plating; and Au plating is applied over the nickel plating to form a stack. The stack is then processed by a vapor phase Sn reflow step that results in the formation of intermetallics and eliminates stannous oxide layers that may otherwise form on the tin layer. The intermetallic layers provide excellent corrosion resistance, and serve as diffusion barriers to prevent the further migration of either Ni atoms or Cu atoms into the Sn, and Sn atoms outwardly into either the Ni or the Cu. Regardless of the thickness, the interfaces are substantially free of oxides, in particular tin oxide, and not prone to delamination.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: December 29, 2015
    Assignee: TYCO ELECTRONICS CORPORATION
    Inventor: George Jyh-Shann Chou
  • Patent number: 9180540
    Abstract: A solar cell module comprises a solar cell die that is soldered to a substrate. The substrate comprises one or more power contacts. A power conductor is soldered to a power contact, thereby electrically coupling the power conductor to the solar cell die. A pre-heat module heats a first side of the substrate at a first area to a first temperature for a first duration. Then, a solder heat source solders a power conductor to a power contact at a second area of the substrate at a second temperature for a second duration. The resulting solder connection at the power conductor is less prone to cold-solder defects. The temperature of the pre-heat module is controlled to promote curing of an RTV sealant used in the manufacture of the solar cell module. The temperature of the solder heat source is controlled to avoid burning and degrading of the RTV sealant.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: November 10, 2015
    Assignee: Flextronics AP, LLC
    Inventors: Dason Cheung, Mario Lopez Ruiz, Richard Loi, Murad Kurwa
  • Patent number: 9148958
    Abstract: An electronic device includes an electronic component including a plurality of terminals and a circuit board on which the electronic component is mounted. The circuit board includes a board body, a plurality of electrode pads arranged on the board body, each of the electrode pads being connected to each of the terminals by solder, a first solder resist formed on the board body and having a plurality of first openings, each of the first openings accommodating each of the electrode pads, and a second solder resist formed on the first solder resist and having a plurality of second openings, each of the second openings being larger than each of the first openings and communicating with each of the first openings.
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: September 29, 2015
    Assignee: FUJITSU LIMITED
    Inventors: Yoshiyuki Hiroshima, Akiko Matsui, Mitsuhiko Sugane, Takahide Mukoyama, Tetsuro Yamada, Takahiro Ooi
  • Patent number: 9073154
    Abstract: A soldering flux which is suitable as a no-clean post flux in flow soldering and which can prevent the formation of whiskers which tends to occur when soldering electronic parts to a printed circuit board using a lead-free solder (such as Sn-3.0Ag-0.5Cu) having a higher Sn content and a higher melting point than the eutectic solder contains, in addition to a rosin as a base resin and an activator, 0.2-4 mass % of at least one compound selected from acid phosphate esters and derivatives thereof. The formation of whiskers can be more effectively prevented by carrying out soldering in a nitrogen atmosphere.
    Type: Grant
    Filed: December 12, 2007
    Date of Patent: July 7, 2015
    Assignees: Senju Metal Industry Co., Ltd., Denso Corporation
    Inventors: Yuji Kawamata, Takashi Hagiwara, Hiroyuki Yamada, Kazuyuki Hamamoto
  • Publication number: 20150146399
    Abstract: An embodiment of a method of attaching a semiconductor die to a substrate includes placing a bottom surface of the die over a top surface of the substrate with an intervening die attach material. The method further includes contacting a top surface of the semiconductor die and the top surface of the substrate with a conformal structure that includes a non-solid, pressure transmissive material, and applying a pressure to the conformal structure. The pressure is transmitted by the non-solid, pressure transmissive material to the top surface of the semiconductor die. The method further includes, while applying the pressure, exposing the assembly to a temperature that is sufficient to cause the die attach material to sinter. Before placing the die over the substrate, conductive mechanical lock features may be formed on the top surface of the substrate, and/or on the bottom surface of the semiconductor die.
    Type: Application
    Filed: November 25, 2013
    Publication date: May 28, 2015
    Inventors: LAKSHMINARAYAN VISWANATHAN, L.M. Mahalingam, David F. Abdo, Jaynal A. Molla
  • Patent number: 9004343
    Abstract: In a reflow soldering apparatus, air heated by heaters is blown by fans onto a printed circuit board. Temperature controllers that control temperature of the heaters supply operation amount thereof to a calculation unit that calculates consumed electric energy of soldering apparatus. Inverters that control revolution of fans supply a value of current to the calculation unit. A control unit supplies a coefficient of the consumed electric energy to the calculation unit. The calculation unit calculates a total amount of consumed electric energy of the reflow soldering apparatus based on the operation amount, value of current and coefficient of the consumed electric energy thus obtained. A display unit displays on an operation screen the total amount of consumed electric energy of the reflow soldering apparatus, which has been calculated by the calculation unit.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: April 14, 2015
    Assignee: Senju Metal Industry Co., Ltd.
    Inventors: Hiroyuki Inoue, Tadayoshi Ohtashiro
  • Patent number: 8991680
    Abstract: The electrode array is a device for making electrical contacts with cellular tissue or organs. The electrode array includes an assembly of electrically conductive electrodes arising from a substrate where the electrodes are hermetically bonded to the substrate. A method of manufacture of an electrode array and associated circuitry is disclosed where the braze preform tab disappears during the braze bonding process and is completely drawn into the substrate feedthrough holes such that the braze perform tab is completely involved in the braze joint and is no longer connecting the adjacent electrodes.
    Type: Grant
    Filed: August 16, 2011
    Date of Patent: March 31, 2015
    Assignee: Alfred E. Mann Foundation for Scientific Research
    Inventors: Joseph H. Schulman, Guangqiang Jiang, Charles L. Byers
  • Patent number: 8991681
    Abstract: A die bonder and a bonding method are disclosed which make it possible to provide high-quality products, particularly even if a die is rotated through predetermined degrees relative to an already-bonded die and then laminated. In the die bonder and bonding method in which a die is picked up from a wafer by a pick-up head which then places the die on an alignment stage, and the die is picked up from the alignment stage by a bonding head which then bond the die onto a substrate or an already-bonded die, a posture of the die is rotated through predetermined degrees on a plane parallel to a plane on which the bonding is performed, before the bonding head picks up the die from the alignment stage.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: March 31, 2015
    Assignee: Hitachi High-Tech Instuments Co., Ltd.
    Inventors: Hiroshi Maki, Masayuki Mochizuki, Yukio Tani, Takehito Mochizuki
  • Publication number: 20150048148
    Abstract: A method and apparatus for self-assembling a part on a substrate are disclosed herein. In some embodiments, a method includes placing a substrate having a first binding site capable of generating a first magnetic field and having a first shaped surface with a first droplet conformably disposed thereon into a first fluid; placing a part having a second binding site capable of generating a second magnetic field and having a second shaped surface with a second droplet conformably disposed on the second shaped surface into the first fluid; and attracting the part towards the first binding site such that an equilibrium is formed between an attractive force and a repulsive force such that the part is free to rotate about the first binding site to minimize the repulsive force when the first and second shaped surfaces rotate into an alignment causing the part to aligned with the first binding site.
    Type: Application
    Filed: September 26, 2014
    Publication date: February 19, 2015
    Applicant: The United States of America as represented by the Secretary of the Army
    Inventor: Christopher James Morris
  • Patent number: 8944309
    Abstract: A solder joint may be used to attach components of an organic vapor jet printing device together with a fluid-tight seal that is capable of performance at high temperatures. The solder joint includes one or more metals that are deposited over opposing component surfaces, such as an inlet side of a nozzle plate and/or an outlet side of a mounting plate. The components are pressed together to form the solder joint. Two or more of the deposited metals may be capable of together forming a eutectic alloy, and the solder joint may be formed by heating the deposited metals to a temperature above the melting point of the eutectic alloy. A diffusion barrier layer and an adhesion layer may be included between the solder joint and each of the components.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: February 3, 2015
    Assignee: The Regents of The University of Michigan
    Inventors: Stephen R. Forrest, Gregory McGraw
  • Patent number: 8939347
    Abstract: The present disclosure relates to the field of fabricating microelectronic packages, wherein magnetic particles distributed within a solder paste may be used to form a magnetic intermetallic compound interconnect. The intermetallic compound interconnect may be exposed to a magnetic field, which can heat a solder material to a reflow temperature for attachment of microelectronic components comprising the microelectronic packages.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: January 27, 2015
    Assignee: Intel Corporation
    Inventors: Rajasekaran Swaminathan, Ravindranath V. Mahajan
  • Patent number: 8934999
    Abstract: A robotic processing system includes a microprocessor-controlled workpiece processor having a mobile processing element to be positioned independently in three orthogonal dimensions with respect to each of a plurality of target locations on a workpiece, with each particular target location of the plurality of target locations including an element to be processed, the mobile processing element processing the element at each particular target location by first moving to an initial location that is offset from the particular target location in a single dimension and then second moving along the single dimension towards the element at the particular target location until a contact signal is detected; and a control, coupled to the workpiece and to the mobile processing element, communicating the contact signal to the workpiece processor when the processing element makes physical contact with the element at the particular target location.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: January 13, 2015
    Assignee: Tesla Motors, Inc.
    Inventor: Nicholas R. Kalayjian
  • Publication number: 20150008254
    Abstract: A bond head for a thermocompression bonder is provided. The bond head includes a tool configured to hold a workpiece to be bonded, a heater configured to heat the workpiece to be bonded, and a chamber proximate the heater. The chamber is configured to receive a cooling fluid for cooling the heater.
    Type: Application
    Filed: June 25, 2014
    Publication date: January 8, 2015
    Inventors: Matthew B. Wasserman, Michael P. Schmidt-Lange
  • Patent number: 8899289
    Abstract: When joining a processing target substrate and a supporting substrate together by suction-holding the processing substrate and the supporting substrate respectively on a first holding unit and a second holding unit arranged to face each other and pressing the second holding unit toward the first holding unit while heating the substrates by heating mechanisms of the holding units, the present invention preheats at least the processing target substrate before suction-holding the processing target substrate on the first holding unit to suppress generation of particles when joining the processing target substrate and the supporting substrate together so as to properly perform the joining of the processing target substrate and the supporting substrate.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: December 2, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Masatoshi Deguchi, Masatoshi Shiraishi, Shinji Okada
  • Publication number: 20140301042
    Abstract: An electronic device is attached to a first surface of a board which includes vias. A heat sink precursor for the electronic device is attached to the second surface of the electronic board. The heat sink precursor includes a cavity facing the vias. A wave of solder paste is applied to the second surface. The solder paste penetrates into the cavity of the heat sink precursor and flows by capillary action through the vias to weld a thermal radiator and/or electronic contact of the electronic device to the vias. The solder paste further remains in the cavity to form a corresponding heat sink.
    Type: Application
    Filed: March 26, 2014
    Publication date: October 9, 2014
    Applicant: STMicroelectronics S.r.l.
    Inventors: Cristiano Gianluca Stella, Rosalba Cacciola, Giuseppe Luigi Malgioglio
  • Publication number: 20140291006
    Abstract: A printed circuit board solder mounting method of solder-jointing a first-land formed on a first-printed-circuit-board and a second-land formed on a second-printed-circuit-board together, includes: filling a solder-filling-hole with cream solder, the solder-filling-hole provided so as to be open in a planar region of the first-land; arranging a solder-drawing-hole so that the solder-drawing-hole and the solder-filling-hole face each other, the solder-drawing-hole being formed so as to be open in a planar region of the second region, having a center position to be superposed on a center position of the solder-filling-hole, and having a solder wettability higher than a solder wettability of the solder-filling-hole; melting the cream solder in the solder-filling-hole by reflow heating and causing at least part of the cream solder to ascend to the solder-drawing-hole facing the solder-filling-hole; and jointing the first-land and the second-land together by solidifying the cream solder interposed between the firs
    Type: Application
    Filed: January 6, 2014
    Publication date: October 2, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Keiichi YAMAMOTO, Takahiro KITAGAWA
  • Publication number: 20140263583
    Abstract: A method includes placing a plurality of first package components over second package components, which are included in a third package component. First metal connectors in the first package components are aligned to respective second metal connectors of the second package components. After the plurality of first package components is placed, a metal-to-metal bonding is performed to bond the first metal connectors to the second metal connectors.
    Type: Application
    Filed: April 19, 2013
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Li Hsiao, Da-Yuan Shih, Chih-Hang Tung, Chen-Hua Yu
  • Patent number: 8833637
    Abstract: A device using the live welding method for aluminum electrolytic cell overhauling under series full current consists of short-circuit buses at the bottom of the cell (1), pillar buses (2), an anode bus (3), a balance bus (4), a inter-cell standby bus (5), a door-shaped pillar clamp (6), an arcuate clamp (7) of anode buses, a current conversion switch (8, a mechanical switching device (9) for the short-circuit port, a voltage sensor and wires thereof (10), a temperature sensor and wires thereof (11), a system (12) for data acquiring, displaying, analyzing and alarming, an A-side welding area (13), a B-side welding area (14) and compression-joint points (15) on pillar soft belts of overhauling cells; and the live welding method comprises the following steps: when welding is required to be performed in some zone, the currents of short-circuit buses at the bottom of the cell (1) and pillar buses (2) which influence the welding area most are cut off, the serial currents are shunted to other pillar buses (2), other
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: September 16, 2014
    Assignee: China Aluminum International Engineering Corporation Limited
    Inventors: Tao Yang, Bin Cao
  • Patent number: 8826527
    Abstract: Disclosed herein is a printed circuit board, including: a substrate including an insulation layer in which a cavity is formed; an electronic component mounted in the cavity of the substrate and having connection terminals; an insulation material layer formed on one side of the substrate to bury the electronic component; a first circuit layer formed on the other side of the substrate and including a connection pattern connecting with the connection terminals of the electronic component; and a second circuit layer formed on the insulation material layer. The printed circuit board is advantageous in that it can prevent the warpage thereof and ensure the reliability of electrical connection between an electronic component and a circuit layer by adjusting the thickness, thermal expansion coefficient and elastic modulus of insulation layer or the insulating material.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: September 9, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Jin Seon Park
  • Patent number: 8807416
    Abstract: A reflow soldering system wherein a heating oven is provided with a contact heating unit which has a transport rail and a top heat transfer heater, and with a hot gas blowing heating unit, the transport rail and top heat transfer heater are respectively provided with heaters which heat the outer edge part of the printed circuit board, and the transport rail or top heat transfer heater moves in an up-down direction so that the transport rail and top heat transfer heater clamp and heat the outer edge part of the printed circuit board.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: August 19, 2014
    Assignee: Denso Corporation
    Inventors: Takuji Sukekawa, Hiroyuki Yamada, Noriyasu Inomata
  • Publication number: 20140218886
    Abstract: An electronic device has a printed substrate having land electrodes and a chip-type electronic component having external electrodes formed on a surface of a component element body. The land electrodes and the external electrodes are bonded via a solder to form electrode bonding parts. A thermosetting resin is filed between the electrode bonding parts. The bonding material contains solder particles having a melting point T1, a thermosetting resin having a curing temperature T2 that is higher than the melting point T1, and an activating agent having an activation temperature T3 that is lower than the curing temperature T2. The viscosity of the contained components except the solder particles at the melting point T1 is 0.57 Pa·s or less, and the melting point T1 and the activation temperature T3 satisfy T1?T3<50° C.
    Type: Application
    Filed: March 25, 2014
    Publication date: August 7, 2014
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Akihiro Nomura, Hidekiyo Takaoka
  • Publication number: 20140209666
    Abstract: A method for packaging a semiconductor device includes attaching a first array of solder material to a first surface of an interposer; bringing the first array of solder material into physical contact with a laminate; and initially bonding the interposer to the laminate by applying a first temperature and pressure gradient to the first array of solder material such that a melting temperature of the first array of solder material is not exceeded.
    Type: Application
    Filed: January 29, 2013
    Publication date: July 31, 2014
    Applicant: International Business Machines Corporation
    Inventors: Mario J. Interrante, Katsuyuki Sakuma
  • Publication number: 20140175159
    Abstract: A thermocompression bonding method for mounting semiconductor chips on a substrate comprises: picking up the semiconductor chip with a chip gripper displaceably mounted on a TC bonding head; positioning of the chip gripper above the assigned substrate location; lowering the TC bonding head up to a position in which the chip gripper is deflected by a predetermined distance relative to the TC bonding head; heating of the semiconductor chip to a temperature above the melting point of the solder, so that the deflection of the chip gripper becomes zero again; waiting until the temperature of the semiconductor chip has fallen to a value beneath the melting temperature of the solder, and lifting of the TC bonding head.
    Type: Application
    Filed: December 20, 2013
    Publication date: June 26, 2014
    Applicant: Besi Switzerland AG
    Inventor: Hannes Kostner
  • Patent number: 8757473
    Abstract: A process of making a heat radiating structure for high-power LED comprises: (1) providing a PCB board, a heat conducting plate and a heat radiating plate; (2) providing a first locating hole and a first fixation hole penetrating the PCB board, and welding a copper plate to one side of the PCB board; while soldering an electrode welding leg to the other side of the PCB board; (3) providing a second locating hole and a second fixation hole penetrating the heat conducting plate; (4) using a fixation column to pierce through both of the fixation holes for connecting together the PCB board and the heat conducting plate; (5) using a heat conducting column to pierce through both of the locating holes; (6) placing the integral piece of the heat conducting plate and the PCB board on a pressing equipment to adjust the height of the heat conducting column.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: June 24, 2014
    Assignee: Dongguan Kingsun Optoelectronic Co., Ltd
    Inventor: Xiaofeng Bi
  • Patent number: 8756800
    Abstract: An electronic component mounting method is disclosed. The method includes the following steps: applying a paste remaining on a stamping pin to the bottom wall of at least one reservoir; forming the paste retained in the at least one reservoir to a predetermined film thickness by a clearance regulation section; causing the paste formed into a film to adhere to the stamping pin; stamping the paste to a substrate; and mounting the electronic components held by a mounting head to the substrate on which the paste has been stamped.
    Type: Grant
    Filed: April 7, 2010
    Date of Patent: June 24, 2014
    Assignee: Panasonic Corporation
    Inventor: Tsutomu Hiraki
  • Publication number: 20140160675
    Abstract: Embodiments of systems, devices, and methods to minimize warping of ultrathin IC packaged products are generally described herein. In some embodiments, an apparatus includes an IC mounted on a package substrate, and a capacitive stiffener subassembly mounted on the package substrate. The capacitive stiffener subassembly includes a plurality of capacitive elements electrically connected to contacts of the IC.
    Type: Application
    Filed: December 10, 2012
    Publication date: June 12, 2014
    Inventors: Mihir K. Roy, Mathew J. Manusharow
  • Patent number: 8740046
    Abstract: A soldering system includes a track, a laying device, a boiler, a shelter, a transmission roller, a position sensor, a thermal radiation heating device, and a driving device. At least one hole is formed on the shelter, and a shape and a dimension of at least one hole on the shelter corresponds to a shape and a dimension of a DIP component. The transmission roller rotates the shelter according to a transmission speed of the track. The position sensor detects a position of a circuit board relative to the boiler. The thermal radiation heating device heats an area on a second surface of the circuit board different from a first surface adjacent to the DIP component through the at least one hole on the shelter continuously, so as to increase a temperature of the second surface when the first surface of the circuit board is passing through the boiler.
    Type: Grant
    Filed: January 8, 2014
    Date of Patent: June 3, 2014
    Assignee: Wistron Corporation
    Inventors: Hao-Chun Hsieh, Chia-Hsien Lee
  • Patent number: 8727202
    Abstract: With a die bonder or a bonding method, the die is adsorbed by the collet, the dicing tape to which the die is adsorbed is thrust up, the die adsorbed by the collet, and thrust up is peeled from the dicing tape, and the peeled die is bonded to the substrate. When the decrease in the air leak flow rate through the gap between the collet and the die upon the thrust up is smaller than the decrease in the normal peel by a predetermined amount, it is judged that a deflection occurs in the die.
    Type: Grant
    Filed: August 15, 2012
    Date of Patent: May 20, 2014
    Assignee: Hitachi High-Tech Instruments Co., Ltd.
    Inventors: Nobuhisa Nakajima, Fukashi Tanaka, Hiroshi Maki
  • Patent number: 8713791
    Abstract: A soldering fixture is disclosed having a unitary base member configured to maintain a printed circuit board and an electrical connector in a particular orientation during soldering. The unitary base member includes a lateral channel dimensioned to maintain a plurality of wire leads associated with the electrical connector in a spaced relationship with the printed circuit board. The unitary base member further includes a wire alignment tool configured to align the plurality of wire leads in the particular orientation such that the plurality of wire leads are in juxtaposition with a plurality of solder pads affixed to one or more surfaces of the printed circuit board.
    Type: Grant
    Filed: May 29, 2012
    Date of Patent: May 6, 2014
    Assignee: Rantec Power Systems, Inc.
    Inventors: Kurt Walker, Paul J. Schmidt
  • Patent number: 8690041
    Abstract: A method of soldering a DIP component on a circuit board includes piercing the DIP component through the circuit board, laying fluxer on the circuit board, passing a first surface of the circuit board through a boiler so that molten tin from the boiler flows between the DIP component and the circuit board through the first surface of the circuit board, and heating a second surface of the circuit board different from the first surface so as to increase temperature of the second surface by a thermal radiation heating device to when the first surface of the circuit board passes through the boiler.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: April 8, 2014
    Assignee: Wistron Corporation
    Inventors: Hao-Chun Hsieh, Chia-Hsien Lee
  • Publication number: 20140091131
    Abstract: In aspects of the assembly jig and method of the invention, when a packaging substrate is curved concaving upward at temperatures of melting solder, the gap between the assembly jig and the packaging substrate can be made smaller than the dimension of the sum of the thickness of the semiconductor chip and the thickness of the melted solder by allowing a part of the bottom surface of the chip positioning piece to become always, or substantially always, in contact with the upper surface of the packaging substrate owing to the weight of the chip positioning jig itself. As a consequence, the semiconductor chip does not slip aside out of the opening of the chip positioning piece. Therefore, the semiconductor chip can be positioned accurately on the packaging substrate.
    Type: Application
    Filed: December 4, 2013
    Publication date: April 3, 2014
    Applicant: FUJI ELECTRIC CO., LTD
    Inventor: Hideaki TAKAHASHI
  • Publication number: 20140049930
    Abstract: In a case where a first mounted substrate to which a semiconductor element is bounded by solder is mounted on a second substrate, connection strength becomes low, when the first mounted substrate is bonded to the second substrate by using a solder having a low melting point. A mounted structure, in which a first mounted substrate on which a semiconductor element is bonded by using a first solder having a melting point of 217° C. or more, is mounted on a second substrate, includes plural bonding parts bonding the first mounted substrate to the second substrate; and a reinforcing member formed around the bonding part. Each of the bonding parts contains a second solder having a melting point, that is lower than the melting point of the first solder, and a space exists, in which the reinforcing members do not exist, between the bonding parts neighboring each other.
    Type: Application
    Filed: April 2, 2012
    Publication date: February 20, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Atsushi Yamaguchi, Hisahiko Yoshida, Arata Kishi, Naomichi Ohashi
  • Publication number: 20140038828
    Abstract: In a method or joint for joining first and second semiconductor wires, each comprising a number of filaments which each comprise a superconductive core within a respective sheath, the filaments being embedded within a matrix and wherein the superconductive cores comprise magnesium diboride and the sheaths comprise niobium, over a certain length a matrix is removed to expose the filaments. The exposed filaments are immersed in molten tin such that the nobium of the sheaths is converted to niobium-tin throughout a thickness of the sheaths. A superconductive path is provided between the superconductive cores of filaments of the first wire through the niobium-tin sheaths of the filaments to the superconductive cores of the second wire.
    Type: Application
    Filed: December 9, 2011
    Publication date: February 6, 2014
    Applicant: SIEMENS PLC
    Inventor: Simon James Calvert
  • Publication number: 20140029229
    Abstract: A liquid ejection head includes two or more substrates disposed side by side, each having energy generating elements and primary terminals electrically connected to the respective energy generating elements, and an electrical wiring member having primary flying leads electrically connected to the respective primary terminals by means of gang bonding. Each of the substrates has an auxiliary terminal located adjacent to the primary terminals and the auxiliary terminals of the two or more substrates are disposed adjacent to each other. The electrical wiring member has an auxiliary flying lead connected to the auxiliary terminals of the substrates by means of a gang bonding system.
    Type: Application
    Filed: July 9, 2013
    Publication date: January 30, 2014
    Inventor: Takayuki Ono
  • Patent number: 8629557
    Abstract: Structures and methods for detecting solder wetting of pedestal sidewalls. The structure includes a semiconductor wafer having an array of integrated circuit chips, each of the integrated circuit chips having an array of chip pedestals having respective chip solder columns on top of the chip pedestals, the pedestals spaced apart a first distance in a first direction and a spaced apart second distance in second direction perpendicular to the first direction; and at least one monitor structure disposed in different regions of the wafer from the integrated circuit chips, the monitor structure comprising at least a first pedestal and a first solder column on a top surface of the first pedestal and a second pedestal and a second solder column on a top surface of the second pedestal, the first and the second pedestals spaced apart a third distance, the third distance less than the first and the second distances.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: January 14, 2014
    Assignee: International Business Machines Corporation
    Inventors: Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter, Timothy D. Sullivan
  • Patent number: 8622276
    Abstract: In aspects of the assembly jig and method of the invention, when a packaging substrate is curved concaving upward at temperatures of melting solder, the gap between the assembly jig and the packaging substrate can be made smaller than the dimension of the sum of the thickness of the semiconductor chip and the thickness of the melted solder by allowing a part of the bottom surface of the chip positioning piece to become always, or substantially always, in contact with the upper surface of the packaging substrate owing to the weight of the chip positioning jig itself. As a consequence, the semiconductor chip does not slip aside out of the opening of the chip positioning piece. Therefore, the semiconductor chip can be positioned accurately on the packaging substrate.
    Type: Grant
    Filed: February 7, 2012
    Date of Patent: January 7, 2014
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Hideaki Takahashi
  • Publication number: 20130327563
    Abstract: There is provided a printed wiring board which includes a substrate, and a soldering portion disposed on the substrate, an electronic component being to be soldered to the solder portion. The soldering portion includes a first conductor to which a solder paste is applied, and a plurality of second conductors extends in a direction away from the first conductor, where the plurality of second conductors extend parallel to each other and linearly.
    Type: Application
    Filed: June 3, 2013
    Publication date: December 12, 2013
    Inventor: Takahiro KITAGAWA
  • Patent number: 8598464
    Abstract: A solder material includes 1.0-4.0% by weight of Ag, 4.0-6.0% by weight of In, 0.1-1.0% by weight of Bi, 1% by weight or less (excluding 0% by weight) of a sum of one or more elements selected from the group consisting of Cu, Ni, Co, Fe and Sb, and a remainder of Sn. When a copper-containing electrode part of an electronic component is connected to a copper-containing electrode land of a substrate by using this solder material, a part having an excellent stress relaxation property can be formed in the solder-connecting part and a Cu—Sn intermetallic compound can be rapidly grown from the electrode land and the electrode part to form a strong blocking structure.
    Type: Grant
    Filed: April 19, 2010
    Date of Patent: December 3, 2013
    Assignee: Panasonic Corporation
    Inventors: Shigeaki Sakatani, Akio Furusawa, Kenichiro Suetsugu, Taichi Nakamura
  • Publication number: 20130313704
    Abstract: A first substrate provided with a receiving area made from a first metallic material is supplied. A second substrate provided with an insertion area comprising a base surface and at least two bumps made from a second metallic material is arranged facing the first substrate. The bumps are salient from the base surface. A pressure is applied between the first substrate and the second substrate so as to make the bumps penetrate into the receiving area. The first metallic material reacts with the second metallic material so as to form a continuous layer of an intermetallic compound having a base formed by the first and second metallic materials along the interface between the bumps and the receiving area.
    Type: Application
    Filed: January 31, 2012
    Publication date: November 28, 2013
    Inventor: Jean-Charles Souriau
  • Publication number: 20130306712
    Abstract: A hot press device includes a spacing strip, a winding roller, a feeding roller and a hot press head. The spacing strip includes a metal layer and a resin layer stacked on the metal layer. The resin layer has a glass transition temperature of greater than 280° C. A contact angle between liquid tin and the metal is smaller than 55 degrees. The ends of the spacing strip are wound around the feeding roller and the winding roller. The hot press head is arranged between the winding roller and the feeding roller. The hot press head has a pressing surface touching the resin layer. A hot pressing method is also related in this disclosure.
    Type: Application
    Filed: February 4, 2013
    Publication date: November 21, 2013
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: CHIH-CHEN LAI
  • Patent number: 8567658
    Abstract: A method of removing oxidation from certain metallic contact surfaces utilizing a combination of relatively simple and inexpensive off-the-shelf equipment and specific chemistry. The method being a very rapid dry process which does not require a vacuum or containment chamber, or toxic gasses/chemicals, and does not damage sensitive electronic circuits or components. Additionally, the process creates a passivation layer on the surface of the metallic contact which inhibits further oxidation while allowing rapid and complete bonding, even many hours after surface treatment, without having to remove the passivation layer. The process utilizes a room-ambient plasma applicator with hydrogen, nitrogen, and inert gasses.
    Type: Grant
    Filed: July 16, 2010
    Date of Patent: October 29, 2013
    Assignee: Ontos Equipment Systems, Inc.
    Inventor: Eric Frank Schulte