Of Electrical Device (e.g., Semiconductor) Patents (Class 228/179.1)
  • Patent number: 11062773
    Abstract: A near-memory computation system includes a plurality of computation nodes. Each computation node receives a plurality of input signals and outputs a computing result signal. The computation node includes a plurality of non-volatile memory cells and a processing element. Each non-volatile memory cell stores a weighting value during a program operation and outputs a weighting signal according to the weighting value during a read operation. The processing element is coupled to the plurality of non-volatile memory cells. The processing element receives the plurality of input signals and generates the computing result signal by performing computations with the plurality of input signals and a plurality of weighting signals generated by the plurality of non-volatile memory cells. The plurality of non-volatile memory cells and the processing element are manufactured by different or the same processes.
    Type: Grant
    Filed: March 22, 2020
    Date of Patent: July 13, 2021
    Assignee: eMemory Technology Inc.
    Inventors: Chun-Fu Lin, Ching-Yuan Lin, Tsung-Mu Lai, Chih-Hsin Chen
  • Patent number: 11031170
    Abstract: A coil device includes a coil, a core, and an electrode. The coil is formed by winding a wire. The core is provided with the coil. The electrode has a wire joint part configured to be connected with a wire end of the wire. A mount surface of the electrode is at least partially covered with a cover layer.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: June 8, 2021
    Assignee: TDK CORPORATION
    Inventors: Shuhei Someya, Tasuku Mikogami
  • Patent number: 10898831
    Abstract: A new method and device for separation of drilling cuttings from liquids and gases in air and fluid drilling operations. A liquid seal is created and maintained for proper separation of gas and liquid from cuttings and drilling slurry in air and liquid drilling. A cuttings agitation chamber is created and maintained under the liquid seal. Cuttings and particulates enter a separation vessel and fall towards the agitation chamber beneath the liquid seal and may be guided towards the agitation chamber and liquid seal by baffles or spray. Cuttings and particulates are kept in motion by nozzles in the agitation chamber for removal from the separation vessel through a discharge outlet. Outflow through the discharge outlet may be increased by a jet. The gases released from the drilling liquid exit the separation vessel through a gas outlet.
    Type: Grant
    Filed: July 28, 2016
    Date of Patent: January 26, 2021
    Assignee: Iron Horse Tools, LLC
    Inventors: Joel A. Phillips, Kevin W. Baker, J. Chris McClanahan, Raymond H. Jordan
  • Patent number: 10895546
    Abstract: The present disclosure relates to a measuring device with a bipolar electrode array for the impedimetric analysis of adherent cells according to the ECIS principle (electric cells substrate impedance sensing). The measuring device comprises an electrode array which is adapted for being wetted with an electrolyte solution and adherently growing cells in order to perform impedimetric cell analyzes, characterized in that the electrode array comprises a bipolar electrode on a substrate, where the bipolar electrode is formed as a conductive path on the transparent substrate and has an inherent resistance between two connection points of the conductive path that is a multiple of the AC impedance of the electrolyte solution at 1 MHz, measured at the two connection points.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: January 19, 2021
    Assignees: FRAUNHOFER-GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V., UNIVERSITAET REGENSBURG
    Inventors: Christian Goetz, Joachim Wegener
  • Patent number: 10868217
    Abstract: An LED chip provided by an embodiment includes a first semiconductor layer; an active layer and a second semiconductor layer located sequentially on the first semiconductor layer. A first contact electrode extends through the active layer and the second semiconductor layer and is electrically connected to the first semiconductor layer; a second contact electrode is located on the second semiconductor layer and is electrically connected to the second semiconductor layer; a first extension electrode is located on the first contact electrode and is electrically connected to the first contact electrode, the first extension electrode comprises a plurality of concave spots for soldering; and a second extension electrode is located on the second contact electrode, electrically connected to the second contact electrode and isolated from the first extension electrode, and the second extension electrode includes a plurality of concave spots for soldering.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: December 15, 2020
    Inventors: Dong Wei, Rubo Xing, Huimin Liu, Xiaolong Yang, Jiantai Wang
  • Patent number: 10792747
    Abstract: A substantially tubular iron tip (5) that can be heated and that is extended vertically and a solder piece supply portion that supplies a first solder piece (Wh1) and a second solder piece (Wh2) in which a layer of a flux (72) is provided within a tubular solder layer in this order from above into the iron tip are provided, within the iron tip, the solder pieces are erected such that on the first solder piece, the second solder piece rides and the heat of the iron tip is used to melt the first solder piece and the second solder piece such that the molten solder is supplied downward. In this way, it is possible to more reliably heat and melt the solder pieces in a posture in which they are erected within the iron tip.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: October 6, 2020
    Assignee: AND Co., Ltd.
    Inventor: Mitsuo Ebisawa
  • Patent number: 10712260
    Abstract: The present invention discloses a monolithic integration device and micro Total Analysis System. The monolithic integration device for sensing comprises: a micro-LED; an optical detector; and a sensing channel, wherein the micro-LED is coupled with the sensing channel and is configured for emitting light into the sensing channel, and the optical detector is coupled with the sensing channel and is configured for sensing the light which is emitted by the micro-LED and travels through at least one part of the sensing channel. An embodiment of this invention proposes a new monolithic integration device for sensing with built-in light source and optical detection system.
    Type: Grant
    Filed: June 2, 2016
    Date of Patent: July 14, 2020
    Assignee: GOERTEK INC.
    Inventor: Quanbo Zou
  • Patent number: 10695875
    Abstract: The present invention relates to a soldering method of a soldering jig. The soldering method comprises the steps of providing a substrate having a soldering area and at least one positioning area in which a positioning part is disposed in the positioning area, placing a workpiece on the substrate, positioning the workpiece through the positioning part, using a heating method to remove an isolating film on the workpiece, and placing a piece of solder in the soldering area of the substrate and then melting the piece of solder such that the workpiece is soldered to the soldering area through the piece of solder.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: June 30, 2020
    Assignee: ASIA VITAL COMPONENTS CO., LTD.
    Inventor: Meng Shen
  • Patent number: 10644061
    Abstract: A photodetector-array and fabrication method thereof are disclosed. The photodetector-array includes a first and second semiconductor structures having respective active regions defining respective pluralities of active photodetectors and active readout integrated circuit pixels (RICPs) electronically connectable to one another respectively. The first and second semiconductor structures are made with different semiconductor materials/compositions having different first and second coefficients of thermal expansion (CTEs) respectively. The pitch distances of the active photodetectors and the pitch distances of the respective active RICPs are configured in accordance with the difference between the first and second CTEs, such that at high temperatures, at which electrical coupling between the first and second semiconductor structures is performed, the electric contacts of the active photodetectors and of their respective RICPs overlap.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: May 5, 2020
    Assignee: Semi Conductor Devices—an Elbit Systems-Rafael Partnership
    Inventors: Yoram Karni, Inna Lukomsky, Eran Avnon
  • Patent number: 10600754
    Abstract: There is provided a bonding method capable of accurately positioning a bonding stage. According to an aspect of the present invention, a bonding method using a bonding apparatus including a rotation drive mechanism for rotating a bonding stage 1 about a ?-axis includes the steps of: (e) locking the bonding stage with respect to the ?-axis, and bonding a wire or bump onto a certain area of a substrate held on the bonding stage; (f) unlocking the bonding stage with respect to the ?-axis, and rotating the bonding stage about the ?-axis with the rotation drive mechanism; and (g) locking the bonding stage with respect to the ?-axis, and bonding a wire or bump onto a remaining region of the substrate.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: March 24, 2020
    Assignee: KAIJO CORPORATION
    Inventors: Hideki Yoshino, Masaaki Miura
  • Patent number: 10523073
    Abstract: TIG welding can be applied, and short circuiting of stator winding due to a jointing material of coil conductors is prevented. A rotating electric machine includes a rotor; and a stator having a stator core and a stator winding, wherein the stator winding has a plurality of coil conductors, and joint parts connecting ends of the coil conductors protruding from an end face of the stator core, and the ends of the coil conductors have weir portions formed for blocking flow of metal of the joint parts.
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: December 31, 2019
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Yousuke Umesaki, Hiroshi Hamano, Takayuki Koizumi, Seigo Misaki
  • Patent number: 10461021
    Abstract: In accordance with one aspect of the disclosure, an electronic assembly comprises a semiconductor device with a first side and a second side opposite the first side. The first side has a first conductive pad. The second side has a primary metallic surface. A first substrate (e.g. lead frame) is bonded to a first conductive pad via first metallic bonding layer. A second substrate (e.g., heat sinking circuit board) is bonded to a primary metallic surface via a second metallic bonding layer. In one configuration the second metallic bonding layer is composed of solder and copper, for example.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: October 29, 2019
    Assignee: DEERE & COMPANY
    Inventors: Robert K. Kinyanjui, Thomas J. Roan, Michael J. Zurn, Brad G. Palmer, Brij N. Singh
  • Patent number: 10446523
    Abstract: A semiconductor device has a substrate and semiconductor die disposed over a first surface of the substrate. A wire stud is attached to the first surface of the substrate. The wire stud includes a base portion and stem portion. A bonding pad is formed over a second surface of the substrate. An encapsulant is deposited over the substrate, semiconductor die, and wire stud. A portion of the encapsulant is removed by LDA to expose the wire stud. A portion of the encapsulant is removed by LDA to expose the substrate. An interconnect structure is formed over the encapsulant and electrically connected to the wire stud and semiconductor die. A bump is formed over the interconnect structure. A semiconductor package is disposed over the encapsulant and electrically connected to the substrate. A discrete semiconductor device is disposed over the encapsulant and electrically connected to the substrate.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: October 15, 2019
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Pandi C. Marimuthu, Sheila Marie L. Alvarez, Yaojian Lin, Jose A. Caparas, Yang Kern Jonathan Tan
  • Patent number: 10424688
    Abstract: Provided is a wire transfer apparatus of a tabbing apparatus. A wire transfer apparatus of a tabbing apparatus according to the present invention includes: a first transfer gripper unit configured to grip a wire; a second transfer gripper unit disposed in parallel to the first transfer gripper unit and configured to grip the wire at a location spaced apart from the first transfer gripper unit together with the first transfer gripper unit; and a gripper transfer unit configured to transfer the wire while moving the first transfer gripper unit and the second transfer gripper unit.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: September 24, 2019
    Assignee: ZEUS CO., LTD.
    Inventors: Young Ik Park, Jin Woo Park, Dong Jin Chung
  • Patent number: 10418154
    Abstract: A superconductor structure (10, 20, 30), having a first strip piece (1), a second strip piece (2) and a third strip piece (3). Each strip piece has a substrate (5) and a superconducting layer (6) deposited thereon. End sections of the second and third strip pieces are connected via a layer (7) made of a first normally conducting material to the first strip piece, the second and third strip pieces overlap with the first strip piece, the superconducting layers of the second and third strip pieces face the superconducting layer of the first strip piece, and a seam (4, 23, 24) with a defined path length is formed between the end sections of the second and third strip pieces. The seam extends over an extension region (8) of the superconductor structure. Splicing strip pieces together in this manner achieves a high current load capacity.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: September 17, 2019
    Assignee: BRUKER HTS GMBH
    Inventors: Ulrich Betz, Alexander Usoskin
  • Patent number: 10388969
    Abstract: A bipolar plate for a fuel cell includes a first plate having a first bead seal, and a second plate having a second bead seal. The first bead seal and the second bead seal are disposed opposite each other and extend along a centerline. An outer weld connects the first plate and the second plate together, and extends along an outer weld line. The outer weld line is laterally spaced an outer gap distance from an outer lateral edge of the first and second bead seals. The outer gap distance varies with a position along the centerline to control a stiffness of the bead seals. Positioning the weld line nearer the outer lateral edge increases the stiffness of the raised bead seals in low stiffness areas, whereas positioning the weld line farther from the lateral edge decreases the stiffness of the raised bead seals in high stiffness areas.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: August 20, 2019
    Assignee: GM Global Technology Operations LLC
    Inventors: Richard D. Blakeley, Xi Yang, Siguang Xu, Liang Xi
  • Patent number: 10297382
    Abstract: One object is to provide a coil element capable of enhancing reliability of joint strength of a coil conductor wire, while achieving a reduction in resistance and a size reduction. A coil element includes a core member, a coil conductor wire, and a terminal electrode. The core member has a columnar portion. The coil conductor wire has a coil portion wound on the columnar portion and a flat-shaped connection end portion provided in each of both end portions of the coil portion. The terminal electrode has an electrode layer and a joint layer. The electrode layer is formed on a surface of the core member and opposed to the connection end portion in its thickness direction. The joint layer includes a cavity portion locally provided between the connection end portion and the electrode layer and joins the connection end portion and the electrode layer to each other.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: May 21, 2019
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Hirotaka Wakabayashi
  • Patent number: 10163857
    Abstract: A package includes a die having a conductive pad at a top surface of the die, a stud bump over and connected to the conductive pad, and a redistribution line over and connected to the stud bump. An electrical connector is over and electrically coupled to the redistribution line.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: December 25, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Jing-Cheng Lin, Jui-Pin Hung
  • Patent number: 10040140
    Abstract: A nozzle for connecting or disconnecting solder joints between head bonding pads of in a hard disk drive, includes a nozzle body including a tip, the tip disposed at a distal end of the nozzle body and configured to deliver or reflow a solder ball in proximity to head bonding pads; and a central duct disposed along a central axis of the nozzle body and configured to convey the solder ball to or from the tip. The tip includes a front face facing to a trailing edge of a slider, a back face facing to a top surface of a suspension supporting the slider, and two side faces adjacent to the front face and back face respectively, and at least one interference-free structure is provided at two adjacent faces of the tip at least, thereby no interference happens between the tip and elements adjacent to the slider during the operation.
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: August 7, 2018
    Assignee: SAE MAGNETICS (H.K.) LTD.
    Inventors: Chiwai Lo, Shenkuang Chou, Yiusing Ho, Kayip Wong, Xiangyuan Tan, Junqun Zhang
  • Patent number: 10002710
    Abstract: A module includes a multilayer body including laminated ceramic green sheets that have been fired, multiple mounting terminals arranged to mount a component thereon, the mounting terminals each including an end surface that is exposed at a main surface of the multilayer body, and multiple via conductors disposed inside the multilayer body so as to correspond to the mounting terminals at positions overlapped by the corresponding mounting terminals when viewed in a plan view. The lengths of the via conductors are adjusted so that predetermined points on the mounting terminals are positioned on the same plane.
    Type: Grant
    Filed: April 7, 2014
    Date of Patent: June 19, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Hiromichi Kitajima
  • Patent number: 9881891
    Abstract: The invention provides a method of bonding wire between first and second bonding points with a bonding tool. It comprises the steps of forming a first bond at the first bonding point with the bonding tool, forming a first kink located over the first bond, and moving the bonding tool to a first position spaced from the first kink by a predetermined distance to release a length of wire from the bonding tool. It further comprises the step of moving the bonding tool in a direction away from the second bonding point to a second position which is outside a plane comprising the first bonding point, the second bonding point, and the first kink. It also comprises the steps of forming a second kink which lies outside the plane, and moving the bonding tool to the second bonding point to form a second bond.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: January 30, 2018
    Assignee: ASM TECHNOLOGY SINGAPORE PTE LTD
    Inventors: Jeffrey Grijaldo, Jung Min Kim, Joon Ho Lee, Chi Kwan Park, Keng Yew Song
  • Patent number: 9705370
    Abstract: According to one embodiment, an armature winding includes a plurality of rectangular solid conductors and a plurality of rectangular hollow conductors, which are arranged such that tip of end portions thereof form one surface, the surface being coated with a brazing filler material, and an anti-flowing agent applied on a portion of an inner surface of each hollow conductor to prevent the brazing filler material from flowing into hollow portions of the hollow conductors.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: July 11, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Mitsuhiko Koyama, Toru Otaka, Shigehito Ishii, Yoshitaka Sakai
  • Patent number: 9698432
    Abstract: A fuel cell includes three membrane-electrode assemblies. and first and second bipolar metal plates interposed between the membrane-electrode assemblies. Each of the bipolar plates comprises two metal sheets facing a respective membrane-electrode assembly and fixedly attached by welds. The two metal sheets comprise successive guiding channels for guiding gas extending in a common longitudinal direction. The guiding channels are distributed in a transversal direction The welds are made in bottoms of the guiding channel and include welds of the first bipolar plate and welds of the second bipolar plate. Some of the welds of the first bipolar plate are not superimposed on the welds of the second bipolar plate and are offset longitudinally and transversally relative to the welds of the second bipolar plate.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: July 4, 2017
    Assignee: Commissariat a l'énergie atomique et aux energies alternatives
    Inventors: Remi Vincent, Jean-Philippe Poirot-Crouvezier, Pascal Schott
  • Patent number: 9520369
    Abstract: Provided are a power module having an integrated power semiconductor and a method of packaging the same. The power module according to an aspect of the present invention includes a power semiconductor chip based on silicon and insulating substrates respectively disposed at both surfaces of the power semiconductor chip and including a metal pattern electrically and directly connected to the power semiconductor chip.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: December 13, 2016
    Assignee: Hyundai Mobis Co., Ltd.
    Inventor: Jae Hyun Ko
  • Patent number: 9379086
    Abstract: A semiconductor device includes a common wire that sequentially connects three or more pads; bonding portions at which a side surface of the wire is bonded to the pads; and looping portions looped from the bonding portions onto the other pads adjacent to the pads, the bonding portions and the looping portions are formed alternately. When the pads are recessed from the surface of semiconductor chips, the common wire is crushed to a thickness greater than the recess depth of the pads to be made into a flat shape. Thus, on the semiconductor device, wire connection is performed with a smaller bonding count while reducing damage to the semiconductor chips, and at the same time bonding is performed efficiently to the electrodes recessed from the surface of the semiconductor chips.
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: June 28, 2016
    Assignee: SHINKAWA LTD.
    Inventors: Shinji Kumamoto, Naoki Sekine, Motoki Nakazawa, Yasuo Nagashima
  • Patent number: 9192057
    Abstract: Electrical components are mounted on a printed circuit in an electronic device housing. Shielding can structures may include a sheet metal shield can layer with a conductive gasket. The printed circuit may have an opening. A screw passes through the opening in the printed circuit and openings in the conductive gasket and sheet metal shield can layer to secure the shielding can structures to the housing. When secured, a lip in the gasket lies between the printed circuit substrate and the housing. The gasket may be formed from conductive elastomeric material. A shield can lid and a flexible printed circuit may be embedded within conductive elastomeric material that provides a thermal conduction path to dissipate heat from electrical components under the lid. Shield can members that are located on opposing sides of a bend in a flexible printed circuit substrate may be coupled by a conductive elastomeric bridging structure.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: November 17, 2015
    Assignee: Apple Inc.
    Inventors: Shayan Malek, Gregory N. Stephens, Michael B. Wittenberg, Jared M. Kole, Warren Z. Jones
  • Publication number: 20150144390
    Abstract: A wiring board of the present invention includes an insulating board having a mounting portion on an upper surface to mount a semiconductor element, and semiconductor element connection pads formed on the mounting portion, on which at least three first dummy pads arranged on a center portion of the mounting portion, and at least three second dummy pads arranged on a peripheral portion of the mounting portion, are formed, and a dummy solder bump is formed on each of the first dummy pad and the second dummy pad.
    Type: Application
    Filed: November 25, 2014
    Publication date: May 28, 2015
    Applicant: KYOCERA CIRCUIT SOLUTIONS, INC.
    Inventor: Takayuki NEJIME
  • Publication number: 20150147674
    Abstract: An object is to provide a solid electrolyte laminate that allows a large amount of gas to be supplied to a fuel electrode while having improved strength and a method for manufacturing such a solid electrolyte laminate. A solid electrolyte laminate 1 includes a solid electrolyte layer 2, a first electrode layer 3 disposed on one side of the solid electrolyte layer, and a second electrode layer 4 disposed on another side of the solid electrolyte layer. At least the first electrode layer, which forms a fuel electrode, includes a bonding layer 3a bonded to the solid electrolyte layer and a porous layer 3b having continuous pores and integrally formed on the bonding layer.
    Type: Application
    Filed: April 26, 2013
    Publication date: May 28, 2015
    Inventors: Chihiro Hiraiwa, Masatoshi Majima, Atsushi Yamaguchi, Naho Mizuhara
  • Patent number: 9038883
    Abstract: A process to bond VCSEL arrays to submounts and printed circuit boards is provided. The process is particularly suited to large area thin and ultra-thin VCSEL arrays susceptible to bending and warping. The process integrates a flatness measurement step and applying appropriate combination of pressure prior to bonding the VCSEL array to the submount or a printed circuit using a vacuum flux-less bonding process. The process is very promising in making very good quality bonding between the VCSEL array and a submount or a printed circuit board. The process is applied to construct optical modules with improved flatness that may be integrated with other electronic components in constructing optoelectronic systems.
    Type: Grant
    Filed: September 7, 2014
    Date of Patent: May 26, 2015
    Assignee: Princeton Optronics Inc.
    Inventors: Qing Wang, Jean-Francois Seurin, Chuni Lal Ghosh, Laurence Watkins
  • Patent number: 9027822
    Abstract: An adhesive layer forming step of forming an adhesive layer on a surface of a substrate; a solder layer forming step of forming a solder layer on the adhesive layer by loading plural solder powders with in-between spaces; and a filler supplying step of supplying fillers to the in-between spaces of the solder powders that have been formed on the adhesive layer are included.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: May 12, 2015
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventor: Daisuke Sakurai
  • Publication number: 20150115452
    Abstract: Semiconductor device packages and methods of manufacturing the semiconductor device packages are provided. A semiconductor device package may include a bonding layer between a substrate and a semiconductor chip, and the bonding layer may include an intermetallic compound. The intermetallic compound may be a compound of metal and solder material. The intermetallic compound may include Ag3Sn. A method of manufacturing the semiconductor device package may include forming a bonding layer, which bonds a semiconductor chip to a substrate, by using a mixed paste including metal particles and a solder material. The bonding layer may be formed by forming an intermetallic compound, which is formed by heating the mixed paste to react the metal particles with the solder material.
    Type: Application
    Filed: June 23, 2014
    Publication date: April 30, 2015
    Inventors: Jeong-Won YOON, Baik-woo LEE, Seong-woon BOOH, Chang-mo JEONG
  • Patent number: 9010616
    Abstract: A method is provided for the forming of a metallic solder joint without a liquid flux to create a solder joint that has minimal voids and can be reflowed multiple times without void propagation. This process can be done for any solder alloy, and is most specifically used in the application of first level thermal interface in a IC or micro processor or BGA microprocessor.
    Type: Grant
    Filed: May 30, 2012
    Date of Patent: April 21, 2015
    Assignee: Indium Corporation
    Inventors: Jordan Peter Ross, Amanda M. Hartnett
  • Patent number: 9004343
    Abstract: In a reflow soldering apparatus, air heated by heaters is blown by fans onto a printed circuit board. Temperature controllers that control temperature of the heaters supply operation amount thereof to a calculation unit that calculates consumed electric energy of soldering apparatus. Inverters that control revolution of fans supply a value of current to the calculation unit. A control unit supplies a coefficient of the consumed electric energy to the calculation unit. The calculation unit calculates a total amount of consumed electric energy of the reflow soldering apparatus based on the operation amount, value of current and coefficient of the consumed electric energy thus obtained. A display unit displays on an operation screen the total amount of consumed electric energy of the reflow soldering apparatus, which has been calculated by the calculation unit.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: April 14, 2015
    Assignee: Senju Metal Industry Co., Ltd.
    Inventors: Hiroyuki Inoue, Tadayoshi Ohtashiro
  • Patent number: 8975528
    Abstract: Even in an electronic device where electrodes are coupled electrically using a solder, sections to which electrodes of an electronic component are coupled are switched by a method other than changing circuits of the electronic component or changing circuits of a wiring substrate. The electronic device includes: a wiring substrate having two or more first electrodes over one surface thereof; and an electronic component having, over one surface thereof, two or more second electrodes arranged corresponding to the two or more first electrodes, respectively. At least one of the first electrodes is a specific electrode divided into two or more divided portions, and the divided portions are coupled to different wirings, respectively. Further, at least one of the divided portions is coupled to a corresponding second electrode through a solder.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: March 10, 2015
    Assignee: Renesas Electronics Corporation
    Inventor: Shuuichi Kariyazaki
  • Publication number: 20150055274
    Abstract: A method for manufacturing a terminal-strip-equipped electronic component in which terminal strips made of a metal plate are bonded with solder to terminal electrodes of an electronic chip component on two opposing end surfaces. Solder cream is applied to outer surfaces of the terminal electrodes. The terminal strips are thermocompression bonded to the terminal electrodes by placing the electronic chip component between the terminal strips and pressing the terminal strips against the terminal electrodes using a pair of heating elements so as to obtain an electronic component to which the terminal strips are temporarily fixed. The terminal strips are fully fixed to the electronic component by melting the solder cream as a result of heating the electronic component in a heating furnace so as to obtain a terminal-strip-equipped electronic component.
    Type: Application
    Filed: July 15, 2014
    Publication date: February 26, 2015
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Nobumichi KIMURA, Masuyoshi HOUDA
  • Publication number: 20150049450
    Abstract: An electronic device includes: a first electronic component; first members that are provided on a first surface of the first electronic component and that include outside surfaces configured to face diagonally upward with respect to the first surface; a second electronic component provided above the first surface; second members that are provided corresponding to the first members on a second surface of the second electronic component which faces the first surface and that include inside surfaces configured to face diagonally downward with respect to the second surface and configured to face the outside surfaces; and solder that is provided between the first surface and the second surface and that electrically connects the first electronic component and the second electronic component.
    Type: Application
    Filed: August 8, 2014
    Publication date: February 19, 2015
    Applicant: FUJITSU LIMITED
    Inventors: Keishiro Okamoto, Seiki Sakuyama
  • Patent number: 8950652
    Abstract: A sintering method is provided which allows components to be joined to each other in a stable way, wherein the processing temperature is less than 200° C. and stable contact points are produced, which have low porosity and also high electrical and thermal conductivity. The method for joining components includes (a) providing a sandwich arrangement having at least (a1) one component 1, (a2) one component 2, and (a3) a metal paste located between component 1 and component 2, and (b) sintering the sandwich arrangement. The metal paste contains (A) 75-90 weight percent of at least one metal present in the form of particles having a coating containing at least one organic compound, (B) 0-12 weight percent of at least one metal precursor, (C) 6-20 weight percent of at least one solvent, and (D) 0.1-15 weight percent of at least one sintering agent selected from the group comprising (i) organic peroxides, (ii) inorganic peroxides, and (iii) inorganic acids.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: February 10, 2015
    Assignee: Heraeus Materials Technology GmbH & Co. KG
    Inventors: Michael Schäfer, Wolfgang Schmitt, Jian Zeng
  • Patent number: 8950653
    Abstract: A sintering method allows components to be joined to each other in a stable way at a processing temperature of less than 200° C., producing stable contact points having low porosity and high electrical and thermal conductivity. The method includes (a) providing a sandwich arrangement having at least a first component, a second component, and a metal paste located between the first and second components, and (b) sintering the sandwich arrangement. The metal paste includes (A) 75-90 wt. % of at least one metal present in the form of particles having an organic compound-containing coating, (B) 0-12wt % of at least one metal precursor, (C) 6-20wt % of at least one solvent, and (D) 0.1-15 wt % of at least one sintering agent selected from (i) salts of C1-C4 organic acids, (ii) esters of C1-C4 organic acids, and (iii) carbonyl complexes.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: February 10, 2015
    Assignee: Heraeus Materials Technology GmbH & Co. KG
    Inventors: Michael Schäfer, Wolfgang Schmitt, Jian Zeng
  • Patent number: 8944309
    Abstract: A solder joint may be used to attach components of an organic vapor jet printing device together with a fluid-tight seal that is capable of performance at high temperatures. The solder joint includes one or more metals that are deposited over opposing component surfaces, such as an inlet side of a nozzle plate and/or an outlet side of a mounting plate. The components are pressed together to form the solder joint. Two or more of the deposited metals may be capable of together forming a eutectic alloy, and the solder joint may be formed by heating the deposited metals to a temperature above the melting point of the eutectic alloy. A diffusion barrier layer and an adhesion layer may be included between the solder joint and each of the components.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: February 3, 2015
    Assignee: The Regents of The University of Michigan
    Inventors: Stephen R. Forrest, Gregory McGraw
  • Patent number: 8939347
    Abstract: The present disclosure relates to the field of fabricating microelectronic packages, wherein magnetic particles distributed within a solder paste may be used to form a magnetic intermetallic compound interconnect. The intermetallic compound interconnect may be exposed to a magnetic field, which can heat a solder material to a reflow temperature for attachment of microelectronic components comprising the microelectronic packages.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: January 27, 2015
    Assignee: Intel Corporation
    Inventors: Rajasekaran Swaminathan, Ravindranath V. Mahajan
  • Publication number: 20150008253
    Abstract: A double-sided bonding process using transient liquid phase (TLP) bonding structure. A first side of an electronic device is processed to partially complete bonding. A second side of the electronic device is processed to complete bonding. The first side completes bonding during the processing of the second side. This reduces the time needed for the bonding process of both sides. This process allows for various TLP bonding parameters while being compatible with conventional fabrication systems.
    Type: Application
    Filed: August 1, 2013
    Publication date: January 8, 2015
    Applicant: Toyota Motor Engineering & Manufacturing North America, Inc.
    Inventors: Sang Won Yoon, Takehiro Kato, Koji Shiozaki
  • Patent number: 8925789
    Abstract: A method is provided for connecting at least two components, in which a sintering preform is used. This preform includes a carrier having a surface that has at least one structuring element containing hardened paste, wherein the hardened paste contains: (a) metal particles having a coating that contains at least one organic compound; and (b) at least one sintering aid selected from the group consisting of (b1) organic peroxides, (b2) inorganic peroxides, (b3) inorganic acids, (b4) salts of organic acids, wherein the organic acids have 1-4 carbon atoms, (b5) esters of organic acids, wherein the organic acids have 1-4 carbon atoms, and (b6) carbonyl complexes. The surface of the carrier having the hardened paste is not reactive to the constituents of the paste.
    Type: Grant
    Filed: September 2, 2011
    Date of Patent: January 6, 2015
    Assignee: Heraeus Materials Technology GmbH & Co. KG
    Inventors: Michael Schäfer, Wolfgang Schmitt
  • Patent number: 8887981
    Abstract: A rosin composition includes a gum rosin, an emulsifier, a randomizing additive and a bonding agent. This rosin composition may be used as a temporary or permanent adhesive for the soldering of components. The rosin composition may be temporary as it is easily removed from a surface without damaging the surface.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: November 18, 2014
    Inventors: Luke M. Flaherty, Randal E. Knar, Tiffanie T. Randall
  • Patent number: 8875373
    Abstract: A manufacturing method of heat conductive device for an LED has steps of forming a heat sink and an engagement recess in the heat sink by cold forge, punching a heat-conducting disc to form an LED carrier having a mounting portion and a heat-conducting wall formed around the mounting portion, soldering multiple LEDs on the LED carrier, and heating the heat sink to thermally expand the heat sink and assembling the LED carrier and the heat sink so that the heat-conducting wall is assembled with the engagement recess and further chilling the heat sink to thermally retract and tightly hold the LED carrier. The manufacturing method increases contact area and reduces air gaps between the LED carrier and the heat sink to effectively enhance the heat-conducting efficiency of the LED carrier so that the LEDs are operated at a suitable operating temperature to secure a prolonged life duration.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: November 4, 2014
    Assignee: Pan-Jit International Inc.
    Inventor: Tsu Lee
  • Publication number: 20140299170
    Abstract: The invention relates to a thermoelectric device comprising: a plurality of elements (4), called thermoelectric elements, allowing an electrical current to be produced from a temperature gradient between two of their faces (3a, 3b), called contact faces; electrically conductive tracks (20); and a solder joint between said contact faces (3a, 3b) and the electrically conductive tracks. According to the invention, said solder comprises an alloy based on aluminum and silicon. The invention also relates to a process for manufacturing such a device, using solid-state soldering.
    Type: Application
    Filed: November 22, 2012
    Publication date: October 9, 2014
    Inventors: Michel Simonin, Patrick Boisselle, Cédric De Vaulx
  • Patent number: 8851356
    Abstract: Embodiments of the invention include flexible circuit board interconnections and methods regarding the same. In an embodiment, the invention includes a method of connecting a plurality of flexible circuit boards together comprising the steps applying a solder composition between an upper surface of a first flexible circuit board and a lower surface of a second flexible circuit board; holding the upper surface of the first flexible circuit board and the lower surface of the second flexible circuit board together; and reflowing the solder composition with a heat source to bond the first flexible circuit board and the second flexible circuit board together to form a flexible circuit board strip having a length longer than either of the first flexible circuit board or second flexible circuit board separately.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: October 7, 2014
    Assignee: Metrospec Technology, L.L.C.
    Inventors: Henry V. Holec, Wm. Todd Crandell, Eric Henry Holec
  • Publication number: 20140263582
    Abstract: A method for making an interposer is provided. A conductive layer is formed by contacting a replicate such that a shape of a surface of the conductive layer conforms to a shape of the contacted portion of the replicate. The conductive layer is formed to have a base and a plurality of conductive posts projecting away from the base. Each conductive post is formed to have a post end opposite the base. A dielectric layer is formed to cover the base and to separate adjacent ones of the posts from each other. The posts are for forming vias. Conductive material is removed from the conductive layer to insulate at least one post from at least one other post.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Inventor: Cyprian Emeka Uzoh
  • Patent number: 8833637
    Abstract: A device using the live welding method for aluminum electrolytic cell overhauling under series full current consists of short-circuit buses at the bottom of the cell (1), pillar buses (2), an anode bus (3), a balance bus (4), a inter-cell standby bus (5), a door-shaped pillar clamp (6), an arcuate clamp (7) of anode buses, a current conversion switch (8, a mechanical switching device (9) for the short-circuit port, a voltage sensor and wires thereof (10), a temperature sensor and wires thereof (11), a system (12) for data acquiring, displaying, analyzing and alarming, an A-side welding area (13), a B-side welding area (14) and compression-joint points (15) on pillar soft belts of overhauling cells; and the live welding method comprises the following steps: when welding is required to be performed in some zone, the currents of short-circuit buses at the bottom of the cell (1) and pillar buses (2) which influence the welding area most are cut off, the serial currents are shunted to other pillar buses (2), other
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: September 16, 2014
    Assignee: China Aluminum International Engineering Corporation Limited
    Inventors: Tao Yang, Bin Cao
  • Patent number: 8820611
    Abstract: The present invention relates to a method for printing a substrate, in particular a printed circuit board, with a printing paste, in particular a solder paste, comprising the following steps: —applying a printing screen to the substrate, —printing the substrate using screen printing technology through openings in the printing screen so as to achieve at least one printed structure consisting of printing paste, —separating the printing screen and the substrate by lifting these parts off from one another, —inserting an optical inspection unit between the printing screen and the substrate, —checking the printed structure in terms of the printing paste thickness thereof by means of the inspection unit, —ending the printing when the result of the printing corresponds to at least one preset value. The invention furthermore relates to an inspection unit (1) and a printing device (2).
    Type: Grant
    Filed: October 12, 2010
    Date of Patent: September 2, 2014
    Assignee: Ekra Automatisierungssysteme GmbH
    Inventor: Torsten Vegelahn
  • Patent number: 8807416
    Abstract: A reflow soldering system wherein a heating oven is provided with a contact heating unit which has a transport rail and a top heat transfer heater, and with a hot gas blowing heating unit, the transport rail and top heat transfer heater are respectively provided with heaters which heat the outer edge part of the printed circuit board, and the transport rail or top heat transfer heater moves in an up-down direction so that the transport rail and top heat transfer heater clamp and heat the outer edge part of the printed circuit board.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: August 19, 2014
    Assignee: Denso Corporation
    Inventors: Takuji Sukekawa, Hiroyuki Yamada, Noriyasu Inomata