With Particular Semiconductor Material Patents (Class 257/103)
  • Patent number: 9985011
    Abstract: A method for producing an optoelectronic semiconductor chip is disclosed. A semiconductor body has a pixel area, which has at least two different subpixel areas. An electrically conductive layer is applied to the radiation outlet surface of at least one subpixel area. The electrically conductive layer is designed to at least partially salify with a protic reaction partner. A conversion layer is deposited onto the electrically conductive layer by means of a electrophoresis process.
    Type: Grant
    Filed: August 8, 2014
    Date of Patent: May 29, 2018
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Britta Göötz, Ion Stoll, Norwin von Malm
  • Patent number: 9978834
    Abstract: Provided is a method of forming a nanowire-based device. The method includes forming a first mask layer over a substrate; forming a first opening in the first mask layer; growing a first nanowire that protrudes through the first opening in the first mask layer, wherein the first nanowire has a first diameter; removing the first mask layer; oxidizing a sidewall of the first nanowire; etching the oxidized sidewall of the first nanowire; forming a second mask layer overlaying the substrate; removing the first nanowire thereby forming a second opening in the second mask layer; and growing a second nanowire that protrudes through the second opening in the second mask layer, wherein the second nanowire has a second diameter and the second diameter is different than the first diameter.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: May 22, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Martin Christopher Holland, Blandine Duriez
  • Patent number: 9978903
    Abstract: A light-emitting element includes a sapphire substrate including: a principal surface that is in a c-plane of the sapphire substrate, and a plurality of projections on the principal surface, wherein each of the plurality of projections has a shape of pseudo-hexagonal pyramid including six lateral surfaces, each of the six lateral surfaces including an inwardly curved surface portion, and wherein, in a top view of the sapphire substrate, each of the plurality of projections has a shape of a pseudo-hexagon that includes first curved lines and second curved lines that are alternately connected to one another, the first curved lines being curved toward a center of a corresponding hexagon and disposed between respective adjacent pairs of six vertices of the hexagon, and the second curved lines passing through respective vertices of the hexagon; and a semiconductor layered body comprising a nitride semiconductor on the principal surface side of the sapphire substrate, the semiconductor layered body including an act
    Type: Grant
    Filed: November 25, 2016
    Date of Patent: May 22, 2018
    Assignee: NICHIA CORPORATION
    Inventors: Hiroyuki Inoue, Tomohiro Shimooka
  • Patent number: 9972488
    Abstract: A method of reducing defects in an epitaxial layer. The method includes forming one or more barrier structures within a peripheral edge region of a wafer substrate, and forming an epitaxial layer over a surface of the wafer substrate.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: May 15, 2018
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Helmut Oefner, Johannes Baumgartl
  • Patent number: 9972745
    Abstract: The present invention provides a Group III nitride semiconductor light-emitting device in which electrons and holes are suppressed from being captured by threading dislocation, and a production method therefor. The light-emitting device comprises an n-type contact layer, an n-side electrostatic breakdown preventing layer, an n-side superlattice layer, a light-emitting layer, a p-type cladding layer, a p-type contact layer, a transparent electrode, an n-electrode, and a p-electrode. The light-emitting device has a plurality of pits extending from the n-type semiconductor layer to the p-type semiconductor layer. The n-side electrostatic breakdown preventing layer has an n-type AlGaN layer. The n-type AlGaN layer includes starting points of the pits.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: May 15, 2018
    Assignee: TOYODA GOSEI CO., LTD.
    Inventor: Kengo Nagata
  • Patent number: 9967937
    Abstract: A light-emitting device including a light-emitting diode including an n-doped InGaN layer and a p-doped GaN layer, and an active zone including a number m of InGaN-emitting layers each one arranged between two InGaN barrier layers, of which the indium compositions of the emitting layers are different and are greater on the side of the n-doped InGaN layer than on the side of the p-doped GaN layer, and of which the indium compositions of the barrier layers are different and which are greater on the side of the n-doped InGaN layer than on the side of the p-doped GaN layer. An electric power supply supplies the diode with a periodic signal. A controller of the power supply can alter the peak value of the periodic signal according to a spectrum of the light emitted.
    Type: Grant
    Filed: October 24, 2014
    Date of Patent: May 8, 2018
    Assignee: Commissariat à l'énergie atomique et aux énergies alternatives
    Inventors: Ivan-Christophe Robin, Hubert Bono
  • Patent number: 9960043
    Abstract: A process of forming a semiconductor device using plasma processes is disclosed. The semiconductor device includes a device area, a scribed area, and a peripheral area on a wafer, where these areas have respective conductive regions. The process includes steps of (a) implanting ions to isolate the conductive regions in the device area from the conductive region in the scribed area; (b) forming a metal film so as to cover a back surface, a side, and the peripheral area in the top surface of the wafer; (c) deposing insulating film on a whole surface of the wafer; and (d) selectively etching, by the plasma process, the insulating film so as to expose the conductive regions in the device area and the scribed area. During the plasma process, the metal film in the back surface of the wafer is connected the apparatus ground that effectively dissipates charges induced by the plasm to the apparatus ground through the metal film.
    Type: Grant
    Filed: November 16, 2016
    Date of Patent: May 1, 2018
    Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventor: Yasuyo Kurachi
  • Patent number: 9960370
    Abstract: Provided is an organic light-emitting device improved in emission efficiency and lifetime. The organic light-emitting device includes a pair of electrodes and an organic compound layer disposed between the pair of electrodes, in which: the organic compound layer includes a benzo[f]isoquinoline iridium complex of a specific structure and a hydrocarbon compound of a specific structure; and the hydrocarbon compound is a compound formed only of an SP2 carbon atom and a hydrogen atom.
    Type: Grant
    Filed: December 25, 2013
    Date of Patent: May 1, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kengo Kishino, Akihito Saitoh, Jun Kamatani, Naoki Yamada, Tetsuya Kosuge, Takayuki Horiuchi, Shigemoto Abe, Yosuke Nishide, Hirokazu Miyashita
  • Patent number: 9954140
    Abstract: The present disclosure provides a light-emitting device. The light-emitting device comprises: a substrate; an intermediate layer on the substrate; a first window layer comprising a first semiconductor optical layer on the intermediate layer and a second semiconductor optical layer on the first semiconductor optical layer; and a light-emitting stack on the second semiconductor optical layer; wherein a difference between the lattice constant of the intermediate layer and the lattice constant of the first semiconductor optical layer is greater than 2.3 ?.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: April 24, 2018
    Assignee: Epistar Corporation
    Inventors: Chien-Fu Huang, Shiuan-Leh Lin, Chih-Chiang Lu, Chia-Liang Hsu
  • Patent number: 9947780
    Abstract: Transistors for high voltage and high frequency operation. A non-planar, polar crystalline semiconductor body having a top surface disposed between first and second opposite sidewalls includes a channel region with a first crystalline semiconductor layer disposed over the first and second sidewalls. The first crystalline semiconductor layer is to provide a two dimensional electron gas (2DEG) within the channel region. A gate structure is disposed over the first crystalline semiconductor layer along at least the second sidewall to modulate the 2DEG. First and second sidewalls of the non-planar polar crystalline semiconductor body may have differing polarity, with the channel proximate to a first of the sidewalls. The gate structure may be along a second of the sidewalls to gate a back barrier. The polar crystalline semiconductor body may be a group III-nitride formed on a silicon substrate with the (1010) plane on a (110) plane of the silicon.
    Type: Grant
    Filed: August 4, 2016
    Date of Patent: April 17, 2018
    Assignee: Intel Corporation
    Inventors: Han Wui Then, Robert Chau, Benjamin Chu-Kung, Gilbert Dewey, Jack Kavalieros, Matthew Metz, Niloy Mukherjee, Ravi Pillarisetty, Marko Radosavljevic
  • Patent number: 9947894
    Abstract: Provided is a TFT substrate (substrate); a second electrode (vapor-deposited membrane) that is formed on the TFT substrate and includes a protruding portion; and a sealing membrane provided so as to cover the second electrode, wherein, when ? represents an absolute value of a stress of the sealing membrane, t represents a thickness of the sealing membrane, and P represents a sum of a product of an oblique side length and an oblique side slope in a minute region on an oblique side of the protruding portion, a value of an index N expressed by the expression (N=?·t·P) is less than or equal to 935 MPa·?m2.
    Type: Grant
    Filed: May 7, 2015
    Date of Patent: April 17, 2018
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Sonoda, Takeshi Hirase, Tetsuya Okamoto, Tohru Senoo, Seiji Fujiwara
  • Patent number: 9941433
    Abstract: A composite quantum-dot photodetector comprising a substrate with a colloidally deposited thin film structure forming a photosensitive region, the thin film containing at least one type of a nanocrystal quantum-dot, whereby the nanocrystal quantum dots are spaced by ligands to form a lattice, and the lattice of the quantum dots has an infill material that forms an inorganic matrix that isolates the nanocrystal quantum dots from atmospheric exposure.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: April 10, 2018
    Assignee: Vadient Optics, LLC
    Inventors: George Williams, Andrew S. Huntington
  • Patent number: 9935271
    Abstract: Disclosed is an organic electroluminescent device, wherein the light-emitting layer is composed of a non-doped neutral free-radical electroluminescent material or a neutral free-radical electroluminescent material doped in a matrix material. The luminescence of the device is from the photons emitted from the transition of doublet electrons in the outer molecular orbit of the neutral free-radical electroluminescent material from an excited state to the ground state; since there is no limitation on spin-forbidden, the upper limit of the internal quantum efficiency of the device is 100%. The neutral free-radical electroluminescent material used in the device is 1,3-bis(diphenylene)-2-phenylallyl free radicals and derivatives thereof; tri(2,4,6-trichlorophenyl)methyl free radicals and derivatives thereof; (3,5-dichloro-4-pyridyl)bis(2,4,6-trichlorophenyl)methyl free radicals and derivatives thereof; (2,4,6-trichloro-5-pyrimidinyl)bis(2,4,6-trichlorophenyl)methyl free radicals and derivatives thereof.
    Type: Grant
    Filed: March 16, 2015
    Date of Patent: April 3, 2018
    Assignee: JILIN UNIVERSTIY
    Inventor: Feng Li
  • Patent number: 9935238
    Abstract: An embodiment relates to a light-emitting element, a method for producing same, a light-emitting element package, and a lighting system.
    Type: Grant
    Filed: April 7, 2015
    Date of Patent: April 3, 2018
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Ki Young Song, Hyun Chul Lim, Myung Hoon Jung
  • Patent number: 9935237
    Abstract: Solid state lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state lighting device includes a first semiconductor material, a second semiconductor material spaced apart from the first semiconductor material, and an active region between the first and second semiconductor materials. The solid state lighting device also includes an indentation extending from the second semiconductor material toward the active region and the first semiconductor material and an insulating material in the indentation of the solid state lighting structure.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: April 3, 2018
    Assignee: Micron Technology, Inc.
    Inventor: Scott D. Schellhammer
  • Patent number: 9935243
    Abstract: A method for fabricating a Zinc Oxide (ZnO) conductive film on a semiconductor material, including depositing a doped ZnO seed layer on a diode, wherein the ZnO seed layer forms an electrical contact to the diode; and depositing a ZnO layer on the ZnO seed layer, wherein the ZnO seed layer and the ZnO layer each have a thickness, a crystal quality, and a doping level such that (1) the diode comprising III-nitride material is turned on with a turn on voltage of 2.75 volts or less applied across the ZnO layers and the diode, and (2) a contact resistance, of a structure comprising the ZnO layers and the diode, is lower as compared to a contact resistance of a structure comprising the ZnO layer directly on the diode without the ZnO seed layer.
    Type: Grant
    Filed: September 15, 2016
    Date of Patent: April 3, 2018
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Asad J. Mughal, Sang Ho Oh, Steven P. DenBaars
  • Patent number: 9929302
    Abstract: A solar cell is provided. The solar cell includes a silicon substrate, a back electrode, a doped silicon layer, and an upper electrode. The silicon substrate includes a first surface, a second surface, and a number of three-dimensional nano-structures located on the first surface. The three-dimensional nano-structures are located on the second surface. The three-dimensional nano-structures are linear protruding structures that are spaced from each other, and a cross section of each linear protruding structure is an arc. The doped silicon layer is attached to the three-dimensional nano-structures and the second surface between the three-dimensional nano-structures.
    Type: Grant
    Filed: April 14, 2016
    Date of Patent: March 27, 2018
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yuan-Hao Jin, Qun-Qing Li, Shou-Shan Fan
  • Patent number: 9929320
    Abstract: A wavelength conversion film is provided and may include a first layer including a wavelength conversion material and an encapsulant encapsulating the wavelength conversion material, and a second layer attached to the first layer and having a refractive index less than a refractive index of the encapsulant and greater than a refractive index of air.
    Type: Grant
    Filed: December 16, 2015
    Date of Patent: March 27, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Joon Sub Lee
  • Patent number: 9929315
    Abstract: A light emitting diode chip and a light emitting diode package including the same. The light emitting diode chip includes a substrate, a light emitting diode section disposed on the substrate, an inverse parallel diode section disposed on the substrate and connected inversely parallel to the light emitting diode section. In the light emitting diode chip, the light emitting diode section is disposed together with the inverse parallel diode section.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: March 27, 2018
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Duk Il Suh, Kyoung Wan Kim, Yeo Jin Yoon, Sang Won Woo, Shin Hyoung Kim
  • Patent number: 9929312
    Abstract: An embodiment provides a light-emitting element comprising: a substrate; a light-emitting structure, which is arranged on the substrate, and which comprises a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer; a light-transmissive conductive layer arranged on the second conductive semiconductor layer; and first and second electrodes electrically connected to the first and second conductive semiconductor layers, respectively, wherein the light-transmissive conductive layer has corrugated portions formed on a first surface thereof, which is directed to the second conductive semiconductor layer, and the density of the corrugated portions in the peripheral area of the light-transmissive conductive layer is larger than the density of the corrugated portions in the central area of the light-transmissive conductive layer.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: March 27, 2018
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Chong Cook Kim
  • Patent number: 9923032
    Abstract: An organic light emitting device, an organic light emitting display device, and a method of manufacturing a sub-organic light emitting device, the device including a first sub-organic light emitting device; and a second sub-organic light emitting device on the first sub-organic light emitting device, wherein the first sub-organic light emitting device includes a first lower electrode, a first organic light emitting layer on the first lower electrode, and a first upper electrode on the first organic light emitting layer, and the second sub-organic light emitting device includes a second lower electrode insulated from the first lower electrode, a second organic light emitting layer on the second lower electrode and entirely overlapped with the first organic light emitting layer when viewed in a plan view, and a second upper electrode on the second organic light emitting layer.
    Type: Grant
    Filed: June 21, 2016
    Date of Patent: March 20, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hyesog Lee, Yunseon Do, Byungchoon Yang
  • Patent number: 9923134
    Abstract: A light emitting device is constituted with a semiconductor light emitting element on which a support member is disposed on one surface provided with a p-side electrode and an n-side electrode and a fluorescent material layer is disposed on the other surface which is an opposite side of the one surface. The support member includes a resin layer, an electrode for p-side external connection and an electrode for n-side external connection disposed exposed at a surface opposite side of a surface where the resin layer is in touch with a light emitting element, and internal wirings disposed in the resin layer and electrically connecting between a p-side electrode and the electrode for p-side external connection respectively. The internal wirings include a metal wire and a metal plated layer, and a metal wire and a metal plated layer respectively connected in series.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: March 20, 2018
    Assignee: NICHIA CORPORATION
    Inventors: Akinori Yoneda, Yoshiyuki Aihara
  • Patent number: 9917281
    Abstract: The present disclosure relates to an emissive construct, which can be used in various OLED applications, for example, top-emission white organic light-emitting diodes. The emissive construct can include an optional second fluorescent emissive layer having an emitter with a second T1, a first fluorescent emissive layer having an emitter with a first T1, the first T1 being greater than the second T1 value, a hole-blocking layer, and a phosphorescent emissive layer.
    Type: Grant
    Filed: September 5, 2013
    Date of Patent: March 13, 2018
    Assignee: Nitto Denko Corporation
    Inventors: Liping Ma, Shijun Zheng, David T. Sisk
  • Patent number: 9911901
    Abstract: A light-emitting device according to an embodiment comprises: a substrate; a first buffer layer disposed on the substrate; a second buffer layer disposed on the first buffer layer and containing Al; a first conductive type semiconductor layer disposed on the second buffer layer; an active layer disposed on the first conductive type semiconductor layer; and a second conductive type semiconductor layer disposed on the active layer, wherein the second buffer layer comprises a first layer and a second layer which are horizontally disposed, the first layer having an increased Al composition ratio as the first layer becomes closer to the first conductive type semiconductor layer, and the second layer having an decreased Al composition ratio as the second layer becomes closer to the first conductive type semiconductor layer.
    Type: Grant
    Filed: March 3, 2015
    Date of Patent: March 6, 2018
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Ho Jun Lee
  • Patent number: 9905776
    Abstract: A pyrene-based compound and an organic light-emitting diode including the pyrene-based compound are provided. The pyrene-based compound of Formula 1 above may emit blue light having high color purity. For example, an organic light-emitting diode including the pyrene-based compounds of the invention may emit blue light having a y coordinate with a color purity of 0.1 or less, for example, a color purity of 0.09 or less, which is near to the NTSC or sRGB specification. A thin film including the pyrene-based compounds of the invention may be highly amorphous, and thus may have improved electrical stability. Accordingly, an organic light-emitting diode including the pyrene-based compounds of the invention may have improved lifetime characteristics.
    Type: Grant
    Filed: November 14, 2013
    Date of Patent: February 27, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Dong-Woo Shin, O-Hyun Kwon, Seul-Ong Kim, Mie-Hwa Park, Sung-Wook Kim
  • Patent number: 9905808
    Abstract: The present disclosure provides an OLED display device and its manufacturing method. The OLED display device includes an organic light-emitting layer and a plurality of elements arranged one on another at a light-exiting side of the organic light-emitting layer. At least one transparent light extraction layer is arranged between the elements, and/or between the organic light-emitting layer and the element adjacent to the organic light-emitting layer, and/or at a light-exiting surface of the element farthest away from the organic light-emitting layer. A refractive index of the organic light-emitting layer and/or a refractive index of the element adjacent to the light extraction layer, and a refractive index of the light extraction layer decrease successively in a light emergent direction, and the refractive index of the light extraction layer is greater than a refractive index of air.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: February 27, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Jiuxia Yang, Feng Bai
  • Patent number: 9905600
    Abstract: The present disclosure provides a method of manufacturing an image sensor device. The method includes: forming an etch stop layer on a first substrate; forming a light-sensing region comprising a light sensing quantum structure being able to detect a wavelength greater than about 1.5 um; forming a semiconductive substrate over the light-sensing region, the semiconductive substrate comprising an active component; forming an isolation structure extended through the light-sensing region; selectively removing the first substrate to expose the etch stop layer; and thinning the etch stop layer thereby exposing the light-sensing region.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: February 27, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Hung Cheng, Yeur-Luen Tu, Tung-I Lin, Cheng-Lung Wu
  • Patent number: 9899565
    Abstract: A method of manufacturing a semiconductor substrate may include forming a first semiconductor layer on a growth substrate, forming a second semiconductor layer on the first semiconductor layer, forming a plurality of voids in the first semiconductor layer by removing portions of the first semiconductor layer that are exposed by a plurality of trenches in the second semiconductor layer, forming a third semiconductor layer on the second semiconductor layer and covering the plurality of trenches, and separating the second and third semiconductor layers from the growth substrate. on the first semiconductor layer. The third semiconductor layer are grown from the second semiconductor layer and extend above the second semiconductor layer.
    Type: Grant
    Filed: June 16, 2016
    Date of Patent: February 20, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young Jo Tak, Sam Mook Kang, Mi Hyun Kim, Jun Youn Kim, Young Soo Park, Misaichi Takeuchi
  • Patent number: 9896378
    Abstract: A manufacturing method of an optical member includes providing a raw member, disposing first ions and second ions in the raw member, and heat-treating the raw member with the first and second ions therein such that the first ions are reacted with the second ions in the raw member to form quantum dots in the raw member which forms the optical member.
    Type: Grant
    Filed: April 13, 2016
    Date of Patent: February 20, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Junwoo You, Donghoon Kim, Taeho Lee
  • Patent number: 9893024
    Abstract: The present disclosure provides a light emitting device including a serially-connected LED array comprising a plurality of LED cells on a substrate. The serially-connected LED array includes a first LED cell, a second LED cell, and a serially-connected LED sub-array comprising at least three LED cells intervening between the first and second LED cell; and a plurality of conducting metals formed on the LED cells to electrically connect the plurality of LED cell in series; wherein among the LED sub-array which are continuously and sequentially connected by the conducting metals, each LED cell connects to a previous LED cell by a first connecting direction and connects to a next LED cell by a second connecting direction, the first connecting direction is not parallel to the second connecting direction.
    Type: Grant
    Filed: October 2, 2015
    Date of Patent: February 13, 2018
    Inventors: Chao Hsing Chen, Chien Fu Shen, Tsun Kai Ko, Schang Jing Hon, Hsin Mao Liu
  • Patent number: 9893295
    Abstract: Provided are a compound represented by Formula 1 and an organic light-emitting device including the same: wherein substituents of Formula 1 are understood by referring to the description provided in the detailed description.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: February 13, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jongwoo Kim, Youngkook Kim, Jino Lim, Hyungseok Jang, Seokhwan Hwang
  • Patent number: 9893236
    Abstract: A method of fabricating non-polar a-plane GaN/(Al,B,In,Ga)N multiple quantum wells (MQWs). The a-plane MQWs are grown on the appropriate GaN/sapphire template layers via metalorganic chemical vapor deposition (MOCVD) with well widths ranging from 20 ? to 70 ?. The room temperature photoluminescence (PL) emission energy from the a-plane MQWs followed a square well trend modeled using self-consistent Poisson-Schrodinger (SCPS) calculations. Optimal PL emission intensity is obtained at a quantum well width of 52 ? for the a-plane MQWs.
    Type: Grant
    Filed: October 23, 2015
    Date of Patent: February 13, 2018
    Assignees: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, JAPAN SCIENCE AND TECHNOLOGY AGENCY
    Inventors: Michael D. Craven, Steven P. DenBaars
  • Patent number: 9890329
    Abstract: A quantum dot nanocrystal structure includes: a core of a compound M1A1, wherein M1 is a metal selected from Zn, Sn, Pb, Cd, In, Ga, Ge, Mn, Co, Fe, Al, Mg, Ca, Sr, Ba, Ni, Ag, Ti and Cu, and A1 is an element selected from Se, S, Te, P, As, N, I, and O; an inner shell having a composition containing a compound M1xM21-xA1yA21-y, wherein M2 is a metal selected from Zn, Sn, Pb, Cd, In, Ga, Ge, Mn, Co, Fe, Al, Mg, Ca, Sr, Ba, Ni, Ag, Ti and Cu, A2 is an element selected from Se, S, Te, P, As, N, I and O; and a multi-pod-structured outer shell of a compound M1A2 or M2A2 enclosing the inner shell and having a base portion and protrusion portions extending from the base portion.
    Type: Grant
    Filed: May 14, 2015
    Date of Patent: February 13, 2018
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Hsueh-Shih Chen, Guan-Hong Chen, Kai-Cheng Wang, Chang-Wei Yeh, Cheng-Wei Chang, Ching-Che Hung
  • Patent number: 9893244
    Abstract: An optoelectronic element includes an optoelectronic unit, a first metal layer, a second metal layer, a conductive layer and a transparent structure. The optoelectronic unit has a central line in a top view, a top surface, and a bottom surface. The second metal layer is formed on the top surface, and has an extension portion crossing over the central line and extending to the first metal layer. The conductive layer covers the first metal layer and the extension portion. The transparent structure covers the bottom surface without covering the top surface.
    Type: Grant
    Filed: September 18, 2015
    Date of Patent: February 13, 2018
    Assignee: EPISTAR CORPORATION
    Inventors: Cheng-Nan Han, Tsung-Xian Lee, Min-Hsun Hsieh, Hung-Hsuan Chen, Hsin-Mao Liu, Hsing-Chao Chen, Ching San Tao, Chih-Peng Ni, Tzer-Perng Chen, Jen-Chau Wu, Masafumi Sano, Chih-Ming Wang
  • Patent number: 9887315
    Abstract: A light emitting diode and a method for fabricating the same are provided. The light emitting diode includes: a transparent substrate; a semiconductor material layer formed on the top surface of a substrate with an active layer generating light; and a fluorescent layer formed on the back surface of the substrate with controlled varied thicknesses. The ratio of light whose wavelength is shifted while propagating through the fluorescent layer and the original light generated in the active layer can be controlled by adjusting the thickness of the fluorescent layer, to emit desirable homogeneous white light from the light emitting diode.
    Type: Grant
    Filed: January 15, 2015
    Date of Patent: February 6, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Joon-seop Kwak, Jaehee Cho
  • Patent number: 9887135
    Abstract: A method includes forming a first mandrel layer above a first process layer. A first implant region is formed in the first mandrel layer. The first mandrel layer is patterned to define a plurality of first mandrel elements. At least a first subset of the first mandrel elements is formed from the first mandrel layer outside the first implant region and a second subset of the first mandrel elements is formed from the first implant region. First spacers are formed on sidewalls of the plurality of first mandrel elements. The first subset of the first mandrel elements are selectively removed without removing the second subset of the first mandrel elements. The first process layer is patterned using the first spacers and the second subset of the first mandrel elements as an etch mask.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: February 6, 2018
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Jin Wallner, Haoren Zhuang
  • Patent number: 9887298
    Abstract: An embodiment is a semiconductor device which includes a first oxide semiconductor layer over a substrate having an insulating surface and including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer which are in contact with the second oxide semiconductor layer; a gate insulating layer covering the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer and in a region overlapping with the second oxide semiconductor layer. The second oxide semiconductor layer is a layer including a crystal formed by growth from the crystalline region.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: February 6, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 9882139
    Abstract: A heterocyclic compound represented by Formula 1 and an organic light-emitting diode including the same:
    Type: Grant
    Filed: May 6, 2014
    Date of Patent: January 30, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Dong-Woo Shin, Seul-Ong Kim, O-Hyun Kwon, Kyul Han
  • Patent number: 9882001
    Abstract: Disclosed herein is an isolable colloidal particle comprising a nanoparticle and an inorganic capping agent bound to the surface of the nanoparticle, a method for making the same in a biphasic solvent mixture, and the formation of structures and solids from the isolable colloidal particle. The process can yield photovoltaic cells, piezoelectric crystals, thermoelectric layers, optoelectronic layers, light emitting diodes, ferroelectric layers, thin film transistors, floating gate memory devices, phase change layers, and sensor devices.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: January 30, 2018
    Assignee: THE UNIVERSITY OF CHICAGO
    Inventors: Angshuman Nag, Dmitri V. Talapin
  • Patent number: 9882085
    Abstract: The present invention relates to a method for separating epitaxial layers and growth substrates, and to a semiconductor device using same. According to the present invention, a semiconductor device is provided which comprises a supporting substrate and a plurality of semiconductor layers provided on the supporting substrate, wherein the uppermost layer of the semiconductor layers has a surface of non-uniform roughness.
    Type: Grant
    Filed: February 10, 2016
    Date of Patent: January 30, 2018
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Jeong Hun Heo, Joo Won Choi, Choong Min Lee, Su Jin Shin, Ki Bum Nam, Yu Dae Han, A Ram Cha Lee
  • Patent number: 9874691
    Abstract: In an example, a coupled system includes a first waveguide, at least one second waveguide, and an interposer. The first waveguide has a silicon (Si) core having first refractive index n1 and a tapered end. The at least one second waveguide each has a silicon nitride (SiN) core having a second refractive index n2. The interposer includes a third waveguide having a third refractive index n3 and a coupler portion, where n1>n2>n3. The tapered end of the first waveguide is adiabatically coupled to a coupler portion of one of the at least one second waveguide. A tapered end of one of the at least one second waveguide is adiabatically coupled to the coupler portion of the third waveguide of the interposer. The third waveguide of the interposer has an optical mode size that is similar to the mode size of a standard single mode optical fiber.
    Type: Grant
    Filed: July 12, 2016
    Date of Patent: January 23, 2018
    Assignee: Finisar Corporation
    Inventors: Daniel Mahgerefteh, Bryan Park, Jianxiao Chen, Xiaojie Xu, Gilles P. Denoyer, Bernd Huebner
  • Patent number: 9873170
    Abstract: A method of manufacturing a light emitting element includes providing a wafer having a substrate and a semiconductor layered body provided on an upper surface of the substrate, irradiating the substrate with laser light from a side of a lower surface opposite to the upper surface of the substrate to form modified regions in the substrate, and dividing the wafer into light emitting elements at the modified regions as a starting point. The semiconductor layered body includes a first p-type semiconductor layer made of a nitride semiconductor and provided on the upper surface of the substrate, an n-type semiconductor layer made of a nitride semiconductor and provided on the first p-type semiconductor layer, an active layer made of a nitride semiconductor and provided on the n-type semiconductor layer, and a second p-type semiconductor layer made of a nitride semiconductor and provided on the active layer.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: January 23, 2018
    Assignee: NICHIA CORPORATION
    Inventors: Junya Narita, Takuya Okada
  • Patent number: 9873954
    Abstract: Provided are an epitaxial wafer and a method of fabricating the same. The method includes a pre-growth step of injecting a reaction source for epitaxial growth on a semiconductor wafer prepared in a chamber and growing an epitaxial layer by a predetermined first thickness at a predetermined first growth rate and at a predetermined first growth temperature, a heat treatment step of performing heat treatment on the epitaxial layer grown by the pre-growth step during a predetermined time, and a subsequent growth step of injecting the reaction source on the heat-treated semiconductor wafer and growing the epitaxial layer to a target thickness at a predetermined second growth rate and at a predetermined second growth temperature. The first growth rate is smaller than the second growth rate.
    Type: Grant
    Filed: October 29, 2013
    Date of Patent: January 23, 2018
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Seok Min Kang
  • Patent number: 9871162
    Abstract: A method of growing a Group-III nitride crystal includes forming a buffer layer on a silicon substrate and growing a Group-III nitride crystal on the buffer layer. The method of growing of a Group-III nitride crystal is executed through metal-organic chemical vapor deposition (MOCVD) during which a Group-III metal source and a nitrogen source gas are provided. The nitrogen source gas includes hydrogen (H2) and at least one of ammonia (NH3) and nitrogen (N2). At least a partial stage of the operation of growing the Group-III nitride crystal can be executed under conditions in which a volume fraction of hydrogen in the nitrogen source gas ranges from 20% to 40% and a temperature of the silicon substrate ranges from 950° C. to 1040° C.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: January 16, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: William Solari, Min Ho Kim, Heon Ho Lee
  • Patent number: 9871345
    Abstract: According to an embodiment, a crystalline color-conversion device includes an electrically driven first light emitter, for example a blue or ultraviolet LED, for emitting light having a first energy in response to an electrical signal. An inorganic solid single-crystal direct-bandgap second light emitter having a bandgap of a second energy less than the first energy is provided in association with the first light emitter. The second light emitter is electrically isolated from, located in optical association with, and physically connected to the first light emitter so that in response to the electrical signal the first light emitter emits first light that is absorbed by the second light emitter and the second light emitter emits second light having a lower energy than the first energy.
    Type: Grant
    Filed: August 24, 2015
    Date of Patent: January 16, 2018
    Assignee: X-Celeprint Limited
    Inventors: Christopher Bower, Matthew Meitl, Ronald S. Cok
  • Patent number: 9871200
    Abstract: An organic electron transport layer has at least one dopant for increasing the n-conductivity of the organic layer. The dopant is selected from the group of salts of cyclopentadiene compounds according to formula 1, wherein the substituents R1 to R2 are independently selected from the group containing —H, -D, halogen, —CN, —NO2, —OH, amine, ether, thioether, alkyl, cycloalkyl, acrylic, vinyl, allyl, aromatics, fused aromatics and heteroaromatics.
    Type: Grant
    Filed: September 11, 2013
    Date of Patent: January 16, 2018
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Guenter Schmid, Jan Hauke Wemken
  • Patent number: 9863058
    Abstract: A gallium nitride crystal having a hexagonal crystal structure includes a first region located on an inner side of a cross section intersecting c-axis of the hexagonal crystal structure, and a second region surrounding at least a part of the outer periphery of the first region in the cross section. An emission spectrum of each of the first region and the second region with electron beam or ultraviolet light excitation has a first peak including a band edge emission of gallium nitride and a second peak located in a longer wavelength area than the first peak. A peak intensity of the first peak is smaller than a peak intensity of the second peak in the first region, and a peak intensity of the first peak is greater than a peak intensity of the second peak in the second region.
    Type: Grant
    Filed: May 11, 2015
    Date of Patent: January 9, 2018
    Assignee: RICOH COMPANY, LTD.
    Inventors: Masahiro Hayashi, Seiji Sarayama, Takashi Satoh, Hiroshi Nambu, Chiharu Kimura, Naoya Miyoshi
  • Patent number: 9865773
    Abstract: A semiconductor light emitting device including a substrate, an electrode and a light emitting region is provided. The substrate may have protruding portions formed in a repeating pattern on substantially an entire surface of the substrate while the rest of the surface may be substantially flat. The cross sections of the protruding portions taken along planes orthogonal to the surface of the substrate may be semi-circular in shape. The cross sections of the protruding portions may in alternative be convex in shape. A buffer layer and a GaN layer may be formed on the substrate.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: January 9, 2018
    Assignee: Nichia Corporation
    Inventors: Isamu Niki, Motokazu Yamada, Masahiko Sano, Shuji Shioji
  • Patent number: 9864106
    Abstract: A semiconductor distributed Bragg reflector (DBR) including a first multilayer structure including a plurality of first semiconductor layers and one or more second semiconductor layers each interposed between a corresponding pair of the plurality of first semiconductor layers; a second multilayer structure including a plurality of third semiconductor layers and one or more second semiconductor layers each interposed between a corresponding pair of the plurality of third semiconductor layers; and a protection layer interposed between the first multilayer structure and the second multilayer structure. The second semiconductor layer has a lower decomposition temperature than the first semiconductor layer. The third semiconductor layer has a lower decomposition temperature than the second semiconductor layer.
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: January 9, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takeshi Kawashima
  • Patent number: 9859429
    Abstract: An integrated circuit structure includes a semiconductor substrate, and isolation regions extending into the semiconductor substrate, wherein the isolation regions have opposite sidewalls facing each other. A fin structure includes a silicon fin higher than top surfaces of the isolation regions, a germanium-containing semiconductor region overlapped by the silicon fin, silicon oxide regions on opposite sides of the germanium-containing semiconductor region, and a germanium-containing semiconductor layer between and in contact with the silicon fin and one of the silicon oxide regions.
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: January 2, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuo-Cheng Ching, Jiun-Jia Huang, Chao-Hsiung Wang, Chi-Wen Liu