With Particular Barrier Dimension Patents (Class 257/17)
  • Patent number: 11121190
    Abstract: Provided is an optoelectronic device comprising an optoelectronic element and circuitry connected to the optoelectronic element, wherein the optoelectronic element comprises plural quantum dots or plural nanorods, and wherein the circuitry is configured to be capable of switching the optoelectronic element between a configuration in which the circuitry provides an effective forward bias voltage that causes the optoelectronic element to emit light and a configuration in which the circuitry provides an effective reverse bias voltage that causes the optoelectronic element to be capable of generating a photocurrent when light to which the optoelectronic element is sensitive strikes the optoelectronic element.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: September 14, 2021
    Assignees: Dow Global Technologies LLC, Rohm and Haas Company, The Board of Trustees of the University of Illinois, Rohm and Haas Electronic Materials LLC
    Inventors: Peter Trefonas, III, Kishori Deshpande, Trevor Ewers, Edward Greer, Jaebum Joo, Bong Hoon Kim, Nuri Oh, Jong Keun Park, Moonsub Shim, Jieqian Zhang
  • Patent number: 11114585
    Abstract: Semiconductor structures and methods for forming those semiconductor structures are disclosed. For example, a semiconductor structure with a p-type superlattice region, an i-type superlattice region, and an n-type superlattice region is disclosed. The semiconductor structure can have a polar crystal structure with a growth axis that is substantially parallel to a spontaneous polarization axis of the polar crystal structure. In some cases, there are no abrupt changes in polarisation at interfaces between each region. At least one of the p-type superlattice region, the i-type superlattice region and the n-type superlattice region can comprise a plurality of unit cells exhibiting a monotonic change in composition from a wider band gap (WBG) material to a narrower band gap (NBG) material or from a NBG material to a WBG material along the growth axis to induce p-type or n-type conductivity.
    Type: Grant
    Filed: November 6, 2019
    Date of Patent: September 7, 2021
    Assignee: Silanna UV Technologies Pte Ltd
    Inventors: Petar Atanackovic, Matthew Godfrey
  • Patent number: 10872956
    Abstract: Quantum dot circuit and a method of characterizing such a circuit Voltages that enable control of electron occupation in a series of quantum dots are determined by a method of measuring effects of gate electrode voltages on a quantum dot circuit. The quantum dot circuit comprises a channel (10), first gate electrodes (14a-14e) that extend over locations along the edge of the channel to create potentials barriers defining the potentials well therebetween, as well as second gate electrodes (16a-16d) adjacent to potential wells, for controlling depths of the successive electrical potential wells between the potential barriers. First, channel currents are measured in a pre-scan of bias voltages of the first gates for controlling the potential barriers. The result is used to set their bias levels in, a scan over a two-dimensional range of combinations of bias voltages on the second gates for controlling the depths.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: December 22, 2020
    Assignees: Nederlandse Organisatie voor toegepast-natuurwetenschappelijk onderzoek TNO, Technische Universiteit Delft
    Inventors: Pieter Thijs Eendebak, Timothy Alexander Baart, Lieven Mark Koenraad Vandersypen
  • Patent number: 10868050
    Abstract: The present disclosure relates to a semiconductor image sensor device. In some embodiments, the semiconductor image sensor device includes a semiconductor substrate having a first surface configured to receive incident radiation. A plurality of sensor elements are arranged within the semiconductor substrate. A first charged layer is arranged on an entirety of a second surface of the semiconductor substrate facing an opposite direction as the first surface. The second surface is between the first charged layer and the first surface of the semiconductor substrate.
    Type: Grant
    Filed: May 9, 2017
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shyh-Fann Ting, Chih-Yu Lai, Cheng-Ta Wu, Yeur-Luen Tu, Ching-Chun Wang
  • Patent number: 10859860
    Abstract: An electro-optic modulator device includes a modulation region, a reflecting region, a conductive line and an anti-reflecting region. The modulation region includes a doped region. The reflecting region is over the modulation region. The conductive line is connected to the doped region. The conductive line extends through the reflecting region. The anti-reflecting region is on an opposite surface of the modulation region from the reflecting region.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: December 8, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wan-Yu Lee, Ying-Hao Kuo
  • Patent number: 10763382
    Abstract: The invention relates to quantum dot and photodetector technology, and more particularly, to quantum dot infrared photodetectors (QDIPs) and focal plane array. The invention further relates to devices and methods for the enhancement of the photocurrent of quantum dot infrared photodetectors in focal plane arrays.
    Type: Grant
    Filed: May 2, 2019
    Date of Patent: September 1, 2020
    Assignee: University of Massachusetts
    Inventors: Xuejun Lu, Guiru Gu, Puminun Vasinajindakaw
  • Patent number: 10741719
    Abstract: This CIP application builds on Ge quantum dot superlattice (QDSL) based field effect transistors where Ge quantum dot arrays are used as a high carrier mobility channel. The QDSL diodes claims that were withdrawn are included. The diodes are used as light emitting devices and photodetectors. A combination of QDC-FETs, light emitting devise, photodetectors are vertically stacked to form a versatile 3-dimensional integrated circuit. Nonvolatile memories using floating quantum dot gates are included in vertical stacking format. Nonvolatile random access memories are integrated as a stack. Also described is the use of 3-layer stack of QDC-FETs making compact electrical circuits interfacing pixels for an active matrix flat panel displays that results in high resolution. Ge or Si quantum dot transport channel based devices processing spin polarized electrons introduced by magnetic tunnel junctions are described for multi-state coherent logic.
    Type: Grant
    Filed: August 15, 2017
    Date of Patent: August 11, 2020
    Inventor: Faquir Chand Jain
  • Patent number: 10720456
    Abstract: Methods of fabrication and monolithic integration of a polycrystalline infrared detector structure deposit Group III-V compound semiconductor materials at a low deposition temperature within a range of about 300° C. to about 400° C. directly on an amorphous template. The methods provide wafer-level fabrication of polycrystalline infrared detectors and monolithic integration with a readout integrated circuit wafer for focal plane arrays.
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: July 21, 2020
    Assignee: HRL Laboratories, LLC
    Inventors: Terence J. DeLyon, Rajesh D. Rajavel, Sevag Terterian, Minh B. Nguyen, Hasan Sharifi
  • Patent number: 10629772
    Abstract: Disclosed is an optoelectronic device including a lanthanum-based active layer and a method for fabricating the same. The optoelectronic device includes an active layer of multiple quantum well (MQW) structure including each well between walls, wherein the wall is a dielectric layer selected from alkali metal halide, alkali earth metal halide, alkali metal chalcogenide and alkali earth metal chalcogenide, and the well is a layer including semiconductor selected from lanthanum-based metal halide, lanthanum-based metal chalcogenide, transition metal (including post transition metal) halide and transition metal chalcogenide. The optoelectronic device including the active layer can be used in applications of LEDs, displays, optical sensors and solar cells. When the active layer is used as a photoconversion layer, displays can be implemented by upconversion or downconversion of short wavelength of UV, blue and IR light source to visible wavelength of red, green and blue.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: April 21, 2020
    Assignee: HONGIK UNIV INDUSTRY-ACADEMIA COOP. FOUNDATION
    Inventor: Hee-Sun Yang
  • Patent number: 10539527
    Abstract: A sensing apparatus for sensing target materials including biological or chemical molecules in a fluid. One such apparatus includes a semiconductor-on-insulator (SOI) structure having an electrically-insulating layer, a fluidic channel supported by the SOI structure and configured and arranged to receive and pass a fluid including the target materials, and a semiconductor device including at least three electrically-contiguous semiconductor regions doped to exhibit a common polarity. The semiconductor regions include a sandwiched region sandwiched between two of the other semiconductor regions, and configured and arranged adjacent to the fluidic channel with a surface directed toward the fluidic channel for coupling to the target materials in the fluidic channel, and further arranged for responding to a bias voltage. The sensing apparatus also includes an amplification circuit in or on the SOI and that is arranged to facilitate sensing of the target material near the fluidic channel.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: January 21, 2020
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Kosar Baghbani-Parizi, Yoshio Nishi, Hesaam Esfandyarpour
  • Patent number: 10483422
    Abstract: Provided is a photovoltaic device prepared with a semiconductor including a localized level or an intermediate band in a forbidden band and capable of improving the performance than before. The photovoltaic device includes a plurality of first layers made of a first semiconducting material and a plurality of second layers made of a second semiconducting material that is different from the first semiconducting material, wherein the second semiconducting material includes a localized level or intermediate band in a forbidden band, the first layers and the second layers are alternately laminated one by one, at least two of the second layers are each disposed between a pair of the first layers, and a thickness of each of the second layers is thinner than a thickness of four molecular layers of the first semiconducting material.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: November 19, 2019
    Assignees: TOYOTA JIDOSHA KABUSHIKI KAISHA, NATIONAL UNIVERSITY CORPORATION SAITAMA UNIVERSITY
    Inventors: Daisuke Sato, Hiroyuki Yaguchi, Shuhei Yagi
  • Patent number: 10418487
    Abstract: A non-planar gate all-around device and method of fabrication thereby are described. In one embodiment, the device includes a substrate having a top surface with a first lattice constant. Embedded epi source and drain regions are formed on the top surface of the substrate. The embedded epi source and drain regions have a second lattice constant that is different from the first lattice constant. A channel nanowire having a third lattice is formed between and are coupled to the embedded epi source and drain regions. In an embodiment, the second lattice constant and the third lattice constant are different from the first lattice constant. A gate dielectric layer is formed on and all-around the channel nanowire. A gate electrode is formed on the gate dielectric layer and surrounding the channel nanowire.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: September 17, 2019
    Assignee: Intel Corporation
    Inventors: Willy Rachmady, Ravi Pillarisetty, Van H. Le, Jack T. Kavalieros, Robert S. Chau, Jessica S. Kachian
  • Patent number: 10418500
    Abstract: An infrared detector includes a quantum dot structure, and an electrode that is coupled to the quantum dot structure, wherein the quantum dot structure is obtained by stacking a plurality of structures each including a quantum dot, a first barrier layer under the quantum dot and a second barrier layer over the quantum dot to cover the quantum dots, and an intermediate layer under the first barrier layer, and wherein the first barrier layer includes a first region and a second region having a lower Al concentration than that of the intermediate layer between the first region and the intermediate layer.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: September 17, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Ryo Suzuki, Junichi Kon, Hironori Nishino
  • Patent number: 10418516
    Abstract: Disclosed herein are multi-layered optically active regions for semiconductor light-emitting devices (LEDs) that incorporate intermediate carrier blocking layers, the intermediate carrier blocking layers having design parameters for compositions and doping levels selected to provide efficient control over the carrier injection distribution across the active regions to achieve desired device injection characteristics. Examples of embodiments discussed herein include, among others: a multiple-quantum-well variable-color LED operating in visible optical range with full coverage of RGB gamut, a multiple-quantum-well variable-color LED operating in visible optical range with an extended color gamut beyond standard RGB gamut, a multiple-quantum-well light-white emitting LED with variable color temperature, and a multiple-quantum-well LED with uniformly populated active layers.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: September 17, 2019
    Assignee: Ostendo Technologies, Inc.
    Inventors: Hussein S. El-Ghoroury, Mikhail V. Kisin, Yea-Chuan Milton Yeh, Chih-Li Chuang, Jyh-Chia Chen
  • Patent number: 10388748
    Abstract: An electrical device in which an interface layer is disposed in between and in contact with a conductor and a semiconductor.
    Type: Grant
    Filed: October 9, 2017
    Date of Patent: August 20, 2019
    Assignee: Acorn Technologies, Inc.
    Inventors: Daniel E. Grupp, Daniel J. Connelly
  • Patent number: 10326032
    Abstract: Methods and systems including a photodetector of a downhole tool for performing downhole operations are provided herein. The photodetector includes a housing configured along a carrier disposed downhole within a borehole and a graphene tunneling photodetector located within the housing configured to perform a downhole operation.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: June 18, 2019
    Assignee: BAKER HUGHES, A GE COMPANY, LLC
    Inventor: Rocco DiFoggio
  • Patent number: 10326035
    Abstract: The invention relates to quantum dot and photodetector technology, and more particularly, to quantum dot infrared photodetectors (QDIPs) and focal plane array. The invention further relates to devices and methods for the enhancement of the photocurrent of quantum dot infrared photodetectors in focal plane arrays.
    Type: Grant
    Filed: September 5, 2017
    Date of Patent: June 18, 2019
    Assignee: University of Massachusetts
    Inventors: Xuejun Lu, Guiru Gu, Puminun Vasinajindakaw
  • Patent number: 10203527
    Abstract: A quantum dot film and a display device are disclosed herein. The quantum dot film includes a substrate and at least one ultraviolet quantum dot disposed in the substrate and capable of emitting ultraviolet rays having a wavelength in a range of 190 to 280 nm.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: February 12, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Yuanjie Xu, Weiyun Huang, Yang Wang
  • Patent number: 10170603
    Abstract: A semiconductor device including at least one double-barrier resonant tunneling diode (DBRTD) is provided. The at least one DBRTD may include a first doped semiconductor layer, and a first barrier layer on the first doped semiconductor layer and including a superlattice. The DBRTD may further include a first intrinsic semiconductor layer on the first barrier layer, a second barrier layer on the first intrinsic semiconductor layer and also including the superlattice, a second intrinsic semiconductor layer on the second barrier layer, a third barrier layer on the second intrinsic semiconductor layer and also including the superlattice. A third intrinsic semiconductor layer may be on the third barrier layer, a fourth barrier layer may be on the third intrinsic semiconductor layer and also including the superlattice, a second doped semiconductor layer on the fourth barrier layer.
    Type: Grant
    Filed: August 7, 2017
    Date of Patent: January 1, 2019
    Assignee: ATOMERA INCORPORATED
    Inventors: Robert J. Mears, Hideki Takeuchi, Marek Hytha
  • Patent number: 10170604
    Abstract: A method for making a semiconductor device may include forming at least one a double-barrier resonant tunneling diode (DBRTD) by forming a first doped semiconductor layer, and a forming first barrier layer on the first doped semiconductor layer and including a superlattice. The method may further include forming a first intrinsic semiconductor layer on the first barrier layer, forming a second barrier layer on the first intrinsic semiconductor layer and also comprising the superlattice, forming a second intrinsic semiconductor layer on the second barrier layer, and forming a third barrier layer on the second intrinsic semiconductor layer and also comprising the superlattice. The method may further include forming a third intrinsic semiconductor layer on the third barrier layer, forming a fourth barrier layer on the third intrinsic semiconductor layer, and forming a second doped semiconductor layer on the fourth barrier layer.
    Type: Grant
    Filed: August 7, 2017
    Date of Patent: January 1, 2019
    Assignee: ATOMERA INCORPORATED
    Inventors: Robert J. Mears, Hideki Takeuchi, Marek Hytha
  • Patent number: 10119913
    Abstract: Apparatuses and systems for a die-integrated aspheric mirror are described herein. One apparatus includes an ion trap die including a number of ion locations and an aspheric mirror integrated with the ion trap die.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: November 6, 2018
    Assignee: Honeywell International Inc.
    Inventors: James Edward Goeders, Matthew Edward Lewis Jungwirth, Terry Dean Stark
  • Patent number: 10025123
    Abstract: The various technologies presented herein relate to various hybrid phononic-photonic waveguide structures that can exhibit nonlinear behavior associated with traveling-wave forward stimulated Brillouin scattering (forward-SBS). The various structures can simultaneously guide photons and phonons in a suspended membrane. By utilizing a suspended membrane, a substrate pathway can be eliminated for loss of phonons that suppresses SBS in conventional silicon-on-insulator (SOI) waveguides. Consequently, forward-SBS nonlinear susceptibilities are achievable at about 3000 times greater than achievable with a conventional waveguide system. Owing to the strong phonon-photon coupling achievable with the various embodiments, potential application for the various embodiments presented herein cover a range of radiofrequency (RF) and photonic signal processing applications. Further, the various embodiments presented herein are applicable to applications operating over a wide bandwidth, e.g. 100 MHz to 50 GHz or more.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: July 17, 2018
    Assignees: National Technology & Engineering Solutions of Sandia, LLC
    Inventors: Peter Thomas Rakich, Heedeuk Shin, Ryan Camacho, Jonathan Albert Cox, Robert L. Jarecki, Jr., Wenjun Qiu, Zheng Wang
  • Patent number: 9943845
    Abstract: A detector for detecting an agent within an aerosol is provided. The detector may include a liquid feeder configured to generate a droplet comprised of an assay reagent. The detector may further include an aerosol focuser configured to capture and focus the aerosol such that the aerosol is configured to be encapsulated within the droplet in order to cause the assay reagent to react in the droplet. The detector may even further include an interrogator configured to interrogate the droplet in order to detect the agent within the aerosol.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: April 17, 2018
    Assignee: The Johns Hopkins University
    Inventor: Brian E. Damit
  • Patent number: 9882080
    Abstract: A photodetector is disclosed. A first layer of the photodetector has a first semiconductor material having a first band gap energy, a first electric field, and a first doping concentration. A second layer has a second semiconductor material having a second band gap energy higher than the first band gap energy, a non-zero second electric field smaller than the first electric field, and a second doping concentration. The second layer is interfaced with the first layer. A region between the first and second layers has a third doping concentration.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: January 30, 2018
    Assignee: Mellanox Technologies Ltd.
    Inventors: Marek Grzegorz Chacinski, Nicolae Pantazi Chitica
  • Patent number: 9859409
    Abstract: Transistors and methods of forming the same include forming a fin having an active layer between two sacrificial layers. A dummy gate is formed over the fin. Spacers are formed around the dummy gate. The dummy gate is etched away to form a gap over the fin. Material from the two sacrificial layers is etched away in the gap. A gate stack is formed around the active layer in the gap. Source and drain regions are formed in contact with the active layer.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: January 2, 2018
    Assignee: International Business Machines Corporation
    Inventors: Kangguo Cheng, Xin Miao, Wenyu Xu, Chen Zhang
  • Patent number: 9842921
    Abstract: A quantum semiconductor device is provided. The quantum semiconductor device includes a quantum heterostructure, a dielectric layer, and an electrode. The quantum heterostructure includes a quantum well layer that includes a first 2DEG region, a second 2DEG region, and a third 2DEG region. A first tunnel barrier exists between the first 2DEG region and the second 2DEG region. A second tunnel barrier exists between the second 2DEG region and the third 2DEG region. A third tunnel barrier exists either between the first 2DEG region and the third 2DEG region. The dielectric layer is formed on the quantum heterostructure. The electrode is formed on the dielectric layer directly above the first tunnel barrier.
    Type: Grant
    Filed: March 12, 2014
    Date of Patent: December 12, 2017
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Mark A. Eriksson, John King Gamble, Daniel R. Ward, Susan Nan Coppersmith, Mark G. Friesen
  • Patent number: 9780240
    Abstract: The invention relates to quantum dot and photodetector technology, and more particularly, to quantum dot infrared photodetectors (QDIPs) and focal plane array. The invention further relates to devices and methods for the enhancement of the photocurrent of quantum dot infrared photodetectors in focal plane arrays.
    Type: Grant
    Filed: October 6, 2016
    Date of Patent: October 3, 2017
    Assignee: University of Massachussets
    Inventors: Xuejun Lu, Guiru Gu, Puminun Vasinajindakaw
  • Patent number: 9774169
    Abstract: A semiconductor laser element includes an n-side semiconductor layer, an active layer, and a p-side semiconductor layer, layered upward in this order, each being made of a nitride semiconductor. The active layer includes one or more well layers, and an n-side barrier layer located lower than the one or more well layers. The n-side semiconductor layer includes a composition-graded layer located in contact with the n-side barrier layer. The composition-graded layer has a band-gap energy that decreases toward an upper side of the composition-graded layer, with a band-gap energy of the upper side being smaller than a band-gap energy of the n-side barrier layer. The composition-graded layer has an n-type dopant concentration greater than 5×1017/cm3 and less than or equal to 2×1018/cm3. The n-side barrier layer has an n-type dopant concentration greater than that of the composition-graded layer and a thickness smaller than that of the composition graded layer.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: September 26, 2017
    Assignee: NICHIA CORPORATION
    Inventor: Yoshitaka Nakatsu
  • Patent number: 9716368
    Abstract: An embodiment provides a 850 nm VCSEL transmitter that includes an active region having: one or more quantum wells having InGaAs material; and two or more quantum well barriers having AlGaAs or GaAsP materials adjacent to the one or more quantum wells. An in-phase or anti-phase, step or ring surface relief structure depth control is made on either (i) the topmost GaAs surface/contact layers by either dry or wet etching, or (ii) with the help of PECVD made thin SiN layer made on GaAs layer with wet etching for tunable static and dynamic characteristics such as output power, slope efficiency, and resonance oscillation bandwidth, photon lifetime through its damping, rise/fall times of eye-opening, over shooting, and jitter respectively. Moreover, anti-phase surface relief structure diameter control can be made on the topmost GaAs step surface/contact, or SiN ring layers for filtering of higher order modes and reduction of spectral line width.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: July 25, 2017
    Assignee: SAE MAGNETICS (H.K.) LTD.
    Inventor: Babu Dayal Padullaparthi
  • Patent number: 9698364
    Abstract: An organic thin film transistor, a preparing method thereof, and a preparation equipment. The preparation equipment of an organic thin film transistor comprises: forming a gate electrode, a gate insulating layer, an organic semiconductor layer, and source-drain electrodes on a substrate; the step of forming the organic semiconductor layer comprises: blade-coating a solution in which an organic semiconductor material used to forming the organic semiconductor layer is dissolved to form the organic semiconductor layer. The preparing method can avoid the difference between the edge and the center of the substrate caused by the impact of centripetal force when a spin-coating method is applied, so that the yield of the organic thin film transistor devices is improved.
    Type: Grant
    Filed: April 7, 2013
    Date of Patent: July 4, 2017
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Longzhen Qiu, Xiang Feng, Xianghua Wang, Ze Liu
  • Patent number: 9692001
    Abstract: The display device includes a first organic electroluminescence element which includes an anode and a cathode which form a pair, and a light emitting layer which is formed between the anode and the cathode on a substrate. The light emitting layer includes a plurality of sub-light emitting layers which perform light emitting of colors which are respectively different. Each of the plurality of sub-light emitting layers is doped with a quantum dot light emitting material corresponding to a color to be emitted. A current with current density corresponding to a position of a sub-light emitting layer of a desired color among the plurality of sub-light emitting layers is injected to the light emitting layer, and the sub-light emitting layer of the desired color performs light emitting.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: June 27, 2017
    Assignee: Japan Display Inc.
    Inventors: Hironori Toyoda, Toshihiro Sato
  • Patent number: 9680054
    Abstract: A component including a substrate, at least one layer including a color conversion material including quantum dots disposed over the substrate, and a layer including a conductive material (e.g., indium-tin-oxide) disposed over the at least one layer. (Embodiments of such component are also referred to herein as a QD light-enhancement substrate (QD-LES).) In certain preferred embodiments, the substrate is transparent to light, for example, visible light, ultraviolet light, and/or infrared radiation. In certain embodiments, the substrate is flexible. In certain embodiments, the substrate includes an outcoupling element (e.g., a microlens array). A film including a color conversion material including quantum dots and a conductive material is also provided. In certain embodiments, a component includes a film described herein. Lighting devices are also provided. In certain embodiments, a lighting device includes a film described herein.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: June 13, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seth Coe-Sullivan, Peter T. Kazlas
  • Patent number: 9652620
    Abstract: According to an embodiment, a quantum communication device includes a sift processor, an estimator, a determination unit, and a corrector. The sift processor is configured to acquire sift processing data by referring to a cryptographic key bit string in a predetermined bit string with a reference basis randomly selected from a plurality of bases via a quantum communication channel. The estimator is configured to acquire an estimated error rate of the sift processing data. The determination unit is configured to determine order of the sift processing data in which an error is to be corrected based on the estimated error rate and difference data between a processing speed of error correcting processing and a processing speed of privacy amplification processing. The corrector is configured to acquire one piece of the sift processing data in the order determined by the determination unit, and generate error correcting processing data.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: May 16, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuaki Doi, Yoshimichi Tanizawa
  • Patent number: 9638659
    Abstract: Disclosed herein is a technology for fabricating a nanowire field-effect sensor, in which a bulk silicon substrate is used so that the fabrication cost of the sensor can be reduced while the integration density of the sensor can be increased. In addition, the nanowire field-effect sensor includes a nano-network having a network structure in which pins are vertically arranged on the sidewalls of the network, respectively, and a gate insulating layer is applied to the pins. Due to this nano-network, the detection area of the sensor can be increased to increase its sensitivity, and the structural stability of the sensor can be ensured.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: May 2, 2017
    Assignee: POSTECH ACADEMY-INDUSTRY FOUNDATION
    Inventors: Jeong Soo Lee, Chan Oh Park, Dong Hoon Kim, Ki Hyun Kim
  • Patent number: 9625639
    Abstract: An optical member including a wavelength conversion layer to convert a wavelength of an incident light; an upper anti-reflective layer of at least two layers disposed on a first surface of the wavelength conversion layer; and a lower anti-reflective layer of at least two layers disposed under a second surface of the wavelength conversion layer opposite to the first surface. Further, wherein the at least two layers of the lower anti-reflective layer have different refractive indices.
    Type: Grant
    Filed: October 5, 2015
    Date of Patent: April 18, 2017
    Assignee: LG Innotek Co., Ltd.
    Inventors: Jeong Taek Oh, Sun Hwa Lee
  • Patent number: 9613800
    Abstract: In a method of forming an oxide layer of a semiconductor process, a preliminary precursor flow is provided on a substrate in a deposition chamber to form a preliminary precursor layer, a precursor flow and a first oxidizing agent flow are provided on the preliminary precursor layer alternately and repeatedly to form precursor layers and first oxidizing agent layers alternately stacked on the preliminary precursor layer, and a second oxidizing agent flow is provided on the precursor layer or the first oxidizing agent layer alternately stacked to form a second oxidizing agent layer.
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: April 4, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Yong Go, Jin-Gyun Kim, Dong-Kyum Kim, Jung-Ho Kim, Koong-Hyun Nam, Sung-Hae Lee, Eun-Young Lee, Jung-Geun Jee, Eun-Yeoung Choi, Ki-Hyun Hwang
  • Patent number: 9601340
    Abstract: Provided are electronic devices having quantum dots and methods of manufacturing the same. An electronic device includes a first nanorod, a quantum dot disposed on an upper surface of the first nanorod, and a second nanorod that covers a lateral surface of the first nanorod and the quantum dot. The first nanorod and the second nanorod are of opposite types.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: March 21, 2017
    Assignees: SAMSUNG ELECTRONICS CO., LTD., KOREA PHOTONICS TECHNOLOGY INSTITUTE
    Inventors: Jaesoong Lee, Hyoin Kim
  • Patent number: 9594244
    Abstract: A light deflector includes a fixing portion and a movable portion. The movable portion includes a mirror portion for deflecting light by swinging about a predetermined swing axis, a torsion bar fixedly supported on the fixing portion and having an axis serving as the swing axis, and a supporting body configured to support the mirror portion and fixed to the torsion bar. The supporting body includes a hole portion through which the axis passes. A mass body for adjusting a resonant frequency of the movable portion is arranged in the hole portion.
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: March 14, 2017
    Assignee: KYOCERA Document Solutions Inc.
    Inventor: Hideji Mizutani
  • Patent number: 9537027
    Abstract: The invention relates to quantum dot and photodetector technology, and more particularly, to quantum dot infrared photodetectors (QDIPs) and focal plane array. The invention further relates to devices and methods for the enhancement of the photocurrent of quantum dot infrared photodetectors in focal plane arrays.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: January 3, 2017
    Assignee: University of Massachusetts
    Inventors: Xuejun Lu, Guiru Gu, Puminun Vasinajindakaw
  • Patent number: 9520514
    Abstract: A quantum dot infrared photodetector (QDIP) that can enhance the photocurrent to a greater level than the dark current and/or can be operated at high temperatures is disclosed. The quantum dot infrared photodetector comprises at least one quantum well stack and a plurality of quantum dot layers. The quantum well stack is disposed between the pluralities of quantum dot layers. The quantum well stack comprises two spacer layers and a carrier supplying layer. The carrier supplying layer is disposed between the spacer layers. When the quantum dot infrared photodetector is applied with two bias voltages respectively, the carrier supplying layer supplies carriers to the quantum dot layers.
    Type: Grant
    Filed: June 11, 2013
    Date of Patent: December 13, 2016
    Assignee: NATIONAL TAIWAN UNIVERSITY
    Inventors: Si-Chen Lee, Jheng-Han Lee, Zong-Ming Wu
  • Patent number: 9472717
    Abstract: A novel quantum dot containing two different metals at non-toxic levels which is capable of narrow bandwidth near infrared emissions at wavelengths of 600-1100 nm. The quantum dot is fabricated via an aqueous method which forms a structure having an inner region of one composition and an outer region of a different composition, wherein the inner region contains at least a first metal and the outer region contains at least a second metal. The quantum dots may be enabled for bioconjugation and may be used in a method for tissue imaging and analyte detection.
    Type: Grant
    Filed: July 6, 2015
    Date of Patent: October 18, 2016
    Assignee: Drexel University
    Inventors: Wei-Heng Shih, Giang Au, Wan Y. Shih
  • Patent number: 9450117
    Abstract: The present invention provides a optoelectronic device having a surface periodic grating structure and a manufacturing method thereof, which includes: a substrate; a multi-layer semiconductor structure layer formed on the substrate; and a periodic grating structure layer embedded in the multi-layer semiconductor structure layer by etching based on optimized parameters. A direction of an incident light to the optoelectronic device is changed to be resonant to the multi-layer semiconductor structure layer to enhance optoelectricity of the optoelectronic device. The method includes: (1) providing a substrate; (2) forming a multi-layer semiconductor structure layer on the substrate; (3) selecting parameters to perform a design for a periodic grating structure layer on a surface of the multi-layer semiconductor structure layer; and (4) forming the periodic grating structure layer embedded in the multi-layer semiconductor structure layer by etching.
    Type: Grant
    Filed: November 10, 2014
    Date of Patent: September 20, 2016
    Assignee: Kingwave Corporation
    Inventors: Chieh-Hsiung Kuan, Ming-Lun Lee
  • Patent number: 9437655
    Abstract: A magnetic tunnel junction is provided. The magnetic tunnel junction can enhance the tunnel magnetoresistance ratio and a device including the magnetic tunnel junction. The magnetic tunnel junction includes: a pinned layer; a free layer; and a superlattice barrier, the barrier configured between the pinned layer and the free layer. The magnetic tunnel junction may be a series or parallel connection of the above-mentioned basic form. The device including a magnetic tunnel junction may be a magnetic random access memory bit cell, a magnetic tunnel junction transistor device, a magnetic field sensor, etc.
    Type: Grant
    Filed: August 15, 2014
    Date of Patent: September 6, 2016
    Assignee: NATIONAL TAIWAN UNIVERSITY
    Inventors: Wen-Jeng Hsueh, Chang-Hung Chen
  • Patent number: 9433692
    Abstract: The present disclosure provides systems and methods associated with non-thermal electroporation. One or more electromagnetic radiation sources may be used to generate an interference pattern having at least one antinode. The electric field associated with the antinode may be configured to cause irreversible electroporation. Thus, the antinode may be suitable for at least partial sterilization by rendering cells as non-viable through electroporation. An antinode may be formed by constructive interference of two or more lobes of two or more radiation sources. An antinode may be spatially varied with respect to an object, volume, and/or surface. A controller may spatially vary an antinode according to an electroporation pattern, such as a stochastic or rasterizing pattern, to achieve a desired sterilization level and/or maintain a temperature characteristic (e.g., absolute temperature, relative temperature, and/or rate of change) with a threshold range.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: September 6, 2016
    Assignee: ELWHA LLC
    Inventors: Roderick A. Hyde, Lowell L. Wood, Jr.
  • Patent number: 9391089
    Abstract: A method of manufacturing a semiconductor device is provided. A substrate including a structure in which a hole is formed is prepared. Precursors including a nickel alkoxide compound are vaporized. A nickel-containing layer is formed in the hole by providing the vaporized precursors including the nickel alkoxide compound onto the substrate.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: July 12, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-chul Youn, Gyu-hee Park, Youn-joung Cho, Seung-min Ryu
  • Patent number: 9385269
    Abstract: The present invention discloses an epitaxial structure for semiconductor light-emitting device, comprising an electron injection region, a hole injection region, a multi-quantum well active region, a potential barrier layer for blocking carriers, and one or more band edge shaping layers. The doping type and/or doping concentration of said band edge shaping layers are different from those of the adjacent layers. It may trim the band edge shape of the semiconductor energy band through the local built-in electric field formed as a result of adjusting the doping type, doping concentration and/or layer thickness thereof, such that the carriers in the multi-quantum well active region are distributed uniformly, the overall Auger recombination is decreased, and the effective potential barrier height of the potential barrier layer for blocking carriers is increased to reduce the drain current formed by carriers overflowing out of the multi-quantum well active region, thereby improving internal quantum efficiency.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: July 5, 2016
    Assignee: SOUTH CHINA NORMAL UNIVERSITY
    Inventors: Ting Mei, Naiyin Wang, Hao Li, Lei Wan
  • Patent number: 9368678
    Abstract: A semiconductor light emitting element includes: a pit formation layer formed on a first semiconductor layer and having a pyramidal pit; an active layer formed on the pit formation layer and having an embedded portion formed so as to embed the pit. The active layer has a multi-quantum well structure having at least one pair of well layer and barrier layer laminated alternately. The embedded portion has at least one embedded well portion corresponding to the well layer respectively and at least one embedded barrier portion corresponding to the barrier layer respectively. Each of the embedded well portion and the embedded barrier portion is configured such that a second apex angle of the embedded well portion is smaller than a first apex angle of the embedded barrier portion wherein the embedded well portion is subsequently formed on the embedded barrier portion.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: June 14, 2016
    Assignee: STANLEY ELECTRIC CO., LTD.
    Inventors: Takayoshi Yamane, Ji-Hao Liang, Mitsuyasu Kumagai, Shunya Ide
  • Patent number: 9368679
    Abstract: A semiconductor light emitting element includes: a pit formation layer having a pyramidal pit caused by a threading dislocation generated in the first semiconductor layer; an active layer; and an electron blocking layer formed on the active layer to cover the recess portion. The active layer is formed on the pit formation layer and having an embedded portion formed so as to embed the pit and a recess portion formed on a surface of the embedded portion to correspond to the pit. The recess portion of the active layer has an apex formed at a position existing in a layered direction of the active layer within the active layer.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: June 14, 2016
    Assignee: STANLEY ELECTRIC CO., LTD.
    Inventors: Takayoshi Yamane, Ji-Hao Liang
  • Patent number: RE46165
    Abstract: A device for supporting chromophore elements suitable for emitting fluorescence in response to light excitation, the device comprising a substrate having a surface layer carrying the chromophore elements, forming a planar waveguide, and containing photoluminescent constituents which emit guided luminescence at the excitation wavelength(s) of the chromophore elements when they are excited by primary excitation light illuminating the surface layer. The invention is particularly applicable to biochip type devices.
    Type: Grant
    Filed: July 14, 2015
    Date of Patent: September 27, 2016
    Assignee: Genewave
    Inventor: Claude Weisbuch
  • Patent number: RE48642
    Abstract: A IDCA system with internal nBn photo-detector comprising: a photo-absorbing layer comprising an n-doped semiconductor exhibiting valence band energy level; a barrier layer, a first side of the barrier layer adjacent a first side of the photo-absorbing layer, the barrier layer exhibiting a valence band energy level substantially equal to the valence band energy level of the doped semiconductor of the photo absorbing layer; and a contact area comprising a doped semiconductor, the contact area being adjacent a second side of the barrier layer opposing the first side, the barrier layer exhibiting a thickness and conductance band gap sufficient to prevent tunneling of majority carriers from the photo-absorbing layer to the contact area, blocking the flow of thermalized majority carriers from the photo-absorbing layer to the contact area. Alternatively, a p-doped semiconductor is utilized, equalizing barrier conductance band energy levels and photo-absorbing layers.
    Type: Grant
    Filed: July 4, 2019
    Date of Patent: July 13, 2021
    Inventor: Shimon Maimon