Abstract: An exemplary monolithic stabilized monolithic transmissive active optical device, such as an electroabsorption modulator (EAM), a variable optical attenuator (VOA), or a semiconductor optical amplifier (SOA), with an output optical tap, includes: a substrate; a waveguide layer; a semiconductor layer. The waveguide layer is coupled to the substrate and includes an active medium, which interacts with a predetermined wavelength of light, and is responsive to an electric signal. The electric signal is applied between the substrate and the semiconductor layer. The waveguide layer includes an output optical tap section and an active section adjacent to the output optical tap section. These sections include portions of the active medium. Further embodiments of the present invention incorporate temperature as well as bias control to improve performance of exemplary monolithic transmissive active optical devices. Additional embodiments include exemplary methods of manufacture and methods of operation.

Abstract: An active region formed of a Group III nitride semiconductor is formed on a substrate. Then, an electrode is formed on the active region and a protective insulating film is formed on a part of the active region located in the peripheral portion of the electrode by oxidizing the Group III nitride semiconductor.

Abstract: Disclosed is a Group III nitride compound semiconductor light-emitting element formed of Group III nitride compound semiconductor layers, including a multi-layer containing light-emitting layers; a p-type semiconductor layer; and an n-type semiconductor layer, wherein the multi-layer includes a multiple quantum barrier-well layer containing quantum-barrier-formation barrier layers formed from a Group III nitride compound semiconductor and quantum-barrier-formation well layers formed from a Group III nitride compound semiconductor, the barrier layers and the well layers being laminated alternately and cyclically, and a plurality of low-energy-band-gap layers which emit light of different wavelengths; and the multiple quantum barrier-well layer is provided between the low-energy-band-gap layers.

Abstract: A combination of materials is used to form the photodiodes of a vertical color imager cell. The materials used to form the photodiodes have different band gaps that allow the photon absorption rates of the photodiodes to be adjusted. By adjusting the photon absorption rates, the sensitivities of the photodiodes and thereby the characteristics of the imager can be adjusted.

Abstract: Indium Nitride (InN) and Indium-rich Indium Gallium Nitride (InGaN) quantum dots embedded in single and multiple InxGa1−xN/InyGa1−yN quantum wells (QWs) are formed by using TMIn and/or Triethylindium (TEIn), Ethyldimethylindium (EDMIn) as antisurfactant during MOCVD growth, wherein the photoluminescence wavelength from these dots ranges from 480 nm to 530 nm. Controlled amounts of TMIn and/or other Indium precursors are important in triggering the formation of dislocation-free QDs, as are the subsequent flows of ammonia and TMIn. This method can be readily used for the growth of the active layers of blue and green light emitting diodes (LEDs).

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy and epitaxial growth of single crystal silicon onto single crystal oxide materials. Monocrystalline substrates having a hydrogen ion implant are cleaved along the hydrogen ion implant, and an insulating substrate is bonded to the monocrystalline oxide.

Abstract: A method for integrating a compound semiconductor with a substrate of high thermal conductivity is provided. The present invention employs a metal of low melting point, which is in the liquid state at low temperature (about 200° C.), to form a bonding layer. The method includes the step of providing a compound semiconductor structure, which includes a compound semiconductor substrate and an epitaxial layer thereon. Then, a first bonding layer is formed on the epitaxial layer. A substrate of thermal conductivity greater than that of the compound semiconductor substrate is selected. Then, a second bonding layer is formed on the substrate. The first bonding layer and the second bonding layer are pressed to form an alloy layer at low temperature.

Abstract: A semiconductor device has a first semiconductor layer composed of a group III-V nitride, an oxide film formed by oxidizing a second semiconductor layer composed of a group III-V nitride to be located on the gate electrode formation region of the first semiconductor layer, an insulating film formed on the oxide film to have a composition different from the composition of the oxide film, and a gate electrode formed on the insulating film.

Abstract: The performance of nitride based diodes is currently limited by the resistivity of the ohmic contacts to the p-type GaN. The large value of the contact resistance contributes to a large voltage for device operation. This in turn causes device heating, making cw operation difficult and limiting the device lifetime. A layer of GaP or GaNP alloy between the GaN and the metal contact layer serves to bridge the energetic barrier between the GaN valence band and the metal Fermi level, thus enhancing the hole injection and reducing the contact resistance.

Abstract: A substrate has first and second edges disposed in parallel and a principal surface connecting the first and second edges. An active layer is formed on the principal surface. A ridge-like region is disposed on the active layer along a path interconnecting a point on the first edge and a point on the second edge. The ridge-like region is made of semiconductor material having a refraction index smaller than a refraction index of the active layer, and defines a waveguide. The path is disposed along the principal surface and includes a first region on the side of the first edge and a second region on the side of the second edge. A first angle is taken between a normal to the first edge directing toward the principal surface and the first region. A second angle smaller than the first angle is taken between a normal to the second edge directing toward the principal surface and the second region. Electrodes inject current in a region of the active layer along the path.

Abstract: A light emitting diode with strained layer superlatices (SLS) crystal structure is formed on a substrate. A nucleation layer and a buffer layer are sequentially formed on the substrate, so as to ease the crystal growth for the subsequent crystal growing process. An active layer is covered between an upper and a lower cladding layers. The active later include III-N group compound semiconductive material. A SLS contact layer is located on the upper cladding layer. A transparent electrode is located on the contact later to serve as an anode. Another electrode layer has contact with the buffer layer, and is separated from the lower and upper cladding layers.

Abstract: The present invention, a III-nitride light emitting diode (LED) and a manufacture method thereof, forms a magnetic metal layer in a conventional III-nitride LED by the method of thermal evaporation, e-beam evaporation, ion sputtering, or electroplate. Due to the eddy current effect, heat is generated by using electromagnetic oven inducing with electromagnetic wave to activate the p-type semiconductor material in III-nitride LED. The present invention has advantages of providing the equipments of simple structure and low cost. The contact resistance between the semiconductors and electrodes is reduced while the III-nitride compound semiconductor material is activated.

Abstract: Provided is a compound semiconductor single crystal and a fabrication process for a compound semiconductor device capable of forming a prescribed pattern without requirement of many steps. A group V element component in a III-V compound semiconductor single crystal or a group VI element component in the II-VI compound semiconductor single crystal is reduced less than a composition ratio expressed by a chemical formula of a corresponding compound semiconductor single crystal in a pattern-shaped portion.

Abstract: A semiconductor device includes group III-V layers formed over a substrate. At least one of the group III-V layers is doped with a dopant. The dopant includes a first dopant and one of a second dopant and an isovalent impurity. The first dopant has a covalent radius different in size than the covalent radii of each of the second dopant and the isovalent impurity.

Abstract: In the manufacture of a semiconductor laser device, sequentially grown on a sapphire substrate in the following order are a buffer layer, a first undoped GaN layer, a first super lattice defect reducing layer, a second undoped GaN layer, a second super lattice defect reducing layer, a third undoped GaN layer, a third super lattice defect reducing layer and a fourth undoped GaN layer. A device structure is then formed thereon. The first to third super lattice defect reducing layers each include five pairs of InGaN and AlGaN films alternately placed on one another in this order.

Abstract: A field-effect transistor has a composite channel structure having a first channel layer containing GaInP semiconductor and a second channel layer containing GaAs semiconductor. When the electric field is low in the channel, a channel current is primarily conducted in the second channel layer. When the electric field is high, the electrons flowing in the second channel layer move through real space transition to the first channel layer. These electrons conduct in the channel primarily in the first channel layer. Since GaInP semiconductor has a wider forbidden bandwidth than that of GaAs semiconductor, the avalanche breakdown voltage of GaInP semiconductor is higher than that of GaAs semiconductor. When the electric field is high, the conduction electrons travel in this GaInP semiconductor layer. This also improves the avalanche breakdown voltage of the field-effect transistor.

Abstract: Selenium (or tellurium or sulfur) is doped as an n-type dopant by homogeneous doping or planar doping in a compound semiconductor epitaxial wafer to form a selenium-doped layer. Thus, an epitaxial wafer having high carrier density can be prepared. The use of this epitaxial wafer can lower parasitic resistance and can provide HEMT having high gm. Further, the lowered resistance can significantly increase the freedom of device design.

Abstract: The present invention provides an improved optoelectronic device and a method of manufacture therefor. The optoelectronic device includes a doped buffer layer located over a substrate having an optical window formed therein and an absorber layer located over the doped buffer layer. The optoelectronic device further includes a doped region located over the absorber layer and having a dopant tail that extends substantially through the absorber layer, and the doped buffer layer and the dopant tail are doped to augment an optical power threshold for bandwidth collapse of the optoelectronic device.

Abstract: A semiconductor device includes: a substrate; a buffer layer including GaN formed on the substrate, wherein surfaces of the buffer layer are c facets of Ga atoms; a separating layer including (InXAl1-X)YGa1-YN (where 0≦X≦1, 0≦Y≦1) formed on the buffer layer, wherein surfaces of the separating layer are c facets of In, Al, or Ga atoms; a channel layer including GaN, InGaN, or a combination of GaN and InGaN formed on the separating layer, wherein surfaces of the channel layer are c facets of Ga or In atoms; and an electron supply layer including AlGaN formed on the channel layer, wherein surfaces of the electron supply layer are c facets of Al or Ga atoms, wherein the AlN composition ratio in the separating layer is smaller than the AlN composition ratio in the electron supply layer.

Abstract: The present invention provides methods and apparatus for creating insulating layers in Group III-V compound semiconductor structures having aluminum oxide with a substantially stoichiometric compositions. Such insulating layers find applications in a variety of semiconductor devices. For example, in one aspect, the invention provides vertical insulating layers separating two devices, such as photodiodes, formed on a semiconductor substrate from one another. In another aspect, the invention can provide such insulating layers as buried horizontal insulating layers of semiconductor devices.

Abstract: This invention discloses the several means by which transient noise due to capacitance related displacement current can be excluded from the optical signal coming from a silicon detector used in opto-couplers. The exclusion of such noise permits a high degree of detector sensitivity which permits the use of low efficiency silicon based LEDs for opto-coupler applications.

Abstract: A filter layer and a buffer layer are sequentially laminated on a first principal face of a semiconductor substrate, and an island-shaped light absorption layer and a window layer are laminated on top of the buffer layer. A diffusion region in which p-type impurities have been diffused is formed in the window layer. An n-side electrode and a p-side electrode are formed on the buffer layer and the diffusion region, respectively. A light incidence portion is formed on the buffer layer where the light absorption layer has not been formed.

Abstract: The performance of nitride based diodes is currently limited by the resistivity of the ohmic contacts to the p-type GaN. The large value of the contact resistance contributes to a large voltage for device operation. This in turn causes device heating, making cw operation difficult and limiting the device lifetime. A layer of GaP or GaNP alloy between the GaN and the metal contact layer serves to bridge the energetic barrier between the GaN valence band and the metal Fermi level, thus enhancing the hole injection and reducing the contact resistance.

Abstract: A method of fabricating relaxed SiGe buffer layers with low threading dislocation densities on silicon-on-insulator (SOI) substrates is provided. The relaxed SiGe buffer layers are fabricated by the epitaxial deposition of a defect-free Stranski-Krastanov Ge or SiGe islands on a surface of the SOI substrate; the capping and planarizing of the islands with a Si or Si-rich SiGe layer, and the annealing of the structure at elevated temperatures until intermixing and thereby formation of a relaxed SiGe layer on the insulating layer (i.e., buried oxide layer) of the initial SOI wafer is achieved. The present invention is also directed to semiconductor structures, devices and integrated circuits which include at least the relaxed SiGe buffer layer mentioned above.

Abstract: Disclosed is a Group III nitride compound semiconductor light-emitting element formed of Group III nitride compound semiconductor layers, including a multi-layer containing light-emitting layers; a p-type semiconductor layer; and an n-type semiconductor layer, wherein the multi-layer includes a multiple quantum barrier-well layer containing quantum-barrier-formation barrier layers formed from a Group III nitride compound semiconductor and quantum-barrier-formation well layers formed from a Group III nitride compound semiconductor, the barrier layers and the well layers being laminated alternately and cyclically, and a plurality of low-energy-band-gap layers which emit light of different wavelengths; and the multiple quantum barrier-well layer is provided between the low-energy-band-gap layers.

Abstract: To provide a semiconductor substrate of a group III nitride with low defect density and little warp, this invention provides a process comprising such steps of:

Abstract: A p-i-n photodiode having a high responsivity and quantum efficiency due to an AlGaN heterojunction where photons are absorbed within the p-n junction thereby eliminating carrier losses due to surface recombination and diffusion processes. Ultraviolet light comes through a transparent substrate, such as sapphire, a transparent AlN buffer and an n-doped AlGaN layer, and to an undoped AlGaN layer where the light is absorbed. The undoped layer is sandwiched between the n-doped AlGaN layer and a p-doped AlGaN layer. Metal contacts are formed on the doped layers to obtain the current caused by the absorbed light in the undoped layer. The mole fractions of the Al and Ga in the undoped and doped layers may be adjusted to obtain a desired wavelength bandpass of light to be detected.

Abstract: A semiconductor device includes group III-V layers formed over a substrate. At least one of the group III-V layers is doped with a dopant. The dopant includes a first dopant and one of a second dopant and an isovalent impurity. The first dopant has a covalent radius different in size than the covalent radii of each of the second dopant and the isovalent impurity.

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. Mixed technology structures are provided in which a microprocessor is formed entirely in a monocrystalline compound semiconductor material layer overlying the silicon substrate.

Abstract: An optical modulator and a semiconductor laser device including the optical modulator, both reducing variations in the refractive index of an optical modulator or making variations negative without an increase in loss or a decrease in extinction ratio, as well as an optical communications system increasing an interval of distance at which modulated light is transmitted, by use of the optical modulator and the semiconductor laser device including the optical modulator. The optical modulator includes a semiconductor substrate of a first conductivity type; a light absorption layer on the semiconductor substrate and having a multiple quantum well structure, the multiple quantum well structure including a first well layer and second well layers. The peak wavelength of the absorption spectrum of the second well layers is shorter than the peak wavelength of the absorption spectrum of the first well layers A semiconductor cladding layer of the second conductivity type is on the light absorption layer.

Abstract: Composite semiconductor structures and methods are provided for communications systems, specifically, those utilizing RF signals. Antenna switches, and amplifiers in receiver and transmitter sections of the communications systems are shown that are fabricated within a compound semiconductor layer of a composite semiconductor structure is integrated with support circuitry in a non-compound semiconductor substrate. Support circuitry that may be integrated include negative voltage generation circuitry, drain current protection circuitry, and voltage regulation circuitry.

Abstract: There is disclosed a method for fabricating a SiGe MODFET device using a metal oxide film. The present invention provides a SiGe MODFET device with improved operation speed and reduced non-linear operation characteristic caused in a single channel structure devices, by increasing the mobility of the carriers in the SiGe MODEFT having a metal-oxide gate, and method of fabricating the same. In order to accomplish the above object, the present invention grows a silicon buffer layer and a SiGe buffer layer on a silicon substrate by low-temperature process, so that defects caused by the mismatch of the lattice constants being applied to the epitaxial layer from the silicon substrate are constrained in the buffer layered formed by the low-temperature process.

Abstract: A plurality of semiconductor elements are formed at a predetermined interval on a surface of a GaAs substrate, and the semiconductor substrate is worked to a predetermined thickness. On the other hand, an aluminum nitride plate having a flat upper surface and a lower surface, where a plurality of grooves are formed on at an interval which is substantially the same as the interval between the semiconductor elements, is prepared. Next, the semiconductor substrate, a bonding resin, and the aluminum nitride plate are stacked so as to align positions of grooves with positions between the semiconductor elements. Then, the lower surface of the semiconductor substrate is adhered to the upper surface of the plate member using a bonding resin. The thus adhered body of the GaAs substrate and the aluminum nitride plate is broken along the grooves into a plurality of pellets, thereby manufacturing semiconductor devices.

Abstract: An insulating-gate semiconductor device has a first nitride semiconductor layer formed over a substrate and an insulating oxidation layer obtained by oxidizing a second nitride semiconductor layer formed on the first nitride semiconductor layer. A gate electrode is formed on the insulating oxidation layer.

Abstract: A method for growing GaN forms a group III alloy material in a processing chamber. A GaN nucleation layer is formed on the group III alloy in the processing chamber to provide a GaN substrate. A GaN structure is formed on the GaN substrate using a plurality of gas phase reactants in the processing chamber.

Abstract: A high response speed semiconductor photo detecting device having a thin photo absorption layer which avoids an optical efficiency loss. The semiconductor photo detecting devices are formed on a semiconductor substrate having an inclined cleavage face to a principle plane of the substrate. An incoming photo signal is input to the cleavage face perpendicularly.

Abstract: The field effect device consisting of a substrate, a conducting backplane formed in the substrate, a source and a drain disposed above the conductive backplane, a gate insultatively disposed above the substrate between the source and drain, and a backgate contact electrically coupled to the conducting backplane.

Abstract: A semiconductor device operable with a single positive power source, enabling an increase in efficiency, and improved in high-frequency characteristics by lowering the resistivity of a gate contact, including a carrier run layer formed on a substrate for running of carriers; a carrier supply layer formed on the carrier run layer, having a larger bandgap than the carrier run layer, and containing a first conductivity type impurity; a barrier layer formed on the carrier supply layer and having a smaller bandgap than the carrier supply layer; a source electrode and a drain electrode formed on the barrier layer at a predetermined distance from each other; a gate electrode formed on the barrier layer between the source electrode and the drain electrode away from the source electrode and the drain electrode; and a first low resistivity region formed at least below the gate electrode in the barrier layer and containing a second conductivity type impurity opposite in conductivity to the first conductivity type, and a

Abstract: A semiconductor device includes: a waveguide mesa structure including at least an optical absorption layer for photoelectric conversion; and a heat radiation semiconductor layer in contact directly with at least a part of the optical absorption layer for heat radiation from the optical absorption layer, and the heat radiation semiconductor layer being lower in refractive index and larger in energy band gap than the optical absorption layer.

Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis. The quantum dot layer is preferably comprised of AlxByInzGa1-x-y-zN, InGaN1-a-bPaAsb, or AlxByInzGa1-x-y-zN1-a-bPaAsb.

Abstract: Compliant substrates include a compliant single crystal layer formed on an amorphous buffer layer, which is formed on a single crystal base layer. The compliant single crystal layer can be used as a template to support the growth of one or more lattice mismatched layers on the compliant substrate. Various electronic and optoelectronic devices including, for example, photodetectors, long-wavelength semiconductor light-emitting devices, short-wavelength semiconductor light-emitting devices, optical modulators and transistors, can be formed on the compliant substrates. The compliant substrates can be produced by epitaxially forming an intermediate single crystal layer, that can be treated to convert it to an amorphous layer, between two single crystal layers, and treating the intermediate single crystal layer to form an amorphous buffer layer.

Abstract: A solid-state wavelength demultiplexer comprising a plurality of photosensitive elements wherein each element has certain energy gap defined by the material composition. All photosensitive elements are grown on a common substrate where the first grown buffer layer, adjacent and near lattice matched to the first bottom photosensitive element, is heavily doped. A composition of photosensitive elements varies from the first bottom photosensitive element up to a first top photosensitive layer in such a way that corresponding energy gap has a minimum value in the lowermost element while the maximum value in the uppermost element. A wide gap doped “window” layer is grown on top of the uppermost element. Each individual photosensitive element consists of at least three sublayers comprising a first doped sublayer, a second heavily doped sublayer, and a photosensitive undoped sublayer sandwiched between them.

Abstract: In a sapphire substrate having a heteroepitaxial growth surface, the heteroepitaxial growth surface is parallel to a plane obtained by rotating a (01{overscore (1)}0) plane of the sapphire substrate about a c-axis of the sapphire substrate through 8° to 20° in a crystal lattice of the sapphire substrate. A semiconductor device, electronic component, and crystal growing method are also disclosed.

Abstract: A semiconductor laminate containing a light-emitting layer is etched to reveal a side surface. A reflection surface opposite to the side surface of the semiconductor laminate is provided in one and the same chip as the semiconductor laminate. A groove may be formed in the laminate by a dicing saw, and an outer side surface of the groove may be provided as the reflection surface.

Abstract: The present invention provides a semiconductor device and a solar cell, which may be low-cost, highly efficient, safe, and last long. The semiconductor device has a compound semiconductor layer as a window layer including nitride compound semiconductor of at least one element selected from a group of Al, Ga and In and nitrogen, formed on a semiconductor substrate. The solar cell has a compound semiconductor layer containing a nitride compound semiconductor defined by a composition formula AlXGaYNW on a semiconductor substrate, where X, Y, Z and W represent a composition ratio, and satisfy 0.8≦(X+Y+Z)/W≦1.2 and 0.1≦Z/(X+Y+Z)≦1.0.

Abstract: A reliability evaluation value of a gate insulating film of an insulated gate type (MIS) transistor in an unselected state is set to a value equal to or smaller than the reliability evaluation value of the gate insulating film of the MIS transistor in a selected state. An electric field applied to the gate insulating film is determined in accordance with the reliability evaluation value. Therefore, it is possible to the gate insulating film applied electric field of the MIS transistor in the unselected state lower than the electric field in the selected state to assure the reliability of the gate insulating film of the MIS transistor in the unselected state. Thus, the reliability of the gate insulating film of the MIS transistor in the unselected state is assured, and a semiconductor device with an improved gate dielectric characteristics.

Abstract: The present invention provides an epitaxial wafer comprising, on a p-type GaAs single-crystal substrate, a first p-type layer; a p-type cladding layer; a p-type active layer; and an n-type cladding layer, wherein the n-type cladding layer has a carrier concentration of 1×1017 to 1×1018 cm−3; a sulfur concentration of 3×1016 atoms/cm3 or less; and a thickness of 20-50 &mgr;m. The maximum silicon concentration in the portion of the p-type cladding layer within 2 &mgr;m of the interface between the p-type cladding layer and the first p-type layer is less than 1×1018 atoms/cm3; the concentration of carbon, sulfur, or oxygen in the first p-type layer is less than 1×1017 atoms/cm3; the p-type cladding layer has a thickness of 50-80 &mgr;m; the first p-type layer has a carrier concentration of 3×1017 to 1×1018 cm−3; and the n-type cladding layer contains germanium at a concentration of 3×1018 cm−3 or less.

Abstract: A compound semiconductor device includes a cap layer formed on a channel layer and an insulating film formed on the cap layer, and a &Ggr;-shaped gate electrode is provided in a gate recess opening, wherein an extension part of the &Ggr;-shaped gate electrode extends over the insulating film toward a drain electrode, and the total thickness of the insulating film and the cap layer being is set such that the electric field formed right underneath the extension part of the gate electrode includes a component acting in a direction perpendicular to the substrate.

Abstract: A method for improving the operating stability of compound semiconductor minority carrier devices and the devices created using this method are described. The method describes intentional introduction of impurities into the layers adjacent to the active region, which impurities act as a barrier to the degradation process, particularly undesired defect formation and propagation. A preferred embodiment of the present invention uses O doping of III-V optoelectronic devices during an epitaxial growth process to improve the operating reliability of the devices.

Abstract: An optical image shutter is provided having a multiplicity of thin layers of alternating narrow and wide gap semiconductor material stacked to form an MQW structure and electrodes located on at least two semiconductor surfaces of the image shutter, wherein the electrodes are configured so that a voltage difference applied between them produces an electric field that is temporally and spatially substantially uniform in the volume of the MQW structure and wherein the aperture of the image shutter is greater than 4 square mm.