Abstract: The present invention relates to devices, particularly photovoltaic devices, incorporating Group IIB/VA semiconductors such phosphides, arsenides, and/or antimonides of one or more of Zn and/or Cd. In particular, the present invention relates to methodologies, resultant products, and precursors thereof in which electronic performance of the semiconductor material is improved by causing the Group IIB/VA semiconductor material to react with at least one metal-containing species (hereinafter co-reactive species) that is sufficiently co-reactive with at least one Group VA species incorporated into the Group IIB/VA semiconductor as a lattice substituent (recognizing that the same and/or another Group VA species also optionally may be incorporated into the Group IIB/VA semiconductor in other ways, e.g., as a dopant or the like).

Abstract: An optoelectronic module includes a layer structure having a plurality of semiconductor layers including a substrate layer, a first layer arrangement and a second layer arrangement, wherein 1) the first layer arrangement has a light-emitting layer arranged on the substrate layer, 2) the second layer arrangement contains at least one circuit that controls an operating state of the light-emitting layer, and 3) the second layer arrangement is arranged on the substrate layer and/or surrounded by the substrate layer.

Abstract: Technology of making freestanding gallium nitride (GaN) wafers has been matured at length. Gallium nitride is rigid but fragile. Chamfering of a periphery of a GaN wafer is difficult. At present edges are chamfered by a rotary whetstone of gross granules with weak pressure. Minimum roughness of the chamfered edges is still about Ra 10 ?m to Ra 6 ?m. The large edge roughness causes scratches, cracks, splits or breaks in transferring process or wafer process. A wafer of the present invention is bevelled by fixing the wafer to a chuck of a rotor, bringing an edge of the wafer into contact with an elastic whetting material having a soft matrix and granules implanted on the soft matrix, rotating the wafer and feeding the whetting material. Favorably, several times of chamfering edges by changing the whetting materials of smaller granules are given to the wafer. The chamfering can realize small roughness of Ra 10 nm and Ra 5 ?m at edges of wafers.

Abstract: There is provided a surface treatment method of a group III nitride semiconductor including: providing a group III nitride semiconductor including a first surface having a group III polarity and a second surface opposing the first surface and having a nitrogen polarity; and irradiating a laser beam onto the second surface to change the nitrogen polarity of the second surface to the group III polarity.

Abstract: In one example, we describe a new high performance AlGaN/GaN metal-insulator-semiconductor heterostructure field-effect transistor (MISHFET), which was fabricated using HfO2 as the surface passivation and gate insulator. The gate and drain leakage currents are drastically reduced to tens of nA, before breakdown. Without field plates, for 10 ?m of gate-drain spacing, the off-state breakdown voltage is 1035V with a specific on-resistance of 0.9 m?-cm2. In addition, there is no current slump observed from the pulse measurements. This is the best performance reported on GaN-based, fast power-switching devices on sapphire, up to now, which efficiently combines excellent device forward, reverse, and switching characteristics. Other variations, features, and examples are also mentioned here.

Abstract: A photodetector is disclosed for the detection of infrared light with a long cutoff wavelength in the range of about 4.5-10 microns. The photodetector, which can be formed on a semiconductor substrate as an nBn device, has a light absorbing region which includes InAsSb light-absorbing layers and tensile-strained layers interspersed between the InAsSb light-absorbing layers. The tensile-strained layers can be formed from GaAs, InAs, InGaAs or a combination of these III-V compound semiconductor materials. A barrier layer in the photodetector can be formed from AlAsSb or AlGaAsSb; and a contact layer in the photodetector can be formed from InAs, GaSb or InAsSb. The photodetector is useful as an individual device, or to form a focal plane array.

Abstract: An enhancement-mode GaN transistor, the transistor having a substrate, transition layers, a buffer layer comprised of a III Nitride material, a barrier layer comprised of a III Nitride material, drain and source contacts, a gate containing acceptor type dopant elements, and a diffusion barrier comprised of a III Nitride material between the gate and the buffer layer.

Abstract: Provided are a light emitting device, a method for fabricating the light emitting device, a light emitting device package, and a lighting unit. The light emitting device includes a conductive support substrate, a protection layer on the conductive support substrate, the protection layer having an inclined top surface, a light emitting structure layer including a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer between the first conductive type semiconductor layer and the second conductive type semiconductor layer on the conductive support substrate and the protection layer, and an electrode on the light emitting structure layer. A portion of the protection layer is disposed between the conductive support substrate and the light emitting structure layer.

Abstract: Stacking faults are reduced or eliminated by epitaxially growing a III-V compound semiconductor region in a trench followed by capping and annealing the region. The capping layer limits the escape of atoms from the region and enables the reduction or elimination of stacking faults along with the annealing.

Abstract: Provided is an epitaxial substrate using a silicon substrate as a base substrate. An epitaxial substrate, in which a group of group-III nitride layers are formed on a (111) single crystal Si substrate such that a (0001) crystal plane of the group of group-III nitride layers is substantially in parallel with a surface of the substrate, includes: a first group-III nitride layer made of AlN with many defects configured of at least one kind from a columnar or granular crystal or domain; a second group-III nitride layer whose interface with the first group-III nitride layer is shaped into a three-dimensional concave-convex surface; and a third group-III nitride layer epitaxially formed on the second group-III nitride layer as a graded composition layer in which the proportion of existence of Al is smaller in a portion closer to a fourth group-III nitride.

Abstract: Provided is a biological component detection device with which a biological component can be detected at high sensitivity by using an InP-based photodiode in which a dark current is reduced without using a cooling mechanism and the sensitivity is extended to a wavelength of 1.8 ?m or more. An absorption layer 3 has a multiple quantum well structure composed of group III-V semiconductors, a pn-junction 15 is formed by selectively diffusing an impurity element in the absorption layer, and the concentration of the impurity element in the absorption layer is 5×1016/cm3 or less, the diffusion concentration distribution control layer has an n-type impurity concentration of 2×1015/cm3 or less before the diffusion, the diffusion concentration distribution control layer having a portion adjacent to the absorption layer, the portion having a low impurity concentration.

Abstract: Semiconductor structures including one, or more, III-nitride material regions (e.g., gallium nitride material region) and methods associated with such structures are provided. The III-nitride material region(s) advantageously have a low dislocation density and, in particular, a low screw dislocation density. In some embodiments, the presence of screw dislocations in the III-nitride material region(s) may be essentially eliminated. The presence of a strain-absorbing layer underlying the III-nitride material region(s) and/or processing conditions can contribute to achieving the low screw dislocation densities. In some embodiments, the III-nitride material region(s) having low dislocation densities include a gallium nitride material region which functions as the active region of the device. The low screw dislocation densities of the active device region (e.g., gallium nitride material region) can lead to improved properties (e.g.

Abstract: Group III nitride semiconductor crystals of a size appropriate for semiconductor devices and methods for manufacturing the same, Group III nitride semiconductor devices and methods for manufacturing the same, and light-emitting appliances. A method of manufacturing a Group III nitride semiconductor crystal includes a process of growing at least one Group III nitride semiconductor crystal substrate on a starting substrate, a process of growing at least one Group III nitride semiconductor crystal layer on the Group III nitride semiconductor crystal substrate, and a process of separating a Group III nitride semiconductor crystal, constituted by the Group III nitride semiconductor crystal substrate and the Group III nitride semiconductor crystal layer, from the starting substrate, and is characterized in that the Group III nitride semiconductor crystal is 10 ?m or more but 600 ?m or less in thickness, and is 0.2 mm or more but 50 mm or less in width.

Abstract: Provided is a light-receiving device which has light-receiving sensitivity superior to that of a conventional Schottky diode type light-receiving device and also has sufficiently-strengthened junction of a Schottky electrode. A first contact layer formed of AlGaN and having conductivity, a light-receiving layer formed of AlGaN, and a second contact layer formed of AlN and having a thickness of 5 nm are epitaxially formed on a predetermined substrate in the stated order, and a second electrode is brought into Schottky junction with the second contact layer, to thereby form MIS junction. Further, after the Schottky junction, heat treatment is performed under a nitrogen gas atmosphere at 600° C. for 30 seconds.

Abstract: A group III chalcogenide layer for interfacing a high-k dielectric to a III-V semiconductor surface and methods of forming the same. A III-V QWFET includes a gate stack which comprises a high-K gate dielectric layer disposed on an interfacial layer comprising a group III chalcogenide. In an embodiment, a III-V semiconductor surface comprising a native oxide is sequentially exposed to TMA and H2S provided in an ALD process to remove substantially all the native oxide and form an Al2S3 layer on the semiconductor surface.

Abstract: The present invention relates to a method that involves providing a stack of a first substrate and a InGaN seed layer formed on the first substrate, growing an InGaN layer on the InGaN seed layer to obtain an InGaN-on-substrate structure, forming a first mirror layer overlaying the exposed surface of the grown InGaN layer, attaching a second substrate to the exposed surface of the mirror layer, detaching the first substrate from the InGaN seed layer and grown InGaN layer to expose a surface of the InGaN seed layer opposite the first mirror layer, and forming a second mirror layer overlaying the opposing surface of the InGaN seed layer.

Abstract: A semiconductor structure having a transistor and a thermo electronic structure. The transistor has a control electrode for controlling a flow of carriers through a semiconductor layer between a pair of electrodes. The thermo electronic structure has a first portion disposed on at least one of the pair of electrodes and a second portion disposed over a region of the semiconductor layer proximate the control electrode between the control electrode and said at least one of the pair of electrode. The thermo electronic structure extends from the first portion to the second portion for removing heat generated heat from said region in the semiconductor layer.

Abstract: A GaN-based field effect transistor (MOSFET) is comprised of a channel layer comprised of p-type GaN, an electron supply layer, a surface layer having band gap energy smaller than that of the electron supply layer, sequentially laminated on a substrate, and recess section is formed by removing a part of the drift layer, the electron supply layer, and the surface layer down to a depth that reaches to the channel layer. A source electrode and a drain electrode are formed so that the recess section positions between them, a gate insulation film is formed on the surface layer and on inner-surface of the recess section including the channel layer, and a gate electrode is formed on the gate insulating film in the recess section.

Abstract: Embodiments of detectors made using lattice matched photoabsorbing layers are disclosed. A photodiode apparatus in accordance with one or more embodiments of the present invention comprises an indium phosphide substrate, and a photoabsorbing region comprising at least an indium gallium arsenide antimonide nitride (InGaAsSbN) layer, wherein the InGaAsSbN layer has a thickness of at least 100 nanometers and is nominally lattice-matched to the indium phosphide substrate.

Abstract: A semiconductor device includes a p-type semiconductor layer and an n-type semiconductor layer that are joined by sandwiching a depletion layer with a thickness that allows transmission of a plurality of electrons and holes by direct-tunneling.

Abstract: Consistent with the present disclosure, a current blocking layer is provided between output waveguides carrying light to be sensed by the photodiodes in a balanced photodetector, and the photodiodes themselves. Preferably, the photodiodes are provided above the waveguides and sense light through evanescently coupling with the waveguides. In addition, the current blocking layer may include alternating p and n-type conductivity layers, such that, between adjacent ones of such layers, a reverse biased pn-junction is formed. The pn-junctions, therefore, limit the amount of current flowing from one photodiode of the balanced detector to the other, thereby improving performance.

Abstract: According to one embodiment, a high electron mobility transistor (HEMT) comprises an insulator layer comprising a first group III-V intrinsic layer doped with a rare earth additive. The HEMT also comprises a second group III-V intrinsic layer formed over the insulator layer, and a group III-V semiconductor layer formed over the second group III-V intrinsic layer. In one embodiment, a method for fabricating a HEMT comprises forming a first group III-V intrinsic layer and doping the first group III-V intrinsic layer with a rare earth additive to produce an insulator layer. The method also comprises forming a second group III-V intrinsic layer over the insulator layer, and further forming a group III-V semiconductor layer over the second group III-V intrinsic layer. A two-dimensional electron gas (2DEG) is formed at a heterojunction interface of the group III-V semiconductor layer and the second group III-V intrinsic layer.

Abstract: A semiconductor device includes a p-type semiconductor layer and an n-type semiconductor layer that are joined by sandwiching a depletion layer with a thickness that allows transmission of a plurality of electrons and holes by direct-tunneling.

Abstract: A method for manufacturing an electronic-photonic device. Epitaxially depositing an n-doped III-V composite semiconductor alloy buffer layer on a crystalline surface of a substrate at a first temperature. Forming an active layer on the n-doped III-V epitaxial composite semiconductor alloy buffer layer at a second temperature, the active layer including a plurality of spheroid-shaped quantum dots. Depositing a p-doped III-V composite semiconductor alloy capping layer on the active layer at a third temperature. The second temperature is less than the first temperature and the third temperature. The active layer has a photoluminescence intensity emission peak in the telecommunication C-band.

Abstract: The invention is a vertical geometry light emitting diode capable of emitting light in the electromagnetic spectrum having a substrate, a lift-off layer, a strain relieved superlattice layer, a first doped layer, a multilayer quantum wells comprising alternating layers quantum wells and barrier layers, a second doped layer, a third doped layer and a metallic contact that is in a vertical geometry orientation. The different layers consist of a compound with the formula AlxlnyGa(1-x-y)N, wherein x is more than 0 and less than or equal to 1, y is from 0 to 1 and x+y is greater than 0 and less than or equal to 1. The barrier layer on each surface of the quantum well has a band gap larger than a quantum well bandgap. The first and second doped layers have different conductivities. The contact layer has a different conductivity than the third doped layer.

Abstract: A device includes a silicon substrate, and a III-V compound semiconductor region over and contacting the silicon substrate. The III-V compound semiconductor region has a U shaped interface with the silicon substrate, with radii of the U shaped interface being smaller than about 1,000 nm.

Abstract: A semiconductor device and method are being disclosed. The semiconductor device discloses an InAs layer, a plurality of group III-V ternary layers supported by the InAs layer, and a plurality of group III-V quarternary layers supported by the InAs layer, wherein the group III-V ternary layers are separated from each other by a single group III-V quarternary layer. The method discloses providing an InAs layer, growing a plurality of group III-V ternary layers, and growing a plurality of group III-V quarternary layers, wherein the group III-V ternary layers are separated from each other by a single group III-V quarternary layer and are supported by the InAs layer.

Abstract: A nitride semiconductor device 2 comprises a nitride semiconductor layer 10. A gate insulating film 16 is formed on the surface of the nitride semiconductor layer 10. The gate insulating film 16 includes a portion composed of an aluminum nitride film 15 and a portion composed of an insulating material 14 that contains at least one of oxygen or silicon. A region W2 of the nitride semiconductor layer 10 facing the aluminum nitride film 15 is included in a region W1 of the nitride semiconductor layer 10 facing a gate electrode 18. The nitride semiconductor device 2 may further comprise a nitride semiconductor lower layer 8. The nitride semiconductor layer 10 may be stacked on the surface of the nitride semiconductor lower layer 8. The nitride semiconductor layer 10 may have a larger band gap than that of the nitride semiconductor lower layer 8 and have a heterojunction formed there between.

Abstract: A semiconductor device is configured so as to comprise a substrate, an n-type semiconductor layer or an undoped semiconductor layer on the substrate, and an ohmic electrode on the n-type semiconductor layer or the undoped semiconductor layer, and the ohmic electrode is configured so as to comprise a tantalum layer formed on the n-type semiconductor layer or the undoped semiconductor layer, an aluminum layer formed on the tantalum layer, and a metal layer formed on the aluminum layer and made of any one material of tantalum, nickel, palladium, and molybdenum.

Abstract: Provided are a photodiode array and its manufacturing method, which maintain the crystalline quality of an absorption layer formed on a group III-V semiconductor substrate to obtain excellent characteristics, and which improve the crystallinity at the surface of a window layer; an epitaxial wafer used for manufacturing the photodiode array; and a method for manufacturing the epitaxial wafer. A method for manufacturing a photodiode array 1 having a plurality of absorption regions 21, includes the steps of: growing an absorption layer 7 on an n-type InP substrate 3; growing an InP window layer on the absorption layer 7; and diffusing a p-type impurity in regions, in the window layer 11, corresponding to the plurality of absorption regions 21. The window layer 11 is grown by MOVPE using only metal-organic sources, at a growth temperature equal to or lower than that of the absorption layer 7.

Abstract: Stacking faults are reduced or eliminated by epitaxially growing a III-V compound semiconductor region in a trench followed by capping and annealing the region. The capping layer limits the escape of atoms from the region and enables the reduction or elimination of stacking faults along with the annealing.

Abstract: A photodetector 1 according to an embodiment of the present invention includes: an n-type InAs substrate 12; an n-type InAs buffer layer 14 formed on the n-type InAs substrate 12; an n-type InAs light absorbing layer 16 formed on the n-type InAs buffer layer 14; an InAsXPYSb1-X-Y cap layer 18 (X?0, Y>0) formed on the n-type InAs light absorbing layer 16; a first inorganic insulating film 20 formed on the cap layer 18, and having an opening portion 20h in a deposition direction; a p-type impurity semiconductor region 24 fowled by diffusing a p-type impurity from the opening portion 20h of the first inorganic insulating film 20, and reaching from the cap layer 18 to an upper layer of the n-type InAs light absorbing layer 16; and a second inorganic insulating film 22 formed on the first inorganic insulating film 20 and on the p-type impurity semiconductor region 24.

Abstract: The present invention provides an optoelectronic device with an epi-stacked structure, which includes a substrate, a buffer layer that is formed on the substrate, in which the buffer layer includes a first nitrogen-containing compound layer, an II/V group compound layer is provided on the first nitrogen-containing compound layer, a second nitrogen-containing compound layer is provided on the II/V group compound layer, and a third nitrogen-containing compound layer is provided on the second nitrogen-containing compound layer, an epi-stacked structure with a multi-layer structure is formed on the buffer layer, which includes a first semiconductor conductive layer is formed on the buffer layer, an active layer is formed on the first semiconductor conductive layer, a multi-layer structure is formed between the first semiconductor conductive layer and the active layer, and a second semiconductor conductive layer is formed on the active layer.

Abstract: A nitride semiconductor substrate includes a front surface, a rear surface on an opposite side to the front surface, and a first edge portion including a chamfered edge on the front surface. A ratio of an average surface roughness of the front surface to an average surface roughness of the first edge portion is not more than 0.01.

Abstract: A method for growing reduced defect density planar gallium nitride (GaN) films is disclosed. The method includes the steps of (a) growing at least one silicon nitride (SiNx) nanomask layer over a GaN template, and (b) growing a thickness of a GaN film on top of the SiNx nanomask layer.

Abstract: The present invention provides a two-terminal infrared detector capable of detecting a plurality of bands, such as three bands, over the visible and short-wave infrared bands. Detection of three colors enables one to construct composite imagery that provide significantly added contract in comparison to typical grayscale images. In some variations, the device includes multiple absorber and barrier layers that consist of distinct engineered semiconductor alloys which are closely lattice matched to InP.

Abstract: The semiconductor device, which provides reduced electric current leakage and parasitic resistance to achieve stable current gain, is provided. A first polycrystalline semiconductor layer is grown on a p-type polycrystalline silicon film exposed in a lower surface of a visor section composed of a multiple-layered film containing a p-type polycrystalline silicon film and a silicon nitride film, while growing the first semiconductor layer on a n-type collector layer, and then the first polycrystalline semiconductor layer is selectively removed.

Abstract: A semiconductor structure includes a substrate and a conductive carrier-tunneling layer over and contacting the substrate. The conductive carrier-tunneling layer includes first group-III nitride (III-nitride) layers having a first bandgap, wherein the first III-nitride layers have a thickness less than about 5 nm; and second III-nitride layers having a second bandgap lower than the first bandgap, wherein the first III-nitride layers and the second III-nitride layers are stacked in an alternating pattern. The semiconductor structure is free from a III-nitride layer between the substrate and the conductive carrier-tunneling layer. The semiconductor structure further includes an active layer over the conductive carrier-tunneling layer.

Abstract: A semiconductor-based SWIR infrared detector sensitive to wavelengths shorter than about 2.5 microns comprises a stack of semiconductor layers based on III-V materials forming a PIN photodiode. The stack includes a naked electrical contact, called a lower electrical contact, serving as an optical window; and a detection layer sensitive to said wavelengths. The lower contact comprises at least one layer of indirect-bandgap III-V material(s) doped n-type, pseudomorphic or lattice matched with a substrate intended to serve as a temporary substrate possibly being made of a III-V material such as InP or GaAs or of silicon or germanium.

Abstract: A detector system with a microelectronic semiconductor chip and a separate optoelectronic detector chip is specified, wherein the detector chip is positioned on the semiconductor chip. A detector subassembly with such a detector system is also specified.

Abstract: The invention relates to a method for producing an infrared radiation sensor, said sensor comprising an infrared photodiode array formed in a first material and a reading circuit formed in a second material, said method comprising the steps of: sticking, through molecular adhesion, a first material side surface onto an optically transparent crystalline material side surface having infrared radiation and a coefficient of thermal expansion similar to that of the second material, give or take 20%; thinning the body of the first material side surface so that the latter is less that 25 ?m; producing infrared-sensitive photodiodes onto the thus-thinned first material side surface; depositing contact ball bearings onto the infrared photodiodes; and mounting the reading circuit onto the first material side surface through flip chip technology.

Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.

Abstract: Technology of making freestanding gallium nitride (GaN) wafers has been matured at length. Gallium nitride is rigid but fragile. Chamfering of a periphery of a GaN wafer is difficult. At present edges are chamfered by a rotary whetstone of gross granules with weak pressure. Minimum roughness of the chamfered edges is still about Ra 10 ?m to Ra 6 ?m. The large edge roughness causes scratches, cracks, splits or breaks in transferring process or wafer process. A wafer of the present invention is bevelled by fixing the wafer to a chuck of a rotor, bringing an edge of the wafer into contact with an elastic whetting material having a soft matrix and granules implanted on the soft matrix, rotating the wafer and feeding the whetting material. Favorably, several times of chamfering edges by changing the whetting materials of smaller granules are given to the wafer. The chamfering can realize small roughness of Ra 10 nm and Ra 5 ?m at edges of wafers.

Abstract: A photo-detector comprising: a photo absorbing layer comprising an n-doped semiconductor exhibiting a valence band energy level; a barrier layer, a first side of the barrier layer adjacent a first side of the photo absorbing layer, the barrier layer exhibiting a valence band energy level substantially equal to the valence band energy level of the doped semiconductor of the photo absorbing layer; and a contact area comprising a doped semiconductor, the contact area being adjacent a second side of the barrier layer opposing the first side, the barrier layer exhibiting a thickness and a conductance band gap sufficient to prevent tunneling of majority carriers from the photo absorbing layer to the contact area and block the flow of thermalized majority carriers from the photo absorbing layer to the contact area. Alternatively, a p-doped semiconductor is utilized, and conductance band energy levels of the barrier and photo absorbing layers are equalized.

Abstract: A method for fabricating an electrode by (i) depositing a palladium film on a p-type semiconductor layer; (ii) introducing an oxygen gas onto the palladium film to provide an oxygen ambient; (iii) oxidizing the palladium film adjacent to the semiconductor layer by annealing the palladium film in the oxygen ambient; and (iv) forming a palladium oxide film directly in contact with the semiconductor layer.

Abstract: A Group III-V Semiconductor device and method of fabrication is described. A high-k dielectric is interfaced to a confinement region by a chalcogenide region.

Abstract: A field plate portion (5) overhanging a drain side in a visored shape is formed in a gate electrode (2). A multilayered film including a SiN film (21) and a SiO2 film (22) is formed beneath the field plate portion (5). The SiN film (21) is formed so that a surface of an AlGaN electron supply layer (13) is covered therewith.

Abstract: A heterostructure having a heterojunction comprising: a diamond layer; and a boron aluminum nitride (B(x)Al(1-x)N) layer disposed in contact with a surface of the diamond layer, where x is between 0 and 1.

Abstract: Reconditioned donor substrates that include a remainder substrate from a donor substrate wherein the remainder substrate has a detachment surface where a transfer layer was detached and an opposite surface; and an additional layer deposited upon the opposite surface of the remainder substrate to increase its thickness and to form the reconditioned substrate. The reconditioned substrate is recycled as a donor substrate for fabricating compound material wafers and is typically made from gallium nitride donor substrates.

Abstract: The present invention provides a method for depositing or growing a group III-nitride layer, e.g. GaN layer (5), on a substrate (1), the substrate (1) comprising at least a Ge surface (3), preferably with hexagonal symmetry. The method comprises heating the substrate (1) to a nitridation temperature between 400° C. and 940° C. while exposing the substrate (1) to a nitrogen gas flow and subsequently depositing the group III-nitride layer, e.g. GaN layer (5), onto the Ge surface (3) at a deposition temperature between 100° C. and 940° C. By a method according to embodiments of the invention, a group III-nitride layer, e.g. GaN layer (5), with good crystal quality may be obtained. The present invention furthermore provides a group III-nitride/substrate structure formed by the method according to embodiments of the present invention and a semiconductor device comprising at least one such structure.