Responsive To Non-electrical External Signal (e.g., Imager) Patents (Class 257/222)
  • Patent number: 5900654
    Abstract: A structure and method is described for fabricating a nuclear radiation induced damage resistant P-type buried channel charge-coupled device (P-BCD) which converts an optical image focused thereon into a time varying electrical signal. The invention uses a differentially related high level dosing of dopant in the buried channel accompanied by processing at minimum effective temperatures, thereby enhancing device tolerance to exposure to nuclear radiation induced displacement and ionization damage which otherwise would degrade the imaging performance of the device.
    Type: Grant
    Filed: July 17, 1995
    Date of Patent: May 4, 1999
    Inventor: James P. Spratt
  • Patent number: 5869853
    Abstract: A linear CCD (charge-coupled device) including: a photodiode-array having a plurality of photodiodes for converting incident light plural charges, respectively; and a charge transfer part for transferring the charges of the photodiodes during a first phase of a first and second clock signal and for moving the charges during a second phase of the first and second clock signals. The charge transfer part includes: plural first shift electrodes connected to the photodiodes, respectively, for forming potential wells that receive charges from the photodiodes, respectively, during the first phase of the first and second clock signals; and plural second shift electrodes located between the first shift electrodes, respectively, for forming potential wells that receive the charges from the potential wells of the first shift electrodes during the second phase of the first and second clock signals. No shift gates are needed between charge outlets of the photodiodes and the first shift electrodes.
    Type: Grant
    Filed: January 17, 1997
    Date of Patent: February 9, 1999
    Assignee: LG Semicon Co., Ltd.
    Inventor: Young-Jun Yu
  • Patent number: 5852321
    Abstract: A thermal type infrared radiation solid state image pick-up device includes a temperature-electrical signal converting function element and a heat isolation structural body supporting the temperature-electrical signal converting function element. The heat isolation structural body is formed of a silicon oxide or a silicon nitride in porous structure. Since the heat isolation structural body has porous structure, heat flowing out from the heat isolation structural body depends on an actual area derived by subtracting the area of the holes from the area of the cross-section of the leg (nominal cross section). On the other hand, the mechanical strength of the heat isolation structural body relies on the area of the cross section of the leg. Therefore, for obtaining the photo sensitivity equivalent to that of the conventional heat isolation structural body, the cross sectional area of the leg can be made greater to improve mechanical strength thereof.
    Type: Grant
    Filed: February 25, 1997
    Date of Patent: December 22, 1998
    Assignee: NEC Corporation
    Inventor: Shigeru Tohyama
  • Patent number: 5844290
    Abstract: A solid state image pick-up device comprises an array of a plurality of photodiodes formed on a principal surface of a semiconductor substrate, a planarizing resin layer covering the principal surface of the semiconductor substrate, and a plurality of micro lens formed on the planarizing resin layer, each of micro lens being positioned to correspond to one of the photoelectric conversion elements. The planarizing resin layer is composed of a first region of a first refractive index sandwiched between each of the micro lens and the corresponding photodiode, and a second region surrounding the first region, the second region having a second refractive index larger than the first refractive index.
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: December 1, 1998
    Assignee: NEC Corporation
    Inventor: Masayuki Furumiya
  • Patent number: 5831298
    Abstract: There is disclosed a solid-state imager for preventing an unwanted potential barrier in the overflow control gate when ions are implanted into the sensor portion. The imager is capable of easily controlling the amount of overflow. The sensor portion takes the hole accumulation diode (HAD) sensor structure. A potential barrier is created in the overflow control gate by ion implantation. A potential difference created between the overflow control gate and the sensor portion is determined by the amount of ions implanted. A DC voltage V.sub.D applied to the overflow drain is variable. The potential difference is adjusted by varying the DC voltage V.sub.D. Thus, elements of the imager are uniform in potential barrier.
    Type: Grant
    Filed: April 2, 1997
    Date of Patent: November 3, 1998
    Assignee: Sony Corporation
    Inventors: Seiichi Kawamoto, Tadakuni Narabu
  • Patent number: 5825840
    Abstract: An interline sensor is constructed using photocapacitors. The vertical shift register of the interline sensor is operated in a uniphase mode, i.e., holding one of the two phase (.O slashed.2) at a D.C. potential while fluctuating the other phase (.O slashed.1) between a voltage that is sufficiently above and below that D.C. potential to facilitate transfer of charge from one phase to the next. The uniphase mode is facilitated by a single electrode that covers both the phase that is held at a constant D.C. potential and the photodetector having photocapacitor charges. The single electrode in the preferred embodiment is an indium tin oxide electrode. The charges are transferred from the photocapacitors to the vertical shift register by a third level clock into .O slashed.1 adjacent the photodetectors.It is also proposed that the same ITO electrode be utilized to for phase 2 of both the vertical and horizontal CCD shift registers.
    Type: Grant
    Filed: April 23, 1996
    Date of Patent: October 20, 1998
    Assignee: Eastman Kodak Company
    Inventor: Constantine N. Anagnostopoulos
  • Patent number: 5804843
    Abstract: In a solid state image pickup device including a semiconductor substrate, a photo/electro conversion element and a register formed within the semiconductor substrate, and an photoshield layer having a slit-type aperture for limiting light incident to the photo/electro conversion element, an optical element is provided for the slit-type aperture, to thereby pass polarized light having an electric field polarization face polarized in the longitudinal direction of the slit-type aperture.
    Type: Grant
    Filed: September 30, 1996
    Date of Patent: September 8, 1998
    Assignee: NEC Corporation
    Inventors: Masayuki Furumiya, Yasuaki Hokari
  • Patent number: 5790296
    Abstract: A method and apparatus for generating and controlling the propagation of electrons in a semiconductor material using a plurality of beams of coherent light is disclosed. The direction and magnitude of propagation of the electrons in the semiconductor are controlled by varying the polarization of the coherent beams with respect to the semiconductor material, and in particular the crystallographic axis of the semiconductor material. The electrons are generated and controlled by use of three coherent beams which are related such that the frequency of one of the beams is substantially equal to the sum of the frequencies of the other beams, and the first beam produces substantially the same number of electrons in the semiconductor material that the other beams produce together. A selected region of the semiconductor material is simultaneously irradiated with all of the beams of light. The semiconductor material is at approximately room temperature.
    Type: Grant
    Filed: August 20, 1996
    Date of Patent: August 4, 1998
    Inventors: John Edward Sipe, Henry Martin Van Driel
  • Patent number: 5789774
    Abstract: The leakage current at the silicon-to-silicon dioxide interfaces of an active pixel sensor cell is substantially reduced by eliminating field oxide from the cell, and by insuring that, during integration, every surface region of the cell that is not heavily doped is either biased into accumulation or biased into inversion. Each of these states, in turn, substantially limits the number of electrons from thermally-generated electron-hole pairs at the surface that can contribute to the leakage current.
    Type: Grant
    Filed: May 14, 1997
    Date of Patent: August 4, 1998
    Assignee: Foveonics, Inc.
    Inventor: Richard Billings Merrill
  • Patent number: 5751032
    Abstract: A color linear charge coupled device for an image pickup apparatus includes red, green, and blue photo diode arrays. First, second, third and fourth transfer gates formed in the device move signal charges generated at the photo diode arrays toward first, second and third horizontal charge coupled device (HCCD) shift registers. By controlling the transfer gates, the red and green signal charges are first transferred to their HCCD shift registers. The blue signal charge is then transferred to its HCCD shift register. Only three HCCD shift registers are required, thus, the device dimension and configuration is considerably simplified compared to prior art configurations. Also, the color resolution of the device is greatly improved because the distance between the respective photo diode arrays is substantially decreased.
    Type: Grant
    Filed: June 25, 1996
    Date of Patent: May 12, 1998
    Assignee: LG Semicon Co., Ltd.
    Inventor: Young J. Yu
  • Patent number: 5744831
    Abstract: A solid-state image pick-up device 20 having a photoreceiving section 3 disposed on the obverse surface of a substrate 2 and performing photoelectric conversion. A readout gate 5 is disposed at one end of the photoreceiving section 3. A channel stop 8 is disposed at the other end of the photoreceiving section 3. A vertical transfer register 7 is provided for each of the readout gate 5 and the channel stop 8 at the end opposite to the photoreceiving section 3. A transfer electrode 10 is located in a position substantially right above the vertical transfer register 7. A light-shielding film 21 is disposed in such a manner that the transfer electrode 10 can be covered and that the portion right above the photoreceiving section 3 can be at least partially opened. The width W.sub.3 of the readout gate 5 is formed greater than the width W.sub.4 of the channel stop 8. The width W.sub.5 of the projecting portion 21b of the light-shielding film 21 adjacent to the readout gate 5 is formed smaller than the width W.sub.
    Type: Grant
    Filed: August 28, 1996
    Date of Patent: April 28, 1998
    Assignee: Sony Corporation
    Inventor: Hiroaki Tanaka
  • Patent number: 5742081
    Abstract: A charge transfer image pickup device is disclosed. One embodiment of the device includes a plurality of photoelectric conversion elements for producing signal charges in response to light applied thereto. A vertical charge transfer part including a first region having a first well layer and for transferring the signal charges produced by the photoelectric conversion elements is provided. A horizontal charge transfer part including a second region having a second well layer and coupled to the vertical charge transfer part to receive transferred signal charges by using a terminal vertical transfer electrode of the vertical charge transfer part is also included. The first and second well layers partially overlap to form an overlap section that does not extend over the terminal vertical transfer electrode in the direction from the second region to the first region.
    Type: Grant
    Filed: February 6, 1995
    Date of Patent: April 21, 1998
    Assignee: NEC Corporation
    Inventor: Masayuki Furumiya
  • Patent number: 5698892
    Abstract: In order to eliminate film thickness nonuniformity of filters and to attain a cost reduction by simultaneously performing planarizing processes of a scribe region and a photoelectric conversion portion, in a color solid-state image pickup device which is separated into a plurality of color solid-state image pickup chips each of which consists of a photoelectric conversion portion and a peripheral circuit portion thereof formed on a semiconductor substrate, a portion of a scribe region for separating the structure on the semiconductor substrate into the color solid-state image pickup chips has a layer structure having the same layers as the photoelectric conversion portion. This invention is also applied to a chip array type color solid-state image pickup device which is constituted by arranging, on a semiconductor substrate, a plurality of color solid-state image pickup chips, each having an array of a plurality of photoelectric conversion portions.
    Type: Grant
    Filed: January 2, 1996
    Date of Patent: December 16, 1997
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toru Koizumi, Yoshio Koide
  • Patent number: 5675158
    Abstract: A linear solid state imaging device including a substrate (21), a first well (22) of a predetermined junction depth, a second well (23) of a deeper junction than the first well (22), a trapezoid type photodiode area (24) linearly arranged in the first well (22) in which except for one side of the parallel sides of the trapezoid area, the other sides are surrounded by a channel stop area (31), a pair of HCCD areas (25) in the second well in areas of both sides of the photodiode (24) and connected to the output amplifier, a shift gate (28) formed in the substrate between the areas for the photodiode (24) and the HCCD and for transferring the accumulated charges in the photodiode area to the HCCD area, a shift gate channel area (26) formed, in the first well underneath the shift gate (28) and having a six-sided shape one side of which is in contact with the photodiode area (24), another side of which has a V-shaped depression and the other sides are surrounded by a channel stop area (31), a potential barrier for
    Type: Grant
    Filed: June 1, 1995
    Date of Patent: October 7, 1997
    Assignee: LG Semicon Co., Ltd.
    Inventor: Kyung Soo Lee
  • Patent number: 5654565
    Abstract: A solid state image picking-up device such as a charge coupled device (CCD) includes a channel region and a photo-diode region formed on a semiconductor region apart from each other, a first insulating film formed on the semiconductor region including the channel region and the second semiconductor region to have a concave portion above the photo-diode region, and a charge transfer electrode interposed in said first insulating film and extending over the channel region and a region between the channel region and the photo-diode region. A light shielding film is formed on the first insulating film over the channel region and a second insulating film is formed on the light shielding film and the first insulating film. A protection film composed of BPSG or PSG is formed to fill the concave portion on the second insulating film. A third insulating film is formed on the protection film and a flattening resin film is formed on the third insulating film. The protection film is formed of a BPSG film containing P.sub.
    Type: Grant
    Filed: June 26, 1995
    Date of Patent: August 5, 1997
    Assignee: NEC Corporation
    Inventor: Yasuaki Hokari
  • Patent number: 5650643
    Abstract: A light receiving device includes, in addition to a photodiode and a reset element, a comparator formed by a first and a second MOS transistor and a counter. The comparator compares an output potential of the photodiode applied to a gate electrode of the first MOS transistor with a threshold potential externally applied to a gate electrode of the second MOS transistor. The counter counts a time duration from a point of time when the photodiode is reset by the switching element to a point of time at which the output potential of the photodiode exceeds the threshold potential, and outputs the time duration in a numeral value corresponding to the quantity of light incident on the photodiode. The required light sensitivity can be maintained even when the quantity of light is either large or small. Also, non-destructive reading can be carried out.
    Type: Grant
    Filed: March 21, 1995
    Date of Patent: July 22, 1997
    Assignee: NEC Corporation
    Inventor: Kazuo Konuma
  • Patent number: 5637893
    Abstract: A solid-state image sensor has a photodiode region, a vertical CCD register for transferring a charge received at the photodiode region, a read-out gate region for reading the charge out to the vertical CCD register, and an element isolation region for isolating the photodiode region and the vertical CCD register. Ion-implantation is carried out first for the element isolation region and, thereafter, the photodiode region and the vertical CCD register are formed. The element isolation region is in a two layer configuration having a P.sup.+ -type region and a P-type region, and the P-type region is formed simultaneously with other regions including the read-out gate region. When the P-type region for the element isolation region is formed by ion-implantation before the formation of the photodiode region and the vertical CCD register, the fine patterning of the resist mask becomes unnecessary.
    Type: Grant
    Filed: February 21, 1996
    Date of Patent: June 10, 1997
    Assignee: NEC Corporation
    Inventor: Masayuki Furumiya
  • Patent number: 5621230
    Abstract: A method for producing a low capacitance floating diffusion structure used for charge to voltage conversion in a solid state image sensor having an output amplifier provided with a gate electrode, comprising the steps of: (a) growing a gate oxide on a substrate of a given conductivity type; (b) forming the gate electrode for the output amplifier on the gate oxide and patterning the gate electrode so as to create an opening through it; (c) introducing through the opening a dopant of a conductivity type opposite to the given conductivity type so as to create a floating diffusion region in the substrate; and (d) creating an ohmic contact between the floating diffusion region and the gate electrode.
    Type: Grant
    Filed: June 27, 1996
    Date of Patent: April 15, 1997
    Assignee: Eastman Kodak Company
    Inventors: Robert M. Guidash, Antonio S. Ciccarelli
  • Patent number: 5621231
    Abstract: There is disclosed a solid-state imager for preventing an unwanted potential barrier in the overflow control gate when ions are implanted into the sensor portion. The imager is capable of easily controlling the amount of overflow. The sensor portion takes the hole accumulation diode (HAD) sensor structure. A potential barrier is created in the overflow control gate by ion implantation. A potential difference created between the overflow control gate and the sensor portion is determined by the amount of ions implanted. A DC voltage V.sub.D applied to the overflow drain is variable. The potential difference is adjusted by varying the DC voltage V.sub.D. Thus, elements of the imager are uniform in potential barrier.
    Type: Grant
    Filed: July 19, 1996
    Date of Patent: April 15, 1997
    Assignee: Sony Corporation
    Inventors: Seiichi Kawamoto, Tadakuni Narabu
  • Patent number: 5614741
    Abstract: A CCD solid state imaging device can reduce a smear component. This CCD solid state imaging device comprises a plurality of photosensor sections (10) arranged in a matrix fashion, a vertical transfer register (5) having a transfer electrode (16) disposed at every column of the photosensor sections, a shunt line layer (33) connected to the transfer electrode (16) on the vertical transfer register (5), and a photo-shield layer (38) formed so as to surround the photosensor section 10 through an interlayer insulating layer (37) which covers the shunt layer (33), in which the interlayer insulating layer (37) is not formed under an overhang portion (38a) of the photo-shield layer (38) to the photosensor section (10).
    Type: Grant
    Filed: May 17, 1994
    Date of Patent: March 25, 1997
    Assignee: Sony Corporation
    Inventors: Kouichi Harada, Junichi Furukawa, Kazushi Wada, Takaaki Sarai
  • Patent number: 5614740
    Abstract: An improved CCD imaging array is disclosed which is capable of operating at 10,000 frames-per-second. The imager consists of an array of 512.times.512 pixels having 16 serial output channels which provides a composite output data rate up to 250 Megasamples/second. The serial output registers are constructed from peristaltic CCDs, each having a GaAs FET output circuit bump-mounted to the silicon substrate. A four-layer pinned photodiode is utilized as the photodetector, and each photodiode has its own antiblooming drain. The antiblooming gates double as an optical shuttering device. Sample-and-hold output circuitry is also provided.
    Type: Grant
    Filed: November 30, 1994
    Date of Patent: March 25, 1997
    Assignee: Q-Dot, Inc.
    Inventors: David W. Gardner, Thomas E. Linnenbrink, Stephen D. Gaalema
  • Patent number: 5612555
    Abstract: In accordance with the invention, a full frame solid-state image sensor of altered accumulation potential comprises a substrate that includes a semiconductor of one conductivity type and has a surface at which is situated a photodetector that comprises a first storage area and a second storage area. The first and second storage areas each comprise a CCD channel of conductivity type opposite to the conductivity type of the semiconductor. A first barrier region separates the first storage area from the second storage area, and a second barrier region separates the second storage area from an adjacent photodetector; the second barrier region is shallower than the first barrier region. Adjacent to one side of the photodetector is a channel stop of the same conductivity type as the semiconductor.
    Type: Grant
    Filed: March 22, 1995
    Date of Patent: March 18, 1997
    Assignee: Eastman Kodak Company
    Inventor: Constantine N. Anagnostopoulos
  • Patent number: 5600159
    Abstract: A solid state image sensing device has a photoelectric transfer section for transducing incident light into signal charges, at least firs% and second charge transfer paths, a charge transferring section for transferring the signal charges from the photoelectric transfer section to the first path at a first timing and for transferring the signal charges transferred to the first path to the second path at a second timing and a charge supply section for applying bias charges to the signal charges to be transferred from the first to the second path. In the device, bias charges supplied to the first path is transferred to the second path. Signal charges are transferred to the first path and then to the second path. The signal and the bias charges both transferred to the second path are outputted.
    Type: Grant
    Filed: December 14, 1994
    Date of Patent: February 4, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Makoto Monoi, Kenji Suzuki, Kiyoshi Fujii
  • Patent number: 5581099
    Abstract: In a CCD solid state image sensing device in which a photosensitive section is constructed by a photodiode formed by a PN junction between a first P-type well region and an N-type impurity diffusion region formed on an N-type silicon substrate, the N-type impurity diffusion region is formed by the ion implantation of single substance of arsenic (As). According to this CCD solid state image sensing device, a bright flaw on an image sensing screen, which is one of the defects encountered with an image sensing screen, can be reduced. Also, the n-type impurity diffusion region constructing the PN Junction can be reduced in size and the CCD solid state image sensing device itself can be made compact in size. Further, a method of manufacturing a CCD solid state image sensing device also is provided.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: December 3, 1996
    Assignee: Sony Corporation
    Inventors: Takahisa Kusaka, Hideo Kanbe, Akio Izumi, Hideshi Abe, Masanori Ohashi, Atsushi Asai
  • Patent number: 5569938
    Abstract: In an imaging apparatus using a semiconductor imaging device formed of CCDs, light from an object to be imaged is fed to the imaging device selectively by the operation of a light generator. Charges produced by photoelectric conversion elements of the imaging device are read out as an image signal. A control apparatus operates on the light generator and imaging device so that at least one light pulse is fed to the imaging device within one imaging period in which charges are read out of the photoelectric conversion elements to produce an image field. The resulting image signal does not include image fields that have been produced without illumination, and image fields based on a uniform illumination can be obtained.
    Type: Grant
    Filed: March 15, 1994
    Date of Patent: October 29, 1996
    Assignee: Nikon Corporation
    Inventors: Masahiro Shoda, Keiichi Akagawa
  • Patent number: 5514887
    Abstract: In a solid state image sensor comprising a first impurity layer of a first conductivity type forming a photodiode, the impurity layer is composed of a first impurity region formed of a low concentration at a deep level, and a second impurity region formed of a high concentration at a shallow level. The first impurity region extends under a second impurity layer of a second conductivity type formed for device isolation, and also extends under a gate region of a transistor for transferring an electric charge from the photodiode to a CCD channel.
    Type: Grant
    Filed: December 9, 1994
    Date of Patent: May 7, 1996
    Assignee: NEC Corporation
    Inventor: Yasuaki Hokari
  • Patent number: 5510623
    Abstract: A solid state image sensor CCD array (10a) has a two block, full-frame, parallel-register structure. The two blocks of the array, each comprised of photosensitive radiation sensors or pixels (20), feed into a single centrally disposed serial read-out register (10b) so as to form one unified photosensitive domain. The read-out register is photosensitive except for two associated narrow clock buses (H1, H2) that are spaced apart so as to only block a minimum of input radiation in any one pixel (22) of the read-out register. Each stage of the read-out register can act as a pixel that is approximately square and that is approximately the same size as the pixels of the two full-frame blocks. In operation, the centrally disposed read-out register can be stationary for a significant first portion of a total frame time (integration period), and then in a latter part of the frame time it can be read out one or more times to provide exposure update information for all of the pixels of the array.
    Type: Grant
    Filed: February 24, 1995
    Date of Patent: April 23, 1996
    Assignee: Loral Fairchild Corp.
    Inventors: Michel Sayag, Steven Onishi
  • Patent number: 5502318
    Abstract: The charge coupled device cell has a semiconductor layer 20 of a first conductivity type, a buried channel 22 of a second conductivity type on the semiconductor layer 20, a first virtual gate 24 in the buried channel 22, the first virtual gate is switched between at least two potential levels, and a first bipolar gate 42 in the buried channel 22 adjacent the first virtual gate 24.
    Type: Grant
    Filed: March 9, 1995
    Date of Patent: March 26, 1996
    Assignee: Texas Instruments Incorporated
    Inventor: Jaroslav Hynecek
  • Patent number: 5448089
    Abstract: A charge-coupled device having an improved charge-transfer efficiency over a broad temperature range.
    Type: Grant
    Filed: March 29, 1994
    Date of Patent: September 5, 1995
    Assignee: Eastman Kodak Company
    Inventors: Edmund K. Banghart, Edward T. Nelson, William F. DesJardin, James P. Lavine, Bruce C. Burkey
  • Patent number: 5440155
    Abstract: A convolver includes first and second buried channels, with each of the channels comprised of a piezoelectric semiconductor. The input of one channel is associated with the output of the other channel. An acoustic transducer is positioned adjacent each input for generating an acoustic wave which propagates through the associated channels and thereby transports charge from the input to the output thereof. A non-destructive sensing array overlies the channels and samples the charge transported thereunder. The array includes an assembly for summing the sampled charge and for generating a product. An electrode is operably associated with the summing assembly for integrating the products and generating a convolution signal.
    Type: Grant
    Filed: October 15, 1987
    Date of Patent: August 8, 1995
    Assignee: Electronic Decisions Incorporated
    Inventors: Billy J. Hunsinger, Frederick M. Fliegel
  • Patent number: 5418387
    Abstract: A solid-state imaging device includes a semiconductor substrate, an array of cells on the substrate, a plurality of vertical charge transfer sections extending in a first direction on the substrate, and a horizontal charge transfer section extending in a second direction transverse to the first direction on the substrate and being coupled to the vertical charge transfer section. The cell array includes a plurality of columns of cells that are associated with a corresponding one of the vertical transfer sections. The cell columns include a predetermined number of spaced-part cells that are series-connected along the second direction to constitute a NAND type cell structure. At least one cell-to-cell charge transfer electrode overlies a channel region as defined between adjacent ones of the NAND cells in the substrate.
    Type: Grant
    Filed: December 27, 1993
    Date of Patent: May 23, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuo Nakamura, Nahoko Endo, Yoshiyuki Matsunaga
  • Patent number: 5394003
    Abstract: An acoustic charge transport device comprises a substrate with a layer disposed thereon; a channel disposed within the layer for providing a propagation path for a surface acoustic wave; a contact operably connected and disposed at one end of the channel for injecting an electronic signal into the channel; a transducer disposed at the one end of the channel for generating and propagating the surface acoustic wave through the channel; a plurality of sensing electrodes operably associated with the channel and disposed along the propagation path of the surface acoustic wave for non-destructively sensing the electronic signal; and a plurality of active buffer circuits each having an input operably connected to respective sensing electrode and an output operably connected to an output circuit.
    Type: Grant
    Filed: May 20, 1993
    Date of Patent: February 28, 1995
    Assignee: Electronic Decisions Inc.
    Inventors: James E. Bales, Michael J. Hoskins
  • Patent number: 5389805
    Abstract: A solid-state image sensing device comprises: a charge storage layer (12) formed in the vicinity of a surface of a first conductive type semiconductor substrate (11), for transferring incident light into an electric signal photoelectrically and further storing the transferred electric signal as a signal charge temporarily; a transfer channel (14) formed on the surface of the semiconductor substrate, for transferring the signal charge stored in the charge storing layer; a depletion prevention layer (13) formed on the surface of the semiconductor substrate and on the charge storage layer, for preventing interfaces from being depleted; and a barrier layer (16) formed at a position deeper than the transfer channel, for preventing punch through from being generated between the charge storage layer (12) and the transfer channel (14). The barrier layer (16) is formed locally at such a position that a maximum impurity concentration thereof is located at a position deeper than the depletion prevention layer.
    Type: Grant
    Filed: March 29, 1994
    Date of Patent: February 14, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kenichi Arakawa
  • Patent number: 5352921
    Abstract: Image sensors using thin films and having a higher production yield, low production cost and higher reading resolution are provided. In a photoelectric conversion device having a thin film semiconductor layer is provided that performs photoelectric conversion with a first electrode structured mainly by a metallic material on a light transmitting insulating substrate or an insulating film and a second electrode on the thin film semiconductor layer. A thin insulating film is formed at least partially between the second electrode and the thin film semiconductor layer or the thin film semiconductor layer and the first electrode.
    Type: Grant
    Filed: September 14, 1993
    Date of Patent: October 4, 1994
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsufumi Codama, Ichiro Takayama
  • Patent number: 5345099
    Abstract: In a CCD device, on a semiconductor substrate, and in the insulation films, plural first semiconductor regions and plural second semiconductor regions are formed buried in the insulation films, intermediating a tunneling insulation film therebetween in a manner to spatially isolate them from each other.
    Type: Grant
    Filed: May 4, 1993
    Date of Patent: September 6, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Takahiro Yamada
  • Patent number: 5340977
    Abstract: A solid-state image pickup device, and in particular, a CCD image sensor is capable of color reading, wherein n lines (n.gtoreq.2) of photo diodes disposing a plurality of photodiodes straightly are disposed parallel adjacently to each other, and adjacent n lines of CCD analog shift registers are disposed parallel to the photodiode lines at one side of the group of n lines of photodiodes, and the signal charges are transferred through a gate structure composed of MOS structure, between adjacent lines of n lines of photodiodes and n lines of CCD analog shift registers. It is therefore possible to reduce the intervals of the photodiode lines to the limit, thereby realizing a CCD color linear image sensor capable of outstandingly simplifying the signal time axis correction circuit such as semiconductor digital memory device for correcting the differences of reading positions of the photodiode lines.
    Type: Grant
    Filed: July 13, 1992
    Date of Patent: August 23, 1994
    Assignee: Matsushita Electronics Corporation, Ltd.
    Inventors: Motohiro Kojima, Takuya Watanabe, Tohru Takamura
  • Patent number: 5341008
    Abstract: The semiconductor image sensor element comprises a transistor gate potential well 102, a virtual potential well 100 adjacent the transistor gate potential well 102, a clear gate barrier 104 adjacent the virtual potential well 100, a clear drain 30 adjacent the clear gate barrier 104, and a charge sensor 28 for sensing charge levels in the transistor gate potential well 102. The charge levels are responsive to light incident on the device. Charge is stored in the virtual potential well 100 during charge integration. After charge integration, the charge is transferred into the transistor gate potential well 102 from the virtual potential well 100 for charge detection by the charge sensor 28. After charge detection, the charge is transferred from the transistor potential well 102 to the clear drain 30.
    Type: Grant
    Filed: September 21, 1993
    Date of Patent: August 23, 1994
    Assignee: Texas Instruments Incorporated
    Inventor: Jaroslav Hynecek
  • Patent number: 5338948
    Abstract: The light gathering capability or quantum efficiency of a charge-coupled device is improved by the configuration of the multi-phase gate structure to leave large surface areas of the semiconductor substrate uncovered. Each of the electrodes of the multi-phase gate structure is configured as a series of shallow H-shaped geometries, only the vertical elements of which overlap to ensure that multi-phase operation can be achieved.
    Type: Grant
    Filed: March 16, 1993
    Date of Patent: August 16, 1994
    Assignee: Photometrics, Ltd.
    Inventor: Gary R. Sims
  • Patent number: 5334867
    Abstract: A charge-coupled device (CCD) is provides having improved charge transfer efficiency. This CCD is a portion of an image sensor and manufactured by first laminating a first oxidation film and a first nitride film one after the other on a semiconductor substrate and then forming a plurality of first gate electrodes on the first nitride film at predetermined intervals apart. A second oxidation film is formed only on an upper surface and along side walls of each of the first gate electrodes. The first nitride film exposed between the first gate electrodes is removed and a second nitride film is formed on the exposed first oxidation film and the second oxidation film. A second gate electrode is then formed on the second nitride film between adjacent first gate electrodes. An image sensor is obtained in which leakage current density between the gate electrodes is reduced and the dielectric characteristic of a gate dielectric film is improved.
    Type: Grant
    Filed: May 11, 1993
    Date of Patent: August 2, 1994
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-cheol Shin, Heung-kwun Oh
  • Patent number: 5324968
    Abstract: An image sensor having on a substrate of a first conductivity type an implanted region of a conductivity type opposite to the first conductivity type and an implanted region of the same conductivity type as the substrate, the image sensor comprising a plurality of depleted photosensitive regions in which electric charges are generated, an isolation region being formed between adjacent photosensitive regions to isolate the photosensitive regions from each other. Charge accumulation regions and transfer regions are also provided to transport the electric charges from the photosensitive regions to CCD shift registers. The isolation regions between two depleted photosensitive regions are formed of undepleted regions. The implanted region of the opposite conductivity type is of a smaller width throughout the photosensitive regions than throughout the charge accumulation regions and the transfer regions.
    Type: Grant
    Filed: November 18, 1993
    Date of Patent: June 28, 1994
    Assignee: Eastman Kodak Company
    Inventors: Antonio S. Ciccarelli, Herbert J. Erhardt
  • Patent number: 5321334
    Abstract: An imaging device comprising a vacuum vessel, an electron source arranged in the vessel and a solid-state image sensor arranged to receive signal electrons emitted from the electron source. The solid-state image sensor comprises a charge transferring device, picture element electrodes, an electron multiplier layer, and a surface electrode layer. The picture element electrodes are connected to the charge transferring device and cover the major part of this device. The surface electrode layer and the electron multiplier layer are stacked on the picture element electrodes. The surface electrode layer formed on the electron multiplier layer transmits the incident signal electrons to the electron multiplier layer.
    Type: Grant
    Filed: September 20, 1993
    Date of Patent: June 14, 1994
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Katsuyuki Kinoshita, Yoshinori Inagaki
  • Patent number: 5319225
    Abstract: A solid-state image device for outputting the charges transferred in one direction by a transfer clock is disclosed. It has a detection port for collecting signal charges, a first active region of a first conductivity for receiving the transferred charges, a second active region of a second conductivity formed in the first active region which is connected to the detection port, and a third active region of second conductivity formed beneath the first active region which is connected to a ground voltage terminal, whereby only the transferred signal charges are amplified to produce stable output signals with large gain. The first, second and third active regions together constitute amplifying means. The second active region is supplied with current by the charging operation of a reset transistor.
    Type: Grant
    Filed: September 29, 1992
    Date of Patent: June 7, 1994
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Beom-Shik Kim
  • Patent number: 5317174
    Abstract: A bulk charge modulated MOSFET for sensing light comprising a semiconductor substrate with a gate region of a first conductivity type formed in the substrate. The gate region forms a potential well for carriers of the first conductivity type. The well is formed at a substantial depth from the surface of the gate region. The carriers are formed responsive to incident light. The gate region collects the carriers generated at depths less than the well. A source region of a second conductivity type is formed in the semiconductor substrate laterally adjacent the gate region. The source region is operable to sense a change in threshold voltage of the MOSFET responsive to the collection of carriers by the gate region. A drain region of the second conductivity type is formed in the layer adjacent the gate region and spaced from the source. The drain region is connected to a voltage source.
    Type: Grant
    Filed: February 19, 1993
    Date of Patent: May 31, 1994
    Assignee: Texas Instruments Incorporated
    Inventor: Jaroslav Hynecek
  • Patent number: 5313081
    Abstract: There is provided a solid-state imaging device suitable for miniaturization.
    Type: Grant
    Filed: July 18, 1991
    Date of Patent: May 17, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tetsuo Yamada
  • Patent number: 5309004
    Abstract: A novel heterostructure acoustic charge transport (HACT) device is disclosed which displays both electron and hole transport. The device includes a transducer fabricated on a substrate structure that launches surface acoustic waves. An optional reflector is formed in the substrate structure at an end portion adjacent to the transducer for reflecting the surface acoustic waves. Also included is an electrode configured with the transport channel at an end thereof distal to the transducer for generating electrical signal equivalents of the propagating electrode charge. The device makes use of both the conduction band quantum well to transport electrons and the valance band quantum well to transport holes. In this manner the sampling, processing and detection frequencies of the device can be doubled.
    Type: Grant
    Filed: October 8, 1991
    Date of Patent: May 3, 1994
    Assignee: United Technologies Corporation
    Inventor: Thomas W. Grudkowski
  • Patent number: 5298777
    Abstract: A CCD image sensor of an interlaced scanning type comprising a plurality of uniformly spaced photodetectors arranged in series in vertical and horizontal directions, a plurality of VCCD regions arranged between sets of said photodetectors arranged in the vertical directions, a plurality of channel stop regions for electrically isolating said plurality of photodetectors from one another, a plurality of gate electrodes formed on said VCCD regions, each of said plurality of gate electrodes being connected simultaneously to transfer gate electrodes of adjacent ones of said plurality of photodetectors on odd and even horizontal lines, a plurality of barrier layers, each formed at a portion of each of said VCCD regions corresponding to a boundary with each of said gate electrodes on said VCCD regions, for forming a desired potential barrier, and a HCCD region formed under said plurality of VCCD regions, for transferring signal charges from said VCCD regions to an output stage.
    Type: Grant
    Filed: July 27, 1993
    Date of Patent: March 29, 1994
    Assignee: Gold Star Electron Co., Ltd.
    Inventor: Seo K. Lee
  • Patent number: 5298776
    Abstract: A solid state imager element has a sensor portion, a register portion and a read gate portion for reading a signal charge from the sensor portion and transferring the same to the register portion, wherein a potential difference is formed in the read gate portion in a reading and transferring direction for directing an unnecessary charge or noise toward the register portion to thereby suppress noise in the sensor portion.
    Type: Grant
    Filed: March 29, 1991
    Date of Patent: March 29, 1994
    Assignee: Sony Corporation
    Inventors: Seiichi Kawamoto, Maki Sato, Tadakuni Narabu, Hisanori Miura, Masahide Hirama
  • Patent number: 5289017
    Abstract: A solid state imaging device of claim 1, wherein the silicon carbide crystal layer is formed on a silicon substrate such that the insulating film is interposed between said silicon carbide crystal layer and said silicon substrate. Since the charge transfer part and the imaging part are formed in the silicon carbide layer, the device can normally operate even in a high-temperature or intensive radioactive ray environment the method for producing the device is also disclosed.
    Type: Grant
    Filed: December 21, 1992
    Date of Patent: February 22, 1994
    Assignee: Rohm Co., Ltd.
    Inventor: Keita Nii
  • Patent number: 5241198
    Abstract: A charge-coupled device comprises transfer gate electrodes separated from a substrate by a multi-layer insulating film, and gate electrodes of MIS transistors separated from the substrate by a single layer insulating film. The multilayer insulating film comprising at least a lower silicon oxide layer of 10 nm to 200 nm thickness and an upper silicon nitride layer of 10 nm to 100 nm thickness. Since each of the gate insulating films of the MIS transistors is the same layer as the lower silicon oxide layer, there occurs no degradation in the transistor characteristics due to the surface states or the trapping states present within the silicon nitride layer.
    Type: Grant
    Filed: November 25, 1991
    Date of Patent: August 31, 1993
    Assignee: Matsushita Electronics Corporation
    Inventors: Hiroyuki Okada, Wataru Kamisaka, Masaji Asaumi, Yuji Matsuda
  • Patent number: 5223725
    Abstract: A charge transfer device is equipped with a junction type field effect transistor coupled with the final stage of a transfer shift register for modulating current flowing therethrough depending upon the amount of electric charge from the transfer shift register, and the junction type field effect transistor comprises an n-type looped gate region formed in a p-type well, a p-type source region surrounded by the looped gate region, a p-type drain region opposite to the source region with respect to the looped gate region, and a p-type channel region defined in the p-type well beneath the looped gate region, wherein the p-type channel region is shallower or smaller in dopant concentration than remaining portion of the p-type well so that the current is effectively modulated with the electric charge.
    Type: Grant
    Filed: October 23, 1992
    Date of Patent: June 29, 1993
    Assignee: NEC Corporation
    Inventor: Kazuo Miwada