Sensor Element And Charge Transfer Device Are Of Different Materials Or On Different Substrates (e.g., "hybrid") Patents (Class 257/226)
-
Patent number: 8115242Abstract: A multicolor CMOS pixel sensor formed in a p-type semiconductor region includes a first detector formed from an n-type region of semiconductor material located near the surface of the p-type region. A first pinned p-type region is formed at the surface of the p-type region over the first detector, and has a surface portion extending past an edge of the pinned p-type region. A second detector is formed from an n-type region located in the p-type semiconductor region below the first detector. A second-detector n-type deep contact plug is in contact with the second detector and extends to the surface of the p-type semiconductor region. A second pinned p-type region is formed at the surface of the p-type semiconductor region over the top of the second-detector n-type deep contact plug. A surface portion of the second-detector deep contact plug extends past an edge of the second pinned p-type region.Type: GrantFiled: February 7, 2007Date of Patent: February 14, 2012Assignee: Foveon, Inc.Inventor: Richard B. Merrill
-
Patent number: 8093672Abstract: Provided is a manufacturing method of a solid-state imaging device, which is able to realize a solid-state imaging device whose reflection prevention coating is even and that does not have image noise in case of adopting a spincoating method in applying a material of the reflection prevention coating onto microlenses of the solid-state imaging device. In the solid-state imaging device 1 according to the present invention, a barrier wall pattern 7 is formed, as a step alleviating structure, in dicing areas 5X formed between adjacent imaging areas 9. The barrier wall pattern 7 has a rectangular sectional form. With use of the barrier wall pattern 7 in the spincoating method, reflection prevention coating 8 is coated onto the microlenses 6 more evenly than in conventional cases.Type: GrantFiled: September 20, 2006Date of Patent: January 10, 2012Assignee: Panasonic CorporationInventors: Tomoki Masuda, Toshihiro Higuchi, Yasuo Takeuchi, Tomoko Komatsu
-
Patent number: 8085998Abstract: A finger sensor may include a finger sensing integrated circuit (IC) having a finger sensing area and at least one bond pad adjacent thereto, and a flexible circuit coupled to the IC finger sensor. More particularly, the flexible circuit may include a flexible layer, and at least one conductive trace carried thereby and coupled to the at least one bond pad. The sensor may also include at least one Electrostatic Discharge (ESD) electrode carried by the flexible layer. The ESD electrode may be positioned adjacent a beveled edge, for example, of an IC carrier and thereby exposed through a small gap between an adjacent portion of a frame.Type: GrantFiled: October 18, 2006Date of Patent: December 27, 2011Assignee: Authentec, Inc.Inventors: Dale R. Setlak, Matthew M. Salatino, Philip J. Spletter, Yang Rao
-
Patent number: 8072006Abstract: A high quality imager is constructed using a silicon-on-insulator (SOI) process with sensors fabricated in the SOI substrate and isolated by the buried oxide (BOX) from associated readout circuitry in the SOI layer. Handle windows are opened in the SOI device layer for fabrication of the sensors in the handle layer substrate and then closed prior to processing in the device layer. By keeping the buried oxide layer intact, the described technique allows for independent processing of sensors and readout circuitry so that each is optimized with regard to thermal and dopant properties without concern for degradation of the other. The process is compatible with the fabrication of readout circuitry using transistors having independent double-gates, which offer simultaneous advantages in scalability, low power and low noise. Photodiode sensors are shown with allowance for many other types of sensors. The process easily accommodates hardening against radiation.Type: GrantFiled: December 21, 2005Date of Patent: December 6, 2011Assignee: American Semiconductor, Inc.Inventors: Douglas R. Hackler, Sr., Richard A. Hayhurst, Stephen A. Parke
-
Patent number: 8053855Abstract: A CMOS image sensor for improving light sensitivity and peripheral brightness ratio, and a method for fabricating the same. The CMOS image sensor includes a substrate on which a light sensor and device isolating insulation films are formed, in which the top of the substrate is coated with a plurality of metal layers and oxide films; a plurality of reflective layers formed inside the metal layers, each being spaced apart; a color filter embedded in a groove formed by etching the oxide films inside the reflective layers by a predetermined thickness; a plurality of protrusions formed on both sides of the top of the color filter, each arranged at a predetermined distance from one another; a flat layer formed on the top of the protrusions and the oxide films; and a micro-lens formed on the top of the flat layer. The reflective layer disposed at the top of the photodiode is made of a material having a high reflectance and low absorptivity.Type: GrantFiled: May 16, 2005Date of Patent: November 8, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Seung-ho Nam, Jin-hwan Kim, Gee-young Sung
-
Patent number: 8004021Abstract: Microfabricated devices for operation in a fluid that include a substrate that has a first and second surface and a first electrode material layer located over the first surface of the substrate. The devices have a piezoelectric material layer located over the first electrode material layer and a second electrode material layer located over the piezoelectric material layer. The devices also include a layer of isolation material located over the second electrode material layer that at least one of chemically or electrically isolates a portion of the second electrode material layer from a fluid. Some devices include a layer of conductive material located over the layer of isolation material.Type: GrantFiled: April 17, 2007Date of Patent: August 23, 2011Assignee: BioScale, Inc.Inventors: Michael F. Miller, Shivalik Bakshi
-
Patent number: 7977131Abstract: The present invention provides a method of manufacturing a nano-array electrode with a controlled nano-structure by filling a compound having an electron-accepting structure or an electron donating structure into the fine pores of an anodic-oxide porous alumina film obtained by anodically oxidizing aluminum in electrolyte. The spaces defined between the nano-arrays formed of the compound by removing the alumina film are filled with a compound having an electron-donating structure if the nano-arrays have an electron-accepting structure and a compound having an electron-accepting structure if the nano-arrays have an electron-donating structure. A high-performance, high-efficiency photoelectric converting device comprising a nano-array electrode manufactured by the method is also disclosed.Type: GrantFiled: December 21, 2009Date of Patent: July 12, 2011Assignee: Nippon Oil CorporationInventors: Tsuyoshi Asano, Takaya Kubo, Yoshinori Nishikitani
-
Publication number: 20110084316Abstract: A pickup device according to the present invention includes a photoelectric conversion portion, a charge holding portion configured to include a first semiconductor region, and a transfer portion configured to include a transfer gate electrode that controls a potential between the charge holding portion and a sense node. A second semiconductor region is disposed on a surface of a semiconductor region between the control electrode and the transfer gate electrode. A third semiconductor region is disposed below the second semiconductor region. An impurity concentration of the third semiconductor region is higher than the impurity concentration of the first semiconductor region.Type: ApplicationFiled: October 6, 2010Publication date: April 14, 2011Applicant: CANON KABUSHIKI KAISHAInventors: Yuichiro Yamashita, Masahiro Kobayashi, Yusuke Onuki
-
Patent number: 7910964Abstract: A part of a semiconductor layer directly under a light-receiving gate electrode functions as a charge generation region, and electrons generated in the charge generation region are injected into a part of a surface buried region directly above the charge generation region. The surface buried region directly under a first transfer gate electrode functions as a first transfer channel, and the surface buried region directly under a second transfer gate electrode functions as a second transfer channel. Signal charges are alternately transferred to an n-type first floating drain region and a second floating drain region through the first and second floating transfer channels.Type: GrantFiled: August 30, 2006Date of Patent: March 22, 2011Assignees: National University Corporation Shizuoka University, Sharp Kabushiki KaishaInventors: Shoji Kawahito, Mitsuru Homma
-
Patent number: 7902574Abstract: This invention provides a type of solid-state image pickup device characterized by the fact that for a solid-state image pickup device with a broad dynamic range, it is possible to suppress the dark current than photoelectrons overflowing from the photodiode, as well as its driving method. Plural pixels are integrated in an array configuration on a semiconductor substrate. Each pixel has the following parts: photodiode (CPD), transfer transistor (?T), floating diffusion (CFD), accumulating capacitive element (CS), accumulating transistor (?S), and a reset transistor. During the accumulating period of photoelectric charge, voltage (?) over that applied on the semiconductor substrate, or ?0.6 V or lower than the voltage applied on the semiconductor substrate, is applied as an OFF potential on the gate electrode of at least one transfer transistor, the accumulating transistor and the reset transistor.Type: GrantFiled: May 16, 2007Date of Patent: March 8, 2011Assignee: Texas Instruments IncorporatedInventor: Satoru Adachi
-
Patent number: 7888161Abstract: A method for producing a solid-state imaging device, which including: a photoelectric conversion section; a charge transfer section having a charge transfer electrode; and an antireflection film covering a light-receiving region in the photoelectric conversion section, wherein forming the antireflection film includes: forming a sidewall on a lateral wall of the charge transfer electrode after forming the charge transfer electrode; forming an antireflection film on a substrate surface where the sidewall is formed; forming a resist on the antireflection film; melting and flattening the resist to expose the antireflection film on the charge transfer electrode; removing the antireflection film by using the resist as the mask; removing the sidewall; covering the charge transfer electrode with an insulating film; and forming a light-shielding film that reaches a level lower than the top surface of the antireflection film, and that surrounds the periphery of the antireflection film.Type: GrantFiled: April 24, 2009Date of Patent: February 15, 2011Assignee: Fujifilm CorporationInventor: Takanori Sato
-
Patent number: 7868362Abstract: A hypersensitive semiconductor die structure is disclosed, in which flip-chip packaging is used in conjunction with a modified SOI die in which a thick silicon support substrate has been removed to increase sensitivity of the sensing device. Rather than being located beneath layers of interconnects and dielectric, the disclosed structure places the sensing devices close to the surface, more closely exposed to the environment in which sensing is to occur. The structure also allows for the placement of sensing films on nearer to the sensing devices and/or an oxide layer overlying the sensing devices.Type: GrantFiled: October 16, 2008Date of Patent: January 11, 2011Assignee: Honeywell International Inc.Inventors: Todd Andrew Randazzo, Ronald James Jensen, Thomas Keyser
-
Patent number: 7859027Abstract: A back irradiating type solid state imaging device comprises: a first semiconductor substrate; a plurality of photoelectric converting devices that receives a light incident from a back side of the first semiconductor substrate and are formed in a two-dimensional array on a surface side of the first semiconductor substrate; a CCD type signal reading section that are formed on the surface side of the first semiconductor substrate and reads detection signals of the photoelectric converting devices; and a MOS type signal reading section that are formed on the surface side of the first semiconductor substrate and reads detection signals of the photoelectric converting devices.Type: GrantFiled: March 13, 2008Date of Patent: December 28, 2010Assignee: FujiFilm CorporationInventor: Shinji Uya
-
Patent number: 7859672Abstract: An optical element of the present invention includes a conductive microstructure having a conductive property, and detects an optical spectrum signal varied by the binding of measured molecules on the surface of the conductive microstructure. The optical element has a distribution in the binding capacity of the measured molecules on the surface of the conductive microstructure in the direction of the electric displacement vector generated inside the conductive microstructure. As a result, it is possible to provide an optical element capable of measuring the density at high accuracy without depending on the binding position of the measured molecules.Type: GrantFiled: March 10, 2008Date of Patent: December 28, 2010Assignee: Canon Kabushiki KaishaInventors: Tomohiro Yamada, Yoichiro Handa, Satoru Nishiuma, Ryo Kuroda
-
Patent number: 7838955Abstract: An image sensor includes a metal interconnection and readout circuitry over a first substrate, an image sensing device, and an ion implantation isolation layer. The image sensing device is over the metal interconnection, and an ion implantation isolation layer is in the image sensing device. The image sensing device includes first, second and third color image sensing units, and ion implantation contact layers. The first, second and third color image sensing units are stacked in or on a second substrate. The ion implantation contact layers are electrically connected to the first, second and third color image sensing units, respectively.Type: GrantFiled: December 23, 2008Date of Patent: November 23, 2010Assignee: Dongbu HiTek Co., Ltd.Inventor: Hee Sung Shim
-
Publication number: 20100237390Abstract: A solid-state image capturing element according to the present invention includes a one conductivity type semiconductor substrate; an opposite conductivity type well region formed on the one conductivity type semiconductor substrate; a photodiode section formed on the opposite conductivity type well region, constituted of a plurality of one conductivity type regions with successively different impurity concentrations for complete electric charge transferring; a one conductive drain region capable of reading out signal charges from the photodiode section; and a transfer gate formed above a substrate between the one conductivity drain region and the photodiode section.Type: ApplicationFiled: March 16, 2010Publication date: September 23, 2010Applicant: SHARP KABUSHIKI KAISHAInventor: Nagai Kenichi
-
Patent number: 7795693Abstract: The description is of a flat substrate with an electrically conductive structure integrated inside the flat substrate or applied to a surface of the flat substrate and/or with a technically improved surface. The invention is characterised in that at least one sensor is integrated inside the flat substrate or applied to a surface of the flat substrate, which generates sensor signals according to deformations occurring inside the flat substrate, at least one actuator is integrated inside the flat substrate or applied to the surface of the flat substrate, which enables the flat substrate to mechanically deform when activated, and a signal unit connected to the at least one sensor and to the at least one actuator is provided, which, on the basis of the sensor signals, generates actuator signals for activating the actuator, so that deformations occurring inside the flat substrate are reduced.Type: GrantFiled: October 13, 2006Date of Patent: September 14, 2010Assignee: Fraunhofer-Gesellschaft zur Forderung der Angewandten Forschung E. V.Inventors: Heinz Kaufmann, Tobias Melz, Ralf Sindelar
-
Patent number: 7786543Abstract: A MOS or CMOS based active pixel sensor with special sampling features to substantially eliminate clock noise. The sensor includes an array of pixels fabricated in or on a substrate, each pixel defining a charge collection node on which charges generated inside a photodiode region are collected, a charge integration node, at which charges generated in said pixel are integrated to produce pixel signals, a charge sensing node from which reset signals and the pixel signals are sensed. In preferred embodiments the sensor includes a continuous electromagnetic radiation detection structure located above the pixel circuits providing a photodiode region for each pixel. The sensor includes integrated circuit elements adapted to maintain voltage potentials of the charge integration nodes substantially constant during charge integration cycles. The sensor also includes integrated circuit elements having electrical capacitance adapted to store charges providing an electrical potential at the charge integration node.Type: GrantFiled: August 17, 2007Date of Patent: August 31, 2010Assignee: e-PhocusInventor: Tzu-Chiang Hsieh
-
Patent number: 7763912Abstract: A sensor whose size can be decreased without marring the performance and which can be installed in a narrow place, an electric device, and a method for easily manufacturing the electric device. By vacuum deposition of semiconductor on a columnar body or by applying a melt, solution, or gel of semiconductor to the columnar body, a coating of semiconductor is formed. Four insulating wires, a stripe band of the connected four insulating wires are wound around the columnar body. Then, one of the insulating wires is removed to form a copper wire in the vacant portion by copper vacuum deposition. Lastly, another insulating wire not adjacent to the copper wire is removed to form an aluminum wire in the vacant portion by aluminum vacuum deposition. By measuring the resistance between the copper and aluminum wires, the intensity of light striking the semiconductor can be determined.Type: GrantFiled: September 11, 2008Date of Patent: July 27, 2010Assignee: Ideal Star Inc.Inventors: Yasuhiko Kasama, Kenji Omote
-
Patent number: 7737479Abstract: An image sensor, in which, a planarized layer is formed on a semiconductor substrate including a pixel array region, an optical black region, and a logic region to cover a photo sensing unit array in the pixel array region, a patterned metal layer is formed on the planarized layer corresponding to the pixel array region and the logic region, but not the optical black region. An optical black layer is formed in the optical black region after a passivation layer is formed and before a color filter array is formed at a temperature less than about 400° C., and preferably contains metal material.Type: GrantFiled: June 27, 2008Date of Patent: June 15, 2010Assignees: United Microelectronics Corp., AltaSens Inc.Inventors: Tzeng-Fei Wen, Giuseppe Rossi, Ju-Hsin Yen, Chia-Huei Lin, Jhy-Jyi Sze, Chien-Yao Huang, Teng-Yuan Ko, Nien-Tsu Peng
-
Patent number: 7732843Abstract: Forming an impurity region 6 and an impurity region 5 having a lower concentration than the impurity region 6 in a lower layer region of a gate electrode close to the boundary with a signal electron-voltage conversion section of a horizontal CCD outlet makes it possible to smooth a potential distribution at the time of transfer, improve the transfer efficiency, increase the number of saturated electrons and reduce variations in the transfer efficiency and variations in saturation.Type: GrantFiled: August 4, 2008Date of Patent: June 8, 2010Assignee: Panasonic CorporationInventor: Keishi Tachikawa
-
Patent number: 7720326Abstract: Various embodiments of the present invention are directed to nanowire-based photodetectors that can be used to convert information encoded in a channel of electromagnetic radiation into a photocurrent encoding the same information. In one embodiment of the present invention, a photodetector comprises a waveguide configured to transmit one or more channels of electromagnetic radiation. The photodetector includes a first terminal and a second terminal. The first terminal and the second terminal are positioned on opposite sides of the waveguide. The photodetector also includes a number of nanowires. Each nanowire interconnects the first terminal to the second terminal and a portion of each nanowire is embedded in the waveguide.Type: GrantFiled: January 29, 2007Date of Patent: May 18, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventors: Wei Wu, Scott Corzine, Alexandre M. Bratkovski, Shih-Yuan Wang
-
Patent number: 7719004Abstract: The invention concerns a sensor with silicon-containing components from whose sensitive detection element electrical signals relevant to a present analyte can be read out by means of a silicon semiconductor system. The invention is characterized in that the silicon-containing components are covered with a layer made of hydrophobic material in order to prevent unwanted signals caused by moisture.Type: GrantFiled: February 1, 2005Date of Patent: May 18, 2010Assignee: Micronas GmbHInventors: Markus Burgmair, Ignaz Eisele, Thorsten Knittel
-
Patent number: 7696538Abstract: Liquid detection sensors are attached to both sides of a robotic arm end effector of a semiconductor wafer process system. The sensor mechanism or probe is situated on the front side and backside of the end effector, designed with electrical lines that are traced onto a polyester base material. The electrical lines are positioned in a serpentine formation. The high conductance of the sulfuric acid in the copper sulfate solution acts as the conductor between the traced lines. When the conductive liquid comes in contact with the traced lines, the lines short and the sensor activates or turns on.Type: GrantFiled: March 9, 2006Date of Patent: April 13, 2010Assignee: Novellus Systems, Inc.Inventors: Won Lee, Evan E Patton
-
Patent number: 7687832Abstract: A method of fabricating a pixel cell having a shutter gate structure. First and second charge barriers are respectively created between a photodiode and a first charge storage region and between the first storage region and a floating diffusion region. A global shutter gate is formed to control the charge barrier and transfer charges from the photodiode to the first charge storage region by effectively lowering the first charge barrier. A transfer transistor acts to transfer charges from the first storage region to the floating diffusion region by reducing the second charge barrier.Type: GrantFiled: September 7, 2006Date of Patent: March 30, 2010Assignee: Aptina Imaging CorporationInventors: Inna Patrick, Sungkwon C. Hong
-
Patent number: 7666787Abstract: An interconnect structure of the single or dual damascene type and a method of forming the same, which substantially reduces the electromigration problem that is exhibited by prior art interconnect structures, are provided. In accordance with the present invention, a grain growth promotion layer, which promotes the formation of a conductive region within the interconnect structure that has a bamboo microstructure and an average grain size of larger than 0.05 microns is utilized. The inventive structure has improved performance and reliability.Type: GrantFiled: February 21, 2006Date of Patent: February 23, 2010Assignee: International Business Machines CorporationInventors: Chih-Chao Yang, Shom Ponoth
-
Patent number: 7663210Abstract: Optical components are flip chip mounted onto a substrate for improved alignment. Each device is fabricated using “build-up” layers above a substrate. Each has an optical confinement region in which optical radiation travels in use, and a bonding surface. The overall depth of the layers above the optical confinement region is closely controlled during fabrication, for instance by the use a “spacer” layer, so that when the devices are subsequently flip chip mounted adjacent one another on a shared substrate by means of their bonding surfaces, they can be passively positioned so that their optical confinement regions abut and optical radiation can be coupled from one to the next in use.Type: GrantFiled: November 3, 2003Date of Patent: February 16, 2010Assignee: Optitune plcInventor: Ari Karkkainen
-
Patent number: 7655493Abstract: A light sensor having a light conversion element between first and second electrodes is disclosed. The light conversion element includes a body of semiconductor material having first and second surfaces. The body of semiconductor material is of a first conductivity type and has doping elements in a concentration gradient that creates a first electrostatic field having a magnitude that varies monotonically from the first surface to the second surface. A bias circuit applies a variable potential between the first and second electrodes to create a second electrostatic field having a direction opposite to that of the first electrostatic field and a magnitude determined by the potential. One of the electrodes is transparent to light in a predetermined band of wavelengths. The body of semiconductor material can include an epitaxial body having a monotonically increasing concentration of a doping element as a function of the distance from one the surfaces.Type: GrantFiled: July 14, 2005Date of Patent: February 2, 2010Assignee: Fairchild Imaging, IncInventors: David D. Wen, Xinqiao Liu, Ahn N. Vu, Steven Kiyoshi Onishi
-
Patent number: 7622736Abstract: It is an object of the present invention to provide a volatile semiconductor device into which data can be additionally written and which is easy to manufacture, and a method for manufacturing the same. It is a feature of the present invention that a semiconductor device includes an element formation layer including a first transistor and a second transistor which are provided over a substrate; a memory element provided over the element formation layer; and a sensor portion provided above the memory element, wherein the memory element has a layered structure including a first conductive layer, and an organic compound layer, and a second conductive layer, the first conductive layer is electrically connected to the first transistor, and the sensor portion is electrically connected to the second transistor.Type: GrantFiled: December 1, 2005Date of Patent: November 24, 2009Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshitaka Moriya, Hiroko Abe, Mikio Yukawa, Ryoji Nomura
-
Solid image pick-up element with a single layer electrode structure and method of producing the same
Patent number: 7608871Abstract: A solid image pick-up element comprises: a photoelectric converting portion; a charge transmitting portion comprising a charge transmitting electrode that transmits a charge generated by the photoelectric converting portion; and a peripheral circuit portion connected to the charge transmitting portion, wherein a surface level of a field oxide film provided at the peripheral circuit portion and the charge transmitting portion to surround an effective image pick-up region of the photoelectric converting portion is to a degree the same as a surface level of the photoelectric converting portion.Type: GrantFiled: June 30, 2005Date of Patent: October 27, 2009Assignee: Fujifilm CorporationInventors: Tsutomu Aita, Hideki Kooriyama, Maki Saito -
Patent number: 7592650Abstract: A hybrid semiconductor power device that includes a plurality of closed power transistor cells each surrounded by a first and second trenched gates constituting substantially a closed cell and a plurality of stripe cells comprising two substantially parallel trenched gates constituting substantially an elongated stripe cell wherein the closed cells and stripe cells constituting neighboring cells sharing trenched gates disposed thereinbetween as common boundary trenched gates. The closed MOSFET cell further includes a source contact disposed substantially at a center portion of the closed cell wherein the trenched gates are maintained a critical distance (CD) away from the source contact.Type: GrantFiled: September 11, 2005Date of Patent: September 22, 2009Assignee: M-MOS Semiconductor Sdn. Bhd.Inventor: Fwu-Iuan Hshieh
-
Publication number: 20090230437Abstract: A part of a semiconductor layer directly under a light-receiving gate electrode functions as a charge generation region, and electrons generated in the charge generation region are injected into a part of a surface buried region directly above the charge generation region. The surface buried region directly under a first transfer gate electrode functions as a first transfer channel, and the surface buried region directly under a second transfer gate electrode functions as a second transfer channel. Signal charges are alternately transferred to an n-type first floating drain region and a second floating drain region through the first and second floating transfer channels.Type: ApplicationFiled: August 30, 2006Publication date: September 17, 2009Applicants: Nat. Univ. Corp Shizuoka University, Sharp Kabushiki KaishaInventors: Shoji Kawahito, Mitsuru Homma
-
Patent number: 7557421Abstract: The present invention is a hybrid integrated circuit comprising at least two semiconductor dies. A high performance semiconductor die includes high performance epitaxy layers grown on a donor substrate, which may form active devices such as transistors. A supporting semiconductor die includes epitaxy layers of a commercially available technology and grown on a native substrate to form passive devices such as resistors, capacitors, inductors, backside via holes, or active devices such as transistors The semiconductor dies are attached to a metallic mounting structure and may be electrically interconnected using traditional IC interconnect methods, such as wire bonding. The metallic mounting structure may function as a grounding base, which may be formed of electrically conductive metal such as copper. The high performance epitaxy layers may include GaN epitaxy layers, AlGaN epitaxy layers, SiC epitaxy layers, or a combination of the three.Type: GrantFiled: July 20, 2006Date of Patent: July 7, 2009Assignee: RF Micro Devices, Inc.Inventors: Jeffrey B. Shealy, Matthew Poulton, Ramakrishna Vetury
-
Patent number: 7557390Abstract: A solid image capturing element comprising a plurality of vertical shift registers arranged to each correspond to a column of a plurality of light receiving pixels in a matrix arrangement, a horizontal shift register provided on an output side of the plurality of vertical shift registers, and an output section provided on an output side of the horizontal shift register. In this solid image capturing element, a reverse conductive semiconductor region is formed over one major surface of one conductive semiconductor substrate, the plurality of light receiving pixels, the plurality of vertical shift registers, the horizontal shift register, and the output section are formed in the semiconductor region, and a portion of the semiconductor region where the output section is formed has a higher dopant concentration than the portion of the semiconductor region where the horizontal shift register is formed.Type: GrantFiled: October 17, 2003Date of Patent: July 7, 2009Assignee: Sanyo Electric co., Ltd.Inventors: Yoshihiro Okada, Yuzo Otsuru
-
Patent number: 7547927Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein, and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. Wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.Type: GrantFiled: September 14, 2004Date of Patent: June 16, 2009Assignee: Sony CorporationInventors: Ryoji Suzuki, Keiji Mabuchi, Tomonori Mori
-
Patent number: 7525168Abstract: A MOS or CMOS based active pixel sensor designed for operation with zero or close to zero potential across the pixel photodiodes to minimize or eliminate dark current. In preferred embodiments the pixel photodiodes are produced with a continuous pin or nip photodiode layer laid down over pixel electrodes of the sensor. In this preferred embodiment, the voltage potential across the pixel photodiode structures is maintained constant and close to zero, preferably less than 1.0 volts. This preferred embodiment enables the photodiode to be operated at a constant bias condition during the charge detection cycle. Setting this constant bias condition close to zero (near “short circuit” condition) assures that dark current is substantially zero.Type: GrantFiled: February 22, 2008Date of Patent: April 28, 2009Assignee: e-Phocus, Inc.Inventor: Tzu-Chiang Hsieh
-
Patent number: 7459732Abstract: A gas-sensitive field-effect transistor may be formed from a substrate with a gas-sensitive layer and a transistor processed separately and then assembled. The substrate may be patterned to form spacers by which the height of an air gap between the transistor and the sensitive layer may be adjustable to a relatively precise degree. Formation of the spacers can be achieved by patterning the substrate using material-removal techniques. The height of the spacers may be adjusted in the layer thickness of the gas-sensitive layer and for the transistor fabricated using a CMOS process. Suitable techniques for producing recesses between the spacers include, for example, polishing, cutting, sandblasting, lithographic dry etching, or wet-chemical etching. Suitable materials for the substrate may include, for example, glass, ceramic, aluminum oxide, silicon, or a dimensionally stable polymer.Type: GrantFiled: March 31, 2006Date of Patent: December 2, 2008Assignee: Micronas GmbHInventors: Maximilian Fleischer, Uwe Lampe, Hans Meixner, Roland Pohle, Ralf Schneider, Elfriede Simon
-
Publication number: 20080224180Abstract: A radiation detecting system includes at least a carrier collective electrode layer, a radiation-sensitive semiconductor layer, at least one charge transfer layer, and a voltage applying electrode formed on an insulating substrate and wherein at least one of the charge transfer layers includes chalcogenide compounds containing therein chalcogenide elements larger than the stoichiometric value by not smaller than 3% of the stoichiometric value in a composition thereof.Type: ApplicationFiled: March 14, 2008Publication date: September 18, 2008Applicant: FUJIFILM CORPORATIONInventor: Fumito NARIYUKI
-
Patent number: 7420235Abstract: In the solid-state imaging device of the present invention having a photoelectric conversion section and a charge transfer section equipped with a charge transfer electrode for transferring an electric charge generated in the photoelectric conversion section, the charge transfer electrode has an alternate arrangement of a first layer electrode including a first layer electrically conducting film and a second layer electrode including a second layer electrically conducting film, which are formed on a gate oxide film including a laminate film consisting of a silicon oxide film and a metal oxide thin film, and the first layer electrode and the second layer electrode are separated by insulation with an interelectrode insulating film including a sidewall insulating film formed by a CVD process to cover the lateral wall of the first layer electrode.Type: GrantFiled: August 7, 2006Date of Patent: September 2, 2008Assignee: Fujifilm CorporationInventor: Maki Saito
-
Patent number: 7402849Abstract: A microfabricated probe array for nanolithography and process for designing and fabricating the probe array. The probe array consists of individual probes that can be moved independently using thermal bimetallic actuation or electrostatic actuation methods. The probe array can be used to produce traces of diffusively transferred chemicals on the substrate with sub-1 micrometer resolution, and can function as an arrayed scanning probe microscope for subsequent reading and variation of transferred patterns.Type: GrantFiled: March 7, 2005Date of Patent: July 22, 2008Assignee: The Board of Trustees of the University of IllinoisInventors: Chang Liu, Ming Zhang, David Andrew Bullen
-
Patent number: 7397072Abstract: A four terminal field effect device comprises a silicon field effect device with a silicon N-type semiconductor channel and an N+ source and drain region. An insulator is deposited over the N-type semiconductor channel. An organic semiconductor material is deposited over the insulator gate forming a organic semiconductor channel and is exposed to the ambient environment. Drain and source electrodes are deposited and electrically couple to respective ends of the organic semiconductor channel. The two independent source electrodes and the two independent drain electrodes form the four terminals of the new field effect device. The organic semiconductor channel may be charged and discharged electrically and have its charge modified in response to chemicals in the ambient environment. The conductivity of silicon semiconductor channel is modulated by induced charges in the common gate in response to charges in the organic semiconductor channel.Type: GrantFiled: December 1, 2005Date of Patent: July 8, 2008Assignee: Board of Regents, The University of Texas SystemInventors: Ananth Dodabalapur, Deepak Sharma, Daniel Fine
-
Patent number: 7375406Abstract: A sensor package apparatus includes a lead frame substrate that supports one or more electrical components, which are connected to and located on the lead frame substrate. A plurality of wire bonds are also provided, which electrically connect the electrical components to the lead frame substrate, wherein the lead frame substrate is encapsulated by a thermoset plastic to protect the plurality of wire bonds and at least one electrical component, thereby providing a sensor package apparatus comprising the lead frame substrate, the electrical component(s), and the wire bonds, while eliminating a need for a Printed Circuit Board (PCB) or a ceramic substrate in place of the lead frame substrate as a part of the sensor package apparatus. A conductive epoxy and/or solder can also be provided for maintaining a connection of the electrical component(s) to the lead frame substrate. The electrical components can constitute, for example, an IC chip and/or a sensing element (e.g.Type: GrantFiled: December 20, 2005Date of Patent: May 20, 2008Assignee: Honeywell International Inc.Inventors: Wayne A. Lamb, Scott E. Michelhaugh, Peter A. Schelonka, Joel D. Stolfus
-
Patent number: 7288801Abstract: A CMOS image sensing structure includes a photodiode, in which an epitaxial layer is on a P-type substrate. The photodiode includes an N-well collection node in the epitaxial layer. An isolation trench is provided around the collection node to provide better control of the width of the collection node. The collection node can be surrounded by P-wells or by epitaxial material. It can also be surrounded by epitaxial material with the isolation trench being outwardly extended to ensure compliance with existing design rules.Type: GrantFiled: February 25, 2004Date of Patent: October 30, 2007Assignee: STMicroelectronics Ltd.Inventor: Jeffrey Raynor
-
Patent number: 7247895Abstract: Method and apparatus for selectively actuating a cantilevered probe for applying a compound to a substrate in nanolithography. A probe having a probe electrode and a substrate having a counter electrode are provided. Voltage applied to the probe electrode and/or counter electrode provides electrostatic attraction between them, moving a probe tip into sufficient proximity to the substrate to apply the patterning compound. Alternatively, a flexible cantilevered probe anchored to a holder includes a layer of conductive material forming a probe electrode. A counter electrode on the holder faces the probe electrode. The holder and probe are positioned so that a probe tip applies the compound to the substrate. The probe is disposed between the substrate and the counter electrode. An electrostatic attractive force generated between the probe electrode and the counter electrode flexes the probe and lifts the tip away from the substrate to suspend writing.Type: GrantFiled: March 16, 2006Date of Patent: July 24, 2007Assignee: The Board of Trustees of the University of IllinoisInventors: Chang Liu, David Andrew Bullen
-
Patent number: 7227199Abstract: Disclosed is a method of manufacturing an image sensor having light sensitivity over a photodiode equal in area to that of a unit pixel. The image sensor includes an image sensor comprising: a first semiconductor substrate doped with a first conductive dopant; a first diffusion layer formed in the semiconductor substrate and doped with a second conductive dopant; a second diffusion layer formed in the semiconductor substrate adjacent the first diffusion layer and having a width wider than a width of the first diffusion layer; a third diffusion layer doped with the first conductive dopant and formed at an exposed surface of the semiconductor substrate in the first diffusion layer; a gate electrode formed on the exposed surface and having a first edge adjacent to the third diffusion layer; and a fourth diffusion layer doped with the second conductive dopant and formed at the exposed surface adjacent a second edge of the gate electrode, the fourth diffusion layer defining a gap with the second diffusion layer.Type: GrantFiled: February 8, 2005Date of Patent: June 5, 2007Assignee: Hynix Semiconductor Inc.Inventor: Joon Hwang
-
Patent number: 7217983Abstract: To provide a solid-state imaging device in which the number of transistors for each signal readout circuit provided in a semiconductor substrate side is reduced and the number of image signal readout lines is reduced, solid-state imaging device a semiconductor substrate; a stacked photoelectric conversion films detecting different colors contained in an incident light; and pixel electrode films partitioned in accordance with pixels, wherein the semiconductor substrate includes: a plurality of color selection transistors corresponding to one of the pixels, wherein the color selection transistors each corresponds to one of the photoelectric conversion films and connects to one of the pixel electrode films on the one of the photoelectric conversion films so as to be capable of selecting the one of the photoelectric conversion films; and a charge detection cell corresponding to one of the pixels, the charge detection cell being common to the photoelectric conversion films.Type: GrantFiled: March 17, 2005Date of Patent: May 15, 2007Assignee: Fujifilm CorporationInventor: Nobuo Suzuki
-
Patent number: 7214999Abstract: An exemplary system and method for providing an integrated photosensing element suitably adapted for use in CMOS imaging applications is disclosed as comprising inter alia: a processed CMOS host wafer (460) bonded with a monocrystalline, optically active donor wafer (300); a photosensing element (390) integrated in said optically active donor wafer (300) having an interconnect via (505, 495, 485) substantially decoupled from the photosensing element (390), wherein the host (460) and donor (300) wafers are bonded through the optically active material in a region disposed near a metalization surface (450, 455, 445) of the CMOS layer (460) in order to allow fabrication of the interconnect (505, 495, 485). Disclosed features and specifications may be variously controlled, configured, adapted or otherwise optionally modified to further improve or otherwise optimize photosensing performance or other material characteristics.Type: GrantFiled: August 26, 2004Date of Patent: May 8, 2007Assignee: Motorola, Inc.Inventors: Paige Holm, Jon J. Candelaria
-
Patent number: 7199409Abstract: The present invention provides an apparatus for adding or subtracting an amount charge to or from a charge packet in a CCD as the packet traverses the CCD. The apparatus uses a “wire transfer” device structure to perform the addition or subtraction of charge during the charge packets traversal across the device. A pair of electrically interconnected diffusions are incorporated within the charge couple path to provide an amount of charge which can be added or subtracted from packets as the packets traverse the CCD.Type: GrantFiled: August 26, 2004Date of Patent: April 3, 2007Assignee: Massachusetts Institute of TechnologyInventor: Michael P. Anthony
-
Patent number: 7193241Abstract: An ultraviolet sensor includes a substrate; a diamond layer, placed on the substrate, functioning as a detector; and at least one pair of surface electrodes arranged on the diamond layer. The diamond layer has a detecting region present at the surface thereof, the detecting region has at least one sub-region exposed from the surface electrodes, and the sub-region has a covering layer, made of oxide or fluoride, lying thereon. A method for manufacturing the ultraviolet sensor includes a step of forming a diamond layer, functioning as a detector, on a substrate; a step of forming at least one pair of surface electrodes on the diamond layer; and a step of forming a covering layer, made of oxide or fluoride, on at least one sub-region of a detecting region present at the surface of the diamond layer, the sub-region being exposed from the surface electrodes.Type: GrantFiled: February 15, 2005Date of Patent: March 20, 2007Assignee: Kabushiki Kaisha Kobe Seiko ShoInventors: Kazushi Hayashi, Takeshi Tachibana, Yoshihiro Yokota, Nobuyuki Kawakami
-
Patent number: 7190008Abstract: An electro-optic display comprises a substrate (100), non-linear devices (102) disposed substantially in one plane on the substrate (100), pixel electrodes (106) connected to the non-linear devices (102), an electro-optic medium (110) and a common electrode (112) on the opposed side of the electro-optic medium (110) from the pixel electrodes (106). The moduli of the various parts of the display are arranged so that, when the display is curved, the neutral axis or neutral plane lies substantially in the plane of the non-linear devices (102).Type: GrantFiled: October 27, 2004Date of Patent: March 13, 2007Assignee: E Ink CorporationInventors: Karl R. Amundson, Andrew P. Ritenour, Gregg M. Duthaler, Paul S. Drzaic, Yu Chen, Peter T. Kazlas