Abstract: An array of active pixel sensors. The array of active pixel sensors includes a substrate that includes electronic circuitry. An interconnect structure is formed adjacent to the substrate. The interconnect structure includes a plurality of conductive vias. A plurality of conductive guard rings are formed adjacent to the interconnect structure. Each conductive guard ring is electrically connected to the substrate through at least one of the conductive vias. A plurality of photo diode sensors are formed adjacent to the interconnect structure. Each photo diode sensor is surrounded by at least one of the conductive guard rings. Each photo diode sensor includes a pixel electrode. The pixel electrode is electrically connected to the substrate through a corresponding conductive via. An I-layer is formed adjacent to the pixel electrode. The array of active pixel sensors further includes a transparent conductive layer formed adjacent to the photo diode sensors.

Abstract: The present invention relates to semiconductor integrated transistors comprising a conduction section and a sense section for the current flowing through the conduction section both sections being located within a region. To ensure that sensing is accurate and takes into account that the surface of the power transistor reach in operation a non-uniform temperature, the conduction section and sense section are located in such a manner that, in operation, the temperature distributions of the two sections are substantially equal.

Abstract: A power MOSFET die and a logic and protection circuit die are mounted on a common lead frame pad, such as a TO220 lead frame pad. The logic and protection circuit die includes a MOSFET that is connected in parallel with the power MOSFET but which is smaller than the power MOSFET and which dissipates power at a predetermined fraction of that of the power MOSFET. The logic and protection circuit die also includes a temperature sensor that is in close proximity to the MOSFET and determines the temperature of the MOSFET. The die also includes another temperature sensor that is located distant from the MOSFET to determine the temperature of the lead frame. The temperature of the power MOSFET can be determined from the temperature measured by these two sensors and from the ratio of the power dissipated by the two MOSFETs.

Abstract: In a semiconductor device including a full depletion MISFET transistor made by using a SOI layer and intended to stabilize a predetermined threshold value while holding the threshold value sensitivity to fluctuation in thickness of the SOI layer even upon changes in impurity concentration of a channel region of the MISFET transistor by changing a back gate voltage in accordance with the impurity concentration of the channel region, thickness of the SOI layer is determined to reduce changes in threshold value, and impurity concentration of the channel region is measured by using a detector element to adjust the back gate voltage in response to the measured value. Thus, the desired threshold voltage can be maintained.

Abstract: A semiconductor structure having a temperature sensor placed in close proximity to gate and source and/or drain electrodes. The sensor is compatible with conventional semiconductor processing and is typically made from doped polysilicon having a large temperature coefficient of resistivity. At least one sensor may be placed under, but insulated from, source or drain electrodes to protect against high electric fields. The sensor is also compatible with bipolar semiconductor structures.

Abstract: A semiconductor imaging system preferably having an active pixel sensor array compatible with a CMOS fabrication process. Color-filtering elements such as polymer filters and wavelength-converting phosphors can be integrated with the image sensor.

Abstract: The semiconductor image sensor device of the multiple chip mount type is constructed such that electrical and mechanical connections are carried out concurrently among chips. Coupling chips 4 are utilized to couple a plurality of semiconductor image sensor chips 1 with each other, and the couple one semiconductor image sensor chip 1 to a driver substrate 3 which mounts thereon a semiconductor driving chip 2 for driving the semiconductor image sensor chips 1.

Abstract: A handle wafer has a cavity coated with a dielectric. A device wafer is bonded to the handle wafer. Metal lines, devices or circuits fabricated on device layer overlay the cavity in the handle wafer thus reducing parasitic capacitances to the handle wafer and crosstalk through the handle wafer. This constitutes a rugged air bridge structure capable of being passivated and/or being placed in plastic packages.

Abstract: An image sensor. The image sensor array includes a substrate. An interconnect structure is formed adjacent to the substrate. A plurality of image sensors are formed adjacent to the interconnect structure. Each image sensor includes a pixel electrode, and a separate I-layer section formed adjacent to the pixel electrode. The image sensor array further includes an insulating material between each image sensor. A transparent electrode is formed over the image sensors. An inner surface of the transparent electrode is electrically connected to an outer surface of the image sensors and the interconnect.

Abstract: A light-emitting-diode array includes a non-doped compound semiconductor layer between a substrate and a first compound semiconductor layer. A plurality of isolation regions extend from the first compound semiconductor layer to the surface of the non-doped compound semiconductor layer, and provide separation into isolated block regions each containing an equal number of diffusion regions. A plurality of shared electrode lines are connected to the diffusion regions in a plurality of the block regions, in such a relationship that diffusion regions selected from each of the block regions are connected to a common shared electrode. At least a surface portion of the substrate is formed of silicon. The density of the diffusion regions can be increased without increasing the number of the electrode pads. Moreover, the substrate is free from breakage or cracks.

Abstract: Several inventions are disclosed. A cell architecture using hexagonal shaped cells is disclosed. The architecture is not limited to hexagonal shaped cells. Cells may be defined by clusters of two or more hexagons, by triangles, by parallelograms, and by other polygons enabling a variety of cell shapes to be accommodated. Polydirectional non-orthogonal three layer metal routing is disclosed. The architecture may be combined with the tri-directional routing for a particularly advantageous design. In the tri-directional routing arrangement, electrical conductors for interconnecting terminals of microelectronic cells of an integrated circuit preferrably extend in three directions that are angularly displaced from each other by 60.degree.. The conductors that extend in the three directions are preferrably formed in three different layers. A method of minimizing wire length in a semiconductor device is disclosed. A method of minimizing intermetal capacitance in a semiconductor device is disclosed.

Abstract: A thermal type infrared radiation solid state image pick-up device includes a temperature-electrical signal converting function element and a heat isolation structural body supporting the temperature-electrical signal converting function element. The heat isolation structural body is formed of a silicon oxide or a silicon nitride in porous structure. Since the heat isolation structural body has porous structure, heat flowing out from the heat isolation structural body depends on an actual area derived by subtracting the area of the holes from the area of the cross-section of the leg (nominal cross section). On the other hand, the mechanical strength of the heat isolation structural body relies on the area of the cross section of the leg. Therefore, for obtaining the photo sensitivity equivalent to that of the conventional heat isolation structural body, the cross sectional area of the leg can be made greater to improve mechanical strength thereof.

Abstract: An air bridge structure 102 is formed in a cavity of a glass lid substrate. The air bridge structure is bonded to an integrated circuit in a device substrate 82 to provide an air bridge structure coupled to the integrated circuit.

Abstract: An imaging device (10, 10') has a plurality of unit cells (11) that contribute to forming an image of a scene. The imaging device includes a layer of wide bandgap semiconductor (18) material (e.g., silicon) having photogate charge-mode readout circuitry (20, 22, 24), such as CCD or CMOS circuitry, disposed upon a first surface of the layer. In one embodiment a second, opposing surface of the layer is bonded at a heterojunction interface or atomic bonding layer (16) to a surface of a layer of narrower bandgap semiconductor material (e.g., InGaAs or HgCdTe), that is selected for absorbing electromagnetic radiation having wavelengths longer than about one micrometer (i.e., the NIR or longer) and for generating charge carriers. The generated charge carriers are transported across the heterojunction interface for collection by the photogate charge-mode readout circuitry.

Abstract: In a semiconductor device comprising a semiconductor chip on which semiconductor elements are formed, the semiconductor device further comprises a thermal resistance detector for detecting an increase of thermal resistance of a heat radiating path which is provided to radiate the heat generated in the semiconductor device during operation, and a thermal resistance detection result output circuit for outputting a result of a detection by the thermal resistance detector to an output of the semiconductor device. The semiconductor device can detect at the early stage the increase of the thermal resistance of the heat radiating path, and the deterioration of the semiconductor device due to the crack in the solder layer bonding the chip mounting insulation substrate and heat sink during the operation of the device.

Abstract: A light-emitting element 22 and a light-receiving element 26 are attached to a circuit board so as to oppose each other across the circuit board 2. As a result, light from the light-emitting element 22 arrives at the light-receiving element 26 via the substrate 2. Since the distance between the light-emitting element 22 and the light-receiving element 23 thus becomes very short, the light conversion efficiency is improved by a wide margin. Further, since the substrate 2 is interposed between the light-emitting element 22 and the light-receiving element 26, the elements are completely isolated within the insulation breakdown voltage of the material constituting the substrate.

Abstract: Solid state image sensor which can improve photic sensitivity of photodiodes by providing only one transmission line between the photodiodes, leading to reduction of width of the transmission line passing between the photodiodes, including a substrate, photodiodes formed on the substrate, a first to a fourth transmission gates arranged in sequence by four for every two photodiodes on a part of the substrate on one side of each of the photodiode, a first, and a second transmission lines arranged one by one alternatively extended at length on the substrate between adjacent photodiodes connected to the first, and the second transmission gates respectively for applying a first, and a second driving clock signals, respectively, a first contact formed at the third transmission gate, a second contact formed at the fourth transmission gate, and a third, and a fourth transmission lines formed over the transmission gates in parallel at length connected through the third, and the fourth transmission gates and the first,

Abstract: An insulating film having a through hole aligned with an electrode on a first semiconductor element is formed on a first semiconductor substrate and a metal is disposed in the through hole. A second semiconductor element on a second semiconductor substrate is placed on the insulating film in such a way that an electrode of the second semiconductor element contacts the metal. Thus, a plurality of transistors having different performance characteristics and functions can be easily disposed adjacent to each other for improved integration.

Abstract: A preferred embodiment of this invention is a hybrid semiconductor imaging structure comprising a high speed signal conditioning substrate (e.g. Si 12) and an imaging substrate (e.g. HgCdTe 10) mounted on the conditioning substrate using an adhesive layer (e.g. epoxy 31). Infrared-sensitive time delay and integration CCD columns (14) charge coupled to sense nodes (e.g. diodes 16) are disposed in the imaging substrate. High speed signal processing channels (e.g. capacitive transimpedance amplifier 18, congelated double sampling circuit 20 and multiplexing shift register 22) are disposed in the conditioning substrate. The sense nodes are connected to the signal processing channels with low capacitance hybrid leads (e.g AI 17).

Abstract: The disclosed device and system enables the cell-based amplification of photo-e The disclop41 The detection device is realized by overlaying an amplifying semi-conductor structure, generally referred to as avalanche photo-diodes, on top of a typical prior-art charge coupled device structure. The disclosed arrangement is a hybrid of these two technologies with certain provisions which allow the two prior art technologies to function properly as a single integrated unit.

Abstract: An image sensing device that outputs a signal logarithmically proportional to the intensity of the incident light. The image sensing device makes use of a sub-threshold current flowing between the drain and source of a MOS transistor when the gate voltage is below the threshold voltage (above which the MOS transistor is nominally conductive and below which nominally non-conductive). Since the logarithmic conversion is done in the photosensing section of a solid-state image sensing device, the output from the device is already compressed and is easily handled by a small capacity CCD. Some output systems for the image sensing device of the present invention are also described.

Abstract: A solid-state imaging device includes a photodiode array having a plurality of pixels, each pixel including a second conductivity type region formed in a first conductivity type semiconductor layer, an electrode common to all the pixels and disposed on the first conductivity type semiconductor layer, a signal transfer part for transferring signal charges generated in the pixels and a DC voltage source for applying a DC voltage in a forward direction to the pixels. The reverse bias voltage applied to a photodiode due to the voltage applied by the signal input stage of the signal transfer part is canceled by the forward DC voltage applied to the common electrode. As a result, the operating points of the pixels are uniform when nearly zero bias voltage is applied to the pixels.