With Blooming Suppression Structure Patents (Class 257/230)
  • Patent number: 10707254
    Abstract: Semiconductor devices are provided. The semiconductor devices may include a substrate, a device isolation pattern in the substrate to electrically isolate a first pixel and a second pixel from each other, a conductive pattern in the device isolation pattern, and a doping layer on a side surface of the device isolation pattern. The doping layer may have a conductivity type different from a conductivity type of the substrate.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: July 7, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Taeyon Lee, Gwideokryan Lee, Myungwon Lee
  • Patent number: 10692910
    Abstract: The present disclosure relates to a solid-state imaging element capable of suppressing stray light with respect to a charge storage unit such as an FD, and an electronic device. According to an aspect of the present disclosure, a solid-state imaging element constituted by many pixels includes a photoelectric conversion unit formed for each of the pixels and that converts incident light into a charge; a charge storage unit that temporarily holds the converted charge; and a first light shielding unit formed between the pixels and having a predetermined length in a thickness direction of a substrate. The charge storage unit is formed below a cross portion where the first light shielding unit formed between pixels adjacent to each other in a longitudinal direction crosses the first light shielding unit formed between pixels adjacent to each other in a lateral direction. The present disclosure can be applied to, for example, a backside irradiation type CMOS image sensor.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: June 23, 2020
    Assignee: SONY CORPORATION
    Inventors: Kyohei Mizuta, Takuya Maruyama, Yukihiro Ando
  • Patent number: 10622395
    Abstract: An image sensing device includes a photoelectric device disposed within a semiconductor substrate, and a separation structure and electrode structures disposed within the semiconductor substrate, and surrounding the photoelectric device. The separation structure includes a first conductive pattern, and a first insulating spacer between the first conductive pattern and the semiconductor substrate. A respective one of the electrode structures includes a second conductive pattern, and a second insulating spacer between the second conductive pattern and the semiconductor substrate. The first conductive pattern and the second conductive pattern are formed of the same conductive material.
    Type: Grant
    Filed: June 19, 2018
    Date of Patent: April 14, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang Su Park, Jung Hun Kim, Chang Hwa Kim, Beom Suk Lee, Gang Zhang, Man Geun Cho
  • Patent number: 10529761
    Abstract: A semiconductor device includes a semiconductive substrate and a gate structure over the semiconductive substrate. The semiconductive substrate includes a photo-sensitive region adjacent to the gate structure, and the gate structure is configured to store electric charge generated from the photo-sensitive region. The semiconductor device also includes a conductive structure over the semiconductive substrate. The conductive structure circumscribes and is spaced apart from a sidewall of the gate structure.
    Type: Grant
    Filed: January 29, 2018
    Date of Patent: January 7, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tsun-Kai Tsao, Shih-Pei Chou, Jiech-Fun Lu
  • Patent number: 10304887
    Abstract: A substrate includes a plurality of pixels arranged in a two-dimensional array structure and has a front side and a back side opposite to the front side. An interconnection is arranged on the front side of the substrate. An insulating layer, a color filter, and a micro-lens are arranged on the back side of the substrate. A pixel separation structure is disposed in the substrate. The pixel separation structure includes a conductive layer having a grid structure in a planar view of the image sensor and surrounds each of the plurality of pixels. A back side contact is vertically overlapped with and electrically connected to a grid point portion of the grid structure of the conductive layer of the pixel separation structure.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: May 28, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Han-seok Kim, Byung-jun Park, Hee-geun Jeong, Seung-joo Nah
  • Patent number: 10297633
    Abstract: A photoelectric conversion device, comprising a semiconductor substrate on which a plurality of pixels are arrayed, and an insulating member which is transparent and configured to cover the semiconductor substrate, wherein the insulating member includes at least three portions whose thickness are different from each other so as to increase types of wavelengths of light that are to be ripple reduction targets.
    Type: Grant
    Filed: June 4, 2018
    Date of Patent: May 21, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takanori Suzuki, Takanori Watanabe
  • Patent number: 9927531
    Abstract: A method and apparatus is disclosed for differentially altering the radiation response across multiple MOSCAP sensors by placing different thin gate materials with different atomic numbers on a series of MOS-based radiation sensors. The secondary electrons created in high-atomic weight materials (such as gold) at lower incident photon energy levels enable a tissue equivalent radiation response and radiations source identification/differentiation. This is a desirable alternative to using filters with different coefficients across a series of MOSCAP radiation sensor which will attenuate the signal and degrade the device form factor. The method and apparatus disclosed achieves the same functionality but with inherent gain instead of attenuation, thus increasing sensitivity. This will improve the minimum resolvable dose for x-rays and low-energy gammas (high-energy gammas will remain the same), and produces a response that can distinguish the energy level of incident radiation photon.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: March 27, 2018
    Assignee: PURDUE RESEARCH FOUNDATION
    Inventors: Mark Raymond Salasky, Sean M. Scott, P. Alexander Walerow, Daniel John Valentino, Dimitrios Peroulis
  • Patent number: 9843756
    Abstract: In some embodiments, an imaging device includes a pixel array. At least one of the pixels includes a photodiode that can generate charges, and a select transistor that receives the charges in its bulk. When the select transistor is selected, a pixel current through it may depend on a number of the received charges, thus evidencing how much light it detected. A reset transistor may reset the voltage of the bulk.
    Type: Grant
    Filed: May 27, 2015
    Date of Patent: December 12, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yibing Michelle Wang, Kwanghyun Lee, Hongyu Wang, Taechan Kim
  • Patent number: 9804273
    Abstract: An apparatus is disclosed comprising a metal oxide semiconductor capacitor (MOSCAP) comprising one or more gate layers disposed over a contiguous radiation-sensitive insulating layer, wherein the contiguous radiation-sensitive insulating layer comprises one or more contacting dielectric layers. A method may be employed to measure a value of a radiation-induced capacitance response of a metal oxide semiconductor capacitor (MOSCAP) from multiple non-contacting gate layers disposed over a radiation-sensitive layer comprising of one or more contacting dielectric layers to thereby enhance a sensitivity and a resolution of a radiation response of the MOSCAP.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: October 31, 2017
    Assignee: PURDUE RESEARCH FOUNDATION
    Inventor: Sean M. Scott
  • Patent number: 9748375
    Abstract: A semiconductor power device may include a lightly doped layer formed on a heavily doped layer. One or more devices are formed in the lightly doped layer. Each device may include a body region, a source region, and one or more gate electrodes formed in corresponding trenches in the lightly doped region. Each of the trenches has a depth in a first dimension, a width in a second dimension and a length in a third dimension. The body region is of opposite conductivity type to the lightly and heavily doped layers. The source region is formed proximate the upper surface. One or more deep contacts are formed at one or more locations along the third dimension proximate one or more of the trenches. The contacts extend in the first direction from the upper surface into the lightly doped layer and are in electrical contact with the source region.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: August 29, 2017
    Assignee: ALPHA AND OMEGA SEMICONDUCTOR INCORPORATED
    Inventors: Hamza Yilmaz, Daniel Ng, Daniel Calafut, Madhur Bobde, Anup Bhalla, Ji Pan, Yeeheng Lee, Jongoh Kim
  • Patent number: 9640571
    Abstract: Pixel arrays of an image sensor that include a first pixel and a second pixel adjacent the first pixel are provided. The first pixel may include a first photoelectric conversion device, a first charge storage device, a first floating diffusion node and a first transfer gate. The second pixel may include a second photoelectric conversion device, a second charge storage device, a second floating diffusion node and a second transfer gate. The pixel arrays may also include a storage gate on both the first charge storage device and the second charge storage device. The storage gate may have a unitary structure.
    Type: Grant
    Filed: July 7, 2015
    Date of Patent: May 2, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-Sik Kim, Young-Chan Kim, Eun-Sub Shim, Min-Seok Oh, Ji-Won Lee, Moo-Sup Lim, Tae-Han Kim, Dong-Joo Yang
  • Patent number: 9142630
    Abstract: Among other things, one or more techniques for enhancing device (e.g., transistor) performance are provided herein. In one embodiment, device performance is enhanced by forming an extended dummy region at an edge of a region of a device and forming an active region at a non-edge of the region. Limitations associated with semiconductor fabrication processing present in the extended dummy region more so than in non-edge regions. Accordingly, a device exhibiting enhanced performance is formed by connecting a gate to the active region, where the active region has a desired profile because it is comprised within a non-edge of the region. A dummy device (e.g., that may be less responsive) may be formed to include the extended dummy region, where the extended dummy region has a less than desired profile due to limitations associated with semiconductor fabrication processing, for example.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: September 22, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co. Limited
    Inventors: Chang-Yu Wu, Chih-Chiang Chang, Shang-Chih Hsieh, Wei-Chih Hsieh
  • Publication number: 20150123172
    Abstract: An image sensor pixel for use in a high dynamic range image sensor includes a first photodiode, a plurality of photodiodes, a shared floating diffusion region, a first transfer gate, and a second transfer gate. The first photodiode is disposed in a semiconductor material. The first photodiode has a first light exposure area and a first doping concentration. The plurality of photodiodes is also disposed in the semiconductor material. Each photodiode in the plurality of photodiodes has the first light exposure area and the first doping concentration. The first transfer gate is coupled to transfer first image charge from the first photodiode to the shared floating diffusion region. The second transfer gate is coupled to transfer distributed image charge from each photodiode in the plurality of photodiodes to the shared floating diffusion region.
    Type: Application
    Filed: November 1, 2013
    Publication date: May 7, 2015
    Applicant: OmniVision Technologies, Inc.
    Inventors: Gang Chen, Duli Mao, Dajiang Yang, Zhibin Xiong, Dyson H. Tai
  • Patent number: 9024361
    Abstract: Provided is a solid-state imaging device including: a photodiode which converts an optical signal to signal charges; a transfer gate which transfers the signal charges from the photodiode; an impurity diffusion layer to which the signal charges are transferred by the transfer gate; and a MOS transistor of which a gate is connected to the impurity diffusion layer. The impurity diffusion layer has a first conduction type semiconductor layer and a second conduction type semiconductor layer which is formed in the first conduction type semiconductor layer and under an end portion of the transfer gate.
    Type: Grant
    Filed: July 19, 2010
    Date of Patent: May 5, 2015
    Assignee: Sony Corporation
    Inventors: Hiroyuki Ohri, Yasunori Sogoh
  • Patent number: 8994139
    Abstract: A lateral overflow drain and a channel stop are fabricated using a double mask process. Each lateral overflow drain is formed within a respective channel stop. Due to the use of two mask layers, one edge of each lateral overflow drain is aligned, or substantially aligned, with an edge of a respective channel stop.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: March 31, 2015
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Edmund K. Banghart, Eric G. Stevens, Hung Q. Doan
  • Publication number: 20150084098
    Abstract: A pixel circuit for a global shutter of a substrate-stacked image sensor may include a semiconductor chip including: a photodiode configured to output electric charges generated through a light sensing operation; and a reset node configured to receive a reset voltage from a reset voltage node and reset the photodiode. The semiconductor chip may have a structure in which the semiconductor chip is stacked over another semiconductor chip.
    Type: Application
    Filed: September 26, 2014
    Publication date: March 26, 2015
    Inventors: Jin Eun Choi, Jae Won Uhm, Seung Hoon Sa
  • Publication number: 20150048426
    Abstract: Provided is an image sensor including a source follower transistor. The source follower transistor may include a channel structure that is provided between a source and a drain, and includes a first semiconductor layer, a second semiconductor layer, and a blocking structure. The first semiconductor layer may be spaced apart from a gate insulating layer of the source follower transistor by a first depth or more. Carriers may move from the source of the source follower transistor to the drain thereof through the first semiconductor layer.
    Type: Application
    Filed: August 14, 2014
    Publication date: February 19, 2015
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Hirosige GOTO
  • Patent number: 8916912
    Abstract: A method used in fabrication of a recessed access device transistor gate has increased tolerance for mask misalignment. One embodiment of the invention comprises forming a vertical spacing layer over a semiconductor wafer, then etching the vertical spacing layer and the semiconductor wafer to form a recess in the wafer. A conductive transistor gate layer is then formed within the trench and over the vertical spacing layer. The transistor gate layer is etched, which exposes the vertical spacing layer. A spacer layer is formed over the etched conductive gate layer and over the vertical spacing layer, then the spacer layer and the vertical spacing layer are anisotropically etched. Subsequent to anisotropically etching the vertical spacing layer, a portion of the vertical spacing layer is interposed between the semiconductor wafer and the etched conductive transistor gate layer in a direction perpendicular to the plane of a major surface of the semiconductor wafer.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: December 23, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Werner Juengling
  • Publication number: 20140367552
    Abstract: An image sensor includes at least one pixel with a transfer gate that is controllable among at least three biasing conditions, including a first biasing condition in which electrons are transferable from a photodiode to a potential well under the transfer gate, a second biasing condition in which the electrons are confined in the potential well under the transfer gate, and a third biasing condition in which the electrons are transferable out of the potential well under the transfer gate. The pixel includes a p+ type doped barrier implant located at least partially under a portion of the transfer gate, and a pinned charge transfer barrier located on the opposite side of the transfer gate from the photodiode that includes a p+ type doped region and an n-type doped region. The image sensor can operate in a global shutter mode and/or a rolling shutter mode.
    Type: Application
    Filed: October 23, 2013
    Publication date: December 18, 2014
    Applicant: Alexander Krymski d.b.a. Alexima
    Inventors: Jaroslav HYNECEK, Alexander Krymski
  • Patent number: 8860099
    Abstract: A solid-state imaging device includes a first-conductivity-type semiconductor well region, a plurality of pixels each of which is formed on the semiconductor well region and is composed of a photoelectric conversion portion and a pixel transistor, an element isolation region provided between the pixels and in the pixels, and an element isolation region being free from an insulation film and being provided between desired pixel transistors.
    Type: Grant
    Filed: September 14, 2010
    Date of Patent: October 14, 2014
    Assignee: Sony Corporation
    Inventors: Keiji Tatani, Fumihiko Koga, Takashi Nagano
  • Patent number: 8860814
    Abstract: A solid-state image sensor according to the present invention includes a number of photosensitive cells 2b, 2c that are arranged in between the first surface 30a of a semiconductor layer 30 and its second surface 30b, which is opposite to the first surface 30a and which receives incoming light. As viewed from the photosensitive cells 2b, 2c, a reflecting portion 3a is arranged on the same side as the first surface 30a in order to reflect an infrared ray that has been transmitted through the photosensitive cell 2c and make it incident on one of the photosensitive cells 2b, 2c. As a result, the intensities of infrared rays to be converted photoelectrically by the photosensitive cells 2b, 2c will be different from each other. And by calculating the difference between the photoelectrically converted signals supplied from the photosensitive cells 2b, 2c, the infrared ray component received by each photosensitive cell can be obtained.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: October 14, 2014
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Masao Hiramoto, Yoshiaki Sugitani
  • Patent number: 8847286
    Abstract: An image sensor includes a substrate having opposite first and second sides, a multilayer structure on the first side of the substrate, and a photo-sensitive element on the second side of the substrate. The photo-sensitive element is configured to receive light that is incident upon the first side and transmitted through the multilayer structure and the substrate. The multilayer structure includes first and second light transmitting layers. The first light transmitting layer is sandwiched between the substrate and the second light transmitting layer. The first light transmitting layer has a refractive index that is from 60% to 90% of a refractive index of the substrate. The second light transmitting layer has a refractive index that is lower than the refractive index of the first light transmitting layer and is from 40% to 70% of the refractive index of the substrate.
    Type: Grant
    Filed: January 12, 2012
    Date of Patent: September 30, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shiu-Ko Jangjian, Kei-Wei Chen, Szu-An Wu, Ying-Lang Wang
  • Patent number: 8847285
    Abstract: In various embodiments, a charge-coupled device includes channel stops laterally spaced away from the channel by fully depleted regions.
    Type: Grant
    Filed: September 20, 2012
    Date of Patent: September 30, 2014
    Assignee: Semiconductor Components Industries, LLC
    Inventor: Christopher Parks
  • Patent number: 8835991
    Abstract: There is provided a solid-state image pickup device including a semiconductor substrate, and a plurality of pixel portions that are provided on the semiconductor substrate. Each of the pixel portions includes a photoelectric converting unit that generates a charge on the basis of incident light, a memory unit that accumulates the charge generated by the photoelectric converting unit, a light shielding portion that shields at least the memory unit from light, a digging portion that digs into the semiconductor substrate between the photoelectric converting unit and the memory unit and is formed of a light shielding material, and a transmitting unit that transmits the charge from the photoelectric converting unit to the memory unit, by forming a channel for transmission in the digging portion.
    Type: Grant
    Filed: June 26, 2013
    Date of Patent: September 16, 2014
    Assignee: Sony Corporation
    Inventor: Shinichi Arakawa
  • Publication number: 20140246707
    Abstract: An image sensor includes a substrate having adjacent pixel regions and respective photodiode regions therein, and a pixel separation portion including a trench extending into the substrate between the adjacent pixel regions. The trench includes a conductive common bias line therein and an insulating device isolation layer between the common bias line and surfaces of the trench. A conductive interconnection is coupled to the common bias line and is configured to provide a negative voltage thereto. Related fabrication methods are also discussed.
    Type: Application
    Filed: February 27, 2014
    Publication date: September 4, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Junemo Koo, Namgil Kim, Changrok Moon, Byungjun Park, Jongcheol Shin
  • Patent number: 8816462
    Abstract: An image sensor pixel includes a photodiode region having a first polarity doping type disposed in a semiconductor layer. A pinning surface layer having a second polarity doping type is disposed over the photodiode region in the semiconductor layer. The second polarity is opposite from the first polarity. A first polarity charge layer is disposed proximate to the pinning surface layer over the photodiode region. An contact etch stop layer is disposed over the photodiode region proximate to the first polarity charge layer. The first polarity charge layer is disposed between the pinning surface layer and the contact etch stop layer such that first polarity charge layer cancels out charge having a second polarity that is induced in the contact etch stop layer. A passivation layer is also disposed over the photodiode region between the pinning surface layer and the contact etch stop layer.
    Type: Grant
    Filed: October 25, 2012
    Date of Patent: August 26, 2014
    Assignee: OmniVision Technologies, Inc.
    Inventors: Howard E. Rhodes, Dajiang Yang, Gang Chen, Duli Mao, Vincent Venezia
  • Publication number: 20140231879
    Abstract: A pixel structure comprises an epitaxial layer (1) of a first conductivity type. A photo-sensitive element comprises a first region (4) of a second conductivity type and a second region (3) of the first conductivity type positioned between the epitaxial layer (1) and the first region (4). A charge storage node (ΓΈ2) is arranged to store charges acquired by the photo-sensitive element, or to form part of a charge storage element. A third region (2) of the second conductivity type is positioned between the charge storage node and the epitaxial layer. The pixel structure further comprises a charge-to-voltage conversion element (13) for converting charges from the charge storage node to a voltage signal and an output circuit (21, 22) for selectively outputting the voltage signal from the pixel structure.
    Type: Application
    Filed: February 13, 2014
    Publication date: August 21, 2014
    Applicant: CMOSIS BVBA
    Inventors: Guy Meynants, Koen Van Wichelen
  • Publication number: 20140231880
    Abstract: An imaging sensor of the charge transfer type that limits the transmission of radiation from high intensity light sources. The invention addresses potential saturation levels during exposure or stare time and so saturation is never achieved, this provides for a wider dynamic range.
    Type: Application
    Filed: September 24, 2012
    Publication date: August 21, 2014
    Inventor: Christopher David Burgess
  • Patent number: 8809921
    Abstract: A solid-state imaging apparatus includes a plurality of pixels each including a photoelectric conversion unit and pixel transistors, which are formed on a semiconductor substrate; a floating diffusion unit in the pixel; a first-conductivity-type ion implantation area for surface pinning, which is formed over the surface on the side of the photoelectric conversion unit and the surface of the semiconductor substrate; and a second-conductivity-type ion implantation area for forming an overflow path serving as an overflow path for the floating diffusion unit, the second-conductivity-type ion implantation area being formed below the entire area of the first-conductivity-type ion implantation area. An overflow barrier is formed using the second-conductivity-type ion implantation area. A charge storage area is formed using an area in which the second-conductivity-type semiconductor area and the second-conductivity-type ion implantation area superpose each other.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: August 19, 2014
    Assignee: Sony Corporation
    Inventors: Akihiro Yamada, Atsuhiko Yamamoto, Hideo Kido
  • Patent number: 8791512
    Abstract: An imaging device is formed in a semiconductor substrate. The device includes a matrix array of photosites. Each photosite is formed of a semiconductor region for storing charge, a semiconductor region for reading charge specific to said photosite, and a charge transfer circuit configured so as to permit a transfer of charge between the charge storage region and the charge reading region. Each photosite further includes at least one buried first electrode. At least one part of that buried first electrode bounds at least one part of the charge storage region. The charge transfer circuit for each photosite includes at least one second buried electrode.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: July 29, 2014
    Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SA
    Inventors: Francois Roy, Julien Michelot
  • Patent number: 8785834
    Abstract: There is provided a solid-state image sensor including a plurality of unit pixels each including a photoelectric transducer generating a charge corresponding to an amount of incident light and accumulating the charge therein, a first transfer gate transferring the charge accumulated in the photoelectric transducer, a charge holding region where the charge is held, a second transfer gate transferring the charge, a floating diffusion region where the charge is held to be read out as a signal, a charge discharging gate transferring the charge to a charge discharging part, and a structure including an overflow path formed in a boundary portion between the photoelectric transducer and the charge holding region.
    Type: Grant
    Filed: August 7, 2013
    Date of Patent: July 22, 2014
    Assignee: Sony Corporation
    Inventor: Yorito Sakano
  • Patent number: 8772844
    Abstract: Capacitance between a detection capacitor and a reset transistor is the largest among the capacitances between the detection capacitor and transistors placed around the detection capacitor. In order to reduce this capacitance, it is effective to reduce the channel width of the reset transistor. It is possible to reduce the effective channel width by distributing, in the vicinity of the channel of the reset transistor and the boundary line between an active region and an element isolation region, ions which enhance the generation of carriers of an opposite polarity to the channel.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: July 8, 2014
    Assignee: Wi Lan, Inc.
    Inventors: Motonari Katsuno, Ryouhei Miyagawa, Masayuki Matsunaga
  • Publication number: 20140138748
    Abstract: A CMOS multi-pinned pixel having very low dark current and very high charge transfer performance over that of conventional CMOS pixels is disclosed. The CMOS pixel includes epitaxial silicon and at least one transfer gate formed upon the epitaxial silicon. A pinned-photodiode is formed in the epitaxial silicon. A multi-pinned (MP) implant layer is implanted in the epitaxial silicon at least partially extending across the pinned-photodiode and substantially underlying the at least one transfer gate of the CMOS pixel to promote dark current passivation during an accumulation state and promote charge transfer during a transfer state.
    Type: Application
    Filed: November 4, 2013
    Publication date: May 22, 2014
    Applicant: SRI International
    Inventor: James Robert Janesick
  • Publication number: 20140077062
    Abstract: A back side illuminated image sensor may be provided with an array of image sensor pixels. Each image sensor pixel may include a substrate having a front surface and a back surface. The image sensor pixels may have a charge storage region formed at the back surface and a charge readout node formed at the front surface of the substrate. The image sensor pixels may receive image light at the back surface of the substrate. Photo-generated charge may be accumulated at the charge storage region during a charge integration cycle. Upon completion of the charge integration cycle, a transfer gate formed at the front surface may be pulsed high to move the charge from the charge storage region to the charge readout node. The charge may be converted to a voltage at the charge readout node and may be read out using a rolling shutter readout mode.
    Type: Application
    Filed: September 11, 2013
    Publication date: March 20, 2014
    Applicant: Aptina Imaging Corporation
    Inventor: Jaroslav Hynecek
  • Publication number: 20140001339
    Abstract: If separations between photoelectric conversion elements are different from each other, charge leaking into adjacent photoelectric conversion elements varies. A photoelectric conversion apparatus of the present invention includes a first semiconductor region that can be potential barriers against signal charge, between first and second photoelectric conversion elements. Further, the apparatus includes a second semiconductor region that has the same depth as the depth of the first semiconductor region and a width narrower than the width of the first semiconductor region and can be potential barriers against the signal charge, between the first and a third photoelectric conversion element. Moreover, the apparatus includes a third semiconductor region that can be potential barriers against the signal charge under the first semiconductor region and the second semiconductor region.
    Type: Application
    Filed: September 3, 2013
    Publication date: January 2, 2014
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Yu Arishima, Takashi Matsuda, Toru Koizumi
  • Publication number: 20130341684
    Abstract: A solid-state imaging device, including a semiconductor substrate; a photoelectric conversion region in the semiconductor substrate that generates charges in response to light incident thereon; an electric charge holding region in the semiconductor substrate and capable of holding electric charges accumulated in the photoelectric conversion region until the electric charges are read out from the electric charge holding region; a transfer gate that effects transfer of electric charges generated in the photoelectric conversion region to the electric charge holding region; a light blocking film over an upper surface of the transfer gate; and an insulating layer over the substrate and between the semiconductor substrate and the light blocking film, wherein, a portion of the insulating layer over the photoelectric conversion region is more thinly formed than the insulating layer not over the photoelectric conversion region.
    Type: Application
    Filed: August 21, 2013
    Publication date: December 26, 2013
    Applicant: Sony Corporation
    Inventors: Taketo Fukuro, Jun Okuno
  • Patent number: 8605187
    Abstract: A charge-coupled device (CCD) image sensor includes a layer of a semiconductor material having a first conductivity type. A horizontal CCD channel region of a second conductivity type is disposed in the layer of the semiconductor material. The horizontal CCD channel region includes multiple phases that are used to shift photo-generated charge through the horizontal CCD channel region. Distinct overflow drain regions are disposed in the layer of semiconducting material, with an overflow drain region electrically connected to only one particular phase of the horizontal CCD channel region. A buffer region of the second conductivity type can be used to electrically connect each overflow drain to the one particular phase of the horizontal CCD channel. Multiple barrier regions are disposed in the layer of semiconductor material, with each barrier region disposed between each overflow drain and the one particular phase electrically connected to the drain.
    Type: Grant
    Filed: June 1, 2009
    Date of Patent: December 10, 2013
    Assignee: Truesense Imaging, Inc.
    Inventors: Shen Wang, Eric J. Meisenzahl, David N. Nichols
  • Publication number: 20130313616
    Abstract: A solid-state imaging device includes: a plurality of substrates stacked via a wiring layer or an insulation layer; a light sensing section that is formed in a substrate, of the plurality of substrates, disposed on a light incident side and that generates a signal charge in accordance with an amount of received light; and a contact portion that is connected to a non-light incident-surface side of the substrate in which the light sensing section is formed and that supplies a desired voltage to the substrate from a wire in a wiring layer disposed on a non-light incident side of the substrate.
    Type: Application
    Filed: August 5, 2013
    Publication date: November 28, 2013
    Applicant: Sony Corporation
    Inventor: Takeshi Matsunuma
  • Patent number: 8536625
    Abstract: An electronic image sensor includes a semiconductor substrate having a first surface configured for accepting illumination to a pixel array disposed in the substrate. An electrically-doped channel region for each pixel is disposed at a second substrate surface opposite the first substrate surface. The channel regions are for collecting photogenerated charge in the substrate. An electrically-doped channel stop region is at the second substrate surface between each channel region. An electrically-doped shutter buried layer, disposed in the substrate at a depth from the second substrate surface that is greater than that of the pixel channel regions, extends across the pixel array. An electrically-doped photogenerated-charge-extinguishment layer, at the first substrate surface, extends across the pixel array.
    Type: Grant
    Filed: September 9, 2010
    Date of Patent: September 17, 2013
    Assignee: Massachusetts Institute of Technology
    Inventor: Barry E. Burke
  • Patent number: 8513710
    Abstract: In realizing an entire-screen simultaneous shutter function using a solid-state imaging device having a device structure as a CMOS solid-state imaging device, the restriction undergone by exposure time is relieved to secure a sufficient exposure time with swift operation. Separately from a transfer Tr for transferring a signal charge of a buried-type PD to an FD, a drain Tr is provided to exclude a signal charge of the buried PD. Both a channel potential on the drain transistor when turned on and a channel potential on the transfer transistor when turned on are set higher than a depleting potential for the PD. This makes it possible to completely transfer the signal charge of the PD by both the transfer Tr and the drain Tr. In the operation to sequentially read out a signal charge from the FD on a pixel-row basis, PD exposure operation is started in a course of reading out the same.
    Type: Grant
    Filed: October 14, 2003
    Date of Patent: August 20, 2013
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Patent number: 8471301
    Abstract: A device includes a plurality of photoelectric conversion regions, an interlayer insulating film arranged on the plurality of photoelectric conversion regions, a protective insulating film that is arranged in contact with the interlayer insulating film and has a refractive index different from that of the interlayer insulating film, recesses arranged in a light-receiving surface of each of the plurality of photoelectric conversion regions, and embedded regions embedded in the recesses. When a wavelength of incident light to each of the plurality of photoelectric conversion regions is denoted by ? and a refractive index of the embedded regions is denoted by n, a depth d of the recesses is represented by an expression d??/4n.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: June 25, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masanori Kudo, Yoshiyuki Hayashi, Kazuhiro Saito, Taro Kato, Yoshihiko Fukumoto
  • Patent number: 8466498
    Abstract: In a solid state imaging device with an electron multiplying function, in a section normal to an electron transfer direction of a multiplication register EM, an insulating layer 2 is thicker at both side portions than in a central region. A pair of overflow drains 1N is formed at a boundary between a central region and both side portions of an N-type semiconductor region 1C. Each overflow drain 1N extends along the electron transfer direction of the multiplication register EM. Overflow gate electrodes G extend from the thin portion to the thick portion of the insulating layer 2. The overflow gate electrodes G are disposed between both ends of each transfer electrode 8 in a longitudinal direction and the insulating layer 2, and they also function as shield electrodes for each electrode 8 (8A and 8B).
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: June 18, 2013
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Hisanori Suzuki, Yasuhito Yoneta, Shin-ichiro Takagi, Kentaro Maeta, Masaharu Muramatsu
  • Patent number: 8426896
    Abstract: A solid state imaging device in which ? characteristic is obtained and enlargement of dynamic range is provided. The solid state imaging device of the present invention includes a vertical overflow function and has a feature in which potential of a semiconductor substrate is changed from a high potential to a low potential in a stepwise manner during a period from an exposure start to an exposure end.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: April 23, 2013
    Assignee: Sony Corporation
    Inventor: Tetsuro Kumesawa
  • Patent number: 8415604
    Abstract: A solid-state imaging device 1 is provided with a plurality of photoelectric converting portions 3, a plurality of first transferring portions 5, a plurality of charge accumulating portions 7, a plurality of second transferring portions 9, and a shift register 11. Each photoelectric converting portion 3 has a photosensitive region 13 which has a planar shape of a nearly rectangular shape composed of two long sides and two short sides, and a potential gradient forming region 15 which forms a potential gradient increasing along a first direction directed from one short side to the other short side forming the planar shape of the photosensitive region 13. Bach first transferring portion 5 is arranged on the side of the other short side forming the planar shape of the corresponding photosensitive region 13 and transfers a charge acquired from the corresponding photosensitive region 13, in the first direction.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: April 9, 2013
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Hisanori Suzuki, Yasuhito Yoneta, Shinya Otsuka, Masaharu Muramatsu
  • Patent number: 8395194
    Abstract: A solid-state imaging device according to the present invention is of a MOS type and includes a plurality of pixels arranged in rows and columns, and includes: a semiconductor substrate; a photodiode which is formed in the semiconductor substrate and converts, into a signal charge, light that is incident from a first main surface of the semiconductor substrate; a transfer transistor which is formed in a second main surface of the semiconductor substrate and transfers the signal charge converted by the photodiode; a light shielding film which is conductive and formed on a boundary between the pixels, above the first main surface of the semiconductor substrate; an overflow drain region electrically connected to the light shielding film and formed in the first main surface of the semiconductor substrate; and an overflow barrier region formed between the overflow drain region and the photodiode.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: March 12, 2013
    Assignee: Panasonic Corporation
    Inventors: Haruhisa Yokoyama, Hiroshi Sakoh, Kazuhiro Yamashita, Mitsuo Yasuhira, Yuichi Hirofuji
  • Patent number: 8390714
    Abstract: When making a potential of a floating node 0V at the time of nonselection, electrons leak from the floating node to a photodiode and noise is generated. A MOS type solid-state imaging device comprised of unit pixels 10, each having a photodiode 11, a transfer transistor 12 for transferring a signal of this photodiode 11 to a floating node N11, an amplifier transistor 13 for outputting a signal of the floating node N11 to a vertical signal line 22, and a reset transistor 14 for resetting the floating node N11, arranged in a matrix, wherein, as a buffer final stage 29 for driving a drain line 23, a buffer final stage having an inverter configuration formed by arranging a P-type MOS transistor on a ground side is used, thereby making the potential of the floating node N11 for example 0.5V at the time of nonselection and preventing electrons from leaking to the photodiode 11 through the transfer transistor 12.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: March 5, 2013
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Patent number: 8294802
    Abstract: A charge-coupled device (CCD) image sensor includes a layer of a semiconductor material having a first conductivity type. A horizontal CCD channel region of a second conductivity type is disposed in the layer of the semiconductor material. The horizontal CCD channel region includes multiple phases that are used to shift photo-generated charge through the horizontal CCD channel region. Distinct overflow drain regions are disposed in the layer of semiconducting material, with an overflow drain region electrically connected to only one particular phase of the horizontal CCD channel region.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: October 23, 2012
    Assignee: Truesense Imaging, Inc.
    Inventors: Shen Wang, Xueyuan Liu
  • Patent number: 8227844
    Abstract: A CMOS active pixel sensor (APS) cell structure includes at least one transfer gate device and method of operation. A first transfer gate device comprises a diodic or split transfer gate conductor structure having a first doped region of first conductivity type material and a second doped region of a second conductivity type material. A photosensing device is formed adjacent the first doped region for collecting charge carriers in response to light incident thereto, and, a diffusion region of a second conductivity type material is formed at or below the substrate surface adjacent the second doped region of the transfer gate device for receiving charges transferred from the photosensing device while preventing spillback of charges to the photosensing device upon timed voltage bias to the diodic or split transfer gate conductor structure.
    Type: Grant
    Filed: January 14, 2008
    Date of Patent: July 24, 2012
    Assignee: International Business Machines Corporation
    Inventors: James W. Adkisson, Andres Bryant, John J. Ellis-Monaghan
  • Publication number: 20120037960
    Abstract: A solid-state imaging device according to the present invention is of a MOS type and includes a plurality of pixels arranged in rows and columns, and includes: a semiconductor substrate; a photodiode which is formed in the semiconductor substrate and converts, into a signal charge, light that is incident from a first main surface of the semiconductor substrate; a transfer transistor which is formed in a second main surface of the semiconductor substrate and transfers the signal charge converted by the photodiode; a light shielding film which is conductive and formed on a boundary between the pixels, above the first main surface of the semiconductor substrate; an overflow drain region electrically connected to the light shielding film and formed in the first main surface of the semiconductor substrate; and an overflow barrier region formed between the overflow drain region and the photodiode.
    Type: Application
    Filed: September 21, 2011
    Publication date: February 16, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Haruhisa YOKOYAMA, Hiroshi SAKOH, Kazuhiro YAMASHITA, Mitsuo YASUHIRA, Yuichi HIROFUJI
  • Patent number: 8115236
    Abstract: A solid state imaging device in which ? characteristic is obtained and enlargement of dynamic range is provided. The solid state imaging device includes a vertical overflow function and has a feature in which potential of a semiconductor substrate is changed from a high potential to a low potential in a stepwise manner during a period from an exposure start to an exposure end.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: February 14, 2012
    Assignee: Sony Corporation
    Inventor: Tetsuro Kumesawa