Having Alternating Strips Of Sensor Structures And Register Structures (e.g., Interline Imager) Patents (Class 257/232)
  • Patent number: 10943856
    Abstract: Described examples include a system in package (SIP) device, including: a first leadframe having a first surface and a second surface opposite the first surface; an integrated circuit die including solder bumps on a first surface and having a second opposite surface, the solder bumps mounted to the second surface of the first leadframe; a second leadframe having a first surface including a die pad portion, and a second opposite surface, the die pad portion attached to the second surface of the integrated circuit die; and an inductor mounted to the first surface of the first leadframe, the inductor having terminals with exterior portions electrically connected and mechanically connected to the first surface of the first leadframe, the inductor terminals spaced from one another by a portion of an inductor body, the portion of the inductor body between the inductor terminals spaced from the first surface of the first leadframe by a gap of at least 100 ?ms.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: March 9, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Yien Sien Khoo, Siew Kee Lee
  • Patent number: 10916575
    Abstract: An image sensor and a method of manufacturing the image sensor are provided. The image sensor includes a block layer including an absorption layer and a transparent layer that are alternately stacked, a lens element is located below the block layer, and a sensing element is located to face the lens element.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: February 9, 2021
    Assignees: Samsung Electronics Co., Ltd., Korea Advanced Institute of Science and Technology
    Inventors: Yang Ho Cho, Ki-Hun Jeong, Dong Kyung Nam, Kisoo Kim, Kyung-Won Jang
  • Patent number: 10908283
    Abstract: A sensor and a portable terminal comprising the same, according to an embodiment, comprise: a substrate; a light-emitting unit and a light-receiving unit, which are arranged on the substrate at a distance from each other; a cover unit arranged on the light-emitting unit and the light-receiving unit so as to face the substrate; a first optical guide lens unit arranged between the cover unit and the light-emitting unit so as to refract light, which has been emitted from the light-emitting unit and to transfer the same to the outside of the cover unit; and a second optical guide lens unit arranged between the cover unit and the light-receiving unit so as to transfer light from the outside of the cover unit to the light-receiving unit. In connection with a proximity/illuminance sensor, the sensing range related to a spaced object is expanded, thereby improving the sensing performance.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: February 2, 2021
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Yeo Chan Yoon, Ji Hyouk Chung
  • Patent number: 10897571
    Abstract: An image capturing apparatus includes an image sensor, a determination unit configured to determine whether or not a predetermined condition is satisfied, and a control unit configured to acquire foreign substance information from an image obtained by causing the image sensor to perform image capture, wherein if the determination unit determines that the predetermined condition is not satisfied, the control unit acquires the foreign substance information from the image, and if the determination unit determines that the predetermined condition is satisfied, the control unit does not acquire the foreign substance information from the image, and the predetermined condition includes at least one of the following: that a mounted lens unit is a lens unit with a narrow image circle, and that a mode in which only a partial region of the image sensor is recorded has been set.
    Type: Grant
    Filed: June 26, 2019
    Date of Patent: January 19, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Hidetaka Uemura
  • Patent number: 10818722
    Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: October 27, 2020
    Assignee: Sony Corporation
    Inventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
  • Patent number: 10742917
    Abstract: A pixel sensor element (200) including a photodetector (201) and a storage assembly having N storage arrays (205), each having an input shift register (207) and an output shift register (215) each with a number M of storage cells arranged in a column, and a storage shift register (211) with a number M of rows of storage cells, each row comprising a number P of storage cells, for signal transfer from the input shift register (207) to the output shift register (215). A number N of independently driveable signal transfer regions (203) transfer the signal from the photodetector (201) to a first cell (210) of one of a respective one of the input shift registers (207). A number N of signal read-out regions (219) read the signal from a last cell (217) of a respective one of the output shift registers (215). N is 2 or more. M is 1 or more. P is 1 or more. Image sensors, imaging devices, storage assemblies, and methods are also provided.
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: August 11, 2020
    Assignee: SPECIALISED IMAGING LIMITED
    Inventors: Keith Roger Taylor, Renato Turchetta
  • Patent number: 10714412
    Abstract: A semiconductor package includes a leadframe comprising input/output pins accessible external to the semiconductor package and a semiconductor die electrically connected to the leadframe. The semiconductor package also includes a passive electrical component mounted on a side of the semiconductor die opposite the leadframe. Mold compound encapsulates the passive electrical component, semiconductor die, and leadframe to form the semiconductor package. Associated methods are disclosed as well.
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: July 14, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Joyce Marie Mullenix, Roberto Giampiero Massolini, Rajeev D. Joshi
  • Patent number: 10700221
    Abstract: An apparatus and a method for producing the apparatus are described, wherein the apparatus includes a substrate with a photodetector and a dielectric arranged on the substrate. Further, the apparatus includes a microlens arranged on a first side of the dielectric. The microlens is configured to steer incident radiation onto the photodetector. Moreover, the apparatus includes a carrier-free optical interference filter. The microlens is arranged between the photodetector and the interference filter, and the interference filter has a plane surface on a side facing away from the photodetector.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: June 30, 2020
    Assignee: Infineon Technologies Dresden GmbH & Co. KG
    Inventors: Ines Uhlig, Anjo Kirschner, Dirk Offenberg, Beatrice Poetschick, Bjoern Sausner, Thomas Schmitz-Huebsch, Mirko Vogt
  • Patent number: 10580814
    Abstract: The present technology relates to a solid-state imaging device that can further reduce the influence the film stress generated in an upper electrode has on a photoelectric conversion film, a method of manufacturing the solid-state imaging device, and an electronic apparatus. A solid-state imaging device includes: a photoelectric conversion film formed on the upper side of a semiconductor substrate; and two or more light shielding films formed at positions higher than the photoelectric conversion film with respect to the semiconductor substrate. The present technology can be applied to solid-state imaging devices, electronic apparatuses, and the like, for example.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: March 3, 2020
    Assignee: SONY CORPORATION
    Inventor: Kenichi Murata
  • Patent number: 10461117
    Abstract: A method for manufacturing a semiconductor structure includes the following steps. A first carrier is adhered to a first surface of a wafer by a first temporary bonding layer. A second surface of the wafer facing away from the first carrier is etched to form at least one through hole and at least one trench, in which a conductive pad of the wafer is exposed through the through hole. An isolation layer is formed on the second surface of the wafer, a sidewall of the through hole, and a sidewall of the trench. A second carrier is adhered to the second surface of the wafer by a second temporary bonding layer, and thus the through hole and the trench are covered by the second carrier. The first carrier and the first temporary bonding layer are removed.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: October 29, 2019
    Assignee: XINTEC INC.
    Inventors: Yen-Shih Ho, Tsang-Yu Liu, Chia-Sheng Lin, Chaung-Lin Lai
  • Patent number: 10436634
    Abstract: The exemplary embodiment of the present disclosure relates to a photo detecting sensor including a photo detector configured to detect an optical signal incident on an active detecting area for optical detection, an optical part arranged at a front side of the photo detector to pass the optical signal, and a micro lens array interposed between the optical part and the photo detector to concentrate the optical signal having passed the optical part to within the active detecting area of the photo detector.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: October 8, 2019
    Assignee: LG ELECTRONICS INC.
    Inventors: Bo Lam Kim, Sang Keun Lee
  • Patent number: 10422859
    Abstract: In a distance measuring device, a drive controller generates an emission timing signal and an exposure timing signal in accordance with a measurement condition. A light source irradiates light in response to the emission timing signal. A solid-state image sensor has a group of pixels arranged in a matrix pattern and divided into a plurality of regions on a line-by-line basis, and performs an exposure process on a selected one of the regions in response to the exposure timing signal. An imaging signal processor obtains distance information by performing an arithmetic operation on a signal output from the solid-state image sensor. The drive controller generates mutually different measurement conditions to the plurality of the regions of the solid-state image sensor.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: September 24, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO, LTD.
    Inventors: Makoto Kawamura, Tomohito Nagata, Haruka Takano, Mitsuhiko Otani
  • Patent number: 10382707
    Abstract: According to an aspect of the present invention, there is provided an imaging device including: a plurality of pixels, each pixel including a photoelectric conversion unit that photoelectrically converts received light, a read node in which a signal charge generated in the photoelectric conversion unit is accumulated, and a first readout circuit that performs analog-to-digital conversion to convert a signal based on the signal charge accumulated in the read node into a digital signal; and a second readout circuit that reads a signal based on the signal charge, the signal having a smaller amplitude than a resolution of the analog-to-digital conversion of the first readout circuit.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: August 13, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hirofumi Totsuka, Katsuhito Sakurai
  • Patent number: 10326029
    Abstract: First and second semiconductor light receiving elements each include: a first P-type semiconductor region which is formed in an N-type semiconductor substrate; a first N-type semiconductor layer region which is formed in the first P-type semiconductor region; a P-type semiconductor region having a high concentration which is formed in the first P-type semiconductor region; and an N-type semiconductor region having a high concentration which is formed in the first N-type semiconductor layer region. On the semiconductor substrate, insulating oxide films are formed. On the first and the second semiconductor light receiving elements, insulating oxide films that have different thicknesses are formed.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: June 18, 2019
    Assignee: ABLIC INC.
    Inventor: Takeshi Koyama
  • Patent number: 10312381
    Abstract: A stacked III-V semiconductor diode that has an n+ layer having a dopant concentration of at least 1019 N/cm3, an n? layer having a dopant concentration of 1012 N/cm3 to 1016 N/cm3, a layer thickness of 10 ?m to 300 ?m, a p+ layer having a dopant concentration of 5·1018 N/cm3 to 5·1020 cm3 and a layer thickness greater than 2 ?m, the layers following each other in the specified order, each including a GaAs compound or being made from a GaAs compound and having a monolithic design, the n+ layer or the p+ layer being a substrate, and a lower side of the n? layer being integrally connected to an upper side of the n+ layer. The stacked III-V semiconductor diode including a first defect layer having a layer thickness greater than 0.5 ?m, the defect layer being situated within the n? layer.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: June 4, 2019
    Assignee: 3-5 Power Electronics GmbH
    Inventor: Volker Dudek
  • Patent number: 10276620
    Abstract: Embodiments of the disclosure provide an image sensor device. The image sensor device includes a semiconductor substrate including a front surface, a back surface opposite to the front surface, a light-sensing region close to the front surface, and a trench adjacent to the light-sensing region. The image sensor device includes a light-blocking structure positioned in the trench to absorb or reflect incident light.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: April 30, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Volume Chien, Yun-Wei Cheng, Zhe-Ju Liu, Kuo-Cheng Lee, Chi-Cherng Jeng, Chuan-Pu Liu
  • Patent number: 10269845
    Abstract: A method for forming an image sensor device is provided. The method includes forming a photodetector in a semiconductor substrate and forming a shielding layer over the semiconductor substrate. The method also includes forming a dielectric layer over the shielding layer and partially removing the dielectric layer to form a recess. The method further includes partially removing the shielding layer through the recess. In addition, the method includes forming a filter in the recess after the shielding layer is partially removed.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: April 23, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Volume Chien, Yun-Wei Cheng, Shiu-Ko Jangjian, Zhe-Ju Liu, Kuo-Cheng Lee, Chi-Cherng Jeng
  • Patent number: 10270993
    Abstract: A solid-state imaging device includes a first chip including a plurality of pixels, each pixel including a light sensing unit generating a signal charge responsive to an amount of received light, and a plurality of MOS transistors reading the signal charge generated by the light sensing unit and outputting the read signal charge as a pixel signal, a second chip including a plurality of pixel drive circuits supplying desired drive pulses to pixels, the second chip being laminated beneath the first chip in a manner such that the pixel drive circuits are arranged beneath the pixels formed in the first chip to drive the pixels, and a connection unit for electrically connecting the pixels to the pixel drive circuits arranged beneath the pixels.
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: April 23, 2019
    Assignee: Sony Corporation
    Inventors: Katsumi Honda, Takafumi Takatsuka
  • Patent number: 10204948
    Abstract: A solid-state imaging device includes: multiple micro lenses, which are disposed in each of a first direction and a second direction orthogonal to the first direction, focus the incident light into the light-receiving surface; with the multiple micro lenses of which the planar shape is a shape including a portion divided by a side extending in the first direction and a side extending in the second direction being disposed arrayed mutually adjacent to each of the first direction and the second direction; and with the multiple micro lenses being formed so that the depth of a groove between micro lenses arrayed in a third direction is deeper than the depth of a groove between micro lenses arrayed in the first direction, and also the curvature of the lens surface in the third direction is higher than the curvature of the lens surface in the first direction.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: February 12, 2019
    Assignee: SONY CORPORATION
    Inventors: Akiko Ogino, Yoichi Otsuka
  • Patent number: 10008458
    Abstract: The present technology relates to a semiconductor device and a method of manufacturing the semiconductor device capable of realizing impedance control of the semiconductor device. An input/output wiring line 23 and a ground wiring line 22 are such that through glass vias are provided so as to form a strip line structure by blasting or electric discharge machining and thereafter metal films are formed on a surface and a rear surface. It is possible to configure the semiconductor device with the impedance control by adjusting a conductor diameter of the input/output wiring line 23 and an insulating layer thickness between the input/output wiring line 23 and the ground wiring line 22. The present technology may be applied to the semiconductor device.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: June 26, 2018
    Assignee: SONY CORPORATION
    Inventor: Kosuke Hareyama
  • Patent number: 9967472
    Abstract: Various technologies described herein pertain to combining high dynamic range techniques to enable rendering higher dynamic range scenes with an image sensor. The image sensor can implement a combination of spatial exposure multiplexing and temporal exposure multiplexing, for example. By way of another example, the image sensor can implement a combination of spatial exposure multiplexing and dual gain operation. Pursuant to another example, the image sensor can implement a combination of temporal exposure multiplexing and dual gain operation. In accordance with yet another example, the image sensor can implement a combination of spatial exposure multiplexing, temporal exposure multiplexing, and dual gain operation. The image sensor can be formed on a single wafer or the image sensor can be a 3D-IC image sensor that includes at least two vertically integrated layers.
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: May 8, 2018
    Assignee: JVC KENWOOD CORPORATION
    Inventors: Ilya Koshkin, Lester Joseph Kozlowski, Anders Kongstad Petersen, Jeffrey Alan McKee
  • Patent number: 9913568
    Abstract: First RGB image signals are subjected to an input process. First color information is obtained from the first RGB image signals. Second color information is obtained by a selective expansion processing in which color ranges except a first color range are moved in a feature space formed by the first color information, the first color information that represents each object in a body cavity being distributed in the each color range. The second color information is converted to second RGB signals. A red display signal, a green display signal and a blue display signal are obtained by applying a pseudo-color display process to the second RGB signals.
    Type: Grant
    Filed: July 21, 2016
    Date of Patent: March 13, 2018
    Assignee: FUJIFILM Corporation
    Inventor: Masayuki Kuramoto
  • Patent number: 9852531
    Abstract: A method for controlling an electronic apparatus includes determining representative colors of pixels of a received image frame; calculating input dynamic ranges for respective representative colors based on brightness information of the received image frame; expanding a dynamic range for the representative colors based on at least one of the brightness information of the received image frame and display characteristics of the electronic apparatus; and outputting an image frame having adjusted brightness based on the expanded dynamic range.
    Type: Grant
    Filed: June 2, 2015
    Date of Patent: December 26, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Byung-seok Min, Il-soon Lim, Seung-ho Park, Seul-ki Jang, Jong-ho Kim
  • Patent number: 9748296
    Abstract: A solid-state imaging device, method for producing solid-state imaging device and electronic apparatus are provided. The solid-state imaging device includes a substrate, with a plurality of pixels formed in the substrate. In addition, a plurality of groups are formed in the substrate, and in particular in pixel isolation regions between adjacent pixels. The grooves extend from a first surface of the substrate towards a second surface of the substrate. An embedded film extends into the grooves. At least some of the grooves include a first stage near the first surface of the substrate and a second stage near the second surface of the substrate that are defined by walls of the grooves, wherein the first stage is wider than the second stage, and wherein a step is present between the first and second stages. In addition, the device includes a light shielding film adjacent the first surface of the substrate that overlies the grooves.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: August 29, 2017
    Assignee: Sony Corporation
    Inventors: Takayuki Enomoto, Yoshiki Ebiko
  • Patent number: 9576925
    Abstract: A semiconductor device includes a first conductive portion, a second conductive portion, a first layer, and a second layer. The first conductive portion includes a first end portion and a first extending portion. The first extending portion extends in a first direction. The length of the first extending portion in a second direction is shorter than a length of at least a part of the first end portion in the second direction. The first layer includes multiple semiconductor chips, multiple passive chip components, and a resin. The first extending portion includes a first portion and a second portion. The first layer is provided around the first portion. The first layer expands along a first plane. The first plane intersects the first direction. The second layer includes a first multilayer wiring. The second layer expands along a second plane intersecting the first direction.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: February 21, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuto Managaki, Hiroshi Yamada
  • Patent number: 9576999
    Abstract: BSI image sensors and methods. In an embodiment, a substrate is provided having a sensor array and a periphery region and having a front side and a back side surface; a bottom anti-reflective coating (BARC) is formed over the back side to a first thickness, over the sensor array region and the periphery region; forming a first dielectric layer over the BARC; a metal shield is formed; selectively removing the metal shield from over the sensor array region; selectively removing the first dielectric layer from over the sensor array region, wherein a portion of the first thickness of the BARC is also removed and a remainder of the first thickness of the BARC remains during the process of selectively removing the first dielectric layer; forming a second dielectric layer over the remainder of the BARC and over the metal shield; and forming a passivation layer over the second dielectric layer.
    Type: Grant
    Filed: April 4, 2016
    Date of Patent: February 21, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Chieh Chuang, Dun-Nian Yaung, Jen-Cheng Liu, Wen-De Wang, Keng-Yu Chou, Shuang-Ji Tsai, Min-Feng Kao
  • Patent number: 9538902
    Abstract: A first signal ratio (?log(B/G)) between a B image signal and a G image signal is calculated. A second signal ratio (?log(G/R)) between the G image signal and an R image signal is calculated. A difference between first and second signal ratios in a first area and first and second signal ratios in a specific area is increased to enhance a color difference between normal mucosa and an abnormal region (an atrophic mucosal region and a deep blood vessel region). The color difference between the normal mucosa and the abnormal region in a case where at least one of the RGB image signals is a narrowband image signal is greater than the color difference in a case where all of the RGB image signals are broadband image signals.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: January 10, 2017
    Assignee: FUJIFILM Corporation
    Inventor: Minkyung Chun
  • Patent number: 9484290
    Abstract: A composite substrate made of a conductive pattern structure mounted on a lead frame is used for an electronic system package. High heat generated electronic components are adapted to mount on the lead frame and relatively low heat generated electronic components are adapted to mount on the conductive pattern structure. Metal lines are used for electrical coupling between the circuitry of the IC chip and the conductive pattern structure. An electronic system with the composite substrate gains both advantages—good circuitry arrangement capability from the conductive pattern structure and good heat distribution from the lead frame.
    Type: Grant
    Filed: August 18, 2013
    Date of Patent: November 1, 2016
    Assignee: CYNTEC Co, Ltd.
    Inventors: Han-Hsiang Lee, Jeng-Jen Li, Kun-Hong Shih
  • Patent number: 9418362
    Abstract: The present disclosure is directed to a system and method for amplifying Radio Frequency (RF) signals. In some implementations, a system includes a first interface, a second interface, secure memory, a user-interface module, a processing module, and am amplification module. The first interface connects to a microSD slot of a mobile host device. The second interface includes an internal antenna for wirelessly communicating with retail terminals. The secure memory stores user credentials and a payment application used to execute financial transactions with the retail terminals. The processing module executes the payment application using the user credentials in response to at least a transaction request received by the RF module and transmits at least one transaction response to the retail terminal based, at least in part, on the executed payment application. The amplification module connected to a lead of the antenna and is configured to amplify at least received RF signals.
    Type: Grant
    Filed: November 10, 2014
    Date of Patent: August 16, 2016
    Assignee: DeviceFidelity, Inc.
    Inventors: Deepak Jain, Tuan Quoc Dao
  • Patent number: 9418942
    Abstract: In one embodiment, a semiconductor package includes a first semiconductor die having a first surface facing upwardly to expose a bond pad, a second semiconductor die having a first surface facing downwardly to expose a bond pad and disposed to be offset with the first surface of the first semiconductor die, and an encapsulant encapsulating the first semiconductor die and the second semiconductor die together. Throughholes are disposed in the encapsulant adjacent the bond pad of the first semiconductor die and adjacent the bond pad of the second semiconductor die.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: August 16, 2016
    Assignee: Amkor Technology, Inc.
    Inventors: Ji Young Chung, Yoon Joo Kim, Do Hyun Na
  • Patent number: 9355992
    Abstract: A semiconductor device package includes a land grid array package. At least one semiconductor die is mounted to an interposer substrate, with bond pads of the semiconductor die connected to terminal pads on the same side of the interposer substrate as the at least one semiconductor die. Terminal pads of the interposer substrate may be electrically connected to either or both of a peripheral array pattern of lands and to a central, two-dimensional array pattern of pads, both array patterns located on the opposing side of the interposer substrate from the at least one semiconductor die. Additional components, active, passive or both, may be connected to pads of the two-dimensional array to provide a system-in-a-package. Lead fingers of a lead frame may be superimposed on the opposing side of the interposer substrate, bonded directly to the land grid array land and wire bonded to pads as desired for repair or to ease routing problems on the interposer.
    Type: Grant
    Filed: August 4, 2014
    Date of Patent: May 31, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Lee Choon Kuan, David J. Corisis, Chin Hui Chong
  • Patent number: 9349711
    Abstract: A method of making a semiconductor device with face-to-face chips on interposer includes the step of attaching a chip-on-interposer subassembly on a heat spreader with the chip inserted into a cavity of the heat spreader so that the heat spreader provides mechanical support for the interposer. The heat spreader also provides thermal dissipation, electromagnetic shielding and moisture barrier for the enclosed chip. In the method, a second chip is also electrically coupled to a second surface of the interposer and an optional second heat spreader is attached to the second chip.
    Type: Grant
    Filed: April 17, 2015
    Date of Patent: May 24, 2016
    Assignee: BRIDGE SEMICONDUCTOR CORPORATION
    Inventors: Charles W. C. Lin, Chia-Chung Wang
  • Patent number: 9324688
    Abstract: An embedded package includes a first semiconductor chip embedded in a package substrate, a second semiconductor chip disposed over a first surface of the package substrate, and a group of external connection joints disposed on the first surface of the package substrate and between a sidewall of the second semiconductor chip and an edge of the embedded package. Related memory cards and related electronic systems are also provided.
    Type: Grant
    Filed: May 8, 2014
    Date of Patent: April 26, 2016
    Assignee: SK HYNIX INC.
    Inventors: Ki Jun Sung, Seung Jee Kim, Jong Hyun Nam, Sang Yong Lee, Young Geun Yoo
  • Patent number: 9320183
    Abstract: An apparatus for grounding a chip may be provided. The apparatus may comprise a ground lid, a ground trace, a first substance, and a second substance. The first substance may be configured adhere the ground lid to the ground trace. The second substance may be configured to provide electrical conduction between the ground lid and the ground trace.
    Type: Grant
    Filed: October 12, 2013
    Date of Patent: April 19, 2016
    Assignee: Cisco Technology, Inc.
    Inventor: Mohan R. Nagar
  • Patent number: 9117718
    Abstract: A solid-state image sensor includes a plurality of pixels for focus detection by a phase difference detection scheme. The pixel includes a semiconductor region provided therein with a plurality of photoelectric converters configured so that signals therefrom are independently read out, a microlens, and a lens surface arranged between the microlens and the semiconductor region, wherein the lens surface exerts a negative power on light which passes through the microlens toward the semiconductor region.
    Type: Grant
    Filed: January 19, 2012
    Date of Patent: August 25, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuki Ohshitanai, Yuichiro Yamashita
  • Patent number: 9082686
    Abstract: A semiconductor package includes a first substrate, a plurality of memory chips horizontally disposed on the first substrate, and having one surfaces which face the first substrate, other surfaces which face away from the one surfaces, and first bumps formed on the other surfaces, a second substrate disposed on the plurality of memory chips and electrically connected, a sub-substrate horizontally disposed on the first substrate together with the plurality of memory chips and electrically connecting the first substrate and the second substrate, and a driving chip having second bumps on one surface thereof and mounted to the second substrate such that the second bumps are electrically connected with the second substrate.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: July 14, 2015
    Assignee: SK Hynix Inc.
    Inventors: Sang Eun Lee, Sung Soo Ryu, Chang Il Kim, Seon Kwang Jeon
  • Patent number: 8952427
    Abstract: A range image sensor capable of improving its aperture ratio and yielding a range image with a favorable S/N ratio is provided. A range image sensor RS has an imaging region constituted by a plurality of one-dimensionally arranged units on a semiconductor substrate 1 and yields a range image according to a charge amount issued from the units.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: February 10, 2015
    Assignee: Hamamatsu Photonics K.K
    Inventors: Takashi Suzuki, Mitsuhito Mase
  • Patent number: 8946784
    Abstract: A backside illuminated image sensor having a photodiode and a first transistor in a sensor region and located in a first substrate, with the first transistor electrically coupled to the photodiode. The image sensor has logic circuits formed in a second substrate. The second substrate is stacked on the first substrate and the logic circuits are coupled to the first transistor through bonding pads, the bonding pads disposed outside of the sensor region.
    Type: Grant
    Filed: February 18, 2013
    Date of Patent: February 3, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Szu-Ying Chen, Meng-Hsun Wan, Dun-Nian Yaung, Pao-Tung Chen, Jen-Cheng Liu
  • Patent number: 8883524
    Abstract: Methods and apparatus for a sensor are disclosed. An oxide layer is formed on a substrate, followed by a spacer layer and a buffer layer. A photoresist layer is formed on the buffer layer over a pixel region, with an opening exposing a first part of the buffer layer. A first etching is performed to remove the first part of the buffer layer to expose a first part of the spacer layer. A second etching is performed to remove the first part of the spacer layer, the remaining buffer layer, and partially remove a second part of the spacer layer so that the result spacer layer will have an end with a shape substantially similar to a triangle, a height of the end is in a substantially same range as a length of the end.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: November 11, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Tsung Kuo, Jiech-Fun Lu, Yeur-Luen Tu, Chia-Shiung Tsai
  • Patent number: 8878255
    Abstract: In various embodiments, image sensors incorporate multiple output structures by including multiple sub-arrays, at least one of which includes a region of active pixels, a dark pixel region that is fanned and/or slanted, a dark pixel region that is unfanned and unslanted, a horizontal CCD, and an output structure for conversion of charge to voltage.
    Type: Grant
    Filed: January 7, 2013
    Date of Patent: November 4, 2014
    Assignee: Semiconductor Components Industries, LLC
    Inventor: Shen Wang
  • Patent number: 8878256
    Abstract: In various embodiments, image sensors incorporate multiple output structures by including multiple sub-arrays, at least one of which includes a region of active pixels, a dark pixel region that is fanned and/or slanted, a dark pixel region that is unfanned and unslanted, a horizontal CCD, and an output structure for conversion of charge to voltage.
    Type: Grant
    Filed: January 7, 2013
    Date of Patent: November 4, 2014
    Assignee: Semiconductor Components Industries, LLC
    Inventor: Shen Wang
  • Patent number: 8860814
    Abstract: A solid-state image sensor according to the present invention includes a number of photosensitive cells 2b, 2c that are arranged in between the first surface 30a of a semiconductor layer 30 and its second surface 30b, which is opposite to the first surface 30a and which receives incoming light. As viewed from the photosensitive cells 2b, 2c, a reflecting portion 3a is arranged on the same side as the first surface 30a in order to reflect an infrared ray that has been transmitted through the photosensitive cell 2c and make it incident on one of the photosensitive cells 2b, 2c. As a result, the intensities of infrared rays to be converted photoelectrically by the photosensitive cells 2b, 2c will be different from each other. And by calculating the difference between the photoelectrically converted signals supplied from the photosensitive cells 2b, 2c, the infrared ray component received by each photosensitive cell can be obtained.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: October 14, 2014
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Masao Hiramoto, Yoshiaki Sugitani
  • Patent number: 8853795
    Abstract: A semiconductor device comprises a substrate provided with a doping of a first type, on which an electronic circuit is provided surrounded by a circuit portion of the substrate provided with a doping of a second type; at least one pad for connecting the electronic circuit to an external device outside the substrate, surrounded by a pad portion provided with a doping of the second type; a sensing device comprising a sensor portion of the substrate provided with a doping of the first type, for sensing a parameter forming a measure for a local electrical potential of the substrate; and an evaluation unit connected to the sensing device, for providing an evaluation signal based on a difference between the parameter and a reference value.
    Type: Grant
    Filed: February 23, 2009
    Date of Patent: October 7, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Hubert Bode, Andreas Laudenbach, Andreas Roth
  • Patent number: 8816412
    Abstract: An image sensor having a light receiving region and an optical black region includes a semiconductor substrate, an interconnection disposed on the semiconductor substrate and extending along an interface between the light receiving region and the optical black region, and via plugs disposed between the interconnection and the semiconductor substrate and serving as light shielding members at the interface. The via plugs are arranged in a zigzagging pattern along the interface.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: August 26, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Keon Yong Cheon, Jong-Won Choi, Sung-Hyun Yoon
  • Patent number: 8809914
    Abstract: A method for manufacturing a solid-state image sensor having a pixel region, a peripheral circuit region, and an intermediate region interposed between the pixel region and the peripheral circuit region, includes forming a high melting point metal compound in active regions of the peripheral circuit region and the intermediate region, forming an etch stop film on the high melting point metal compound formed in the active regions of the peripheral circuit region and the intermediate region, forming an interlayer insulating film on the etch stop film, and forming, by using the etch stop film, a contact plug to contact the high melting point metal compound in the active region of the peripheral circuit region.
    Type: Grant
    Filed: June 6, 2013
    Date of Patent: August 19, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kentarou Suzuki, Yusuke Onuki
  • Patent number: 8785991
    Abstract: A solid state imaging device includes a photoelectric conversion portion in which the shape of potential is provided such that charge is mainly accumulated in a vertical direction.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: July 22, 2014
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Patent number: 8772844
    Abstract: Capacitance between a detection capacitor and a reset transistor is the largest among the capacitances between the detection capacitor and transistors placed around the detection capacitor. In order to reduce this capacitance, it is effective to reduce the channel width of the reset transistor. It is possible to reduce the effective channel width by distributing, in the vicinity of the channel of the reset transistor and the boundary line between an active region and an element isolation region, ions which enhance the generation of carriers of an opposite polarity to the channel.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: July 8, 2014
    Assignee: Wi Lan, Inc.
    Inventors: Motonari Katsuno, Ryouhei Miyagawa, Masayuki Matsunaga
  • Patent number: 8766391
    Abstract: Photodetector arrays, image sensors, and other apparatus are disclosed. In one aspect, an apparatus may include a surface to receive light, a plurality of photosensitive regions disposed within a substrate, and a material coupled between the surface and the plurality of photosensitive regions. The material may receive the light. At least some of the light may free electrons in the material. The apparatus may also include a plurality of discrete electron repulsive elements. The discrete electron repulsive elements may be coupled between the surface and the material. Each of the discrete electron repulsive elements may correspond to a different photosensitive region. Each of the discrete electron repulsive elements may repel electrons in the material toward a corresponding photosensitive region. Other apparatus are also disclosed, as are methods of use, methods of fabrication, and systems incorporating such apparatus.
    Type: Grant
    Filed: March 26, 2012
    Date of Patent: July 1, 2014
    Assignee: OmniVision Technologies, Inc.
    Inventor: Hidetoshi Nozaki
  • Patent number: 8716761
    Abstract: An image sensor for a semiconductor light-sensitive device including a semiconductor substrate and a light receiving device configured to receive light and generate a signal from the light. The image sensor may include an electron collecting device formed in the semiconductor substrate to receive at least a portion of the electrons generated by the light in the light receiving device. The image sensor may include a first type device isolation film configured to isolate the light receiving device from the electron collecting device. The image sensor may include a shielding film formed over the semiconductor substrate and configured to shield the first electron collecting device from the light.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: May 6, 2014
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Hoon Jang
  • Patent number: 8669510
    Abstract: An imaging device may be formed in a semiconductor substrate including a matrix array of photosites extending in a first direction and a second direction. The imaging device may include a transfer module configured to transfer charge in the first direction and an extraction module configured to extract charge in the second direction.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: March 11, 2014
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventor: François Roy