Abstract: A sensor formed in a substrate of a first conductivity type in a first concentration to express a first intrinsic potential includes CMOS circuitry to control the sensor, a first well of the first conductivity type in a second concentration (greater than the first concentration) formed in the substrate to express a second intrinsic potential, and a photodiode region of a second conductivity type formed in the first well. The first and second intrinsic potentials induce a field between the substrate and the first well that repels photo generated charge from drifting from the substrate into the first well. Alternatively, a sensor formed in a substrate of a first conductivity type includes CMOS circuitry to control the sensor, a first well of a second conductivity type formed in the substrate, a second well of the first conductivity type formed in the first well, and a photodiode region of the second conductivity type formed in the second well.

Abstract: A solid-state imaging device includes a plurality of sensor portions, and a vertical shift register corresponding to each of a series of sensor portions. A transfer electrode of the vertical shift register is formed of a first electrode and a second electrode which are repeatedly provided corresponding to the respective series of sensor portions and also formed continuously between the sensor portions adjacent to each other in the vertical direction. A signal charge is read out from each of the sensor portions through a portion below a read gate portion of the first electrode between sensor portions a located in the vertical direction.

Abstract: A method of planarizing an image sensor substrate is disclosed. The method comprises depositing a first polymer layer over the image sensor substrate. The first polymer layer is patterned to form pillars. Then, a second polymer layer is deposited over the pillars. Optionally, the second polymer layer is etched back.

Abstract: A light source that utilizes light emitting diodes that emit white light is disclosed. The diodes are mounted on an elongate member having at least two surfaces upon which the light emitting diodes are mounted. The elongate member is thermally conductive and is utilized to cool the light emitting diodes. In the illustrative embodiment, the elongate member is a tubular member through which a heat transfer medium flows. A cooling or fluid movement device coupled with the elongate thermally conductive member enhances cooling of the light emitting diodes.

Abstract: An integrated circuit is provided that includes a substrate incorporating a semiconductor photodiode device having a p-n junction. The photodiode device includes at least one capacitive trench buried in the substrate and connected in parallel with the junction. In a preferred embodiment, the substrate is formed from silicon, and the capacitive trench includes an internal doped silicon region partially enveloped by an insulating wall that laterally separates the internal region from the substrate. Also provided is a method for fabricating an integrated circuit including a substrate that incorporates a semiconductor photodiode device having a p-n junction.

Abstract: A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to look for that pattern. The time when the pattern is received indicates the time of flight.

Abstract: A readout gate electrode is selectively formed on a silicon substrate. An N-type drain region is formed at one end of the readout gate electrode, and an N-type signal storage region is formed at the other end thereof. A P+-type surface shield region is selectively epitaxial-grown on the signal storage region, and a silicide block layer is formed on the surface shield region to cover at least part of the signal storage region. A Ti silicide film is selective epitaxial-grown on the drain region.

Abstract: A solid-state imaging device such as a CMOS image sensor includes photodiode portions that are designed for both improving sensitivity and reducing crosstalk of electrical charge to adjacent pixels. A p-type layer, which has an impurity concentration that is lower than that of a substrate p+-layer, is formed on the substrate p+-layer which is a p-type silicon semiconductor substrate of high impurity concentration. An n-type photoelectric conversion region is provided at a position on the upper side of the p-type layer. By means of this configuration, of the photoelectrons that are generated in the p-type layer, electrons that diffuse in the direction of the substrate are reliably captured in substrate p+-layer and annihilated by recombination.

Abstract: A solid state image sensing device and method of making same. The device includes a sensor portion, a vertical transfer register having a transfer electrode, a shunt interconnection of a refractory metal, and a light shielding film is provided. The shunt interconnection and the light shielding film are insulated from one another with an oxide film, an insulating film to serve as a stopper film at the time of pattering the oxide film is formed under the oxide film and the shunt interconnection, and the oxide film and the insulating film are not provided under the projecting portion of the light shielding film.

Abstract: A TDI sensor includes a column of pixels ordered from an initial pixel to a final pixel where each pixel includes reticulated clock conductors arranged to define a reticulation area and a pixel charge handling capacity. The reticulation area of a pixel increases from the final pixel to the initial pixel, and the pixel charge handling capacity increases from the initial pixel to the final pixel. The sensor includes a first bus structure of polysilicon, where the bus structure includes register element sets and each register element set includes a plurality of clock conductors. Each register element set includes a corresponding pixel reticulation area, and the pixel reticulation area of a first register element set is unequal to a pixel reticulation area of another register element set. The sensor also includes a second bus structure of metal disposed substantially diagonally to the first bus structure. The second bus structure includes clock bus sets, and each clock bus set includes bus conductors.

Abstract: An interline transfer type solid imaging device includes a first photosensitive section, a second photosensitive section, and a vertical transfer section. The interline transfer type solid imaging device reads an image signal corresponding to a first field from the first photosensitive section, and reads an image signal corresponding to a second field from the second photosensitive section. First signal charges stored in the first photosensitive section are read into the vertical transfer section. A portion of second signal charges stored in the second photosensitive section are shifted into the first photosensitive section.

Abstract: A charge coupled device includes a plurality of photoelectric conversion regions; a plurality of vertical charge coupled devices (VCCDs) provided between the photoelectric conversion regions for transmission of charges generated at the photoelectric conversion regions in a first direction; and a horizontal charge coupled device (HCCD) coupled to the VCCDs and having a channel region including a plurality of channels for transmission of the charges previously transmitted through the VCCDs in a second direction. The channel region is formed such that one of the plurality of channels has a higher potential than the remaining channels. The remaining channels have potentials that gradually become lower than the highest potential moving in a direction away from the channel with the highest potential. The channel region transmits the charges within the HCCD so that the charges are gathered together centered around the channel having the highest potential during transmission of the charges.

Abstract: A solid state imaging device includes a transparent insulation film. The insulation film is laminated on transfer electrodes over the power supply lines. A transparent protection film, which has a refractive index that is greater than that of the insulation film, is laminated on the insulation film. The transparent insulation film has portions above the channels in which the thickness continuously increases from the center of adjacent channels to the associated channel separating region.

Abstract: A fabrication method for a CMOS image sensory device is described. An isolation layer is formed in the substrate to isolate a photodiode sensory region and a transistor device region. A gate structure is further formed on the transistor device region, followed by forming concurrently a source/drain region in the transistor device region beside the side of the gate structure and a doped region in the photodiode sensory region. Thereafter, a self-aligned block is formed on the photodiode sensory region, followed by forming a protective layer on the substrate.

Abstract: A CMOS imager having multiple graded doped regions formed below respective pixel sensor cells is disclosed. A deep retrograde p-well is formed under a red pixel sensor cell of a semiconductor substrate to increase the red response. A shallow p-well is formed under the blue pixel sensor cell to decrease the red and green responses, while a shallow retrograde p-well is formed below the green pixel sensor cell to increase the green response and decrease the red response.

Abstract: Monolithic inductance-enhancing integrated circuits, complementary metal oxide semiconductor (CMOS) inductance-enhancing integrated circuits, inductor assemblies, and inductance-multiplying methods are described. In one embodiment, a monolithic inductance-enhancing integrated circuit comprises a transistor supported by a bulk monocrystalline silicon substrate. An inductor assembly is supported by the substrate and operably connected with the transistor in an inductance-enhancing circuit configuration having a quality factor (Q) greater than 10. In another embodiment, a complementary metal oxide semiconductor (CMOS), inductance-enhancing integrated circuit includes a field effect transistor supported over a silicon-containing substrate and having a gate, a source, and a drain. A first inductor is received within an insulative material layer over the substrate, and is connected to the gate. A second inductor is received within the insulative material layer and is connected to the source.

Abstract: Within a method for forming a color filter image array optoelectronic microelectronic fabrication, and the color filter image array optoelectronic microelectronic fabrication formed employing the method, there is provided a substrate having formed therein a series of photo active regions. There is also formed over the substrate at least one color filter layer having formed therein a color filter region having a concave upper surface. There is also formed upon the at least one color filter layer and planarizing the at least one color filter region having the concave upper surface, a planarizing layer. The planarizing layer provides for enhanced resolution of the color filter image array optoelectronic microelectronic fabrication.

Abstract: A image sensor device is formed on a semiconductor wafer comprising a silicon substrate of a first conductive type. The image sensor device includes a photo sensor, an insulation layer, a MOS transistor and a deep doped region. The photo sensor is composed of a shallow doped region of a second conductive type. The shallow doped region is formed on a surface of the substrate and has a first predetermined depth. The insulation layer has a second predetermined depth and is positioned on the surface of the substrate to surround the photo sensor. The second predetermined depth is greater than the first predetermined depth. The MOS transistor is formed on the semiconductor wafer and electrically connected with the photo sensor. The deep doped region of the first conductive type is formed in the substrate under the insulation layer, and a dopant concentration of the deep doped region has a Gauss distribution.

Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Abstract: Minority carriers generated by photoelectric conversion in an isolation layer and a semiconductor region with the same conduction type as that of the isolation layer are provided with an effective diffusion length owing to a trench formed in the isolation layer and with no path, which could be a straight escape route for the minority carriers, and false signals, therefore, scarcely enters to a neighboring cell, so that smear and color interference can be suppressed.

Abstract: A color optimized CMOS photodiode pixel array is provided. The pixel array employs different dimensions to take advantage of different characteristics of the photodiode physics to produce an enhanced image while minimizing the need for post processing. The design includes a relatively shallow blue pixel photodiode, a deeper green pixel photodiode, and a relatively deep red pixel photodiode. The red pixel photodiode is larger and deeper than the green pixel photodiode, which is larger and deeper than the blue pixel photodiode. Each color pixel photodiode comprises a junction diode and a depletion region. The CMOS construction of the three color pixel photodiodes may vary, but one possible construct of the red pixel photodiode would be an N Well/P Sub diode construct, the green pixel photodiode a N+/P Sub diode construct, and the blue being a N+/P Well or N+/P Sub diode construct.

Abstract: An image sensor capable of preventing the degradation of pinned photodiodes and the generation of leakage current between neighboring pinned photodiodes is provided. The disclosed image sensor contains a plurality of pixel units, each pixel unit having a photodiode region. The image sensor includes a semiconductor substrate of a first conductivity type; a device isolation layer formed in the semiconductor substrate; a field stop layer formed beneath the device isolation layer; a trench formed in the semiconductor substrate, wherein the trench surrounds the photodiode region; a first doping region of the first conductivity type formed beneath the surface of the semiconductor substrate and beneath the surfaces of the trench; an insulating member filling the trench; and a second doping region of a second conductivity type formed in the semiconductor substrate under the first doping region.

Abstract: In production of a solid-state image pickup device including a semiconductor substrate, a photoelectric converter element group including a plurality of photoelectric converter elements formed in one column in one surface of the semiconductor substrate, a charge transfer path to transfer signal charge accumulated in the photoelectric converter elements, and readout gates to read signal charge from photoelectric converter elements to feed the charge to the charge transfer path, an ON or ONO film electrically insulates each transfer electrode constituting the charge transfer path from the semiconductor substrate and an oxide insulating film insulates a readout gate electrode constituting the readout gate from the semiconductor substrate to thereby improve electric characteristics of the solid-state image pickup device.

Abstract: In the production of an IT-CCD including many photoelectric converters in columns and rows, vertical transfer CCDs for transferring signal charge accumulated in the photoelectric converters to a horizontal transfer CCD, and readout gate regions to control, for each photoelectric converter, readout operation of signal charge from the photoelectric converters to the vertical charge transfer CCDs; one joining channel is formed for each set of two vertical transfer CCDs to combine the CCDs with each other and hence a high-pixel-density solid-state image pickup device can be implemented using ordinary fine patterning technique.

Abstract: A CMOS imager having multiple graded doped regions formed below respective pixel sensor cells is disclosed. A deep retrograde p-well is formed under a red pixel sensor cell of a semiconductor substrate to increase the red response. A shallow p-well is formed under the blue pixel sensor cell to decrease the red and green responses, while a shallow retrograde p-well is formed below the green pixel sensor cell to increase the green response and decrease the red response.

Abstract: As solid-state image pickup devices are spread in the world, improvement of performance and reduction of the production cost thereof are required. It is difficult for the solid-state image pickup devices of a configuration of the prior art to meet the requirements. In a solid-state image pickup device to meet the requirements, a large number of photoelectric converters are disposed in a surface of a semiconductor substrate in of a matrix pattern having a plurality of row and a plurality of column, a vertical charge transfer channel is arranged for each column of the photoelectric converters, and a read-cum-transfer electrode is formed for each row of the photoelectric converters such that the read-cum-transfer electrode surrounds each photoelectric converter element of the associated row of the photoelectric converters in a plan view.

Abstract: A solid state image pickup device is provided, that improves the transfer efficiency of charges in the horizontal charge transfer path by implementing a selectively arranged matrix of semiconductor layers with differing conductivity type, impurity concentration and orientation. Further, the solid state image pickup device prevents the lowering of the transfer efficiency of charges transferred from the vertical charge transfer path to the horizontal charge transfer path.

Abstract: A vertical color detector group according to the present invention is formed on a semiconductor substrate and includes layers for collecting photons of different wavelength bands. The color detector group can be programmed to perform dynamic switching between sub-sampled color data and full measured color readout. The color detector group can also be configured in a portion of an array to emulate color filter array patterns, and programmed to dynamically alter the degree to which color information is sub-sampled. The programmable color detector groups can allow for switching between different levels of quality and resolution, allowing for selection of an optimal pattern based on image content or lighting conditions. By combining the color detector group of the present invention with conventional color filters, color filter arrays of more than three colors can be constructed.

Abstract: A solid imaging device includes a semiconductor substrate, a photodiode including a first diffusion layer formed on the substrate; and a MOS transistor including a second diffusion layer (FD region) and a third diffusion layer formed on the principal surface as source/drain regions. The FD region serves to perform a function of converting a signal charge, which is determined by the photodiode, into a signal voltage. An N+ diffusion layer having an impurity implanted at a high concentration is formed in the third diffusion layer in addition to an N− diffusion layer having an impurity implanted at a low concentration, whereas only an N− diffusion layer is formed in the FD region. An upper side of the FD region is covered with an oxide film serving as an implantation shielding layer for shielding against ion implantation.

Abstract: An image sensor, includes a semiconductor substrate; a photosensor having, a first photosensing region including a first stack of one or more layers of transparent materials overlying the substrate, the first photosensing region having a spectral response having peaks and valleys, and a second photosensing region including a second stack of one or more layers of transparent materials overlying the substrate, the second photosensing region having a spectral response having peaks and valleys; and wherein at least one peak or valley of the spectral response of the first region is matched to at least one valley or peak respectively of the spectral response of the second region such that the average spectral response of the photosensor is smoother than the individual spectral response of either the first or second photosensing regions.

Abstract: The invention relates to a CCD of the buried-channel type comprising a charge-transport channel in the form of a zone (12) of the first conductivity type, for example the n-type, in a well (13) of the opposite conductivity type, in the example the p-type. In order to obtain a drift field in the channel below one or more gates (9, 10a) to improve the charge transfer, the well is provided with a doping profile, so that the average concentration decreases in the direction of charge transport. Such a profile can be formed by covering the area of the well during the well implantation with a mask, thereby causing fewer ions to be implanted below the gates (9, 10a) than below other parts of the channel. By virtue of the invention, it is possible to produce a gate (10a) combining a comparatively large length, for example in the output stage in front of the output gate (9) to obtain sufficient storage capacity, with a high transport rate.

Abstract: A barrier area is located adjacent a horizontal transfer area and spaced from a field insulating area. The barrier area includes an insulating layer and a conductor extending from the horizontal transfer layer over the surface of a semiconductor substrate, a barrier layer of a second conductivity type formed under the surface of the semiconductor substrate and adjacent a first impurity layer of a first conductivity type of the horizontal transfer area, and a second impurity layer extending from the horizontal transfer area and formed under the barrier layer. A discharge area is located between the barrier area and the field insulating area.

Abstract: Semiconductor photo sensor and semiconductor wafer processing designs are disclosed. The disclosed designs provide significantly improved photo sensor performance within the framework of a CMOS process. CMOS compatible fabrication procedures are presented, that enable tailoring of the 3-dimensional doping profile and defect structure within a photo sensor, to optimize light detection efficiency and minimize noise from dark current.

Abstract: An active photodiode CMOS image sensor comprising a light-sensitive photodiode region, a transistor and a cover layer. The light-sensitive region is formed in a substrate body and the transistor is formed above the substrate body. The source region of the transistor is connected to the light-sensitive region. The cover layer is formed above the light-sensitive photodiode region using a method similar to method used to form the gate dielectric layer.

Abstract: A CCD image sensor comprises an active area having an array of photodetectors, a vertical CCD, a horizontal CCD and an output section, and a field area wherein vertical transfer electrodes of the vertical CCD are connected to respective vertical bus lines. The vertical electrodes are implemented by three-layer firms for transferring the signal charge. The first electrode implemented by the first layer film protrudes from the second and third electrodes implemented by the second layer film in the field area. A short-circuit failure occurring between the second electrode and the third electrode along the side-wall of the first electrodes in the field area is prevented due to a large distance between the second electrode and the third electrode along the surface of the side-wall of the first electrode.

Abstract: A charge transfer device which comprises vertical charge transfer devices which transfer charges in the vertical direction, first and second horizontal charge transfer devices which transfer the charges from the vertical charge transfer devices in the horizontal direction, and a shift gate which controls the charges from the vertical charge transfer devices to be supplied to one the first horizontal charge device or the second horizontal charge transfer device, wherein the first. horizontal charge transfer device is a semiconductor region between the vertical charge transfer devices and the second horizontal charge transfer device and includes highly-doped regions having tapered portions whose one ends near the second horizontal charge transfer device are broader than another ends near the vertical charge transfer devices.

Abstract: A process for producing a solid image pickup device is demanded that can enhance a photoelectric conversion region by forming an overflow barrier layer at a deep position and can prevents generation of radiation due to the use of resist as a mask. Upon producing a solid image pickup device having a vertical overflow drain structure, ion implantation is conducted on an entire of a silicon substrate without using a resist mask, so as to form an overflow barrier layer. It is also possible that a trench is formed in a peripheral part of the silicon substrate to surround a pixel region and to separate the overflow barrier layer into the pixel region and an outer peripheral part, and an impurity diffusion layer having a conductive type different from that of the overflow barrier layer is formed on an inner surface of the trench.

Abstract: A pixel sensor cell for use in a CMOS imager exhibiting improved storage capacitance. The source follower transistor is formed with a large gate that has an area from about 0.3 &mgr;m2 to about 10 &mgr;m2. The large size of the source follower gate enables the photocharge collector area to be kept small, thereby permitting use of the pixel cell in dense arrays, and maintaining low leakage levels. Methods for forming the source follower transistor and pixel cell are also disclosed.

Abstract: A solid-state imaging device includes a second conductive type impurity region formed in a first conductive type semiconductor substrate in an area corresponding to a pixel area, a high-resistivity semiconductor layer of the first conductive type formed on the semiconductor substrate including the impurity region, and an ion-implanted region of the first conductive type formed in at least one of the semiconductor substrate and the high-resistivity semiconductor layer in a peripheral area other than the pixel area. A method of fabricating the solid-state imaging device is also disclosed.

Abstract: A densely integrated pixel, fabricated by CMOS technology, comprises a photodiode formed by a n-well, with cathode, surrounded by a p-well; a reset MOS transistor formed such that its polysilicon gate is positioned, for diode control, across the junction formed by p-well and n-well regions, and its source is merged with the photodiode cathode; and a sensing MOS transistor formed such that its source is combined with the drain of the reset transistor and its gate is electrically connected to the source of the reset transistor. In the pixel of the invention, the photodiode leakage current is greatly reduced, because no n+/p-well junction is connected to the photodiode, and the fill factor is improved, because the pixel size is much reduced.

Abstract: A charge coupled device includes first and second pluralities of column registers and first and second register segments. The first plurality of column registers are splayed with respect to and on one side of a column direction line, and the second plurality of column registers are splayed with respect to and on another side of the column direction line. The first register segment is coupled to the first plurality of column registers, and the second register segment is coupled to the second plurality of column registers. The second register segment is spaced apart from the first register segment so as to define a layout area between the first and second register segments where at least one of an isolation register element and an output node is disposed. Each column register of the first plurality of column registers includes a plurality of column element wells.

Abstract: Disclosed is a photoelectric transducer having a photodiode that is formed on a second-conductivity-type well and is composed of a first-conductivity-type region to accumulate signal charge when light is supplied and a first second-conductivity-type region formed on the first-conductivity-type region. The first second-conductivity-type region is separated from a second-conductivity-type device separation region and is connected to the second-conductivity-type device separation region at part of the circumference of the first second-conductivity-type region through a second second-conductivity-type region that is formed to be at least partially shallower than the first second-conductivity-type region. Also, disclosed is a solid-state image sensing device equipped with the photoelectric transducer.

Abstract: A multi-layered gate for use in a CMOS or CCD imager formed with a second gate at least partially overlapping it. The multi-layered gate is a complete gate stack having an insulating layer, a conductive layer, an optional silicide layer, and a second insulating layer, and has a second gate formed adjacent to it which has a second conductive layer that extends at least partially over the surface of the multi-layered gate. The multi-layered gate has improved insulation, thereby resulting in fewer shorts between the conductive layers of the two gates. Also disclosed are processes for forming the multi-layered gate and the overlapping gate.

Abstract: A unique method and apparatus for making a load cell provides a sensor, circuit board, and connector that are integrally formed as one piece by using a photo-imaging process. A conductive material is layered on a non-conductive material in a predetermined pattern including a sensor portion, a circuit board portion, and a conductive path connecting the sensor and circuit board portions. A photo-reactive film is applied to the conductive material and portions of the photo-reactive film are exposed to a light source. The light source is applied through a negative that defines the sensor, circuit board, and conductive path dimensions. The portions of the film that are exposed to the light cause bonding between the conductive and non-conductive materials and integrally form the sensor, circuit board, and conductive path as one piece. The unexposed film and the associated underlying conductive material are removed by etching.

Abstract: A charge transfer structure includes an insulating film on a first semiconductor region, a plurality of transfer electrodes and a signal generating circuit. The plurality of transfer electrodes are formed on the insulating film, and each of the plurality of transfer electrodes is composed of a barrier electrode and an accumulation electrode. The signal generating circuit generates first to 2N-th (N is a positive integer more than 1) pulse signals which are supplied to every 2N transfer electrodes of the plurality of transfer electrodes in an interline mode. As a result, a signal charge can be transferred for the 2N transfer electrodes at maximum during one cycle of the first to 2N-th pulse signals.

Abstract: An image sensor having a plurality of pixels arranged in a series of row and columns comprising: a semiconductor substrate having a plurality of pixels formed in rows and columns with at least two row adjacent pixels and at least two column adjacent pixels formed within the substrate; and at least one electrical function integrated within the adjacent pixels that is shared between the adjacent pixels. The electrical function can be either a contact region or an electrical circuit used in implementing either a photogate, a transfer gate, a reset gate, a row select gate, an amplifier drain, an output node, a floating diffusion contact, a reset drain, a lateral overflow gate, an overflow drain or an amplifier.

Abstract: There is provided a method for fabricating a CMOS image sensor having enhanced reliability and light sensitivity, which comprises the steps of providing a substrate including photosensitive elements and metal wire; forming a first protecting film for protecting the elements over the substrate, covering the metal wire; forming a flattened spin-on-glass film on the first protecting film; forming a second protecting film for protecting the elements on the spin-on-glass film; forming color filter patterns on the second protecting film; forming a photoresist film for flattening on the color filter patterns and the second protecting film; and forming microlenses on the photoresist film. By using the flattened SOG film and a photoresist for flattening and pad opening, the present invention can accomplish the thickness uniformity of the color filter corresponding to each unit pixel, the wire-bonding pad devoid of the residuals of the color filter materials and the figure uniformity of the microlenses.

Abstract: An image pickup element unit and peripheral circuits are formed on a common semiconductor substrate. The image pickup element unit comprises sensors which converts incident lights into charges. The peripheral circuits comprise contact holes therein and transfer signals to external components via the contact holes. A tungsten film which works as both a photo shield and a barrier metal film is formed on the semiconductor substrate so that each of the sensors has its opening portion and the contact holes are filled with the tungsten film. An aluminum film which works as wiring is formed on the tungsten film filing the contact holes. A tungsten silicide layer is formed at conjunction portion between the tungsten film in the contact holes and the semiconductor substrate. Contacts comprising the tungsten film and the tungsten silicide layer show excellent ohmic contact characteristics.

Abstract: A CCD solid state imaging device (21), which is comprised of an imaging section (24) formed of a plurality of light receiving portions (22), each serving as a pixel, and of a vertical transfer register (23) corresponding to each column of light receiving portions, first and second storage sections (26A) and (26B) capable of storing a charge from the imaging section (24), a horizontal transfer register (27) and a smear drain region (28), is employed, wherein after a first smear component charge (I) in the vertical transfer register (23) is swept away to the smear drain region , the vertical transfer register is operated at a high speed under such a state that a signal charge of the light receiving portion (22) is not read to the vertical transfer register (23) to store a second smear component charge (II) generated during the high speed transfer in the first storage section (26A), then the signal charge of the light receiving portion (22) is read to the vertical transfer register (23), the same is transferred

Abstract: In forming a photodiode by forming a burying layer on a charge accumulation region, the readout gate channel for the photodiode is separated from a high impurity concentration region of the burying layer of the photodiode, and at least a partial area of the high impurity concentration region is separated from the channel stopper region of the photodiode. Noises of a solid-state image pickup device using buried type photodiodes can be reduced.