Having Alternating Strips Of Sensor Structures And Register Structures (e.g., Interline Imager) Patents (Class 257/232)
  • Patent number: 8860814
    Abstract: A solid-state image sensor according to the present invention includes a number of photosensitive cells 2b, 2c that are arranged in between the first surface 30a of a semiconductor layer 30 and its second surface 30b, which is opposite to the first surface 30a and which receives incoming light. As viewed from the photosensitive cells 2b, 2c, a reflecting portion 3a is arranged on the same side as the first surface 30a in order to reflect an infrared ray that has been transmitted through the photosensitive cell 2c and make it incident on one of the photosensitive cells 2b, 2c. As a result, the intensities of infrared rays to be converted photoelectrically by the photosensitive cells 2b, 2c will be different from each other. And by calculating the difference between the photoelectrically converted signals supplied from the photosensitive cells 2b, 2c, the infrared ray component received by each photosensitive cell can be obtained.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: October 14, 2014
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Masao Hiramoto, Yoshiaki Sugitani
  • Patent number: 8853795
    Abstract: A semiconductor device comprises a substrate provided with a doping of a first type, on which an electronic circuit is provided surrounded by a circuit portion of the substrate provided with a doping of a second type; at least one pad for connecting the electronic circuit to an external device outside the substrate, surrounded by a pad portion provided with a doping of the second type; a sensing device comprising a sensor portion of the substrate provided with a doping of the first type, for sensing a parameter forming a measure for a local electrical potential of the substrate; and an evaluation unit connected to the sensing device, for providing an evaluation signal based on a difference between the parameter and a reference value.
    Type: Grant
    Filed: February 23, 2009
    Date of Patent: October 7, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Hubert Bode, Andreas Laudenbach, Andreas Roth
  • Patent number: 8816412
    Abstract: An image sensor having a light receiving region and an optical black region includes a semiconductor substrate, an interconnection disposed on the semiconductor substrate and extending along an interface between the light receiving region and the optical black region, and via plugs disposed between the interconnection and the semiconductor substrate and serving as light shielding members at the interface. The via plugs are arranged in a zigzagging pattern along the interface.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: August 26, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Keon Yong Cheon, Jong-Won Choi, Sung-Hyun Yoon
  • Patent number: 8809914
    Abstract: A method for manufacturing a solid-state image sensor having a pixel region, a peripheral circuit region, and an intermediate region interposed between the pixel region and the peripheral circuit region, includes forming a high melting point metal compound in active regions of the peripheral circuit region and the intermediate region, forming an etch stop film on the high melting point metal compound formed in the active regions of the peripheral circuit region and the intermediate region, forming an interlayer insulating film on the etch stop film, and forming, by using the etch stop film, a contact plug to contact the high melting point metal compound in the active region of the peripheral circuit region.
    Type: Grant
    Filed: June 6, 2013
    Date of Patent: August 19, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kentarou Suzuki, Yusuke Onuki
  • Patent number: 8785991
    Abstract: A solid state imaging device includes a photoelectric conversion portion in which the shape of potential is provided such that charge is mainly accumulated in a vertical direction.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: July 22, 2014
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Patent number: 8772844
    Abstract: Capacitance between a detection capacitor and a reset transistor is the largest among the capacitances between the detection capacitor and transistors placed around the detection capacitor. In order to reduce this capacitance, it is effective to reduce the channel width of the reset transistor. It is possible to reduce the effective channel width by distributing, in the vicinity of the channel of the reset transistor and the boundary line between an active region and an element isolation region, ions which enhance the generation of carriers of an opposite polarity to the channel.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: July 8, 2014
    Assignee: Wi Lan, Inc.
    Inventors: Motonari Katsuno, Ryouhei Miyagawa, Masayuki Matsunaga
  • Patent number: 8766391
    Abstract: Photodetector arrays, image sensors, and other apparatus are disclosed. In one aspect, an apparatus may include a surface to receive light, a plurality of photosensitive regions disposed within a substrate, and a material coupled between the surface and the plurality of photosensitive regions. The material may receive the light. At least some of the light may free electrons in the material. The apparatus may also include a plurality of discrete electron repulsive elements. The discrete electron repulsive elements may be coupled between the surface and the material. Each of the discrete electron repulsive elements may correspond to a different photosensitive region. Each of the discrete electron repulsive elements may repel electrons in the material toward a corresponding photosensitive region. Other apparatus are also disclosed, as are methods of use, methods of fabrication, and systems incorporating such apparatus.
    Type: Grant
    Filed: March 26, 2012
    Date of Patent: July 1, 2014
    Assignee: OmniVision Technologies, Inc.
    Inventor: Hidetoshi Nozaki
  • Patent number: 8716761
    Abstract: An image sensor for a semiconductor light-sensitive device including a semiconductor substrate and a light receiving device configured to receive light and generate a signal from the light. The image sensor may include an electron collecting device formed in the semiconductor substrate to receive at least a portion of the electrons generated by the light in the light receiving device. The image sensor may include a first type device isolation film configured to isolate the light receiving device from the electron collecting device. The image sensor may include a shielding film formed over the semiconductor substrate and configured to shield the first electron collecting device from the light.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: May 6, 2014
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Hoon Jang
  • Patent number: 8669510
    Abstract: An imaging device may be formed in a semiconductor substrate including a matrix array of photosites extending in a first direction and a second direction. The imaging device may include a transfer module configured to transfer charge in the first direction and an extraction module configured to extract charge in the second direction.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: March 11, 2014
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventor: François Roy
  • Patent number: 8643064
    Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: February 4, 2014
    Assignee: InVisage Technologies, Inc.
    Inventors: Hui Tian, Edward Sargent
  • Patent number: 8581307
    Abstract: An image sensor pixel includes a photosensitive element having a first doping type disposed in semiconductor material. A deep extension having the first doping type is disposed beneath and overlapping the photosensitive element in the semiconductor material. A floating diffusion is disposed in the semiconductor material. A transfer gate is disposed over a gate oxide that is disposed over the semiconductor material. The transfer gate is disposed between the photosensitive element and the floating diffusion. The photosensitive element and the deep extension are stacked in the semiconductor material in a “U” shape extending from under the transfer gate.
    Type: Grant
    Filed: July 6, 2012
    Date of Patent: November 12, 2013
    Assignee: OmniVision Technologies, Inc.
    Inventors: Gang Chen, Duli Mao, Hsin-Chih Tai
  • Patent number: 8558286
    Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: October 15, 2013
    Assignee: InVisage Technologies, Inc.
    Inventors: Hui Tian, Edward Sargent
  • Patent number: 8552481
    Abstract: An object of the present invention is to prevent a sensitivity difference between pixels. There are disposed plural unit cells each including plural photodiodes 101A and 101B, plural transfer MOSFETs 102A and 102B arranged corresponding to the plural photodiodes, respectively, and a common MOSFET 104 which amplifies and outputs signals read from the plural photodiodes. Each pair within the unit cell, composed of the photodiode and the transfer MOSFET provided corresponding to the photodiode, has translational symmetry with respect to one another. Within the unit cell, there are included a reset MOSFET and selecting MOSFET.
    Type: Grant
    Filed: November 17, 2009
    Date of Patent: October 8, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroki Hiyama, Masanori Ogura, Seiichiro Sakai
  • Patent number: 8546853
    Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: October 1, 2013
    Assignee: InVisage Technologies, Inc.
    Inventors: Hui Tian, Edward Sargent
  • Patent number: 8541255
    Abstract: A solid-state imaging device includes a semiconductor substrate; a first conductive region of the semiconductor substrate; a first conductive region on an upper surface side of the first conductive region of the semiconductor substrate; a second conductive region below the first conductive region on the upper surface side of the first conductive region of the semiconductor substrate. The solid-state imaging device further includes a photoelectric conversion region including the first conductive region located on the upper surface side of the first conductive region of the semiconductor substrate and the second conductive region and a transfer transistor transferring charges accumulated in the photoelectric conversion region to a readout region; and a pixel including the photoelectric conversion region and the transfer transistor. The first conductive region, which is included in the photoelectric conversion region, extends to the lower side of a sidewall of a gate electrode of the transfer transistor.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: September 24, 2013
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Patent number: 8530940
    Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: September 10, 2013
    Assignee: InVisage Technologies, Inc.
    Inventors: Hui Tian, Edward Sargent
  • Patent number: 8530992
    Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: September 10, 2013
    Assignee: InVisage Technologies, Inc.
    Inventors: Hui Tian, Edward Sargent
  • Patent number: 8530993
    Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: September 10, 2013
    Assignee: InVisage Technologies, Inc.
    Inventors: Hui Tian, Edward Sargent
  • Patent number: 8530991
    Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: September 10, 2013
    Assignee: InVisage Technologies, Inc.
    Inventors: Hui Tian, Edward Sargent
  • Patent number: 8525287
    Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: September 3, 2013
    Assignee: InVisage Technologies, Inc.
    Inventors: Hui Tian, Edward Sargent
  • Patent number: 8445986
    Abstract: An image pickup apparatus is provided with plural light receiving areas arranged two-dimensionally, and a vertical scanning circuit comprising plural unit circuit stages arranged in the vertical direction and a horizontal scanning circuit comprising plural unit circuit stages arranged in the horizontal direction, for selecting and reading the plural light receiving areas in succession. The vertical and horizontal scanning circuits are arranged in spaces between the light receiving areas. A crossing area of the vertical and horizontal scanning circuits, in a space between the light receiving areas, is divided into two areas. A unit circuit of the horizontal scanning circuit is provided in one of the two areas. A unit circuit of the vertical scanning circuit is provided in the other of the two areas. In one embodiment, the unit circuits of the vertical scanning circuit and/or of the horizontal scanning circuit are arranged at a constant pitch.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: May 21, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventor: Tomoyuki Noda
  • Patent number: 8431970
    Abstract: An integrated circuit has a plurality of terminals for making electrical connection to the integrated circuit. At least one device is formed adjacent an outer edge of the integrated circuit. The device includes at least one metal conductor for forming an edge seal for protecting the integrated circuit during die singulation. The device is coupled to one or more functional circuits within the integrated circuit by routing the at least one metal conductor to the one or more functional circuits, the at least one device providing a reactance value to the one or more functional circuits for non-test operational use. The device may be formed as one or more capacitors or as one or more inductors. Various structures may be used for the capacitor and the inductor.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: April 30, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Ertugrul Demircan, Jack M. Higman
  • Patent number: 8410528
    Abstract: Disclosed is a CMOS image sensor, which can minimize a reflectance of light at an interface between a photodiode and an insulating film, thereby enhancing image sensitivity. Such a CMOS image sensor includes a substrate provided with a photodiode consisting of Si, an insulating film consisting of SiO2 and formed on the substrate, a semi-reflection film interposed between the substrate and the insulating film, and metal interconnections, color filters and micro lenses constituting individual unit pixels. The semi-reflection film has a refraction index value between those of the Si photodiode and the SiO2 insulating film.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: April 2, 2013
    Assignee: Intellectual Ventures II LLC
    Inventor: Woo Sig Min
  • Patent number: 8368074
    Abstract: A display substrate includes a substrate, a pixel electrode and a dummy pattern part. The substrate includes a display area and a peripheral area surrounding the display area. The pixel electrode is disposed in the display area and electrically connected to gate and data lines. The dummy pattern part is disposed in the peripheral area and includes a plurality of first dummy electrodes connected to each other in a network form through connection electrodes and a plurality of second dummy electrodes respectively disposed over the first dummy electrodes.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: February 5, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventor: Bon-Yong Koo
  • Patent number: 8338868
    Abstract: An image sensor with a shared photodiode is provided. The image sensor includes at least two unit pixels, each of which includes a photodiode, a diffusion region which gathers electrons from the photodiode, a transfer transistor which connects the photodiode with the diffusion region, and a readout circuit which reads out a signal from the diffusion region. Photodiodes of neighboring unit pixels are disposed symmetrically to be adjacent to one another to form a shared photodiode. The image sensor does not have a STI region which causes a dark current restricting its performance and does not require a basic minimum design factor (a distance or an area) related to a STI region. A region corresponding to a STI region may be used as a region of a photodiode or for additional pixel scaling. Therefore, a limitation in scaling of a photodiode is overcome, and pixel performance is improved in spite of pixel scaling.
    Type: Grant
    Filed: November 25, 2009
    Date of Patent: December 25, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Bong Ki Mheen, Albert J. P. Theuwissen, Jae Sik Sim, Mi Ran Park, Yong Hwan Kwon, Eun Soo Nam
  • Patent number: 8319878
    Abstract: A solid-state imaging device of the type having photoelectric conversion elements formed in a matrix pattern on a semiconductor substrate, vertical transfer elements each of which reads signal charges from the photoelectric conversion elements arranged in the column direction and transfers the signal charges in the vertical direction, and a horizontal transfer element which transfers in the horizontal direction the signal charges sent from each of the vertical transfer elements, the horizontal transfer element includes: a charge transfer channel; a first transfer electrode; a second transfer electrode; and an interelectrode insulating film; with the first transfer electrode and the second transfer electrode being at the same potential.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: November 27, 2012
    Assignee: Sony Corporation
    Inventors: Takashi Terada, Keisuke Hatano
  • Patent number: 8287948
    Abstract: An image sensor includes a color filter, an over-coating layer formed on the color filter, and a medium layer formed on the over-coating layer, wherein the medium layer is configured with at least two medium layers of which refractive indices are different from each other.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: October 16, 2012
    Assignee: Intellectual Ventures II LLC
    Inventor: Won-Ho Lee
  • Patent number: 8269260
    Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.
    Type: Grant
    Filed: August 22, 2011
    Date of Patent: September 18, 2012
    Assignee: InVisage Technologies, Inc.
    Inventors: Hui Tian, Edward Sargent
  • Patent number: 8247853
    Abstract: A stratified photodiode for high resolution CMOS image sensors implemented with STI technology is provided. The photodiode includes a semi-conductive layer of a first conductivity type, multiple doping regions of a second conductivity type, multiple doping regions of the first conductivity type, and a pinning layer. The multiple doping regions of the second conductivity type are formed to different depths in the semi-conductive layer. The multiple doping regions of the first conductivity type are disposed between the multiple doping regions of the second conductivity type and form multiple junction capacitances without full depletion. In particular, the stratified doping arrangement allows the photodiode to have a small size, high charge storage capacity, low dark current, and low operation voltages.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: August 21, 2012
    Assignee: Intellectual Ventures II LLC
    Inventor: Jaroslav Hynecek
  • Patent number: 8227884
    Abstract: Photodetector arrays, image sensors, and other apparatus are disclosed. In one aspect, an apparatus may include a surface to receive light, a plurality of photosensitive regions disposed within a substrate, and a material coupled between the surface and the plurality of photosensitive regions. The material may receive the light. At least some of the light may free electrons in the material. The apparatus may also include a plurality of discrete electron repulsive elements. The discrete electron repulsive elements may be coupled between the surface and the material. Each of the discrete electron repulsive elements may correspond to a different photosensitive region. Each of the discrete electron repulsive elements may repel electrons in the material toward a corresponding photosensitive region. Other apparatus are also disclosed, as are methods of use, methods of fabrication, and systems incorporating such apparatus.
    Type: Grant
    Filed: November 4, 2009
    Date of Patent: July 24, 2012
    Assignee: OmniVision Technologies, Inc.
    Inventor: Hidetoshi Nozaki
  • Patent number: 8217432
    Abstract: The invention relates to a field effect transistor comprising at least one source electrode layer and at least one drain electrode layer arranged in the same plane, a semiconductor layer, an insulator layer and a gate electrode layer, wherein the gate electrode layer, as seen perpendicular to the plane of the at least one source electrode layer and the at least one drain electrode layer, only partly covers a channel arranged between the at least one source electrode layer and the at least one drain electrode layer.
    Type: Grant
    Filed: October 4, 2007
    Date of Patent: July 10, 2012
    Assignee: PolyIC GmbH & Co. KG
    Inventors: Andreas Ullmann, Walter Fix
  • Patent number: 8193023
    Abstract: A unit pixel of an image sensor having a three-dimensional structure includes a first chip and a second chip which are stacked, one of the first chip and the second chip having a photodiode, and the other of the first chip and the second chip having a circuit for receiving information from the photodiode and outputting received information. The first chip includes a first pad which is projectedly disposed on an upper surface of the first chip in such a way as to define a concavo-convex structure, and the second chip includes a second pad which is depressedly disposed on an upper surface of the second chip in such a way as to define a concavo-convex structure corresponding to the concavo-convex structure of the first chip. The first chip and the second chip are mated with each other through bonding of the first pad and the second pad.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: June 5, 2012
    Assignee: Siliconfile Technologies Inc.
    Inventor: Heui-Gyun Ahn
  • Patent number: 8169499
    Abstract: A video camera (100) for transmitting image data from an image pickup device to an image processing device with reduced electric power includes a C-MOS image sensor (110) that reads captured image data on the basis of a reference clock CLK0, a frequency multiplying circuit (121) that generates a high-speed clock CLK1, a rearranging circuit (122) that transposes the captured image data into bit data sequences, a data output section (120) that causes each data transmitter (124) to sequentially transmit a corresponding bit data sequence to the outside on the basis of the high-speed clock CLK1, and a system controller (400) that drives data transmitters (124), the number of which is proportional to a transmission speed.
    Type: Grant
    Filed: June 26, 2007
    Date of Patent: May 1, 2012
    Assignee: Sony Corporation
    Inventor: Tetsuya Shimoda
  • Patent number: 8164167
    Abstract: An integrated circuit structure is disclosed. The integrated circuit structure includes a first package substrate including a radiating element, the radiating element having a radiating element connection extending from the radiating element. The integrated circuit structure further includes a first chip positioned adjacent to the radiating element connection, the first chip having a first chip connection on a surface of the first chip, wherein the first chip connection forms a capacitive coupling with the radiating element connection. A method of forming an integrated circuit structure is also disclosed.
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: April 24, 2012
    Assignee: Nanyang Technological University
    Inventors: Yue Ping Zhang, Mei Sun
  • Patent number: 8149306
    Abstract: A solid-state imaging device capable of reducing an eclipse (blocking) of an incident light at a circumferential portion of a light receiving portion and realizing a larger angle of view and high-speed driving. A single-layer transfer electrode configuration of forming first transfer electrodes and second transfer electrodes by one polysilicon layer is adopted. Two shunt wirings extending in a horizontal direction are formed on the first transfer electrodes connected in a horizontal direction and, for example, four-phase transfer pulses are supplied to first transfer electrodes and second transfer electrodes on transfer channels through low-resistance shunt wirings extending in the horizontal direction.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: April 3, 2012
    Assignee: Sony Corporation
    Inventor: Hideo Kanbe
  • Patent number: 8120069
    Abstract: A stratified photodiode for high resolution CMOS image sensors implemented with STI technology is provided. The photodiode includes a semi-conductive layer of a first conductivity type, multiple doping regions of a second conductivity type, multiple doping regions of the first conductivity type, and a pinning layer. The multiple doping regions of the second conductivity type are formed to different depths in the semi-conductive layer. The multiple doping regions of the first conductivity type are disposed between the multiple doping regions of the second conductivity type and form multiple junction capacitances without full depletion. In particular, the stratified doping arrangement allows the photodiode to have a small size, high charge storage capacity, low dark current, and low operation voltages.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: February 21, 2012
    Assignee: Intellectual Ventures II LLC
    Inventor: Jaroslav Hynecek
  • Patent number: 8115237
    Abstract: A solid-state image pickup element comprises a first-conductive type planar semiconductor layer formed on a second-conductive type planar semiconductor layer, a hole portion formed in the first-conductive type planar semiconductor layer to define a hole therein, and a first-conductive type high-concentration impurity region formed in a bottom wall of the hole portion. The solid-state image pickup element also includes a first-conductive type high-concentration impurity-doped element isolation region, a second-conductive type photoelectric conversion region, a transfer electrode formed on the sidewall of the hole portion through a gate dielectric film, a second-conductive type CCD channel region, and a read channel formed in a region of the first-conductive type planar semiconductor layer sandwiched between the second-conductive type photoelectric conversion region and the second-conductive type CCD channel region.
    Type: Grant
    Filed: May 25, 2011
    Date of Patent: February 14, 2012
    Assignee: Unisantis Electronics Singapore PTE Ltd.
    Inventors: Fujio Masuoka, Hiroki Nakamura
  • Patent number: 8080835
    Abstract: A semiconductor device of the present invention includes a semiconductor substrate, a semiconductor element formed in the semiconductor substrate, a surface layer formed on the semiconductor substrate, and a capacitance type sensor formed on the surface layer. The surface layer has a planar portion whose surface is planar. The capacitance type sensor includes a lower thin film parallelly opposed to the surface of the planar portion and an upper thin film opposed to the lower thin film at a prescribed interval on the side opposite to the surface layer.
    Type: Grant
    Filed: August 22, 2008
    Date of Patent: December 20, 2011
    Assignee: Rohm Co., Ltd.
    Inventor: Goro Nakatani
  • Patent number: 8076742
    Abstract: An image sensor according to embodiments may include a semiconductor substrate, photodiodes disposed over the semiconductor substrate, a dielectric layer formed over the photodiodes, a color filter layer formed over the dielectric layer, a planarization layer formed over the color filter layer, a phase change material formed over the planarization layer, and a plurality of microlenses formed over the planarization layer, wherein the phase change material is positioned in the microlens. Further, a method for manufacturing an image sensor according to embodiments may include forming a dielectric layer over a semiconductor substrate with a plurality of photodiodes, sequentially forming a color filter layer and a planarization layer over the dielectric layer, forming a phase change material over the planarization layer, forming a patterned phase change material by partially etching the phase change material, and forming microlenses over the planarization layer and the phase change material.
    Type: Grant
    Filed: November 3, 2009
    Date of Patent: December 13, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Byung-Ho Lee
  • Patent number: 8072040
    Abstract: An image pickup apparatus includes light receiving areas arranged two-dimensionally. A vertical scanning circuit comprises unit circuit stages arranged in the vertical direction and a horizontal scanning circuit comprises unit circuit stages arranged in the horizontal direction, for selecting and reading light receiving areas in succession. The vertical and horizontal scanning circuits are arranged in spaces between the light receiving areas. Two or more unit circuit stages of the vertical scanning circuit are provided in a first space between the light receiving areas. Two or more unit circuit stages of the horizontal scanning circuit are provided in a second space between the light receiving areas. Two or more unit circuit stages of a scanning circuit are provided in a third space between the light receiving areas, the third space being provided in a space between the light receiving areas at a crossing area of the vertical and horizontal scanning circuits.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: December 6, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventor: Tomoyuki Noda
  • Patent number: 8053816
    Abstract: It is an object of the present invention to obtain a photoelectric conversion device having a favorable spectral sensitivity characteristic and no variation in output current without such a contamination substance mixed into a photoelectric conversion layer or a transistor. Further, it is another object of the present invention to obtain a highly reliable semiconductor device in a semiconductor device having such a photoelectric conversion device.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: November 8, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuya Arao, Daiki Yamada, Hidekazu Takahashi, Naoto Kusumoto, Kazuo Nishi, Yuusuke Sugawara, Hironobu Takahashi
  • Patent number: 8053855
    Abstract: A CMOS image sensor for improving light sensitivity and peripheral brightness ratio, and a method for fabricating the same. The CMOS image sensor includes a substrate on which a light sensor and device isolating insulation films are formed, in which the top of the substrate is coated with a plurality of metal layers and oxide films; a plurality of reflective layers formed inside the metal layers, each being spaced apart; a color filter embedded in a groove formed by etching the oxide films inside the reflective layers by a predetermined thickness; a plurality of protrusions formed on both sides of the top of the color filter, each arranged at a predetermined distance from one another; a flat layer formed on the top of the protrusions and the oxide films; and a micro-lens formed on the top of the flat layer. The reflective layer disposed at the top of the photodiode is made of a material having a high reflectance and low absorptivity.
    Type: Grant
    Filed: May 16, 2005
    Date of Patent: November 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-ho Nam, Jin-hwan Kim, Gee-young Sung
  • Patent number: 8030692
    Abstract: A solid state image sensing device in which many pixels are disposed in a matrix on a two-dimensional plane comprises a plurality of light receiving devices disposed in such a way that a center interval may periodically change in a column direction and/or a row direction, and a plurality of micro-lenses, for collecting an incident light of each light receiving device, wherein a center interval periodically changes in accordance with the periodic change of the center interval of the light receiving device.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: October 4, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Tadao Inoue, Hiroshi Daiku
  • Patent number: 7968888
    Abstract: An object of the present invention is to provide a small solid-state image sensor which realizes significant improvement in sensitivity. The solid-state image sensor of the present invention includes a semiconductor substrate in which photoelectric conversion units are formed, a light-blocking film which is formed above the semiconductor substrate and has apertures formed so as to be positioned above respective photoelectric conversion units, and a high refractive index layer formed in the apertures. Here, each aperture has a smaller aperture width than a maximum wavelength in a wavelength of light in a vacuum converted from a wavelength of the light entering the photoelectric conversion unit through the apertures, and the high refractive index is made of a high refractive index material having a refractive index which allows transmission of light having the maximum wavelength through the aperture.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: June 28, 2011
    Assignee: Panasonic Corporation
    Inventors: Takumi Yamaguchi, Takahiko Murata, Shigetaka Kasuga
  • Patent number: 7956388
    Abstract: It is intended to provide a solid-state image pickup element capable of reducing an area of a read channel to increase a light-receiving area. The solid-state image pickup element comprises a p-type planar semiconductor, a hole formed in the p-type planar semiconductor, a p+-type region formed in a bottom of the hole, a p+-type isolation region formed in a part of a sidewall of the hole and connected to the p+-type region, an n-type photoelectric conversion region formed beneath the p+-type region, a transfer electrode formed on the entire sidewall of the hole through a gate dielectric film, a CCD channel region formed in a top of the p-type planar semiconductor, and a read channel formed in a region of the p-type planar semiconductor between the n-type photoelectric conversion region and the CCD channel region.
    Type: Grant
    Filed: October 21, 2009
    Date of Patent: June 7, 2011
    Assignee: Unisantis Electronics (Japan) Ltd.
    Inventors: Fujio Masuoka, Hiroki Nakamura
  • Patent number: 7884397
    Abstract: A main object of the present invention is to provide a solid-state image sensor capable of efficiently collecting a light beam when the central position of the light receiving element and the central position of the micro lens do not coincide with each other in the plan view owing to a plural pixel sharing structure.
    Type: Grant
    Filed: September 26, 2006
    Date of Patent: February 8, 2011
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Masaaki Kurihara, Makoto Abe, Katsutoshi Suzuki
  • Patent number: 7880259
    Abstract: A solid-state image sensor capable of improving detection sensitivity for an output signal is provided. This solid-state image sensor comprises a first gate electrode formed on a semiconductor substrate, a first impurity region formed on the semiconductor substrate at a first distance from the first gate electrode for receiving the signal charges and a second gate electrode formed at a second distance from the first impurity region for discharging unnecessary signal charges after extraction of a voltage signal from the first impurity region. The first distance between the first impurity region and the first gate electrode is larger than the second distance between the first impurity region and the second gate electrode.
    Type: Grant
    Filed: August 15, 2005
    Date of Patent: February 1, 2011
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Takayuki Kaida
  • Patent number: 7875491
    Abstract: A complementary metal-oxide-semiconductor image sensor may include: a semiconductor substrate; a photodiode formed on a first portion of the semiconductor substrate; a transfer gate formed on the semiconductor substrate, near the photodiode, to transfer optical charges accumulated in the photodiode; a floating diffusion area formed on a second portion of the semiconductor substrate, on an opposite side of the transfer gate from the photodiode, to accommodate the optical charges; and/or a channel area formed under the transfer gate and contacting a side of the photodiode to transfer the optical charges. The transfer gate may be formed, at least in part, of transparent material. A method of manufacturing a complimentary metal-oxide-semiconductor image sensor may include: forming the photodiode; forming the floating diffusion area, separate from the photodiode; and/or forming the transfer gate, near the photodiode, to transfer optical charges accumulated in the photodiode.
    Type: Grant
    Filed: January 24, 2008
    Date of Patent: January 25, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Doo-cheol Park, Jung-hyeon Kim, Jun-young Lee
  • Patent number: RE42292
    Abstract: A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to look for that pattern. The time when the pattern is received indicates the time of flight. A CMOS active pixel image sensor includes a plurality of pinned photodiode photodetectors that use a common output transistor. In one configuration, the charge from two or more pinned photodiodes may be binned together and applied to the gate of an output transistor.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: April 12, 2011
    Assignee: Round Rock Research, LLC
    Inventors: Vladimir Berezin, Alexander I. Krymski, Eric R. Fossum
  • Patent number: RE44482
    Abstract: A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to look for that pattern. The time when the pattern is received indicates the time of flight A CMOS active pixel image sensor includes a plurality of pinned photodiode photodetectors that use a common output transistor. In one configuration, the charge from two or more pinned photodiodes may be binned together and applied to the gate of an output transistor.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: September 10, 2013
    Assignee: Round Rock Research, LLC
    Inventors: Vladimir Berezin, Alexander I. Krymski, Eric R. Fossum