Abstract: A solid state image sensor includes a semiconductor substrate and a plurality of transfer lines over the substrate and receiving clock signals, at least one of the plurality of transfer lines having a transparent conductive material. A plurality of transfer electrodes are connected to the transfer lines and a plurality of photoelectric conversion regions under a surface of the substrate generate image signals. A plurality of charge transfer regions under the surface of the substrate transfer the image signals from the photoelectric conversion regions in response to the clock signals from the transfer lines.

Abstract: The present invention provides an interline solid state image sensor comprising the following elements. A plurality of vertical charge coupled device resistors are provided, each of which extends in a vertical direction. The vertical charge coupled device resistors are parallel to each other. A plurality of photo-diodes are aligned along one side of each of the vertical charge coupled device resistors so that the photo-diodes are aligned between adjacent two vertical charge coupled device resistors. Each of the photo-diodes is connected via a charge read-out gate region to the vertical charge coupled device resistor. Each of the vertical charge coupled device resistor comprises laminations of a first conductivity type diffusion layer and a second conductivity type diffusion layer extending under the first conductivity type diffusion layer. A lateral charge coupled resistor extends in a lateral direction. The lateral charge coupled resistor is coupled with ends of the vertical charge coupled device resistors.

Abstract: An interline sensor is constructed using photocapacitors. The vertical shift register of the interline sensor is operated in a uniphase mode, i.e., holding one of the two phase (.O slashed.2) at a D.C. potential while fluctuating the other phase (.O slashed.1) between a voltage that is sufficiently above and below that D.C. potential to facilitate transfer of charge from one phase to the next. The uniphase mode is facilitated by a single electrode that covers both the phase that is held at a constant D.C. potential and the photodetector having photocapacitor charges. The single electrode in the preferred embodiment is an indium tin oxide electrode. The charges are transferred from the photocapacitors to the vertical shift register by a third level clock into .O slashed.1 adjacent the photodetectors.It is also proposed that the same ITO electrode be utilized to for phase 2 of both the vertical and horizontal CCD shift registers.

Abstract: A charge-coupled device includes a first P-type well formed in an N-type semiconductor substrate, a second P-type well formed repeatedly the first P-type well region, a charge-transfer region (BCCD) formed within the second P-type well region, an N-type photodiode region (PDN) formed in the upper portion of the first P-type well so as to be isolated from the charge-transfer region, a first high concentration P-type photodiode region (first PDP.sup.+ region) formed in the upper surface of the N-type photodiode region excluding the charge-transfer region and serving as a charge-isolating layer, first and second poly-gates formed repeatedly on the charge-transfer region, and a second high concentration self aligned P-type photodiode region (second PDP.sup.+ region) formed in the surface of the first high concentration P-type photodiode region. The charge-isolating region is thin to extend the potential pocket of each light-conversion PDN region.

Abstract: By designing pixels with highly transparent ITO electrodes and asymmetric gates such that as much light as possible falls upon a region covered by an ITO electrode, light sensitivity is increased. Impurity diffusion from the ITO electrode into the silicon below is prevented by employing an Oxide/Nitride/Oxide stack as a dielectric. Employing at least some polysilicon electrodes with ITO electrodes is desirable to allow entrance passages through which hydrogen passivation can be accomplished. The pixel architecture can be designed to increase sensitivity further by other design choices. The first of these choices is to incorporate a lenslet on each pixel such that as much as possible of the light falling on the pixel is made to pass through the portion of the pixel covered with ITO.

Abstract: A multiple-frame image sensor comprising a full-frame CCD sensor of two-story construction having an overlying photosensitive layer that converts input radiation to electric charge and an underlying CCD structure which functions to collect and store the charge for read-out of more than one charge packet per pixel, with the pixels being of minimum size. The sensor structure is rendered capable of handling more than one photosignal charge packet per pixel in an area-efficient way through the use of ripple clocking, so that in a preferred embodiment a 4-poly, 7-phase ripple-clocked vertical CCD register is fabricated with 7 gates, one of which is run vertically to create openings, e.g., between the 1 and 6 gates, that pass electrode contacts to N+ sources in the channel stops of the register to form photosignal charge packets in the region between the stops. The ripple-gating controls the movement of the charge packets for storage along the CCD channel until 3 charge packet read-out.

Abstract: The leakage current at the silicon-to-silicon dioxide interfaces of an active pixel sensor cell is substantially reduced by eliminating field oxide from the cell, and by insuring that, during integration, every surface region of the cell that is not heavily doped is either biased into accumulation or biased into inversion. Each of these states, in turn, substantially limits the number of electrons from thermally-generated electron-hole pairs at the surface that can contribute to the leakage current.

Abstract: A solid-stage imaging device has a region in which there is disposed an unwanted charge drain section 106 for receiving unwanted charges drained from vertical charge transfer sections 102 and a horizontal charge transfer section 103. A P-type well layer 302 is not disposed in the region, and a voltage is applied to an N.sup.-- -type semiconductor substrate 301 in a direction opposite to a voltage applied to the P-type well layer 302 for draining unwanted charges to the N.sup.-- -type semiconductor substrate 301. The unwanted charge drain section can be fabricated without an increase in the number of fabrication steps for manufacturing the solid-state imaging device.

Abstract: A sensor array has cells, each with a sensing element and a switching element. The sensing element includes a charge collection electrode. An anticoupling layer between the charge collection electrodes and the data lines is structured to reduce capacitive coupling between the electrodes and the data lines below a threshold level at which crosstalk is unacceptable. If charge collection electrodes overlap data lines, the anticoupling layer can reduce capacitive coupling so that crosstalk is no greater than 2%. The anticoupling layer can be a dielectric layer with dielectric constant less than 6 and with thickness greater than 1.5 .mu.m, with the dielectric constant being sufficiently low and the thickness sufficiently great that the anticoupling layer reduces capacitive coupling below the threshold level.

Abstract: A charge transfer device is disclosed in which the number of transfer clocks can be decreased, and also, power consumption, the heating amount and parasitic emissions are also reduced. Three groups of electrodes are repeatedly disposed in an alternating sequence above an N-type channel (transfer channel). Among the three groups of electrodes, a predetermined DC bias voltage supplied from a DC power supply is applied to one group of electrodes. Between the remaining two groups of electrodes, a single-phase transfer clock H.phi. supplied from the exterior of the device is directly applied to one group of electrodes, while a transfer clock H.phi.' produced by delaying the transfer clock H.phi. by a predetermined delay time in a delay circuit is applied to the other group of electrodes. Also disclosed is a solid-state imaging apparatus using the above-described charge transfer device.

Abstract: Semiconductor radial rays detector is provided that improves a breakdown voltage yield of a gate insulating film of a semiconductor radial rays detector and prevents an increase in resistance of a gate electrode caused by the improvement in the breakdown voltage yield. In the inventive semiconductor radial rays detector, material used as a gate electrode 1 of a reading condenser is not an Al film (aluminum film) but a POLY Si film (a polycrystalline silicon film), or silicide or metal including silicide with a high melting point such as WSi (tungsten silicide) (strictly its composition is indefinite as expressed as W.sub.x Si.sub.y) or TiSi (titan silicide) (expressed as Ti.sub.x Si, in the same manner).

Abstract: A color linear charge coupled device for an image pickup apparatus includes red, green, and blue photo diode arrays. First, second, third and fourth transfer gates formed in the device move signal charges generated at the photo diode arrays toward first, second and third horizontal charge coupled device (HCCD) shift registers. By controlling the transfer gates, the red and green signal charges are first transferred to their HCCD shift registers. The blue signal charge is then transferred to its HCCD shift register. Only three HCCD shift registers are required, thus, the device dimension and configuration is considerably simplified compared to prior art configurations. Also, the color resolution of the device is greatly improved because the distance between the respective photo diode arrays is substantially decreased.

Abstract: A charge transfer image pickup device is disclosed. One embodiment of the device includes a plurality of photoelectric conversion elements for producing signal charges in response to light applied thereto. A vertical charge transfer part including a first region having a first well layer and for transferring the signal charges produced by the photoelectric conversion elements is provided. A horizontal charge transfer part including a second region having a second well layer and coupled to the vertical charge transfer part to receive transferred signal charges by using a terminal vertical transfer electrode of the vertical charge transfer part is also included. The first and second well layers partially overlap to form an overlap section that does not extend over the terminal vertical transfer electrode in the direction from the second region to the first region.

Abstract: A charge coupled device (CCD) image sensor and more particularly a wiring of charge transfer electrodes of a CCD image sensor which is made suitable for improving the charge transfer efficiency of vertical charge coupled devices (VCCDs) thereof.

Abstract: A solid-state CCD image pick-up device includes optoelectric transducing elements corresponding to pixels vertically and horizontally arrayed in a matrix forming column linear arrays defining a column direction and at least one vertical charge transfer path associated with a corresponding adjacent column linear array. Pixel signals are vertically transferred from the column linear arrays to the vertical charge transfer paths such that gate signals occurring at predetermined times are applied to gate electrodes of the vertical charge transfer paths to permit the pixel signals to be scan read by a horizontal charge transfer path. Switching elements are provided for transfer gate electrodes and a drive circuit sequentially generates drive signals for groups of gate electrodes during periods in which the switching elements are rendered conductive to allow a full frame scan read to be performed by supplying a predetermined number of timing signals to the gate electrodes.

Abstract: A color linear image sensor apparatus includes a wiring conductor formed of a first level polysilicon film which is provided on a channel stopper in photocell arrays and which is connected to a first transfer gate electrode of a CCD register. The first transfer gate electrode is also connected to a second transfer gate electrode through a contact hole. Thus, even if the wiring conductor is formed on the channel stopper in the photocell array, a dead zone for locating a wiring conductor for the driving clocks becomes unnecessary, and accordingly, the distance between photocell arrays can be shortened to two thirds to a half of the distance in the conventional examples.

Abstract: A photoelectric cell of the present invention comprises a first conduction type first semiconductor region; a second conduction type second semiconductor region formed in the surface of the first semiconductor region so as to form a pn junction together with the first semiconductor region; a first conductive region formed in the surface of the first semiconductor region so as to be separated from the second semiconductor region and to form a first rectifier junction together with the first semiconductor region; a second conductive region formed in the surface of the first semiconductor region so as to be separated from the first conductive region and to be electrically connected to the second semiconductor region to form a second rectifier junction together with the first semiconductor region; a third conductive region formed in the surface of the second semiconductor region so as to form a third rectifier junction together with the second semiconductor region; a first insulated gate formed on a first channel

Abstract: There are provided a solid state imaging device having high sensitivity and exhibiting high degree of light utilization and a method of manufacturing the same. An insulating film 42, a transfer electrode 43, a light shielding film 44, a protective film 45, and a flat layer 51 are formed above a layer having a photoelectric conversion portion, and a concave lens layer 52 is formed on the flat layer 51 to a lattice pattern. The concave lens layer 52 of the lattice pattern is hot melted for conversion into a concave type micro-lens 52. A resin layer 53 having a refractive index smaller than that of the concave lens 52, a buffer layer 54, and a convex type micro-lens 57 are sequentially formed above the concave type micro-lens 52. The concave type micro-lens 52 functions to bring light rays focused by the convex type micro-lens 57 to a position close to light incident vertically upon the photoelectric conversion portion 41.

Abstract: A linear solid state imaging device including a substrate (21), a first well (22) of a predetermined junction depth, a second well (23) of a deeper junction than the first well (22), a trapezoid type photodiode area (24) linearly arranged in the first well (22) in which except for one side of the parallel sides of the trapezoid area, the other sides are surrounded by a channel stop area (31), a pair of HCCD areas (25) in the second well in areas of both sides of the photodiode (24) and connected to the output amplifier, a shift gate (28) formed in the substrate between the areas for the photodiode (24) and the HCCD and for transferring the accumulated charges in the photodiode area to the HCCD area, a shift gate channel area (26) formed, in the first well underneath the shift gate (28) and having a six-sided shape one side of which is in contact with the photodiode area (24), another side of which has a V-shaped depression and the other sides are surrounded by a channel stop area (31), a potential barrier for

Abstract: The solid-state image sensor disclosed has a photodiode including a P-type layer provided on a surface of a semi-conductor substrate, an N-type layer provided in the N-type layer, and a P.sup.+ -type region which is disposed on a surface of the N-type layer. A P.sup.++ -type region is disposed in a region surrounding the photodiode excepting in a read region for reading out charges in the photodiode, and this P.sup.++ -type region has a higher impurity concentration and a greater depth than the P.sup.+ -type region. That is, the P.sup.++ -type region which isolates photodiode regions and vertical CCD regions from one another is formed as a high impurity concentration diffusion layer or an electron trap region containing a large amount of electron trap centers. Thus, it is possible to reduce smear generation in unit pixels and to produce sharp images.

Abstract: Solid state image sensor which can improve photic sensitivity of photodiodes by providing only one transmission line between the photodiodes, leading to reduction of width of the transmission line passing between the photodiodes, including a substrate, photodiodes formed on the substrate, a first to a fourth transmission gates arranged in sequence by four for every two photodiodes on a part of the substrate on one side of each of the photodiode, a first, and a second transmission lines arranged one by one alternatively extended at length on the substrate between adjacent photodiodes connected to the first, and the second transmission gates respectively for applying a first, and a second driving clock signals, respectively, a first contact formed at the third transmission gate, a second contact formed at the fourth transmission gate, and a third, and a fourth transmission lines formed over the transmission gates in parallel at length connected through the third, and the fourth transmission gates and the first,

Abstract: A very high sensitive solid state imager is realized by employing a multiplication process which includes avalanche multiplication of charges as generated by an incident light at each of several optical to electrical converting components (hereafter referred to as a photosite). Thus, the functions of a high speed electron shutter are obtained. Notwithstanding a high sensitivity, a reduced supply voltage for avalanche multiplication can be realized by laminating a transparent electrode of poly-silicon or ITO on a photosite, applying an avalanche multiplication voltage thereupon through its capacity coupling, and simultaneously applying a negative voltage on a read-out gate during a readout time. Furthermore, a reduced readout voltage can also be realized by laminating a transparent electrode of poly-silicon or ITO, on a photosite, and applying a voltage of polarity opposite to that applied during an avalanche multiplication time.

Abstract: A structure for a charge coupled device (CCD) to minimize effects of masking defects of a predetermined dimensional extent includes a plurality of sets of conductors, a plurality of strapping networks and a connection matrix of via contacts. Each set of the plurality of sets of conductors includes a plurality of parallel elongate first conductors oriented in a first direction and disposed substantially in a first plane, each first conductor being comprised of a first material and characterized by a first sheet resistance per square of conductor.

Abstract: A color linear image sensor apparatus includes a wiring conductor formed of a first level polysilicon film which is provided on a channel stopper in photocell arrays and which is connected to a first transfer gate electrode of a CCD register. The first transfer gate electrode is also connected to a second transfer gate electrode through a contact hole. Thus, even if the wiring conductor is formed on the channel stopper in the photocell array, a dead zone for locating a wiring conductor for the driving clocks becomes unnecessary, and accordingly, the distance between photocell arrays can be shortened to two thirds to a half of the distance in the conventional examples.

Abstract: A solid state image device including: a plurality of photoelectric converting elements arranged in a matrix pattern along a first and a second direction in a semiconductor substrate; a plurality of electric charge transfer regions for receiving electric charges from the photoelectric converting elements and for transferring the electric charges toward the first direction, the electric charge transfer regions being provided adjacent to the plurality of photoelectric converting elements in the semiconductor substrate and extending along the first direction; and a plurality of gate electrodes for applying a voltage to the electric charge transfer regions to transfer the electric charge from the photoelectric converting elements to the electric charge transfer regions, and to transfer the electric charges toward the first direction, each of the gate electrodes having a plurality of transfer electrode portions provided over the electric charge transfer regions and a plurality of clip electrode portions electricall

Abstract: A charge-coupled device type solid state image pickup in which the overflow drain is formed at a high concentration on each photo-sensitive well. A high-concentration impurity layer is formed in the top layer of a PNPN structure to act as a drain against overflow. The structure enables overflow and electronic shutter operation even under low voltage conditions and may be realized on a chip.

Abstract: A charge coupled device image sensor which can prevent smear and improve sensitivity, including a substrate of a first conductive type, a first well of a second conductive type formed on one side of said substrate, a second well of the second conductive type formed on the other side of said substrate, a pair of photo-detecting areas formed adjoining in said first well, a pair of charge transfer areas formed close to each photo-detecting area and adjoining in said second well, a channel stop area formed between said adjoining photo-detecting areas and said charge transfer areas and for isolating each of the areas,.

Abstract: A CCD shift register includes a first gate electrode, a second gate electrode disposed adjacent to and longitudinally spaced from the first gate electrode, and a buried layer having a first dopant impurity concentration. The first gate electrode is disposed over the buried layer so as to define a first buried layer area. The second gate electrode is disposed over the buried layer so as to define a second buried layer area greater than the first buried layer area. In the buried layer, a trench region is formed so as to have a second dopant impurity concentration greater than the first dopant impurity concentration. The first gate electrode is disposed over the trench region so as to define a first trench area. The second gate electrode being disposed over the trench region so as to define a second trench area less than the first trench area.

Abstract: A CCD structure including high resolution pixels. The gate electrodes of the CCD are separated by gaps in the order of 0.6 .mu.m which are made to look smaller than their physical size by the use of dielectric filler material in the gaps. The dielectric filler material has a relatively high dielectric constant which is relatively large for the clock frequencies utilized but may be relatively low for optical frequencies. The dielectric constant of the dielectric filler material is typically greater than 20 and is selected from materials such as tantalum oxide, zirconium oxide, barium titanate and barium strontium titanate.

Abstract: A solid state image sensing device has a photoelectric transfer section for transducing incident light into signal charges, at least firs% and second charge transfer paths, a charge transferring section for transferring the signal charges from the photoelectric transfer section to the first path at a first timing and for transferring the signal charges transferred to the first path to the second path at a second timing and a charge supply section for applying bias charges to the signal charges to be transferred from the first to the second path. In the device, bias charges supplied to the first path is transferred to the second path. Signal charges are transferred to the first path and then to the second path. The signal and the bias charges both transferred to the second path are outputted.

Abstract: A number of electrode sets each respectively consisting of a number of gate electrodes disposed at each of matrix-addressed charge-coupled device ("CCD") registers are separately arranged in a column direction of the registers, the gate electrodes in each of the electrode sets being separately arranged in a different direction from the column direction, and a combination of interconnections is provided among conductors for selectively applying a number of pulse voltages different in phase to the gate electrodes in each of the electrode sets. The pulse voltages are applied with a combination of different phases to the gate electrodes in each of the electrode sets, and the combination of the different phases are changed, thereby controlling the position of a sensitivity barycenter of each of the electrode sets to raise the resolution of an image sensor.

Abstract: A charge transfer device for making a compact solid state imaging apparatus. The device has a sloping potential gradient in the vertical to horizontal charge coupling region to achieve an increasing fringe electrical field without increasing the actual electrode width or the actual channel widths. A first region, serving as the charge storage region, at the terminal end of the vertical charge transfer section, is broadened gradually towards the horizontal charge transfer section while narrowing the terminal end of the second region, serving as the charge barrier region, towards the horizontal charge transfer section. The effective width changes of the storage and barrier regions take place in a complementary manner within one vertical channel section so that the actual width of the channel section remains constant.

Abstract: A solid-state imaging device which restrains the smear phenomenon effectively without reduction of the dielectric breakdown strength between the transfer electrode and the light shielding film. A first insulating film covers photoelectrical converting regions each of which receives incident light through the first insulation film to generate and store a signal charge. A second insulating film covering a charge transfer region is of a layered structure containing a first insulation layer with a relatively lower dielectric constant such as SiO.sub.2 and a second insulation layer with a relatively higher dielectric constant such as Si.sub.3 N.sub.4. The distance between the transfer electrode and the light shielding film can be decreased, providing decrease in thickness of the first insulating film. The smear phenomenon is restrained effectively without reduction of the dielectric breakdown strength between the transfer electrode and the light shielding film.

Abstract: A solid-state imaging device is disclosed.

Abstract: In a CCD solid state image sensing device in which a photosensitive section is constructed by a photodiode formed by a PN junction between a first P-type well region and an N-type impurity diffusion region formed on an N-type silicon substrate, the N-type impurity diffusion region is formed by the ion implantation of single substance of arsenic (As). According to this CCD solid state image sensing device, a bright flaw on an image sensing screen, which is one of the defects encountered with an image sensing screen, can be reduced. Also, the n-type impurity diffusion region constructing the PN Junction can be reduced in size and the CCD solid state image sensing device itself can be made compact in size. Further, a method of manufacturing a CCD solid state image sensing device also is provided.

Abstract: A solid-state imaging device that enables correction of the shading phenomenon effectively without overall sensitivity reduction. This device contains pixels arranged in an array to form an image area, photodetectors for detecting incident light to generate signal charges, and charge transfer devices for transferring the signal charges generated in the plurality of photodetectors. Each of the pixels contains one of the photodetectors and one of the charge transfer devices. The sensitivity of the photodetectors varies according to placement of the photodetectors in the image area, so that the sensitivity has a distribution that cancels nonuniformity of the incident light in the image area. The sensitivity of the photodetectors is preferably distributed concentrically with the center of the image area.

Abstract: A solid state image sensing element including a substrate, photodiode areas each having a plurality of photodiodes in matrix array formed on the substrate, a flat area formed over the substrate including the photodiode areas, color filter layers formed in predetermined areas on the flat area, a top coating layer formed in predetermined areas on the flat area, a top coating layer formed over the substrate including the color filter areas, stripe microlenses each having a flat upper surface arranged to correspond to the photodiodes arranged in one direction in the photodiode areas and formed on the top coating layer, and mosaic microlenses formed on the flat upper surface of the stripe microlens each arranged corresponding to each of the photodiodes in the photodiode area.

Abstract: A method and apparatus for generating timing signals within the sensor in an imaging system by making provisions internally within a sensor that allows the sensor to generate the timing signals which are then output to the system to control the image sensor timing This alleviates the system from the responsibility of counting pixels and lines. The sensor will give at predetermined times, outputs which have the same wave form as the normal video output but with a much higher amplitude than the maximum video output recognized by the image processing system. These output signals will identify the end of the line and likewise will identify the end of the frame (or field). The resulting sensor can maintain its own timing sequence accurately tracking the time for lines and frame readout.

Abstract: In a solid-state image sensing device in which metallic wirings for supplying drive pulses to every transfer electrodes of vertical CCD registers are provided on the vertical CCD registers, the spacings between the metallic wirings are given mutually different sizes for an effective image sensing region and an optical black region. The shape of the step part beneath a light shielding film in the optical black region is improved, and the transmission of light is prevented. Accordingly, a correct black reference level can be obtained.

Abstract: The present invention is directed to providing a charge-coupled device which can provide accurate signal detection while providing high speed electronic exposure control or shuttering. Exemplary embodiments can maintain charge transfer efficiency at a relatively high level even if a pixel array of the charge-coupled device is clocked rapidly (i.e., exposure control or shuttering speed is increased) for a given pixel pitch.

Abstract: The new CCD output region provides a method of reducing the width of a wide CCD at its output to maintain a high sensitivity output node without sacrificing charge-transfer efficiency. A barrier region is shaped so the "channel width" of the CCD increases towards the input edge of the output gate. The barrier region, therefore, decreases in width towards the output end of the final CCD phase of a multi-phase device. Also, the channel width under the output gate decreases towards its output end in the direction of charge transfer towards the floating diffusion, or detection node. Since the "shaped" portion of the barrier region under the last CCD phase can be formed by the same process steps as the regular-shaped barrier regions, it is possible to form this structure without the requirement for additional masking and implant steps. The advantages of this structure over the prior art are improved charge-transfer characteristics without requiring additional process steps.

Abstract: A first P-type diffusion layer is formed on a semiconductor substrate. A photodiode is formed thereon. A transfer channel is formed on the semiconductor substrate. Agate insulating film is grown from a silicon oxide film on the semiconductor substrate. A transfer gate electrode is formed on the gate insulating film by patterning polysilicon. A light-shielding film of a metallic evaporation film is formed on the transfer gate electrode so that light cannot enter the transmission channel only to be a smear component. A difference in level of about 2 to 4 .mu.m is formed on the semiconductor substrate of the transfer channel due to the transfer gate electrode and the light-shielding film. An underlying smooth layer is formed to smooth the surface difference in level, and a first light-shielding layer is formed on it. A transparent film is formed on it, and a third light-shielding layer is formed via a second light-shielding layer and a transparent film.

Abstract: The present invention is embodied in a charge coupled device (CCD)/charge injection device (CID) architecture capable of performing a Fourier transform by simultaneous matrix vector multiplication (MVM) operations in respective plural CCD/CID arrays in parallel in O(1) steps. For example, in one embodiment, a first CCD/CID array stores charge packets representing a first matrix operator based upon permutations of a Hartley transform and computes the Fourier transform of an incoming vector. A second CCD/CID array stores charge packets representing a second matrix operator based upon different permutations of a Hartley transform and computes the Fourier transform of an incoming vector. The incoming vector is applied to the inputs of the two CCD/CID arrays simultaneously, and the real and imaginary parts of the Fourier transform are produced simultaneously in the time required to perform a single MVM operation in a CCD/CID array.

Abstract: A solid state image sensor device having an effective light detecting element and a peripheral circuit includes a light-shielding film for shielding a periphery of the effective light detecting element, a first wiring film made of the same material as that of the light-shielding film and formed in the same process as that for the light-shielding film, and a second wiring film of aluminum for the peripheral circuit. The first wiring film and the second wiring film form a two layer wiring structure of the peripheral circuit and are electrically interconnected through contact holes in an interlayer insulating film. With this arrangement, it is possible to lower the wiring resistance for the peripheral circuit and also to cause a signal transfer clock pulse of high-frequency to propagate without its waveform becoming dull.

Abstract: Metal wires for applying the clock voltage in a CCD solid state image sensor are angled with respect to the photodiodes that are arranged in a matrix. Also, a photo-blocking layer is formed over the metal wires. Accordingly, light incident on portions of the sensor other than the photodiodes is effectively prevented and noise caused due to coupling with the semiconductor substrate is minimized, thereby improving the picture quality of the solid state image sensor. Furthermore, since the metal wires directly apply the clock voltage to the CCD gates, there is no need for a polysilicon gate conductor. Thus, clock skew is prevented and phase differences between the signal image from the central part and the peripheral part of the solid stage image sensor is greatly reduced.

Abstract: In a color CCD camera, a distance between a micro lens and a photodiode is determined dependent on a color light among red, green and blue. Alternative to this structure, a curvature of a micro lens is determined dependent on a color light among red, green and blue. In accordance with this structure, high sensitivity is obtained with improved color balance.

Abstract: A solid state image sensor including (a) a plurality of photodiodes arranged such that the photodiodes in odd number columns and the photodiodes in even number columns straddle each other, for generating image signal charges by converting light signals into electrical signals, (b) vertical charge coupled devices each formed between the photodiode columns for vertically transmitting the image signal charges generated in each of the photodiodes, and (c) a plurality of microlenses each arranged matched with each of the plurality of photodiodes over each of the photodiodes. Each of the photodiodes is shaped like a peanut shell having a narrower middle part. The photodiodes shape is thereby matched to the focusing shape of each matching microlens, optimizing the cell layout efficiency.

Abstract: Compatibility of high sensitivity with low remaining images, and low crosstalk can be achieved by a laminated solid-state image pickup device, which includes accumulating portions for accumulating electric signals, reading units for reading the electric signals, connecting members formed in contact with the accumulating portions, and a photoconductive film, and by a method for manufacturing the device. The photoconductive film is made of a non-crystalline semiconductor, and is configured by laminating a carrier multiplication layer, a light absorbing layer, a charge injection inhibiting layer of a second conduction type. Each of the connecting members is made of a semiconductor layer of a first conduction type, intrinsic or having a low impurity density, surrounded by a semiconductor layer of the second conduction type or a conductive material.

Abstract: A first transparent protection layer is formed on color filters, and micro lenses are further formed on the first transparent protection layer. Then unevenness due to the micro lenses is flattened by a first transparent resin layer which has water repellency and oil repellency (low surface energy), a high transmittance in visible light range, a high flattening capability in a coating process, and a refractive index lower than the refractive index of the micro lenses. With the above-mentioned arrangement, dust or the like can be difficult to contaminate the surface of the solid state image sensor without loosing the light converging effect of the micro lenses. Even when dust or the like attaches to the surface, it can be easily removed with a cotton swab or the like.

Abstract: The solid state image sensor of the invention comprises a plurality of photosensitive elements arranged in a matrix form, a vertical shift register disposed adjacent each column of the photosensitive elements and adapted to vertically transfer signal charges read from the corresponding photosensitive elements, a storage region for storing signal charges transferred by the vertical shift register and a horizontal shift register adapted to horizontally transfer signal charges read from the storage region, the above vertical shift register comprising units of 2n (n is a positive integer of not less than 3) transfer electrodes which are respectively independent.