Abstract: A CCD comprises a sensing array, a readout register extending adjacent an edge of the sensing array, and an output cell at an output end of the readout register. The output cell has first and second sub-cells with the first sub-cell being between the readout register and the second sub-cell. The first sub-cell of the output cell is of lower capacity than the second sub-cell and is separated from the second sub-cell by a potential barrier.

Abstract: Photoelectric converting parts and vertical CCD register parts are formed in a semiconductor substrate. Polysilicon electrodes are formed on the vertical CCD register parts. On the polysilicon electrodes, polysilicon oxide film and dielectric film are deposited. On the polysilicon electrodes, contact windows are formed by mask matching and etching. The contact windows are formed in the first polysilicon electrode and second polysilicon electrode so as to realize four-phase drive of the solid-state image pickup device. Polysilicon film and tungsten silicide film are formed thereon. By etching these films, a first wiring is formed. A second wiring of aluminum film is formed thereon through an interlayer dielectric film. Hence, a high transfer efficiency and a favorable smear noise characteristic are presented at low illumination.

Abstract: The present invention is directed toward an image sensor array comprising a plurality of pixels. Each pixel includes a photodiode and a CCD channel region. An overflow drain region is provided adjacent the CCD channel region for extraction of excess charges. An insulated gate read-out transfer electrode is further provided above the CCD channel region and a portion of the substrate between the CCD channel region and the photodiode. Three different potentials are applied to the read-out transfer electrode for respectively storing charge in the photodiode, extracting excess charge from the photodiode while allowing signal charge to remain in the photodiode, and reading out signal charge from the photodiode.

Abstract: A solid-state imaging device comprises a plurality of photoelectric conversion accumulation sections arranged two-dimensionally on a semiconductor substrate, a plurality of vertical CCDs for vertically transferring signal charges read out from the photoelectric conversion accumulation sections, and a horizontal CCD for receiving and horizontally transferring the signal charges transferred by the vertical CCDs. A gap between transfer electrodes of the horizontal CCD is less than a gap between transfer electrodes of the vertical CCDs. The transfer electrodes of the vertical CCDs have a single-layer electrode structure formed by patterning a first polysilicon film. The transfer electrodes of the horizontal CCD have an overlapping double-layer electrode structure comprising alternately arranged electrodes formed by patterning the first polysilicon film and electrodes intervening between the alternately arranged electrodes which are formed by patterning a second polysilicon film.

Abstract: A frame interline transfer CCD imager is so adapted that signal charges from the photosensor are read into a vertical transfer unit and are transferred at a high transfer rate from the vertical transfer unit to a storage section. The charges from each photosensor are drained during the high transfer rate transfer so that the photosensors are unable to store the signal charges to prevent the occurrence of blooming.

Abstract: A p type well is formed on a silicon substrate. An n.sup.- type region forming a photo diode is formed in the p type well. A p type region is also formed in the p type well. The p type region is used for surrounding the n type region which becomes a vertical CCD register part. Generally, such a structure is called a Hi-C structure. A P.sup.+ type region for controlling the potential height when transferring is formed between the photo diode and the vertical CCD register part. A P.sup.+ type region is formed for electrical separation. A P.sup.++ type region is formed on the surface of a silicon substrate of the photo diode. On the silicon substrate, a gate oxide film is grown. A silicon nitride film is grown in a specified region on the gate oxide film. On the silicon nitride film, a polysilicon electrode which is a conductive electrode, acting as a driving electrode, is formed. On the surface of the polysilicon electrode, a polysilicon oxide film is grown by thermal oxidation.

Abstract: A solid-state imaging device includes a semiconductor substrate, an array of cells on the substrate, a plurality of vertical charge transfer sections extending in a first direction on the substrate, and a horizontal charge transfer section extending in a second direction transverse to the first direction on the substrate and being coupled to the vertical charge transfer section. The cell array includes a plurality of columns of cells that are associated with a corresponding one of the vertical transfer sections. The cell columns include a predetermined number of spaced-part cells that are series-connected along the second direction to constitute a NAND type cell structure. At least one cell-to-cell charge transfer electrode overlies a channel region as defined between adjacent ones of the NAND cells in the substrate.

Abstract: A solid-state image sensing device includes a semiconductive substrate, an array of photosensitive cells on the substrate, and a transfer section electrically coupled with the array on the substrate, for transferring electrical carriers read from the cells along a predetermined direction. During an image sensing operation, a packet of charge carriers photoelectrically generated in the cells are prevented from continuously staying therein, by forcing the carriers to move into the transfer section, thus causing these carriers to be stored in the transfer section.

Abstract: Solid-state image sensing device is provided with a synthesizing section for synthesizing odd-field signal charges and even-field signal charges. The synthesizing section is a transfer path formed outside of the photosensitive region or vertical transfer paths formed in the photosensitive region. For the signal charge synthesis through vertical transfer path, after the integration, the signal charges are read simultaneously from the odd-line pixel group and the even-line pixel group. Further, it is possible to select either the method of outputting the odd-field signal charges and the even-field signal charges separately or the method of outputting the synthesized odd- and even-field signal charges.

Abstract: A method for driving a solid-state imaging device which includes the steps of (1) reading a signal from an i-th pixel in the pixel portion into a vertical charge transfer portion over k bit portions thereof starting from the i-th bit portion thereof; (2) transferring the read signal corresponding to k bits of the vertical charge transfer portion in the vertical direction during one horizontal blanking period; (3) reading a signal from an (i+1)-th pixel of the n pixels arranged in the pixel portion into the vertical charge transfer portion over k bit portions thereof starting from the (i+1)-th bit portion thereof after the completion of the transfer of signal portions corresponding to the (k-1) bits of the read signal corresponding to the k bits of the vertical charge transfer portion; (4) repeating the steps (1) through (3) for the pixels arranged in the pixel portion starting from the first pixel nearest to a horizontal charge transfer portion to a pixel farther therefrom; and (5) repeating the step (2) afte

Abstract: A solid state imager device comprises a plurality of pixels arranged in rows and columns, each of the pixels consisting of a light sensing element and a vertical transfer portion adjacent to the light sensing element, the vertical transfer portion having three gate portions such as a first, a second and a third gate portions insulated each other, the third gate portion located in the center of the three gate portions, a plurality of rows of base portions disposed in the horizontal direction and connecting the respective gate portions, a vertical wiring device disposed over the gate portions through an insulating layer, the vertical wiring device including, a first wiring film connecting the first gate portions, a second wiring film connecting the second gate portions, a third wiring film connecting the third gate portions which is connected to the odd row of the base portions, a fourth wiring film connecting the third gate portions which is connected to the even rows of the base portions, a read out pulse dev

Abstract: A CCD linear sensor. A photosensor row has photosensitive regions. Read-out gate electrodes and shift registers are formed on opposite sides of the photosensor row. A channel separating region is formed along the center of the photosensor row for separating each of the photosensitive region into two photosensitive portions. Charges accumulated in the photosensitive portions are read-out dividedly in both directions through the read-out gate electrodes to the shift registers. In the CCD linear sensor, the length of charge transfer path is reduced, therefore, charge reading-out time can be reduced.

Abstract: A solid-state imaging device which can generate finite difference data of images at different times. There are provided with photoelectrical converting sections each of which includes photodiodes disposed in a matrix array and receives incident light to generate signal charges. A signal charge difference generating section generates a signal charge difference at different times from the signal charges generated in the photoelectrical converting section. A signal charge difference transfer section transfers the signal charge difference generated as an output of the device.

Abstract: Light emitting devices are formed on a surface of a solid state imaging device and are used as illumination light sources. In a solid state imaging device for use in an electro-endoscope or the like, an illumination light source need not be provided independently of the solid state imaging device. Hence, the electro-endoscope can be miniaturized and simplified in structure.

Abstract: A CCD which is designed and processed so that most of each pixel is covered only with an ultra-thin gate electrode so that the CCD can be frontside illuminated and still achieve good sensitivity in the ultra-violet and soft x-ray spectral range. More specifically, in the present invention, the usual three gate structure and corresponding polysilicon layers 1, 2 and 3 of conventional thickness are reduced in width and supplemented by a fourth ultra-thin layer of polysilicon dubbed herein, poly 4, that is deposited over the entire array. This fourth layer, poly 4, makes contact with poly 3, so that when poly 3 is driven, it also drives poly 4, thus allowing charge to collect and transfer as in a normal three phase CCD. However, because the deposition thickness of the poly 4 layer is on the order of 400 Angsttoms, as opposed to conventional thicknesses of 2000 to 5000 Angsttoms, poly 4 is essentially transparent to photons and thereby allows achievement of high quantum efficiency.

Abstract: There is provided a solid state imaging device having high-sensitivity, low-noise characteristics by reducing electrostatic capacity relating to interconnection. The solid state imaging device includes a photoelectric conversion section, a transfer section, a floating diffusion layer for receiving signal charges from the transfer section, and an output transistor having a gate electrode connected to the floating diffusion layer via an interconnection. A source and a drain of the output transistor are provided commonly within a flat p-type well of relatively thin concentration in which the photoelectric conversion section, the transfer section, and the floating diffusion layer are also provided.

Abstract: A solid-state imaging device in which a light-barrier layer is formed on transfer electrodes on top of a vertical pixel isolating region by an insulating film. The light-barrier layer is adapted to overlie the lateral sides of the transfer electrodes and the peripheral region of a photosensor region neighboring on the vertical pixel isolating region. By provision of the light-barrier layer, the light incident on the vertical pixel isolating region is stopped to reduce smear charges which might otherwise be intruded into the vertical charge transfer section.

Abstract: In a CCD device, on a semiconductor substrate, and in the insulation films, plural first semiconductor regions and plural second semiconductor regions are formed buried in the insulation films, intermediating a tunneling insulation film therebetween in a manner to spatially isolate them from each other.

Abstract: An FIT or IT solid-state imaging device comprising a p-type Si substrate in which n-type regions forming storage diode portions, signal read-out portions, n-type CCD channels, and p.sup.

Abstract: A charge-coupled device (CCD) is provides having improved charge transfer efficiency. This CCD is a portion of an image sensor and manufactured by first laminating a first oxidation film and a first nitride film one after the other on a semiconductor substrate and then forming a plurality of first gate electrodes on the first nitride film at predetermined intervals apart. A second oxidation film is formed only on an upper surface and along side walls of each of the first gate electrodes. The first nitride film exposed between the first gate electrodes is removed and a second nitride film is formed on the exposed first oxidation film and the second oxidation film. A second gate electrode is then formed on the second nitride film between adjacent first gate electrodes. An image sensor is obtained in which leakage current density between the gate electrodes is reduced and the dielectric characteristic of a gate dielectric film is improved.

Abstract: Methods and apparatus for implementing charge skimming and variable integration time in focal plane arrays formed in a silicon substrate. The present invention provides for pulsing a field plate that lies over a diode disposed in the substrate in order to provide for charge skimming and variable integration time. The field plate is normally dc biased to suppress diode edge leakage. No additional structure is needed in the silicon substrate, and basic readout clocking is unaffected. Any interline transfer focal plane array can benefit from using the principles of the present invention.

Abstract: An image sensor having on a substrate of a first conductivity type an implanted region of a conductivity type opposite to the first conductivity type and an implanted region of the same conductivity type as the substrate, the image sensor comprising a plurality of depleted photosensitive regions in which electric charges are generated, an isolation region being formed between adjacent photosensitive regions to isolate the photosensitive regions from each other. Charge accumulation regions and transfer regions are also provided to transport the electric charges from the photosensitive regions to CCD shift registers. The isolation regions between two depleted photosensitive regions are formed of undepleted regions. The implanted region of the opposite conductivity type is of a smaller width throughout the photosensitive regions than throughout the charge accumulation regions and the transfer regions.

Abstract: In a charge transfer image pick-up device including vertical registers and a horizontal register, impurity density of a well layer of the vertical registers is higher than that of a well layer of the horizontal register and a buried layer formed in the well layer of the vertical registers is composed of a first buried layer which is connected to a buried layer of the well layer of the horizontal register and a second buried layer formed on the first buried layer and having impurity density higher than that of the first buried layer, so that degradation of transfer efficiency of signal charge can be avoided and the manufacturing process can be simplified.

Abstract: There is provided a solid-state imaging device suitable for miniaturization.

Abstract: An image sensor having improved antiblooming characteristics includes a plurality of photodetectors in a substrate at a surface thereof and arranged in an array of columns and rows. A CCD shift register extends along each column of the photodetectors. A separate overflow drain is adjacent each photodetector and an overflow barrier extends between each photodetector and its adjacent drain. Each photodetector has an active region of one conductivity type which is divided into first and second portions. The first portion of the active region has a higher concentration of the impurities of the one conductivity type than the second portion so as to have a lower potential during operation thereof. Thus, the charge carriers generated in the first portion will flow into the second portion where they are stored. This reduces the capacitance of the photodetector to increase it antiblooming characteristics while maintaining the sensitivity of the photodetector.

Abstract: A solid-state imaging device includes: a semiconductor layer having a top surface; a plurality of first charge transfer electrodes formed on the semiconductor layer and extending in a serpentine pattern in a first direction at a prescribed cycle, the first direction being substantially parallel with the top surface of the semiconductor layer; a plurality of second charge transfer electrodes formed on the semiconductor layer and extending in a serpentine pattern in the first direction at a prescribed cycle; a plurality of charge transfer sections formed in the semiconductor layer, and extending in a serpentine pattern in a second direction, the second direction being substantially perpendicular to the first direction; and a plurality of photoelectric converters formed in areas of the semiconductor layer bounded by the first and second charge transfer electrodes, each photoelectric converter provided for generating a signal charge in response to incident light, and for supplying the signal charge to an adjacent

Abstract: A CCD image sensor of an interlaced scanning type comprising a plurality of uniformly spaced photodetectors arranged in series in vertical and horizontal directions, a plurality of VCCD regions arranged between sets of said photodetectors arranged in the vertical directions, a plurality of channel stop regions for electrically isolating said plurality of photodetectors from one another, a plurality of gate electrodes formed on said VCCD regions, each of said plurality of gate electrodes being connected simultaneously to transfer gate electrodes of adjacent ones of said plurality of photodetectors on odd and even horizontal lines, a plurality of barrier layers, each formed at a portion of each of said VCCD regions corresponding to a boundary with each of said gate electrodes on said VCCD regions, for forming a desired potential barrier, and a HCCD region formed under said plurality of VCCD regions, for transferring signal charges from said VCCD regions to an output stage.

Abstract: In a solid state image sensor, such as a CCD image sensor having lateral antiblooming protection, the level of which is controlled by an overflow gate voltage forming a barrier, the storage of electrons in the photodiode junction region of the sensor is eliminated by removing the barrier and allowing the charge to flow from the sensor's photodiode junctions into the overflow region. The charge flow is then detected as a function of the instantaneous light impinging on the photodiodes. The physical connections of the overflow gates are selected to form zones. Since the charge flow now represent the instantaneous light intensity, higher frequency components are detected than that limited by the sensor sampling rate. An amplifier is connected to sense the charge flow from each zone. With the range of light intensity being large the amplifier is provided with a logarithmic feed back element. This element provides compression of a signal representing the sensed charge flow.

Abstract: A CCD shift register which is improved in the transfer efficiency with a minimal decrease in the amount of electric charge that can be handled. The CCD shift register has an array of transfer electrodes, each comprising a pair of storage and transfer gate electrodes, which are formed on a semiconductor substrate through a gate insulator. A semiconductor region under each storage gate electrode is divided into a plurality of subregions by using impurities.

Abstract: A solid imaging device that minimizes the degradation in charge transfer efficiency attributable to narrow channel effect by enlarging the apparent width of the horizontal output gate outlet. Miniaturization of the floating diffusion (FD) region is not hampered despite the apparent widening of the horizontal output gate outlet. The inventive imaging device utilizes a floating diffusion amplifier as the charge detector that detects a charge signal transferred from a horizontal CCD. In this device structure, ions are implanted into the substrate surface side of the region adjacent to the FD region in the horizontal output gate in such a manner that the channel potential of the adjacent region will become appropriately deeper than that of the forward-half region next to the adjacent region.

Abstract: A virtual phase image sensor has majority carriers supplied to a virtual gate 24 by a conductor 32 overlying the image sensor, the virtual gate 24 and the conductor 32 each in contact with a conductive channel stop region 30.

Abstract: A solid state image sensing device comprising first and second horizontal shift registers of two-phase drive system, a smear drain region disposed in an opposing relation to a first storage section of the second horizontal shift register to which the first phase drive pulse of the second horizontal shift register is applied and a channel stop region disposed in an opposing relation to a second storage section of the second horizontal shift register to which the second phase drive pulse is applied, wherein a smear component is drained to the smear drain region, and a hole component is drained to the channel stop region for thereby reducing a dark current of the second horizontal shift register to about that of the first horizontal shift register. Therefore, a dark current in the horizontal shift register of the solid state image sensing device can be reduced.

Abstract: An improved CCD image sensor which contains a plurality of photodetectors is provided with a transfer gate and uses a CCD as a scanner for reading signals, and having photo diodes which are connected consecutively to both the left and right sides of VCCD region and, in the parts without VCCD region, are disposed repeatedly parallel to each other separated by an interval of the width of the channel stop region. A 4 phase clock signal consisting of 4 fields is used for operation of said CCD image sensor. The resultant CCD image sensor has an increased photodetector area which can provide high resolution of video.

Abstract: A CCD image sensor having a plurality of VCCDs each formed in a zig-zag pattern in a vertical direction and a plurality of groups of first to fourth photodiodes, the first to fourth photodiodes of the respective groups being arranged respectively on the left and right sides of each of the VCCDs, so that an improvement in resolution of a picture can be made in the same chip size. The first photodiodes are arranged on the left sides of curved portions of each of the VCCD regions on odd horizontal scanning lines, the second photodiodes are arranged on the right sides of the curved portions of each of the VCCD regions on even horizontal scanning lines, the third photodiodes are arranged on the right sides of the curved portions of each of the VCCD regions on the odd horizontal scanning lines, and the fourth photodiodes are arranged on the left sides of the curved portions of each of the VCCD regions on the even horizontal scanning lines.

Abstract: There is disclosed a solid-state image sensor comprising: photo-detecting devices arranged in a matrix structure for receiving external light signals; vertical charge transfer device interposed between the columns of said photo-detecting device for vertically transferring the charges produced from said photo-detecting device according to external control signal; first horizontal charge transfer device for horizontally transferring the charges coming out of said vertical charge transfer device according to external control signal; output control device for controlling the charges flowing from said first horizontal charge transfer device to said output device; second horizontal charge transfer device for transferring the output charges of said first horizontal charge transfer device controlled by said output control device to said vertical charge transfer device according to external control signal; and a feedback line for connecting the output of said first horizontal charge transfer device to the input of sai

Abstract: The solid state, image pickup device of the present invention includes a set of vertical registers. Each of the vertical registers includes a transfer channel and a group of transfer electrodes driven by a vertical driving pulse and formed by crossing the transfer channel, and the group of transfer electrodes includes at least one first transfer electrode and at least one second transfer electrode. Each of the vertical registers includes first contacts which electrically connect the group of transfer electrodes to the intermediate layer of polysilicon and second contacts which electrically connect the intermediate layer of polysilicon to the aluminum wiring layer. The first contacts and the second contacts are respectively formed over the group of transfer electrodes.

Abstract: A CCD imager wherein signal charge can be transferred at a high speed and smears can be minimized without employing a complicated wiring configuration. The CCD imager comprises a transfer electrode formed from a semiconductor layer, a light intercepting film formed from a first layer metal film on the transfer electrode, and a shunt wiring film formed from a second layer metal film on the first layer metal film. The transfer electrode and the shunt wiring film are electrically connected to each other by way of the light intercepting film. Also an improved CCD imager of the frame interline type is disclosed wherein a storage section is improved in light intercepting performance to prevent possible occurrence of smears at the storage section with a simplified configuration of wiring in the storage section.

Abstract: An interline transfer type area image sensor which operates in a non-interlaced mode and has an array of columns and rows of photoreceptor in which charge from each pixel is transferred into a stage of a vertical two-phase CCD shift register formed by adjacent electrodes of the CCD. Each electrode of a stage has a separate voltage clock. An ion implanted vertical transfer barrier region is formed under an edge of each electrode.

Abstract: In a CCD device, a plurality of trench holes are formed in high resistivity semiconductor layer and juxtaposed in a charge transfer direction, and charge transfer electrodes are buried in the trench holes. Charge transfer regions are formed in the semiconductor layer around the vicinity of the respective trench holes during a main operating state.

Abstract: A CCD shift register has a final transfer electrode which is formed only by a first polysilicon layer, and an output gate electrode which is formed by a second polysilicon layer. Under the output gate electrode, there is formed a doped region which is formed by a doping step of self alignment, independently of a doped region under the transfer electrodes. Therefore, it is possible to choose the impurity concentration and to adjust the potential level under the output gate electrode freely.

Abstract: A solid-state CCD imaging device has a substrate, photosensitive pixel cells provided as pixel sections in the substrate, and a transfer section, provided in the substrate, for transferring signal charge carriers read out from the pixel cells in a predetermined transfer direction. The transfer section has a semiconductive charge transfer channel layer formed in the substrate and transfer electrodes insulatively provided above the substrate and arrayed in the above direction while predetermined gap sections are kept therebetween. Each of the transfer electrodes defines one charge transfer stage. A gap potential control electrode layer is insulatively disposed above the electrodes.

Abstract: There is provided a solid-state image sensor which can optimize the I-V characteristics of MOS transistors on drive side and load side, and which can improve the sensitivity by maximizing the small-signal AC gain of a source follower amplifier. According to one embodiment of the invention, a CCD solid-state image sensor has a floating diffusion type charge detecting amplifier composed of at least one drive side MOS transistor and at least one load side MOS transistor. In a substrate of one conductivity type, there are formed two wells of the opposite conductivity type independently. The drive side MOS transistor is formed in the first well which is deeper from the top surface of the semiconductor substrate. The load side MOS transistor is formed in the shallower second well. It is possible to further improve the AC gain by depleting or neutralizing the first well for the drive MOS transistor, and at the same time neutralizing the second well for the load MOS transistor.