Abstract: Signal charges are photoelectrically generated by a plurality of photodiodes, transferred through a transfer register to a charge detection capacitance and sensed through a floating junction, as a potential change of the charge detection capacitance to be amplified and output at an output amplifier composed of a plurality of stages of driver transistors, in which a field insulation film of a first stage driver transistor is formed, under a gate electrode, with a trapezoidal region left so that the gate electrode has a width thereof varied to be wider at a source end than at a drain end, permitting an increased reduction of the charge detection capacitance.

Abstract: A charge coupled device, together with a method for manufacturing the device, is provided which can eliminate a conventional problem, that is, the remaining of a light-receiving film at a great step area and a consequent lowering of a sensitivity resulting from the shutting-off of a portion of incident light. In the charge coupled device, insulating areas are formed in substantially strip-like array on a silicon substrate. Respective transfer electrodes are formed on a gate insulating film on a semiconductor substrate with an insulating areas interposed. The respective phase transfer electrodes are electrically separated by the insulating area. By doing so, the respective phase transfer electrodes can be formed on the same plane without leaving a greater step. This can achieve a thinned light shielding film.

Abstract: The size of an active pixel sensor cell is reduced by utilizing a single split-gate MOS transistor and a reset gate. The split-gate transistor includes an image collection region which is formed in the drain region and electrically connected to the floating gate of the transistor. Light energy striking the image collection region varies the potential of the floating gate which, in turn, varies the threshold voltage of the transistor. As a result, the current sourced by the transistor is proportional to the received light energy.

Abstract: A CCD structure including high resolution pixels. The gate electrodes of the CCD are separated by gaps in the order of 0.6 .mu.m which are made to look smaller than their physical size by the use of dielectric filler material in the gaps. The dielectric filler material has a relatively high dielectric constant which is relatively large for the clock frequencies utilized but may be relatively low for optical frequencies. The dielectric constant of the dielectric filler material is typically greater than 20 and is selected from materials such as tantalum oxide, zirconium oxide, barium titanate and barium strontium titanate.

Abstract: A number of electrode sets each respectively consisting of a number of gate electrodes disposed at each of matrix-addressed charge-coupled device ("CCD") registers are separately arranged in a column direction of the registers, the gate electrodes in each of the electrode sets being separately arranged in a different direction from the column direction, and a combination of interconnections is provided among conductors for selectively applying a number of pulse voltages different in phase to the gate electrodes in each of the electrode sets. The pulse voltages are applied with a combination of different phases to the gate electrodes in each of the electrode sets, and the combination of the different phases are changed, thereby controlling the position of a sensitivity barycenter of each of the electrode sets to raise the resolution of an image sensor.

Abstract: A solid-state imaging device which restrains the smear phenomenon effectively without reduction of the dielectric breakdown strength between the transfer electrode and the light shielding film. A first insulating film covers photoelectrical converting regions each of which receives incident light through the first insulation film to generate and store a signal charge. A second insulating film covering a charge transfer region is of a layered structure containing a first insulation layer with a relatively lower dielectric constant such as SiO.sub.2 and a second insulation layer with a relatively higher dielectric constant such as Si.sub.3 N.sub.4. The distance between the transfer electrode and the light shielding film can be decreased, providing decrease in thickness of the first insulating film. The smear phenomenon is restrained effectively without reduction of the dielectric breakdown strength between the transfer electrode and the light shielding film.

Abstract: A barrier at a uniform depth for an entire wafer is used to produce imaging devices less susceptible to noise pulses produced by the passage of ionizing radiation. The barrier prevents charge created in the bulk silicon of a CCD detector or a semiconductor logic or memory device from entering the collection volume of each pixel in the imaging device. The charge barrier is a physical barrier, a potential barrier, or a combination of both. The physical barrier is formed by an SiO.sub.2 insulator. The potential barrier is formed by increasing the concentration of majority carriers (holes) to combine with the electron's generated by the ionizing radiation. A manufacturer of CCD imaging devices can produce radiation-tolerant devices by merely changing the wafer type fed into his process stream from a standard wafer to one possessing a barrier beneath its surface, thus introducing a very small added cost to his production cost. An effective barrier type is an SiO.sub.2 layer.

Abstract: A preferred embodiment of this invention is a hybrid semiconductor imaging structure comprising a high speed signal conditioning substrate (e.g. Si 12) and an imaging substrate (e.g. HgCdTe 10) mounted on the conditioning substrate using an adhesive layer (e.g. epoxy 31). Infrared-sensitive time delay and integration CCD columns (14) charge coupled to sense nodes (e.g. diodes 16) are disposed in the imaging substrate. High speed signal processing channels (e.g. capacitive transimpedance amplifier 18, congelated double sampling circuit 20 and multiplexing shift register 22) are disposed in the conditioning substrate. The sense nodes are connected to the signal processing channels with low capacitance hybrid leads (e.g AI 17).

Abstract: A first conductive layer and a second conductive layer are formed apart from each other on a surface of a semiconductor substrate. A first contact hole for exposing a surface of first conductive layer is formed in an interlayer insulating film. A first interconnection layer is buried in first contact hole so as to be in contact with first conductive layer. The position of the surface of first interconnection layer is the same as or lower than the surface of interlayer insulating film. The surface of first interconnection layer is covered with an insulating film. A second contact hole for exposing a surface of second conductive layer is provided in interlayer insulating film. A second conductive layer is connected to second conductive layer through second contact hole.

Abstract: A charge transfer device of two-line read structure is formed with a first charge transfer path for transferring first-group charges, a second charge transfer path for transferring second-group charges, and a transfer gate portion (106). To complete the transfer operation of all the second-group charges outputted at a time, the transfer operation of the charges from the first transfer path to the second charge transfer path by the transfer gate portion is divided into a plurality of times. In addition, the second-group charges outputted at time are transferred for each divided set of pixels in each divided transfer operation.

Abstract: Metal wires for applying the clock voltage in a CCD solid state image sensor are angled with respect to the photodiodes that are arranged in a matrix. Also, a photo-blocking layer is formed over the metal wires. Accordingly, light incident on portions of the sensor other than the photodiodes is effectively prevented and noise caused due to coupling with the semiconductor substrate is minimized, thereby improving the picture quality of the solid state image sensor. Furthermore, since the metal wires directly apply the clock voltage to the CCD gates, there is no need for a polysilicon gate conductor. Thus, clock skew is prevented and phase differences between the signal image from the central part and the peripheral part of the solid stage image sensor is greatly reduced.

Abstract: A semiconductor device which has a diffusion layer region in a semiconductor body, and a MIS transistor with a gate electrode formed on the semiconductor body that is connected to the diffusion layer region. The semiconductor device is made by the steps of forming a diffusion layer region in the upper layer of the semiconductor body forming a gate electrode on the upper surface of the semiconductor body through a gate insulating film which is connected to the diffusion layer region and forming source and drain regions on the upper layer of the semiconductor body on both sides of the gate electrode so that unnecessary electrical charges on the gate electrode of the MIS transistor and transfer electrodes of the CCD device are removed.

Abstract: An electric charge detecting apparatus comprising vertical CCD, horizontal CCD and floating diffusion amplifier comprised of floating diffusion layer and source follower amplifier comprising a MOS transistor wherein a buffer electrode is arranged at one end of a gate electrode of the MOS transistor, the gate electrode is formed within an active region of the MOS transistor, a contact hole is provided for connecting a polysilicon layer arranged on a charge-voltage transformer and the source follow or plural P wells are formed and one of them is arranged under a wiring connecting the charge-voltage transformer and the source follower and connected to a source of a drive transistor. Said electric charge detecting apparatus further comprising, P.sup.+ region arranged under a field oxide film on which an output signal wiring from the source follower is electrically isolated from another P.sup.+ region or no P.sup.+ regions are provided under the field oxide film.

Abstract: An ionic liquid-channel charge-coupled device that separates ions in a liquid sample according to ion mobility characteristics includes a channel having an inner wall that has a matrix liquid disposed within. An insulating material surrounds the channel, and an introduction element introduces a liquid sample into the channel. The sample is preferably a liquid solution that has at least one ionic specie present in the solution. The device further includes a gating element that establishes at least one charge packet in the channel in response to an externally applied input signal, and a transport element that induces the charge packet to migrate through the channel. The gate element can be a plurality of spaced-apart, electrically conductive, gate structures that are alternately disposable between a high voltage state and a low voltage state. The transport element further includes an application element that applies a variable voltage to the gating element.

Abstract: A charge transfer device is provided, which includes: a semiconductor substrate having transfer regions for transferring a signal charge; an insulating film formed on the semiconductor substrate; an electrode layer formed above the transfer regions with the insulating film sandwiched therebetween, the electrode layer having high-resistant portions and low-resistant portions alternately provided; and voltage application means for applying a voltage for changing a surface potential of the transfer regions to the low-resistant portions of the electrode layer.

Abstract: A dual mode high frequency output structure for a CCD image sensor has a differencing mode for determining a difference between a charge of successive charge packets of a first pulse train outputted from a shift register of the CCD image sensor and a non-differencing mode for outputting a video signal from the shift register of the CCD image sensor.

Abstract: The disclosed device and system enables the cell-based amplification of photo-e The disclop41 The detection device is realized by overlaying an amplifying semi-conductor structure, generally referred to as avalanche photo-diodes, on top of a typical prior-art charge coupled device structure. The disclosed arrangement is a hybrid of these two technologies with certain provisions which allow the two prior art technologies to function properly as a single integrated unit.

Abstract: A charge coupled device including a first electrode consisting of a first region and a second region having lower resistance than the first region, and a second electrode consisting of a first region and a second region having lower resistance than this first region. The first region of the first electrode is adjacent to the first region of the second region at an interval of an insulating film. Capable of utilizing the force of electrical field, the device is superior in charge transfer efficiency as well as charge transfer velocity. It also has the capability to improve the performances of high picture quality solid state image sensing devices and time delay devices, which both necessitate a charge coupled device and operate at high frequencies. Additionally, a solid state image sensing device employing this device is not degraded in a dark state by generating a few pulse charges.

Abstract: A convolver includes first and second buried channels, with each of the channels comprised of a piezoelectric semiconductor. The input of one channel is associated with the output of the other channel. An acoustic transducer is positioned adjacent each input for generating an acoustic wave which propagates through the associated channels and thereby transports charge from the input to the output thereof. A non-destructive sensing array overlies the channels and samples the charge transported thereunder. The array includes an assembly for summing the sampled charge and for generating a product. An electrode is operably associated with the summing assembly for integrating the products and generating a convolution signal.

Abstract: A charge-transfer device contains a high-resistance p-well layer formed in the surface of an n-type semiconductor substrate. In the surface of the well layer, a charge-transfer n-channel layer, a charge storage n-channel layer, a charge release n-channel layer, and a charge release n-type drain are formed continuously. An output gate electrode is provided above the junction of the transfer channel layer and the storage channel layer, with an insulating film interposed therebetween. Provided above the release channel layer is a reset gate electrode with an insulating film interposed therebetween. In the surface of the storage channel layer, a charge-sensing p-channel layer of a charge-sensing transistor is formed. The charge-sensing channel layer is arranged so as to be in contact with neither the transfer channel layer nor the release channel layer.

Abstract: An output circuit device for detecting and converting signal charge transferred thereto from a charge transfer section of a CCD into a signal voltage his constructed such that a gate oxide film of a driving side MOS transistor of a first stage source follower which receives signal charge is formed as a thinner film than gate oxide films of the other MOS transistors in the same circuit to reduce the 1/f noise.

Abstract: Photoelectric converting parts and vertical CCD register parts are formed in a semiconductor substrate. Polysilicon electrodes are formed on the vertical CCD register parts. On the polysilicon electrodes, polysilicon oxide film and dielectric film are deposited. On the polysilicon electrodes, contact windows are formed by mask matching and etching. The contact windows are formed in the first polysilicon electrode and second polysilicon electrode so as to realize four-phase drive of the solid-state image pickup device. Polysilicon film and tungsten silicide film are formed thereon. By etching these films, a first wiring is formed. A second wiring of aluminum film is formed thereon through an interlayer dielectric film. Hence, a high transfer efficiency and a favorable smear noise characteristic are presented at low illumination.

Abstract: A solid-state imaging device comprises a plurality of photoelectric conversion accumulation sections arranged two-dimensionally on a semiconductor substrate, a plurality of vertical CCDs for vertically transferring signal charges read out from the photoelectric conversion accumulation sections, and a horizontal CCD for receiving and horizontally transferring the signal charges transferred by the vertical CCDs. A gap between transfer electrodes of the horizontal CCD is less than a gap between transfer electrodes of the vertical CCDs. The transfer electrodes of the vertical CCDs have a single-layer electrode structure formed by patterning a first polysilicon film. The transfer electrodes of the horizontal CCD have an overlapping double-layer electrode structure comprising alternately arranged electrodes formed by patterning the first polysilicon film and electrodes intervening between the alternately arranged electrodes which are formed by patterning a second polysilicon film.

Abstract: A CCD shift register having a reading device, or charge/voltage conversion device, at one end. This reading device or charge/voltage conversion device includes a diode, a precharging transistor, and an amplifier with high input impedance. To improve the efficiency of the charge transfer and, more generally, the behavior of the register, especially at high frequencies, it is proposed to shape the final gate of the register, and the diode, in such a way that the width along which the gate is adjacent to the diode (i.e. the width along which the end of the channel is adjacent to the diode) is great while, at the same time, the diode surface area is kept small.

Abstract: A signal charge transfer device. The device comprises a well of a first conductivity type, a channel region of a second conductivity type formed on the well, and a gate insulation film formed on the channel region. A plurality of equally spaced first charge transfer electrodes of the second conductivity type are formed on the gate insulation film. A plurality of second charge transfer electrodes of the first conductivity type are formed between the plurality of first charge transfer electrodes. An insulation film electrically isolates the plurality of first charge transfer electrodes from the plurality of second charge transfer electrodes.

Abstract: An integrated circuit has an interconnection pattern which is recessed in the insulating layer, for example, an oxide layer. A groove is etched in the insulating layer corresponding to the metal pattern by means of a mask which is the inverted image of the interconnection pattern during manufacture. Etching is continued until contact windows are fully opened. To prevent the oxide between the contact windows also being removed, an etching stopper layer is provided in the oxide layer. A layer already present in the process may be used for this etching stopper layer, for example, a polycrystalline silicon layer, so that extra process steps are made redundant.

Abstract: An acoustic charge transport device comprises a substrate with a layer disposed thereon; a channel disposed within the layer for providing a propagation path for a surface acoustic wave; a contact operably connected and disposed at one end of the channel for injecting an electronic signal into the channel; a transducer disposed at the one end of the channel for generating and propagating the surface acoustic wave through the channel; a plurality of sensing electrodes operably associated with the channel and disposed along the propagation path of the surface acoustic wave for non-destructively sensing the electronic signal; and a plurality of active buffer circuits each having an input operably connected to respective sensing electrode and an output operably connected to an output circuit.

Abstract: An ionic liquid-channel charge-coupled device that separates ions in a liquid sample according to ion mobility characteristics includes a channel having an inner wall that has a matrix liquid disposed within. An insulating material surrounds the channel, and an introduction element introduces a liquid sample into the channel. The sample is preferably a liquid solution that has at least one ionic specie present in the solution. The device further includes a gating element that establishes at least one charge packet in the channel in response to an externally applied input sisal, and a transport element that induces the charge packet to migrate through the channel. The gate element can be a plurality of spaced-apart, electrically conductive, gate structures that are alternately disposable between a high voltage state and a low voltage state. The transport element further includes an application element that applies a variable voltage to the gating element.

Abstract: A charge-coupled device has a series register (A) having charge storage electrodes (3a) for defining charge storage wells and charge transfer electrodes (3b) for transporting charge between the charge storage wells and a parallel section (C) having channels (1a,1b) extending transversely of the series register (A). The parallel section (C) has charge storage electrodes (11a,12a,13a . . . Na) spaced apart along the channels, (1a,1b) to define a respective charge storage well with each channel to provide a respective row of charge storage wells extending transversely of the channels and has charge transfer electrodes (12b . . . Nb) for transferring charge between adjacent rows of charge storage wells, and a transfer gate (T1) for transferring charge between the series register (A) and an adjacent row of charge storage wells defined by the channels (1a,1b) and a first charge storage electrode (11a) of the parallel section.

Abstract: A solid-state imaging device. An intermediate portion of a channel region have a tapered width from one shift register in which the signal charges to be read-out toward the other shift register. Therefore, the potential distribution of the channel region along the charge transfer direction has a continuous down-slope toward the one shift register. Thus, reading-out electric field can be improved.

Abstract: Logically and thermodynamically reversible charge transfer (RCT) devices and logic are provided for conditionally transferring individually identifiable charge packets from one or more sources to one or more destinations under the control of one or more additional charge packets that indicate by their presence or absence whether the condition or conditions have been satisfied or not. The individual identities of all of these charge packets are substantially preserved while logic operations are being performed by this logic.

Abstract: A CCD image sensor comprising: a semiconductor substrate of a first conductivity type connected to a ground; an impurity region of a second conductivity type formed in the surface of the semiconductor substrate of the first conductivity type, to serve as a blooming prevention layer; an impurity region of the first conductivity type formed in the surface of the semiconductor substrate, so that it encloses the impurity region of the second conductivity type serving as a blooming prevention layer, to serve as a potential barrier layer; an impurity region of the second conductivity type formed in the surface of the semiconductor substrate of the first conductivity type so that it encloses the impurity region of the first conductivity type serving as a potential barrier layer, to serve as a light receiving region; an insulation film which is formed on the surface of the semiconductor substrate of the first conductivity type and has contact holes at both edges of the impurity region of the second conductivity type,

Abstract: An FIT or IT solid-state imaging device comprising a p-type Si substrate in which n-type regions forming storage diode portions, signal read-out portions, n-type CCD channels, and p.sup.

Abstract: The semiconductor image sensor element comprises a transistor gate potential well 102, a virtual potential well 100 adjacent the transistor gate potential well 102, a clear gate barrier 104 adjacent the virtual potential well 100, a clear drain 30 adjacent the clear gate barrier 104, and a charge sensor 28 for sensing charge levels in the transistor gate potential well 102. The charge levels are responsive to light incident on the device. Charge is stored in the virtual potential well 100 during charge integration. After charge integration, the charge is transferred into the transistor gate potential well 102 from the virtual potential well 100 for charge detection by the charge sensor 28. After charge detection, the charge is transferred from the transistor potential well 102 to the clear drain 30.

Abstract: The light gathering capability or quantum efficiency of a charge-coupled device is improved by the configuration of the multi-phase gate structure to leave large surface areas of the semiconductor substrate uncovered. Each of the electrodes of the multi-phase gate structure is configured as a series of shallow H-shaped geometries, only the vertical elements of which overlap to ensure that multi-phase operation can be achieved.

Abstract: A charge transfer device in which a charge transfer section, an output gate, a floating diffused region, a reset gate electrode, a reset drain region, a barrier gate electrode and an absorption drain region are provided in semiconductor substrate. The reset drain region for resetting or draining charges in the floating diffused region is connected via a capacitor to a constant potential terminal. The absorption drain region is provided with a voltage booster for raising the amplitude of the transfer pulse to a level higher than the power source voltage. The output voltage of the voltage booster is supplied to the absorption drain region. The channel potential beneath the barrier gate electrode is set lower than that beneath the reset gate electrode.

Abstract: A CCD image sensor of an interlaced scanning type comprising a plurality of uniformly spaced photodetectors arranged in series in vertical and horizontal directions, a plurality of VCCD regions arranged between sets of said photodetectors arranged in the vertical directions, a plurality of channel stop regions for electrically isolating said plurality of photodetectors from one another, a plurality of gate electrodes formed on said VCCD regions, each of said plurality of gate electrodes being connected simultaneously to transfer gate electrodes of adjacent ones of said plurality of photodetectors on odd and even horizontal lines, a plurality of barrier layers, each formed at a portion of each of said VCCD regions corresponding to a boundary with each of said gate electrodes on said VCCD regions, for forming a desired potential barrier, and a HCCD region formed under said plurality of VCCD regions, for transferring signal charges from said VCCD regions to an output stage.

Abstract: In an output circuit for a charge transfer device, a floating diffusion region is connected to a source side gate electrode of a double-gate read-out field effect transistor having its drain side gate electrode connected to the drain of the read-out transistor itself. Thus, the capacitance between the gate of the read-out transistor connected to the floating diffusion region and the drain of the read-out transistor can be made small, so that the total capacitance of the floating diffusion region is correspondingly reduced, with the result that a high detection sensitivity can be realized.

Abstract: An improved CCD image sensor which contains a plurality of photodetectors is provided with a transfer gate and uses a CCD as a scanner for reading signals, and having photo diodes which are connected consecutively to both the left and right sides of VCCD region and, in the parts without VCCD region, are disposed repeatedly parallel to each other separated by an interval of the width of the channel stop region. A 4 phase clock signal consisting of 4 fields is used for operation of said CCD image sensor. The resultant CCD image sensor has an increased photodetector area which can provide high resolution of video.

Abstract: In a solid state imaging device, a horizontal transfer unit has first and second transfer paths which are disposed in parallel and in which the transfer direction of image signals is changed according to the mode of a driving signal applied to the paths. One end of the first transfer paths is connected to one end of the second transfer path through a third transfer path. When a driving signal of a first mode is applied, the first path transfers image signals from the one end to the other end to output normal image signals. When a driving signal of a second mode is applied, the first path transfers image signals from the other end to the one end to transfer the image signals to the second transfer path via the third transfer path, and the second transfer path transfers image signals from the one end to the other end to output mirror image signals.

Abstract: An adjustable CCD gate structure utilizing ultra-violet light activated floating gates, wherein a floating polysilicon gate is used between a CCD electrode and the underlying substrate to provide a fixed voltage bias to the CCD gate during the manufacturing process thereof The floating gate is programmed with a desired voltage bias during the application of ultra-violet light and is thereafter fixed at that adjusted level, upon the removal of the ultra-violet light.

Abstract: An exploiting or readout circuit for a linear or matrix type photodetector array is of the multiplex type, such as a charge-coupled device (CCD). The exploiting circuit has a number of input stages corresponding to the number of photodetectors or similar photosites, and the gains of the input stages are established as a function of the fields of view of their associated photodetectors. In one embodiment the input stages each comprise a storage device formed of a first and a second storage electrode separated by a dividing electrode, the storage electrodes having respective surface areas selected in a relation that varies as a function of solid angle field of view of the respective photodetector. In another embodiment the input stage can include an OpAmp with a negative feedback capacitor whose value is selected as a function of the viewing solid angle of the respective photodetector.

Abstract: A charge coupled device (CCD) of a frame interline transfer type comprises a plurality of picture elements aligned in the vertical direction. Rows of aligned picture elements are arranged parallel and adjacent to each other. Polysilicon electrodes extending in the horizontal direction are arranged on a substrate covered with an insulating layer and used as electrodes for vertical transfer of signal charges. Metal wiring films extending in the vertical direction are arranged parallel and traverse the polysilicon electrodes covered with the insulating layer. The metal wiring films are used as electrodes for applying a clock pulse for vertical transfer of signal charges to the polysilicon electrodes. First, second and third openings are formed through the insulating layer such that the metal wiring films may contact the first, second and third polysilicon electrodes, respectively.

Abstract: The solid state, image pickup device of the present invention includes a set of vertical registers. Each of the vertical registers includes a transfer channel and a group of transfer electrodes driven by a vertical driving pulse and formed by crossing the transfer channel, and the group of transfer electrodes includes at least one first transfer electrode and at least one second transfer electrode. Each of the vertical registers includes first contacts which electrically connect the group of transfer electrodes to the intermediate layer of polysilicon and second contacts which electrically connect the intermediate layer of polysilicon to the aluminum wiring layer. The first contacts and the second contacts are respectively formed over the group of transfer electrodes.

Abstract: A solid-state charge-coupled-device imager has an imaging region composed of a matrix of vertically and horizontally arrayed photosensitive areas for storing signal charges depending on the intensity of applied light, and a plurality of vertical shift resisters for vertically transferring the signal charges shifted from the photosensitive areas. The signal charges from the vertical shift registers are shifted to a horizontal shift register that transfers the signal charges in a horizontal direction. The horizontal shift register comprises a plurality of charge transfer electrodes horizontally spaced at predetermined intervals. The charge transfer electrodes are inclined to the horizontal direction. The charge transfer electrodes may be inclined linearly in their entirety to the horizontal direction or may be of a chevron shape.

Abstract: The present invention is directed to an image sensor which comprises a body of a semiconductor material having therein a plurality of photodetectors arranged in a line and a CCD shift register extending along the line of photodetectors adjacent to but spaced from an edge of the photodetectors. The CCD shift register includes a channel region and a plurality of first and second gate electrodes extending over and insulated from the channel region. One of each of the first and second gate electrodes extends across a portion of the edge of each photodetector. Each of the first electrodes has an arm extending along the entire edge of its respective photodetector between the photodetector and the second gate electrode. A separate transfer region is in the body between the edge of each photodetector and its respective first electrode and extends along the entire edge of the photodetector. A transfer gate is over and insulated from the transfer regions.

Abstract: In a CCD device, a plurality of trench holes are formed in high resistivity semiconductor layer and juxtaposed in a charge transfer direction, and charge transfer electrodes are buried in the trench holes. Charge transfer regions are formed in the semiconductor layer around the vicinity of the respective trench holes during a main operating state.

Abstract: A charge transfer device has a plurality of registers which run parallel to each other and across which electrical charges are transferred. For efficient charge transfer across the registers, the transfer elecrtrode of one register and the transfer electrode of an adjacent register are arrayed in contiguity to each other and driven by different driving pulses and a deeper potential is provided in the signal charge receiving side than in the signal charge forwarding side. The registers are arrayed parallel to a sensor row constituted by a linear array of different color sensors and each handle signal charges of the respective colors. In this manner, the outputs from the registers are in the form of the separate color signals to prevent color mixing.

Abstract: A charge coupled device includes a second conductivity type first horizontal channel in a first conductivity type semiconductor substrate, a second conductivity type second horizontal channel in the substrate at a predetermined distance from the first horizontal channel, and a second conductivity type transfer channel connecting the first horizontal channel with the second horizontal channel to enable transfer of charges from the first horizontal channel to the second horizontal channel. The pinning potential of the transfer channel is larger in absolute value than the pinning potential of the first and second horizontal channels, and the gate voltage pinning the transfer channel is smaller in absolute value than the gate voltage pinning the first and second horizontal channels.

Abstract: With the CCD imager of the present invention, signal charges from the image area are transferred by plural juxtaposed read-out registers. The storage region of the read-out registers, through which electrical charges are transmitted, is narrower in width at the image area side and broader in width at the other read-out register side. By virtue of such arrangement of the storage area, there is formed a potential which becomes shallow at the side of the image area and becomes deep at the side of the other read-out registers. By such potential, signal charge transfer efficiency between the read-out registers is improved.