Abstract: In one aspect, the invention provides a method of forming an integrated circuitry memory device. In one preferred implementation, a conductive layer is formed over both memory array areas and peripheral circuitry areas. A refractory metal layer is formed over the conductive layer to provide conductive structure in both areas. According to a preferred aspect of this implementation, the conductive layer which is formed over the memory array provides an electrical contact for a capacitor container to be formed. According to another preferred aspect of this implementation, the conductive layer formed over the peripheral circuitry area constitutes a conductive line which includes at least some of the silicide. In another preferred implementation, the invention provides a method of forming a capacitor container over a substrate. According to a preferred aspect of this implementation, a conductive layer is elevationally interposed between an upper insulating layer and a lower conductive layer over the substrate.

Abstract: A solid state image sensor includes a photodiode, a vertical charge coupled device positioned to a side of the photodiode for transmitting charges generated in the photodiode, a first polygate extending in a horizontal direction and partly overlapping the vertical charge coupled device, and a second polygate extending in a horizontal direction, partly overlapping the vertical charge coupled device and having a second polygate extension, wherein the second polygate extension extends for substantially an entire length of the side of the photodiode.

Abstract: A dipping in potential well due to direct contact between transfer electrodes and metal wiring causes a drop in transfer efficiency through a CCD register. In order to eliminate or at least reduce the potential dipping, an N.sup.- -type impurity layer that functions as a CCD channel is formed with N.sup.-- -type impurity regions that have impurity concentration lower than that of the N.sup.- -type impurity layer. The N.sup.- -type impurity regions are located below transfer electrodes in alignment with contact apertures.

Abstract: A transistor having a source/drain metal silicide in close proximity to the channel region may be formed according to the following process. A masking structure is formed upon a semiconductor substrate, and a metal is deposited self-aligned to sidewall surfaces of the masking structure. The metal is then annealed to form a metal silicide. Following formation of lightly doped drain impurity areas self-aligned to the sidewall surfaces of the masking structure, spacers may be formed adjacent the sidewall surfaces and source and drain impurity areas may be formed self-aligned to sidewall surfaces of the spacers. Fill structures are then formed adjacent the spacers and the masking structure is removed to form an opening between the spacers. A gate dielectric is formed upon the exposed upper surface of the semiconductor substrate within the opening, and a gate conductor is formed within the opening.

Abstract: A CCD type solid state imaging device including a plurality of vertically arranged light receiving elements, a plurality of vertical charge transfer electrodes associated with the light receiving elements and transfer channels through which signal electrical charges stored in the light receiving elements are readout and transferred in the charge transfer direction by the transfer electrodes. The present invention features that unlike the conventional CCD type solid state imaging device, the boundary line between at least a part of the vertical charge transfer electrodes and a part of the vertical charge transfer electrodes adjacent thereto is held aslant with respect to the transfer channels so that the vertical transfer efficiency of the device is increased without incurring a reduction in the amount of signal charges being handled and the readout of the signal charges stored in the light receiving elements to the transfer channels is performed more smoothly than the conventional device.

Abstract: In a solid state image sensor comprising a plurality of photoelectric conversion regions and a plurality of transfer regions which are formed in a principal surface of a semiconductor substrate, and a plurality of transfer electrodes formed above the transfer regions, a first insulating film, an antireflection film and a second insulating film are formed in the named order on the photoelectric conversion regions. The antireflection film has a refractive index larger than that of the second insulating film but smaller than that of the semiconductor substrate. The stacked film composed of the first insulating film, the antireflection film and the second insulating film, is formed, in the transfer regions, to extend over the transfer electrode which is formed a third insulating film formed on the semiconductor substrate.

Abstract: A charge coupled device is disclosed including: a well formed in a substrate, the well having a conductivity opposite to that of the substrate; a first conductivity type of BCCD region formed on the well; a first lightly doped impurity region formed in a predetermined portion of the first conductivity type of BCCD region; a heavily doped impurity region formed in a predetermined portion of the BCCD region, the heavily doped impurity region having a predetermined distance from the first lightly doped impurity region; a second lightly doped impurity region formed between the first lightly doped impurity region and heavily doped impurity region; a first polysilicon gate formed over a portion of the BCCD region, placed between the first lightly doped impurity region and heavily doped impurity region; and a second polysilicon gate formed over the first lightly doped impurity region. The realization of high speed CCD and simplification of the circuit configuration can be obtained by using one-phase clocking.

Abstract: In a high density solid-state imaging device, of four charge transfer electrodes formed on a semiconductor substrate via a gate insulating film, a first electrode, a fourth electrode, and a part of a second electrode are made of a first conductive film, and a third electrode and the remaining portion of the second electrode are made of a second conductive film. In the second electrode, the first conductive film is joined to the second conductive film. An oxidation film formed by thermally oxidizing the first conductive film isolates the first electrode from the second electrode, the second electrode from the third electrode, and the third electrode from the fourth electrode. The end of the second conductive film is formed so as to locate on the oxidation film on the first conductive film.

Abstract: A first silicon oxide film, silicon nitride film, and polycrystalline silicon film are formed on the entire surface of a semiconductor substrate. Then, the polycrystalline silicon film is etched to form a first transfer electrode and then, the surface of the first transfer electrode is thermally oxidized to form a second silicon oxide film. Thereafter, a polycrystalline silicon film and a third silicon oxide film are formed on the entire surface and patterned to form a second transfer electrode. A fourth silicon oxide film is formed on the entire surface, and is etched back. Thereafter, the side wall surfaces of the third silicon oxide film and the second transfer electrode are covered with a fourth silicon oxide film. Thereafter, a light shielding film is selectively formed on them.

Abstract: A charge coupled device of buried channel type suitable to drive the device by clock pluses having a low voltage is disclosed. Channels of the charge coupled device comprises first to third regions. The first region has a first impurity concentration. The second region has a second impurity concentration lower than the first impurity concentration. The third region has a third impurity concentration lower than the second impurity concentration. A first transfer electrode is formed on the first region. A second transfer electrode is formed on the second region.

Abstract: The present invention intends to improve a difference between signal levels of odd-numbered pixels and even-numbered pixels in a CCD (charge coupled device) linear sensor. In a CCD linear sensor comprising a sensor region (1) having an array of a plurality of sensor elements (pixels) (S.sub.1), (S.sub.2), . . . and first and second horizontal transfer registers (4) and (5) disposed on the respective sides of the sensor region (1) through read-out gate sections (2) and (3) wherein signal charges of every other sensor elements (S.sub.1), (S.sub.3), (S.sub.5), . . . are transferred by the first horizontal transfer register (4) while signal charges of remaining every other sensor elements (S.sub.2), (S.sub.4), (S.sub.6) are transferred by the second horizontal transfer register (5), the first and second horizontal transfer registers (4) and (5) include first and second transfer electrodes (22R.sub.1), (22R.sub.2) to which two-phase drive pulses (.phi.H.sub.1) and (.phi.H.sub.

Abstract: A CCD sensor includes a readout register formed in substrate, the readout register including a channel, a bus structure and a connection structure. The bus structure includes plural spaced element sets, each element set including a first clock conductor. The first clock conductor of a first element set is a dual function conductor. The connection structure isolates the dual function conductor while coupling together the first clock conductor of each other set of the element sets. Alternatively, the sensor includes vertical and readout registers formed in a well in a substrate. The vertical register includes a vertical channel, a vertical bus structure and a vertical connection structure, and the readout register includes a readout channel, a readout bus structure and a readout connection structure. The readout bus structure includes plural spaced readout element sets, each readout element set including a first readout clock conductor.

Abstract: A charge coupled device and a manufacturing method therefor are provided. The charge coupled device has a transfer electrode portion having a first gate electrode, a second gate electrode having an end portion partially overlapping an end portion of the first gate electrode, and a third gate electrode having one end portion partially overlapping the other end portion of the first gate electrode and the other end portion thereof partially overlapping the other end portion of the second gate electrode. The charge coupled device also has a charge transfer portion located in a semiconductor substrate under the first, second and third gate electrodes, which includes a first potential area formed in the semiconductor substrate under the second gate electrode and a second potential area formed in the semiconductor substrate under the third gate electrode.

Abstract: A solid state image pickup device includes a semiconductor substrate, a CCD channel region in the semiconductor substrate, a plurality of polygates over the CCD channel regions, and a photoelectric conversion region having a portion above an uppermost surface of the semiconductor substrate.

Abstract: A CCD shift register includes a continuous buried channel over a length of the shift register, a plurality of conductor segments, a plurality of narrow bus segments, and a plurality of wide busses. Each conductor segment includes a plurality of sets of conductors, and each set of conductors includes plurality of conductors, each conductor in a set corresponding to a respective clock signal of a plurality of clock signals. Each conductor of each set extends across the buried channel. A first narrow bus segment of the plurality of narrow bus segments includes a plurality of narrow busses that are disposed parallel to and offset from the buried channel, each narrow bus corresponding to a respective clock signal of the plurality of clock signals, and each narrow bus is coupled to a respective conductor of each set of a first conductor segment.

Abstract: A control structure for stage selection in a CCD sensor includes a well formed in a substrate and a channel formed in the well, the channel defining a channel direction. A bus structure is disposed over the channel and oriented transversely to the channel direction, the bus structure including a plurality of uniformly spaced register element sets. The plurality of uniformly spaced register element sets includes a first register element set and a plurality of remaining register element sets. The first register element set includes a first clock signal conductor and at least one other clock signal conductor. Each set of the plurality of remaining register element sets includes a first clock signal conductor and at least one other clock signal conductor.

Abstract: A CCD solid state imaging device can reduce a smear component. This CCD solid state imaging device comprises a plurality of photosensor sections (10) arranged in a matrix fashion, a vertical transfer register (5) having a transfer electrode (16) disposed at every column of the photosensor sections, a shunt line layer (33) connected to the transfer electrode (16) on the vertical transfer register (5), and a photo-shield layer (38) formed so as to surround the photosensor section 10 through an interlayer insulating layer (37) which covers the shunt layer (33), in which the interlayer insulating layer (37) is formed under an overhang portion (38a) of the photo-shield layer (38) to the photosensor section (10).

Abstract: In a solid-state image pickup device having photoelectric converting sections, vertical charge transfer sections, and a horizontal charge transfer section, the vertical charge transfer sections include first, second, and third vertical charge transfer electrodes The third (final) vertical charge transfer electrode, which is adjacent to the horizontal charge transfer section, is electrically connected to a shunt wire (a first shading film) via lining contacts. A second shading film is formed electrically separated from the shunt wire, for light-shielding areas between photoelectric converting sections in a vertical direction.

Abstract: A structure and method is described for fabricating a nuclear radiation induced damage resistant P-type buried channel charge-coupled device (P-BCD) which converts an optical image focused thereon into a time varying electrical signal. The invention uses a differentially related high level dosing of dopant in the buried channel accompanied by processing at minimum effective temperatures, thereby enhancing device tolerance to exposure to nuclear radiation induced displacement and ionization damage which otherwise would degrade the imaging performance of the device.

Abstract: There is provided an imager sensor including a semiconductor substrate, a plurality of photodiode regions arranged on the semiconductor substrate in row and column directions, a plurality of charge transfer regions each disposed at a space between the photodiode regions in the row direction, the charge transfer regions transferring in the row direction signal charges generated from the photodiode regions, and an electrically conductive photoshield film covering the charge transfer regions therewith. Each of the charge transfer regions includes at least three independent transfer electrodes per a photodiode region. At least one of the three independent transfer electrodes is surrounded by the photodiode region to thereby have an isolated island shape, the rest of the transfer electrodes extend through a space between the photodiode regions in the column direction, and make electrical connection with a bus line disposed outside the semiconductor substrate.

Abstract: A charge coupled device having a CCIR/EIA mode conversion function includes: a plurality of VCCD regions formed in the direction of row, the VCCD regions having a predetermined interval from one another; a plurality of HCCD regions formed at the end of the VCCD regions in the direction of column; a plurality of photodetectors regularly arranged between the VCCD regions, the photodetectors generating signal charges according to an image signal; a plurality of vertical gate electrodes formed on the VCCD regions and the photodetectors in the direction of column, the vertical gate electrodes transmitting the signal charges of the photodetectors to the HCCD regions through the VCCD regions according to applied vertical clock signals; vertical clock signal generator for supplying a predetermined number of vertical clock signals; and a selecting portion for receiving vertical clock signals from the vertical clock signal generator, the selecting portion supplying the vertical clock signals to part of the vertical gat

Abstract: A solid state image sensor includes a semiconductor substrate and a plurality of transfer lines over the substrate and receiving clock signals, at least one of the plurality of transfer lines having a transparent conductive material. A plurality of transfer electrodes are connected to the transfer lines and a plurality of photoelectric conversion regions under a surface of the substrate generate image signals. A plurality of charge transfer regions under the surface of the substrate transfer the image signals from the photoelectric conversion regions in response to the clock signals from the transfer lines.

Abstract: By incorporating an ITO electrode which is more transparent than polysilicon, and designing the pixel such that it has asymmetric gates with as much as possible of its light sensitive region covered by an ITO electrode, light sensitivity is increased. To solve the problem of impurity diffusion from the ITO electrode into the silicon below, the conventional Silicon Dioxide gate dielectric was replaced with an Oxide/Nitride/Oxide stack. Employing at least some polysilicon electrodes with ITO electrodes is desirable to allow entrance passages through which hydrogen passivation can be accomplished. The pixel architecture can be designed to increase sensitivity further by other design choices. The first of these choices is to incorporate a lenslet on each pixel such that as much as possible of the light falling on the pixel is made to pass through the portion of the pixel covered with ITO.

Abstract: In a charge coupled device including a semiconductor substrate having a semiconductor region, a plurality of nonactive barrier electrodes, a plurality of first electrodes and a plurality of second electrodes arranged between the nonactive barrier electrodes, an outermost one of the nonactive barrier electrodes is electrically isolated from the others of the nonactive barrier electrodes.

Abstract: A charge transfer image pickup device is disclosed. One embodiment of the device includes a plurality of photoelectric conversion elements for producing signal charges in response to light applied thereto. A vertical charge transfer part including a first region having a first well layer and for transferring the signal charges produced by the photoelectric conversion elements is provided. A horizontal charge transfer part including a second region having a second well layer and coupled to the vertical charge transfer part to receive transferred signal charges by using a terminal vertical transfer electrode of the vertical charge transfer part is also included. The first and second well layers partially overlap to form an overlap section that does not extend over the terminal vertical transfer electrode in the direction from the second region to the first region.

Abstract: According to the present invention, there is provided a solid-state imaging device that has a two-layer transfer electrode structure and is based on a four-phase driving all-pixel reading scheme. The transfer gate electrodes for taking the signal charges out of the photodiode PD and transferring them vertically are formed so that the polysilicon electrodes of a first layer and the polysilicon electrodes of a second layer may each have a specific gate length and be in contact with the gate insulating film on a silicon substrate. If four-phase transfer clocks are .phi.1 to .phi.4, the clocks will be applied to the transfer gate electrodes 31, 32 repeatedly in this order for a single pixel (photodiode PD): the second-layer electrode (.phi.2)--the second-layer electrode (.phi.3)--the first-layer electrode (.phi.4)--the first-layer electrode (.phi.1).

Abstract: A charge coupled device (CCD) image sensor and more particularly a wiring of charge transfer electrodes of a CCD image sensor which is made suitable for improving the charge transfer efficiency of vertical charge coupled devices (VCCDs) thereof.

Abstract: An amplifying type photoelectric converting device is disclosed. The device includes: a semiconductor substrate of a first conductive type; a well portion of a second conductive type for accumulating signal charges generated by photoelectric conversion; a semiconductor region of the first conductive type provided in a region in the well portion; a first gate region including a first electrode; and a second gate region being adjacent to the first gate region and including a second electrode. An active element is formed between the semiconductor region and the semiconductor substrate, and a change in an operational characteristic of the active element which is generated by the signal charges is used as an output signal.

Abstract: A charge transfer device has trapezoidal shape impurity-implanted regions (1, 51, . . . ) in n-type regions (271, 371) at least in the through-paths between a first HCCD (27) and a second HCCD (28), and its isolation regions (41) under the transfer gate (29) are trapezoidal shaped, and thereby charge transfer loss and hence FPN is minimized and the transfer efficiency is much improved.

Abstract: A structure for a charge coupled device (CCD) to minimize effects of masking defects of a predetermined dimensional extent includes a plurality of sets of conductors, a plurality of strapping networks and a connection matrix of via contacts. Each set of the plurality of sets of conductors includes a plurality of parallel elongate first conductors oriented in a first direction and disposed substantially in a first plane, each first conductor being comprised of a first material and characterized by a first sheet resistance per square of conductor.

Abstract: A charge coupled device, together with a method for manufacturing the device, is provided which can eliminate a conventional problem, that is, the remaining of a light-receiving film at a great step area and a consequent lowering of a sensitivity resulting from the shutting-off of a portion of incident light. In the charge coupled device, insulating areas are formed in substantially strip-like array on a silicon substrate. Respective transfer electrodes are formed on a gate insulating film on a semiconductor substrate with an insulating areas interposed. The respective phase transfer electrodes are electrically separated by the insulating area. By doing so, the respective phase transfer electrodes can be formed on the same plane without leaving a greater step. This can achieve a thinned light shielding film.

Abstract: A charged coupled device structure (CCD) and a method for fabricating the CCD structure, which induces a maximum potential distribution difference by utilizing gate insulation films having different physical properties. The charged coupled device includes a semiconductor substrate, a first insulation layer formed on the semiconductor substrate, a plurality of first electrodes spaced at fixed intervals over the first insulation layer, a second insulation layer formed only between the plurality of first electrodes and the first insulation layer, a third insulation layer formed over the entire exposed surface of the first electrodes and the first insulation layer, and a plurality of second electrodes formed only on the surface area corresponding to spaces between the plurality of first electrodes. This gate insulation layers having different physical properties induces a maximum potential distribution difference in a semiconductor substrate with a dielectric constant difference between the insulation layers.

Abstract: A CCD solid state imaging device can reduce a smear component. This CCD solid state imaging device comprises a plurality of photosensor sections (10) arranged in a matrix fashion, a vertical transfer register (5) having a transfer electrode (16) disposed at every column of the photosensor sections, a shunt line layer (33) connected to the transfer electrode (16) on the vertical transfer register (5), and a photo-shield layer (38) formed so as to surround the photosensor section 10 through an interlayer insulating layer (37) which covers the shunt layer (33), in which the interlayer insulating layer (37) is not formed under an overhang portion (38a) of the photo-shield layer (38) to the photosensor section (10).

Abstract: In a charge detection device of a charge coupled device, an unnecessary overlap between a floating gate and other gates are reduced. A gate of a source follower amplifier is also formed in an active region. Further, the floating gate is connected to a gate of the source follower amplifier, and a bias gate and the floating gate overlap above a field oxide film. A bias gate voltage is controlled according to fluctuations of floating gate voltage. Thus, floating gate potential is kept constant.

Abstract: The size of an active pixel sensor cell is reduced by utilizing a single split-gate MOS transistor and a reset gate. The split-gate transistor includes an image collection region which is formed in the drain region and electrically connected to the floating gate of the transistor. Light energy striking the image collection region varies the potential of the floating gate which, in turn, varies the threshold voltage of the transistor. As a result, the current sourced by the transistor is proportional to the received light energy.

Abstract: Stringers and depth of focus problems in substrates having above-surface isolation schemes are avoided by applying a first portion of a gate conductor over the entire surface having above-surface isolation, selectively removing the gate conductor from above the isolation features of the above-surface isolation, and overcoating the entire surface with a second portion of gate conductor. The process has particular application to substrates that employ regions having field-shield isolation. An important feature of the invention is drawn to creating structures wherein gate conductor is applied to a substrate including both above-surface and below-surface isolation regions in a manner which leaves the gate conductor planarized over both the above-surface and below-surface regions.

Abstract: A CCD structure including high resolution pixels. The gate electrodes of the CCD are separated by gaps in the order of 0.6 .mu.m which are made to look smaller than their physical size by the use of dielectric filler material in the gaps. The dielectric filler material has a relatively high dielectric constant which is relatively large for the clock frequencies utilized but may be relatively low for optical frequencies. The dielectric constant of the dielectric filler material is typically greater than 20 and is selected from materials such as tantalum oxide, zirconium oxide, barium titanate and barium strontium titanate.

Abstract: A number of electrode sets each respectively consisting of a number of gate electrodes disposed at each of matrix-addressed charge-coupled device ("CCD") registers are separately arranged in a column direction of the registers, the gate electrodes in each of the electrode sets being separately arranged in a different direction from the column direction, and a combination of interconnections is provided among conductors for selectively applying a number of pulse voltages different in phase to the gate electrodes in each of the electrode sets. The pulse voltages are applied with a combination of different phases to the gate electrodes in each of the electrode sets, and the combination of the different phases are changed, thereby controlling the position of a sensitivity barycenter of each of the electrode sets to raise the resolution of an image sensor.

Abstract: A charge transfer device formed on a semiconductor substrate comprising: a charge transfer section formed on the semiconductor substrate for transferring charges, a floating gate having a floating gate diffusion layer formed on the semiconductor substrate for accumulating the charges transferred from the charge transfer section, an output gate section formed between the charge transfer section and the floating gate on the semiconductor substrate, and a charge detecting circuit electrically connected to the floating gate for outputting a voltage corresponding to the amount of the charges accumulated in the floating gate diffusion layer, the output gate section having a first output gate region adjacent to the charge transfer means and a second output gate region adjacent to the floating gate diffusion layer, the first output gate region having a first output gate electrode formed thereon with an insulating film therebetween, the second output gate region having a second output gate electrode formed thereon wit

Abstract: A charge transfer device formed on a semiconductor substrate comprising: a charge transfer section formed on the semiconductor substrate for transferring charges, a floating gate having a floating gate diffusion layer formed on the semiconductor substrate for accumulating the charges transferred from the charge transfer section, an output gate section formed between the charge transfer section and the floating gate on the semiconductor substrate, and a charge detecting circuit electrically connected to the floating gate for outputting a voltage corresponding to the amount of the charges accumulated in the floating gate diffusion layer, the output gate section having a first output gate region adjacent to the charge transfer means and a second output gate region adjacent to the floating gate diffusion layer, the first output gate region having a first output gate electrode formed thereon with an insulating film therebetween, the second output gate region having a second output gate electrode formed thereon wit

Abstract: A charge transfer device of two-line read structure is formed with a first charge transfer path for transferring first-group charges, a second charge transfer path for transferring second-group charges, and a transfer gate portion (106). To complete the transfer operation of all the second-group charges outputted at a time, the transfer operation of the charges from the first transfer path to the second charge transfer path by the transfer gate portion is divided into a plurality of times. In addition, the second-group charges outputted at time are transferred for each divided set of pixels in each divided transfer operation.

Abstract: A charge transfer device is arranged such that a plurality of first kind charge transfer electrodes and a plurality of second kind charge transfer electrodes are alternately provided on an insulating film, and every other ones of the second kind charge transfer electrodes are grouped into a first and a second group. Potential barriers are provided at upstream portions of the charge transfer region beneath the respective second kind charge transfer electrodes. A first metal interconnect interconnects commonly the first kind charge transfer electrodes, a second metal interconnect interconnects commonly the first group second kind charge transfer electrodes, and a third metal interconnect interconnects commonly the second group second kind charge transfer electrodes.

Abstract: A CCD imager has an array of rows and columns of picture elements on a semiconductor substrate. A vertical charge transfer gate section extends in a first direction on the substrate to be associated with the columns. The transfer gate section includes CCD channels in the substrate, and insulated transfer gate electrodes overlying these CCD channels. A plurality of buffer electrodes are formed at a first level over the substrate surface to overlie the transfer gate electrodes. A plurality of shunt wires are formed at a second level over the substrate surface to overlie the buffer electrodes. The charge transfer gate electrodes and the buffer electrodes are connected with each other by first contact holes. The buffer electrodes and the shunt wires are coupled together by second contact holes.

Abstract: An electric charge detecting apparatus comprising vertical CCD, horizontal CCD and floating diffusion amplifier comprised of floating diffusion layer and source follower amplifier comprising a MOS transistor wherein a buffer electrode is arranged at one end of a gate electrode of the MOS transistor, the gate electrode is formed within an active region of the MOS transistor, a contact hole is provided for connecting a polysilicon layer arranged on a charge-voltage transformer and the source follow or plural P wells are formed and one of them is arranged under a wiring connecting the charge-voltage transformer and the source follower and connected to a source of a drive transistor. Said electric charge detecting apparatus further comprising, P.sup.+ region arranged under a field oxide film on which an output signal wiring from the source follower is electrically isolated from another P.sup.+ region or no P.sup.+ regions are provided under the field oxide film.

Abstract: A plurality of channel separting regions are formed on a substrate with a space therebetween to segment an channel region. A first insulating layer is formed on the substrate, and a polycrystalline silicon layer is formed thereon and is then subject to patterning so as to provide a plurality of first transfer electrodes in the direction crossing the channel separating region. A second insulating layer is formed on the first transfer electrode and on the substrate having been exposed by the patterning, and a second transfer electrodes are formed at a position between the first transfer electrodes on the second insulating layer. By setting the thickness of each transfer electrodes and the each insulating layer to a predetermined value, the interference of the visible light is controlled, and the transparency rate of the visible light is improved.

Abstract: The charge transfer device according to the present invention includes: a plurality of vertical transfer channels; a first transfer gate electrode placed at the ends of the plurality of vertical transfer channels for receiving signal charge from the plurality of vertical transfer channels and for outputting the signal charge; a plurality of horizontal transfer channels having a plurality of layers of gate electrodes for transferring the signal charge from the first transfer gate electrode in a horizontal direction; at least one second transfer gate electrode disposed between the plurality of horizontal transfer channels for transferring the signal charge from one of the horizontal transfer channels to another horizontal transfer channel; a conductive portion for supplying a transfer control signal to the plurality of horizontal transfer channels; at least one output section for converting the signal charge transferred from the plurality of horizontal transfer channels into a voltage signal and for outputting

Abstract: The invention relates to integrated circuits and their manufacture.A process is described for producing electrodes juxtaposed very close together, such as those encountered in charge-coupled shift registers. According to the invention, a first polycrystalline-silicon layer (14) is deposited and a localised oxidation is performed over a small width, in order to tcwtcwdivide the layer into two electrodes (15 and 17). The layer zone which has been oxidised between the two electrodes is then totally deoxidised, in order to produce a hollowed-out space in which it will be possible to house a third electrode (38). This third electrode, also made from polycrystalline silicon, is deposited after a slight insulating layer has been reformed on the side walls of the electrodes 15 and 17. As the width of the hollowed-out space between the two first electrodes is small, a polycrystalline-silicon overthickness is formed.

Abstract: A charge transfer device is provided, which includes: a semiconductor substrate having transfer regions for transferring a signal charge; an insulating film formed on the semiconductor substrate; an electrode layer formed above the transfer regions with the insulating film sandwiched therebetween, the electrode layer having high-resistant portions and low-resistant portions alternately provided; and voltage application means for applying a voltage for changing a surface potential of the transfer regions to the low-resistant portions of the electrode layer.

Abstract: In charge coupled imaging devices, a major portion of the photosensitive surface area is covered by electrodes with which the charge storage and the charge transport in the semiconductor body are controlled. These electrodes are preferably made of polycrystalline silicon. This material, however, like other conductive materials known per se, has a comparatively high absorption coefficient, in particular in the short-wave portion of the visible spectrum (blue), which adversely affects the sensitivity. According to the invention, the electrodes are manufactured partly from a very thin poly layer, preferably not thicker than 50 nm, and partly from a less transparent but higher conductivity layer, for example, poly of much greater thickness.

Abstract: A charge coupled device including a first electrode consisting of a first region and a second region having lower resistance than the first region, and a second electrode consisting of a first region and a second region having lower resistance than this first region. The first region of the first electrode is adjacent to the first region of the second region at an interval of an insulating film. Capable of utilizing the force of electrical field, the device is superior in charge transfer efficiency as well as charge transfer velocity. It also has the capability to improve the performances of high picture quality solid state image sensing devices and time delay devices, which both necessitate a charge coupled device and operate at high frequencies. Additionally, a solid state image sensing device employing this device is not degraded in a dark state by generating a few pulse charges.