Abstract: Photoelectric converting parts and vertical CCD register parts are formed in a semiconductor substrate. Polysilicon electrodes are formed on the vertical CCD register parts. On the polysilicon electrodes, polysilicon oxide film and dielectric film are deposited. On the polysilicon electrodes, contact windows are formed by mask matching and etching. The contact windows are formed in the first polysilicon electrode and second polysilicon electrode so as to realize four-phase drive of the solid-state image pickup device. Polysilicon film and tungsten silicide film are formed thereon. By etching these films, a first wiring is formed. A second wiring of aluminum film is formed thereon through an interlayer dielectric film. Hence, a high transfer efficiency and a favorable smear noise characteristic are presented at low illumination.

Abstract: A solid-state imaging device comprises a plurality of photoelectric conversion accumulation sections arranged two-dimensionally on a semiconductor substrate, a plurality of vertical CCDs for vertically transferring signal charges read out from the photoelectric conversion accumulation sections, and a horizontal CCD for receiving and horizontally transferring the signal charges transferred by the vertical CCDs. A gap between transfer electrodes of the horizontal CCD is less than a gap between transfer electrodes of the vertical CCDs. The transfer electrodes of the vertical CCDs have a single-layer electrode structure formed by patterning a first polysilicon film. The transfer electrodes of the horizontal CCD have an overlapping double-layer electrode structure comprising alternately arranged electrodes formed by patterning the first polysilicon film and electrodes intervening between the alternately arranged electrodes which are formed by patterning a second polysilicon film.

Abstract: A charge-coupled device has a metal wiring which serves both as a wiring for supplying a predetermined potential to charge transfer electrodes constituting a vertical charge transfer section and as a photo-shield for the vertical charge transfer section. The metal wiring is formed from a metal film, a refractory metal film or its silicides. The device has a photoelectric conversion section arranged in a two dimensional form and having a vertical bordering region at which the width of the metal wiring is wider than that of other regions. It is possible to suppress the generation of the false signal caused by smear phenomena without suffering from the lowering of the sensitivity of the device.

Abstract: A solid state imager device comprises a plurality of pixels arranged in rows and columns, each of the pixels consisting of a light sensing element and a vertical transfer portion adjacent to the light sensing element, the vertical transfer portion having three gate portions such as a first, a second and a third gate portions insulated each other, the third gate portion located in the center of the three gate portions, a plurality of rows of base portions disposed in the horizontal direction and connecting the respective gate portions, a vertical wiring device disposed over the gate portions through an insulating layer, the vertical wiring device including, a first wiring film connecting the first gate portions, a second wiring film connecting the second gate portions, a third wiring film connecting the third gate portions which is connected to the odd row of the base portions, a fourth wiring film connecting the third gate portions which is connected to the even rows of the base portions, a read out pulse dev

Abstract: A CCD which is designed and processed so that most of each pixel is covered only with an ultra-thin gate electrode so that the CCD can be frontside illuminated and still achieve good sensitivity in the ultra-violet and soft x-ray spectral range. More specifically, in the present invention, the usual three gate structure and corresponding polysilicon layers 1, 2 and 3 of conventional thickness are reduced in width and supplemented by a fourth ultra-thin layer of polysilicon dubbed herein, poly 4, that is deposited over the entire array. This fourth layer, poly 4, makes contact with poly 3, so that when poly 3 is driven, it also drives poly 4, thus allowing charge to collect and transfer as in a normal three phase CCD. However, because the deposition thickness of the poly 4 layer is on the order of 400 Angsttoms, as opposed to conventional thicknesses of 2000 to 5000 Angsttoms, poly 4 is essentially transparent to photons and thereby allows achievement of high quantum efficiency.

Abstract: A charge transfer device and a solid state image sensor using the same, capable of transferring signal charge at a high signal to noise ratio (S/N ratio) and preventing an occurrence of dark current. They include a double-layered charge transfer path structure provided by forming a surface channel region on a buried channel region formed in a semiconductor substrate, the surface channel region having a conductivity opposite to that of the buried channel region. The surface channel region of the doubled-layered structure is used for accumulating dark current generated from boundary surfaces between the substrate and a gate insulating film, whereas the buried channel region is used for transferring optical signal charge. Where minus and/or plus drive voltages are applied to the transfer electrodes, there is no increase in dark current, in accordance with the present invention. The quantity of transferred signal charge can be greatly increased.

Abstract: In embodiments of flash E.sup.2 PROM arrays, an access transistor is included in each cell thereof, in series with the floating transistor of the cell, the access transistor being used to avoid the problem of drain disturbance in cells other than the cell being programmed. The connection of the control gates in certain of these arrays is such that gate disturbance on the floating gate transistors in those cells not being programmed is reduced or eliminated.

Abstract: Logically and thermodynamically reversible charge transfer (RCT) devices and logic are provided for conditionally transferring individually identifiable charge packets from one or more sources to one or more destinations under the control of one or more additional charge packets that indicate by their presence or absence whether the condition or conditions have been satisfied or not. The individual identities of all of these charge packets are substantially preserved while logic operations are being performed by this logic.

Abstract: In a CCD device, on a semiconductor substrate, and in the insulation films, plural first semiconductor regions and plural second semiconductor regions are formed buried in the insulation films, intermediating a tunneling insulation film therebetween in a manner to spatially isolate them from each other.

Abstract: An FIT or IT solid-state imaging device comprising a p-type Si substrate in which n-type regions forming storage diode portions, signal read-out portions, n-type CCD channels, and p.sup.

Abstract: An integrated circuit comprises a charge coupled device and an MOS transistor. The charge coupled device has a lower and an upper gate electrode on the substrate. The insulating film between the substrate and the electrodes comprises silicon nitride. The insulating film between the electrodes is formed by thermal oxidizing the lower gate electrode using the silicon nitride film as a mask.

Abstract: The present invention relates to a charge transfer device having high transfer efficiency without leaving over signal charges, a charge transfer device substantially shortened in the gate length so as to enhance the transfer speed, and a method of manufacturing and a method of driving such device. In the charge transfer device of the invention, the n.sup.- diffusion layer is formed on the semiconductor substrate. In the surface region of the n.sup.- diffusion layer, a plurality of n diffusion layers are formed at equal intervals. The interval of the adjacent n diffusion layers is about 5 to 10 .mu.m. On the n.sup.- diffusion layer, an insulation film is formed. On the insulation film, transfer electrodes having two different shapes are formed. The transfer electrodes of these two types are alternately arranged. These transfer electrodes differ in length. The length of the longer transfer electrodes is about twice the length of the shorter transfer electrodes.

Abstract: An embodiment of the present invention is an improved insulated-gate, field-effect transistor and a three-sided, junction-gate field-effect transistor connected in series on the same chip to form a high-voltage MOS transistor. An extended drain region is formed on top of a substrate of opposite conductivity material. A layer of material with a conductivity opposite to that of the material of the extended drain region is buried within the extended drain region such that field-effect pinch-off depletion zones extend both above and below the buried layer. A top layer of material similar to the substrate is formed by ion implantation through the same mask window as the extended drain region. The top layer covers the buried layer and extended drain region and itself is covered by a silicon dioxide layer above. Current flow through the extended drain is controlled by the substrate and buried layer when a voltage is applied to pinch-off the extended drain between them in a familiar field-effect fashion.

Abstract: A charge transfer device has a transfer section for transferring a signal charge along a transfer channel, and a pickup section connected to the transfer section for converting the signal charge received from the transfer section to a voltage signal, both sections being formed on a substrate. The transfer channel is bent generally at a right angle between the transfer section and the pickup section.

Abstract: The present invention provides a CCD image sensor capable of suppressing the anomalous increase of the quantity of electric charges to be dealt with by sensor elements when a large quantity of light falls thereon without reducing the quantity of electric charges to be dealt with by vertical transfer registers and without increasing the amplitude of a pulse to be applied to the substrate when an electronic shutter operation is performed. The CCD image sensor is provided with sensor elements (1) of a HAD construction each having a hole accumulating layer (13) and arranged in vertical and horizontal rows, and heavily doped HCS regions (19) of the same type of conduction as that of the hole accumulating layers (13), formed in areas between the adjacent sensor elements of each vertical row to secure passages having a sufficient capacity for holes produced by photoelectric conversion so that the resistance against the hole current is reduced.

Abstract: An adjustable CCD gate structure utilizing ultra-violet light activated floating gates, wherein a floating polysilicon gate is used between a CCD electrode and the underlying substrate to provide a fixed voltage bias to the CCD gate during the manufacturing process thereof The floating gate is programmed with a desired voltage bias during the application of ultra-violet light and is thereafter fixed at that adjusted level, upon the removal of the ultra-violet light.

Abstract: An image sensor including CCDs, a charge coupled device (CCD) or shift register. Each CCD structure is formed of a set of electrodes wherein at least one electrode of each set is formed of a connected layer of opaque conducting material.

Abstract: A CCD imager wherein signal charge can be transferred at a high speed and smears can be minimized without employing a complicated wiring configuration. The CCD imager comprises a transfer electrode formed from a semiconductor layer, a light intercepting film formed from a first layer metal film on the transfer electrode, and a shunt wiring film formed from a second layer metal film on the first layer metal film. The transfer electrode and the shunt wiring film are electrically connected to each other by way of the light intercepting film. Also an improved CCD imager of the frame interline type is disclosed wherein a storage section is improved in light intercepting performance to prevent possible occurrence of smears at the storage section with a simplified configuration of wiring in the storage section.

Abstract: A solid-state charge-coupled-device imager has an imaging region composed of a matrix of vertically and horizontally arrayed photosensitive areas for storing signal charges depending on the intensity of applied light, and a plurality of vertical shift resisters for vertically transferring the signal charges shifted from the photosensitive areas. The signal charges from the vertical shift registers are shifted to a horizontal shift register that transfers the signal charges in a horizontal direction. The horizontal shift register comprises a plurality of charge transfer electrodes horizontally spaced at predetermined intervals. The charge transfer electrodes are inclined to the horizontal direction. The charge transfer electrodes may be inclined linearly in their entirety to the horizontal direction or may be of a chevron shape.

Abstract: An interline transfer type area image sensor which operates in a non-interlaced mode and has an array of columns and rows of photoreceptor in which charge from each pixel is transferred into a stage of a vertical two-phase CCD shift register formed by adjacent electrodes of the CCD. Each electrode of a stage has a separate voltage clock. An ion implanted vertical transfer barrier region is formed under an edge of each electrode.

Abstract: A charge-coupled device includes a parallel section of parallel channels which are situated next to one another and are mutually separated by limitation zones, and a single readout register coupled thereto. The readout register is provided with clock electrodes in a multi-layer wiring system, the electrodes of the upper layer belonging to a common phase and being constructed as a continuous track which extends over the other electrodes. In the bottom wiring layer, electrodes are formed which are each associated with a limitation zone between the parallel channels and which have a length which is at most equal to the width of the limitation zones, and which also belong to a common phase, so that narrow-channel effects are avoided. The invention is of particular importance for CCD image sensors.

Abstract: A charge coupled device (CCD) has a charge storage region and a potential barrier region. The CCD includes a first layer made of a first conductivity type semiconductor, a second layer made of a second conductivity type semiconductor and provided on the first layer, where the first and second conductivity types are mutually opposite types selected from n-type and p-type semiconductors, a third layer made of a first conductivity type semiconductor, impurity diffusion regions provided in at least a surface part of the third layer and having an impurity density higher than that of the third layer, a first gate electrode provided on the third layer between two mutually adjacent impurity diffusion regions, and a second gate electrode provided on each impurity diffusion region of the third layer. The impurity diffusion region forms the charge storage region of the CCD and the third layer between the two mutually adjacent impurity diffusion regions forms the potential barrier region of the CCD.

Abstract: An array of linear CCD image sensors comprises first, second and third CCD image sensors arranged in spaced parallel relation on a body of a semiconductor material. Each CCD image sensor comprises a row of photodetectors, a CCD shift register extending along the row of photodetectors and an output circuit at one end of the CCD shift register. All of the output circuits are at a common end of their respective CCD shift registers. Each CCD shift register includes first and second sets of gate electrodes alternating along the CCD shift register. A first bus line connects the first gate electrodes of each CCD shift register and a second bus line electrically connects the second gate electrodes of each CCD shift register. One of the bus lines of the second CCD shift register is electrically connected to a bus line of the first CCD shift register, and the other bus line of the second CCD shift register is electrically connected to a bus line of the third CCD shift register.

Abstract: A CCD shift register has a final transfer electrode which is formed only by a first polysilicon layer, and an output gate electrode which is formed by a second polysilicon layer. Under the output gate electrode, there is formed a doped region which is formed by a doping step of self alignment, independently of a doped region under the transfer electrodes. Therefore, it is possible to choose the impurity concentration and to adjust the potential level under the output gate electrode freely.

Abstract: A solid-state CCD imaging device has a substrate, photosensitive pixel cells provided as pixel sections in the substrate, and a transfer section, provided in the substrate, for transferring signal charge carriers read out from the pixel cells in a predetermined transfer direction. The transfer section has a semiconductive charge transfer channel layer formed in the substrate and transfer electrodes insulatively provided above the substrate and arrayed in the above direction while predetermined gap sections are kept therebetween. Each of the transfer electrodes defines one charge transfer stage. A gap potential control electrode layer is insulatively disposed above the electrodes.

Abstract: In a charge transfer device, a low impurity density region is provided in its portion forming a floating capacitor. It becomes possible thereby to reduce the capacitance of the floating capacitor and thus to ensure a larger output voltage relative to a signal charge.

Abstract: A structure of a solid-state image sensing device applicable to an HDVS is disclosed in which at least one of the transmission paths for the drive pulses used for driving vertical registers and horizontal registers can achieve reduced propagation delays and signal distortions of the drive pulses. In the first preferred embodiment, a control gate for controlling the transfer of signal charges between the horizontal registers is constituted by a first polycrystalline silicon layer, a metal wiring layer is formed and is connected to the first polycrystalline silicon layer via contact regions and transfer electrodes provided for driving the horizontal registers are constituted by second and third semiconductor layers placed between the first polycrystalline silicon layer and the metal wiring layer without contacting the contact regions.

Abstract: An improved child safety seat coupleable to the seat of a car through a three-point safety belt with restraining means to hold a chil therein. The safety seat has a U-shaped tube with an upper horizontal leg and spaced downwardly extending vertical legs. The tube is secured to the rear face of the back of the safety seat in spaced relationship therewith whereby the a three-point safety belt may be located with its horizontal lap belt in contact with the vertical legs beneath the midpoint of the safety seat and with its transverse shoulder belt in contact with the horizontal leg above the midpoint of the safety seat. This relationship of components will securely hold the child safety seat with respect to the car seat in which it is utilized.