Abstract: A CMOS image sensor includes a photodiode, a plurality of transistors for transferring charges accumulated at the photodiode to one column line, and a voltage dropping element connected to a gate electrode of at least one transistor among the plurality of transistors for expanding a saturation region of the transistor by dropping down a gate voltage inputted to the gate electrode of the at least one transistor.

Abstract: A solid-state imaging device increases the SN ratio of a signal even when external light intensity is low. The solid-state imaging device includes a sensor circuit that includes a light-receiving element, a first transistor that controls connection between a first wiring and a node in which the amount of accumulated charge is determined by the amount of exposure to the light-receiving element, a second transistor whose on or off state is selected in accordance with the potential of the node, and a third transistor that controls connection between a second wiring and a third wiring together with the second transistor; a central processing unit that selects a first driving method or a second driving method in accordance with external light intensity; and a controller that controls a potential supplied to the gate of the first transistor in accordance with the first driving method or the second driving method.

Abstract: Methods of making monolithic three-dimensional memory devices include performing a first etch to form a memory opening and a second etch using a different etching process to remove a damaged portion of the semiconductor substrate from the bottom of the memory opening. A single crystal semiconductor material is formed over the substrate in the memory opening using an epitaxial growth process. Additional embodiments include improving the quality of the interface between the semiconductor channel material and the underlying semiconductor layers in the memory opening which may be damaged by the bottom opening etch, including forming single crystal semiconductor channel material by epitaxial growth from the bottom surface of the memory opening and/or oxidizing surfaces exposed to the bottom opening etch and removing the oxidized surfaces prior to forming the channel material. Monolithic three-dimensional memory devices formed by the embodiment methods are also disclosed.

Abstract: A light receiving element includes: a semiconductor layer; an insulating layer; an interconnect layer; and a film. The semiconductor layer includes a light receiving unit configured to convert a signal light incident on the light receiving unit into an electrical signal. The insulating layer is provided on the semiconductor layer. The interconnect layer is provided on the insulating layer. The film is provided on the insulating layer to cover the light receiving unit and be connected to the interconnect layer, the film being made of a metal or a metal nitride.

Abstract: An imaging device includes: a photoelectric conversion region that generates photovoltaic power for each pixel depending on irradiation light; and a first element isolation region that is provided between adjacent photoelectric conversion regions in a state of surrounding the photoelectric conversion region.

Abstract: A system and method for fabricating a 3D image sensor structure is disclosed. The method comprises providing an image sensor with a backside illuminated photosensitive region on a substrate, applying a first dielectric layer to the first side of the substrate opposite the substrate side where image data is gathered, and applying a semiconductor layer that is optionally polysilicon, to the first dielectric layer. A least one control transistor may be created on the first dielectric layer, within the semiconductor layer and may optionally be a row select, reset or source follower transistor. An intermetal dielectric may be applied over the first dielectric layer; and may have at least one metal interconnect disposed therein. A second interlevel dielectric layer may be disposed on the control transistors. The dielectric layers and semiconductor layer may be applied by bonding a wafer to the substrate or via deposition.

Abstract: A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell (30) includes two pixels (31) and (32). Upper and lower photoelectric converters (33) and (34), transfer transistors (35) and (36) connected to the upper and lower photoelectric converters, respectively, a reset transistor (37), and an amplifying transistor (38) form the two pixels (31) and (32). A full-face signal line 39 is connected to the respective drains of the reset transistor (37) and the amplifying transistor (38). Controlling the full-face signal line (39), along with transfer signal lines (42) and (43) and a reset signal line (41), to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.

Abstract: An imaging system may include image processing circuitry and an image sensor having a pixel, readout circuitry, and control circuitry. The pixel may have a dual conversion gain gate for switching between a high conversion gain mode and a low conversion gain mode. The pixel may capture a first image signal while the dual conversion gain gate is turned of and a second image signal subsequent to capturing the first image signal while the dual conversion gain gate is turned on. The readout circuitry may identify a selected one of the first and second image signals to output to the image processing circuitry based on the first image signal. In this way, the readout circuitry may output a low conversion gain signal when saturating charge is stored on the charge storage region and may output a high conversion gain signal when insufficient charge is stored on the charge storage region.

Abstract: A novel photo-sensitive element for electronic imaging purposes and, in this context, is particularly suited for time-of-flight 3D imaging sensor pixels. The element enables charge-domain photo-detection and processing based on a single gate architecture. Certain regions for n and p-doping implants of the gates are defined. This kind of single gate architecture enables low noise photon detection and high-speed charge transport methods at the same time. A strong benefit compared to known pixel structures is that no special processing steps are required such as overlapping gate structures or very high-ohmic poly-silicon deposition. In this sense, the element relaxes the processing methods so that this device may be integrated by the use of standard CMOS technology for example. Regarding time-of-flight pixel technology, a major challenge is the generation of lateral electric fields. The element allows the generation of fringing fields and large lateral electric fields.

Abstract: Provided is a solid-state image sensor including a pixel array unit and a driving control unit. In the pixel array unit, pixels each including a charge accumulation unit accumulating a photocharge corresponding to an amount of received light, a signal conversion unit converting the photocharge into an electric signal, and a charge transfer unit performing, with a driving signal, switching between a conduction state and a non-conduction state, the charge transfer unit being disposed between the charge accumulation unit and the signal conversion unit are arranged. The driving control unit controls a state of the charge transfer unit with the driving signal and performs a first driving control in which the charge transfer unit is kept being in the conduction state from when the photocharge is transferred from the charge accumulation unit to the signal conversion unit until when a first signal corresponding to the transferred photocharge is read out.

Abstract: The present invention relates to an image sensor in which substrates are stacked, wherein a substrate-stacked image sensor according to the present invention is configured such that a first photodiode is formed on a first substrate, a second photodiode is formed on a second substrate, the two substrates are aligned with and bonded to each other to electrically couple the two photodiodes to each other, thereby forming a complete photodiode within one pixel.

Abstract: An oxide semiconductor film which has more stable electric conductivity is provided. The oxide semiconductor film comprises a crystalline region. The oxide semiconductor film has a first peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.4 nm?1 and less than or equal to 0.7 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 3.3 nm?1 and less than or equal to 4.1 nm?1. The oxide semiconductor film has a second peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.45 nm?1 and less than or equal to 1.4 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 5.5 nm?1 and less than or equal to 7.1 nm?1.

Abstract: A backside illuminated sensor comprising a supporting substrate, a semiconductor layer which comprises a photodiode comprising a region of n-doped semiconductor provided at a first surface of the semiconductor layer, and a region of p-doped semiconductor, wherein a depletion region is formed between the region of n-doped semiconductor and the region of p-doped semiconductor, and a layer of p-doping protective material provided on a second surface of the semiconductor layer, wherein the first surface of the semiconductor layer is fixed to a surface of the supporting substrate.

Abstract: According to one embodiment of the present invention, a solid-state imaging device is provided. The solid-state imaging device includes a first-conductivity-type semiconductor region and a second-conductivity-type semiconductor region. The first-conductivity-type semiconductor region is disposed for each pixel of a captured image. The second-conductivity-type semiconductor region constitutes a photoelectric conversion element by a PN junction with the first-conductivity-type semiconductor region, and has second-conductivity-type impurity concentration that decreases from the center of the photoelectric conversion element toward a transfer gate side for transferring signal charge.

Abstract: A solid-state imaging device includes: pixels arranged in a matrix, a semiconductor substrate; a first electrode formed above the semiconductor substrate for each of the pixels; a photoelectric conversion film formed on the first electrode, for photoelectric conversion of light into signal charge; a charge accumulation region formed in the semiconductor substrate for accumulating the signal charge generated through the photoelectric conversion in the photoelectric conversion film; a contact plug for electrically connecting the first electrode and the charge accumulation region in a corresponding pixel; a high-concentration impurity region formed on a surface of the charge accumulation region, in a region in contact with the contact plug; a surface impurity region formed on the surface of the charge accumulation region, in a region not in contact with the contact plug; and a low-concentration impurity region formed between the high-concentration impurity region and the surface impurity region.

Abstract: A method for fabricating an image-sensor device is provided. The method includes forming a radiation-sensing region and a doped isolation region in a semiconductor substrate. The doped isolation region is adjacent to the radiation-sensing region. The method also includes thinning the semiconductor substrate such that the radiation-sensing region and the doped isolation region are exposed. The method further includes partially removing the doped isolation region to form a recess. In addition, the method includes forming a negatively charged film over an interior surface of the recess and a surface of the radiation-sensing exposed after the thinning of the semiconductor substrate.

Abstract: A solid-state imaging apparatus, comprising a plurality of pixels arrayed on a substrate, and element isolation regions formed between the plurality of pixels on the substrate, wherein the plurality of pixels include a first pixel including a first color filter for passing light having a first wavelength, a second pixel including a second color filter for passing light having a second wavelength longer than the first wavelength, and a pixel for focus detection including a light-shielding pattern arranged on the photoelectric conversion portion to limit light entering the photoelectric conversion portion, and among the element isolation regions, a first region between the pixel for focus detection and the first pixel has a potential barrier against a signal charge, which is lower than that of a second region between the first pixel and the second pixel.

Abstract: Certain embodiments provide a method for manufacturing a solid-state imaging device, including thinning a semiconductor substrate, forming a plurality of masking patterns, and forming a groove having inclined surfaces that are inclined relative to a front surface of the semiconductor substrate at a back surface of the semiconductor substrate. A plurality of light receiving sections are provided in a lattice pattern at the front surface of the semiconductor substrate to be thinned. A wiring layer including metal wirings is provided on the front surface of the semiconductor substrate to be thinned. The plurality of masking patterns are arranged in a lattice pattern on the back surface of the thinned semiconductor substrate. The groove is formed by etching the semiconductor substrate between the masking patterns using an etchant having an anisotropic etching property.

Abstract: In a photoelectric conversion apparatus that adds signals of a plurality of photoelectric conversion elements included in photoelectric conversion units, each of the plurality of photoelectric conversion elements includes a first semiconductor region of a first conductivity type that collects signal carriers. The first semiconductor regions included in photoelectric conversion elements that are included in each of the photoelectric conversion units and that are arranged adjacent to each other sandwich a second semiconductor region of a second conductivity type. A height of a potential barrier for the signal carriers generated in a certain region of the second semiconductor region is smaller than a height of a potential barrier for the signal carriers generated in a third semiconductor region between each of the first semiconductor regions and an overflow drain region of the first conductivity type.

Abstract: Provided are a semiconductor device in which a solid-state image sensing element having a backside-illuminated structure and capacitor elements storing therein some of the charges supplied from light receiving elements has further improved reliability and a manufacturing method thereof. In the solid-state image sensing element of the semiconductor device, first and second substrates are joined together at a junction surface. The first substrate is formed with photodiodes. The second substrate is formed with the capacitor elements. The photodiodes and the capacitor elements are placed to be opposed to each other. In the first substrate, first coupling portions for coupling to the second substrate are placed. In the second substrate, second coupling portions for coupling to the first substrate are placed. A first gap portion between the first coupling portions and a second gap portion between the second coupling portions are placed to overlap a first light blocking film.

Abstract: An image sensor having pixels that include two patterned semiconductor layers. The top patterned semiconductor layer contains the photoelectric elements of pixels having substantially 100% fill-factor. The bottom patterned semiconductor layer contains transistors for detecting, resetting, amplifying and transmitting signals charges received from the photoelectric elements. The top and bottom patterned semiconductor layers may be separated from each other by an interlayer insulating layer that may include metal interconnections for conducting signals between devices formed in the patterned semiconductor layers and from external devices.

Abstract: A method of operating an image sensor includes: thermoelectrically cooling a pixel using a thermoelectric element having a thermoelectric-junction integrated to the pixel; and performing a photoelectric conversion operation using the thermoelectric element. An image sensor includes a pixel and a readout circuit. The pixel includes a thermoelectric element having a thermoelectric-junction, and the readout circuit is configured to control the pixel such that the thermoelectric element performs a thermoelectric-cooling operation and a photoelectric conversion operation.

Abstract: A CMOS multi-pinned pixel having very low dark current and very high charge transfer performance over that of conventional CMOS pixels is disclosed. The CMOS pixel includes epitaxial silicon and at least one transfer gate formed upon the epitaxial silicon. A pinned-photodiode is formed in the epitaxial silicon. A multi-pinned (MP) implant layer is implanted in the epitaxial silicon at least partially extending across the pinned-photodiode and substantially underlying the at least one transfer gate of the CMOS pixel to promote dark current passivation during an accumulation state and promote charge transfer during a transfer state.

Abstract: The present disclosure provides an embodiment of a method for fabricating a three dimensional (3D) image sensor structure. The method includes providing to an image sensor substrate having image sensors formed therein and a first interconnect structure formed thereon, and a logic substrate having a logic circuit formed therein and a second interconnect structure formed thereon; bonding the logic substrate to the image sensor substrate in a configuration that the first interconnect structure and second interconnect structure are sandwiched between the logic substrate and the image sensor substrate; and forming a conductive feature extending from the logic substrate to the first interconnect structure, thereby electrically coupling the logic circuit to the image sensors.

Abstract: Provided is an image pickup device that includes: pixels each including a photoelectric conversion element and one or more switching elements; control lines provided to perform open/close control of at least one first switching element; a buffer circuit provided for each control line, and configured to output a voltage to each control line; second switching elements each provided between corresponding one of the control lines and a power source of the corresponding buffer circuit; and a switch control circuit that is, upon image pickup driving, configured to control one of the second switching elements, provided between a defect holding line that includes an electrically short-circuited part in the plurality of control lines and the power source of the buffer circuit of the defect holding line, to be in an open state, and configured to control another one of the second switching elements to be in a closed state.

Abstract: An image sensor pixel is disclosed. The pixel may include a photodiode having a first region with a first potential and a second region with a second, higher potential, with the second region being offset in depth from the first region in a semiconductor chip. A storage node may be positioned at substantially the same depth as the second region of the photodiode. A storage gate may be operable to transfer charge between the photodiode and the storage node.

Abstract: At least one exemplary embodiment is directed to a solid state image sensor including at least one antireflective layer and/or non rectangular shaped wiring layer cross section to reduce dark currents and 1/f noise.

Abstract: A solid-state imaging device includes a substrate in which a plurality of pixels including photoelectric converters are formed, a wiring layer that includes wirings in a plurality of layers formed via an interlayer insulating film in a front surface side of the substrate, a base electrode pad portion that includes a portion of the wirings formed in the wiring layer, an opening that penetrates the substrate from a rear surface side of the substrate and reaches the base electrode pad portion, and an embedded electrode pad layer that is formed so as to be embedded in the opening by electroless plating.

Abstract: A method of making a backside illuminated image sensor includes forming a first isolation structure in a pixel region of a substrate, where a bottom of the first isolation structure is exposed at a back surface of the substrate. The method further includes forming a second isolation structure in a peripheral region of the substrate, where the second isolation structure has a depth less than a depth of the first isolation structure. Additionally, the method includes forming an implant region adjacent to at least a portion of sidewalls of the first isolation structure, where the portion of the sidewalls is located closer to the back surface than a front surface of the substrate, and where the second isolation structure is free of the implant region.

Abstract: A sensor and its fabrication method are provided, the sensor includes: a base substrate, a group of gate lines and a group of data lines arranged as crossing each other, and a plurality of sensing elements arranged in an array and defined by the group of gate lines and the group of data lines, each sensing element including a TFT device and a photodiode sensing device, wherein a channel region of the TFT device is inverted and the source and drain electrodes are positioned between the active layer and the gate electrode. The sensor reduces the number of mask as well as the production cost and simplifies the production process, thereby significantly improves the production capacity and the defect-free rate.

Abstract: A method of driving shutter glasses of a display system includes generating a display panel driving signal which drives a display panel of the display system, where the display panel displays a left image and a right image, generating a second three-dimensional (“3D”) synchronizing signal based on a first 3D synchronizing signal and the display panel driving signal, generating a third 3D synchronizing signal by adjusting an intensity of the second 3D synchronizing signal, generating a shutter control signal, which controls a left shutter and a right shutter of the shutter glasses, based on the third 3D synchronizing signal, and outputting the shutter control signal to the shutter glasses.

Abstract: An image sensor operable in global shutter mode ma include small pixels with high charge storage capacity, low dark current, and no image lag. Storage capacity of a photodiode and a charge storage diode may be increased by placing a p+ type doped layer under the photodiode and the charge storage diode. The p+ type doped layer ma include an opening for allowing photo-generated charge carriers to flow from the silicon bulk to the charge storage well located near the surface of the photodiode. A compensating n? type doped implant may be formed in the opening. Image lag is prevented by placing a p? type doped region under the p+ type doped photodiode pinning layer and aligned with the opening. The p+ type doped layer may extend under the entire pixel array.

Abstract: A semiconductor element and a manufacturing method thereof are provided. The semiconductor element includes a base, an epitaxy layer, a first well, a second well, a third well, a first heavily doping region, a second heavily doping region, a implanting region and a conductive layer. The epitaxy layer is disposed on the base. The first well, the second well and the third well are disposed in the epitaxy layer. The third well is located between the first well and the second well. A surface channel is formed between the first heavily doping region and the second heavily doping region. The implanting region is fully disposed between the surface channel and the base and disposed at a projection region of the first well, the second well and the third well.

Abstract: An image pickup device includes: a first electrode film; an organic photoelectric conversion film; a second electrode film; and a metal wiring film electrically connected to the second electrode film, the first electrode film, the organic photoelectric conversion film, and the second electrode film all provided on a substrate in this order, and the metal wiring film coating an entire side of the organic photoelectric conversion film.

Abstract: A backside illuminated image sensor includes a semiconductor substrate having a front side and a backside facing each other, a light receiving element in the semiconductor substrate, the light receiving element being configured to convert light incident on the backside of the semiconductor substrate to an electrical signal, a first semiconductor layer on the front side of the semiconductor substrate, and a second semiconductor layer on the backside of the semiconductor substrate, the second semiconductor layer being connected to a voltage source.

Abstract: A device includes a semiconductor substrate, which has a front side and a backside. A photo-sensitive device is disposed on the front side of the semiconductor substrate. A first and a second grid line are parallel to each other, and are disposed on the backside of, and overlying, the semiconductor substrate. A stacked layer includes an adhesion layer, a metal layer over the adhesion layer, and a high-refractive index layer over the metal layer. The adhesion layer, the metal layer, and the high-refractive index layer are substantially conformal, and extend on top surfaces and sidewalls of the first and the second grid lines.

Abstract: A method for manufacturing a conversion device is provided. Formed are an insulating layer that covers at least conversion portion is formed; a protection layer for suppressing formation of a metal-semiconductor compound layer, at a position where the protection layer covers the conversion portion via the insulating layer, covers at least part of an element isolation region, and exposes a transistor; and a metal film on the protection layer and the transistor. A metal-semiconductor compound layer on the transistor by performing heating process is formed. Metal that has not been reacted by the heating process is removed from the substrate. After that, an upper side in portions of the protection layer covering the conversion portion and the at least part of the element isolation region are removed.

Abstract: A solid-state imaging device includes a semiconductor substrate, a connection portion, and one or more first photoelectric conversion units formed in the semiconductor substrate. The semiconductor substrate has a back side and a front side. The back side is a light incident surface, and the front side is a circuit-forming surface. The connection portion is connected to a contact plug that transfers signal charges generated on the back side of the semiconductor substrate into the semiconductor substrate. The connection portion has a peak of an impurity concentration distribution near an interface of the semiconductor substrate on the back side of the semiconductor substrate.

Abstract: An image sensor includes a transfer gate formed over a substrate including front and back sides, a photoelectric conversion area formed in the substrate on one side of the transfer gate, a trench formed in the photoelectric conversion area and having a trench entrance located on the back side of the substrate, and a color filter formed over the backside of the substrate.

Abstract: A reset method of an photoelectric conversion device at least including a phototransistor having a first collector, a first base, and a first emitter, and a first field-effect transistor having a first source, a first drain, and a first gate, includes: connecting the first base, and one of the first source and the first drain of the first field-effect transistor by having a common region, or a continuous region, without a base electrode; supplying a base reset potential to the other of the first source and the first drain; and overlapping a time in which a first emitter potential is supplied to the first emitter and a time in which a first ON-potential that turns on the first field-effect transistor is supplied to the first gate.

Abstract: A MOS solid-state imaging device is provided in which withstand voltage and 1/f noise of a MOS transistor are improved. In the MOS solid-state imaging device whose unit pixel has at least a photoelectric converting portion and a plurality of field effect transistors, the thickness of gate insulating film in a part of the field effect transistors is different from the thickness of gate insulating film in the other field effect transistors among the plurality of the field effect transistors.

Abstract: A high dynamic range pixel (2) includes a photosensor device (4) for detecting incident light, said photosensor having a photosensor output (14) for a photosensor signal Vp that represents a time integral of the detected light intensity over an integration period. A transistor disconnect switch (8) has a first switch input (15) that is connected to the photosensor output (14), a second switch input (17) that is connected to receive a time-dependent reference signal Vref, and a switch output (16) for a switch output signal Vs that is switchably connected to the first switch input. The disconnect switch (8) is constructed and arranged to disconnect the switch output (16) from the first switch input (15) at a capture moment that depends on the relative values of input signals at the first and second switch inputs (15,18).

Abstract: A color sensitive image sensor includes first, second, and third image sensor layers vertically aligned in an image sensor stack. Each of the image sensor layers includes a pixel array oriented to generate image data in response to light incident on the image sensor stack and readout circuitry coupled to the pixel array to readout the image data. A first optical filter layer is disposed between the first image sensor layer and the second image sensor layer and has a first edge pass filter characteristic with a first cutoff wavelength. A second optical filter layer is disposed between the second image sensor layer and the third image sensor layer and has a second edge pass filter characteristic with a second cutoff wavelength offset from the first cutoff wavelength.

Abstract: A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell (30) includes two pixels (31) and (32). Upper and lower photoelectric converters (33) and (34), transfer transistors (35) and (36) connected to the upper and lower photoelectric converters, respectively, a reset transistor (37), and an amplifying transistor (38) form the two pixels (31) and (32). A full-face signal line 39 is connected to the respective drains of the reset transistor (37) and the amplifying transistor (38). Controlling the full-face signal line (39), along with transfer signal lines (42) and (43) and a reset signal line (41), to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.

Abstract: Provided are resistive switching memory cells having selectors and methods of fabricating such cells. A selector may be disposed between an electrode and resistive switching layer. The selector is configured to undergo an electrical breakdown when a voltage applied to the selector exceeds a selected threshold. The selector is formed from amorphous silicon doped with fluorine. The concentration of fluorine may be between about 0.01% atomic and 3% atomic, such as about 1% atomic. Amorphous silicon has a larger band gap than, for example, crystalline silicon and, therefore, has a lower leakage. Dangling bond and weak bond states appearing in the mid-gap position of amorphous silicon are eliminated by adding fluorine. Fluorine binds to and passivates defects. In some embodiments, a fluorine reservoir is positioned in a low current density region of the memory cell to counter diffusion of fluorine from the selector into other components.

Abstract: Disclosed herein is a solid-state imaging device including, a first semiconductor region of the first conduction type, a photoelectric conversion part having a second semiconductor region of the second conduction type formed in the region separated by the isolation dielectric region of the first semiconductor region, pixel transistors formed in the first semiconductor region, a floating diffusion region of the second conduction type which is formed in the region separated by the isolation dielectric region of the first semiconductor region, and an electrode formed on the first semiconductor region existing between the floating diffusion region and the isolation dielectric region and is given a prescribed bias voltage.

Abstract: A solid-state imaging device including is provided. The solid-state imaging device includes: pixels arrayed; a photoelectric conversion element in each of the pixels; a read transistor for reading electric charges photoelectrically-converted in the photoelectric conversion elements to a floating diffusion portion; a shallow trench element isolation region bordering the floating diffusion portion; and an impurity diffusion isolation region for other element isolation regions than the shallow trench element isolation region.

Abstract: A solid state imaging device includes a semiconductor layer, and a light shielding portion. The semiconductor layer has multiple photoelectric conversion elements. The light shielding portion is provided in the semiconductor layer, and has a light shielding member whose interface with the semiconductor layer is covered by an insulating film. The light shielding portion includes a light shielding region and an element isolation region. The light shielding region is provided in the semiconductor layer on the side close to the light receiving surface of the photoelectric conversion element for shielding light incident on the photoelectric conversion element from a specific direction. The element isolation region is formed to project in the depth direction of the semiconductor layer from the light shielding region toward a portion between the multiple photoelectric conversion elements in order to electrically and optically isolate the multiple photoelectric conversion elements from one another.

Abstract: A solid-state image pickup device 1 includes a semiconductor substrate 10, light receiving unit 14 and light shielding film 20. The solid-state image pickup device 1 is back surface incident type and photoelectrically converts light indent on the back surface S2 of the semiconductor substrate 10 from an object into electrical charges and receives electrical charges produced by photoelectric conversion at the light receiving unit 14 to image the object. The light receiving unit 14 forms a PN junction diode with the semiconductor substrate 10. The light shielding film 20 is provided over a front surface S1 of the semiconductor substrate 10 so as to cover the light receiving unit 14. The light shielding film 20 serves to shield light incident on the front surface S1 from the outside of the solid-state image pickup device 1.

Abstract: Pixels for solid-state CMOS image sensor arrays may be provided that have a lateral blooming control structure incorporated in them. The lateral blooming control structure is built as a separate structure from the charge transfer gate and it is fabricated in a self-aligned manner, which is particularly suitable for incorporating into small size pixels. The blooming control structure can be used for backside or for front side illuminated image sensors. When the lateral blooming control structure is provided with a separate bias means, it may also be used for the complete or partial charge removal from the photodiode and thus used in pixels that are designed for global shutter operation.