Magnetic Field Sensor In Integrated Circuit (e.g., In Bipolar Transistor Integrated Circuit) Patents (Class 257/427)
-
Publication number: 20140151831Abstract: A method and system provide a magnetic junction usable in a magnetic device. The magnetic junction includes a pinned layer, a nonmagnetic spacer layer, and a free layer. The nonmagnetic spacer layer is between the pinned layer and the free layer. The free layer includes a plurality of subregions. Each of the subregions has a magnetic thermal stability constant. The subregions are ferromagnetically coupled such that the free layer has a total magnetic thermal stability constant. The magnetic thermal stability constant is such that the each of the subregions is magnetically thermally unstable at an operating temperature. The total magnetic thermal stability constant is such that the free layer is magnetically thermally stable at the operating temperature. The magnetic junction is configured such that the free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction.Type: ApplicationFiled: September 13, 2013Publication date: June 5, 2014Applicant: Samsung Electronics Co., Ltd.Inventors: Eugene Chen, Dmytro Apalkov
-
Patent number: 8742520Abstract: A method and structure for a three-axis magnetic field sensing device is provided. The device includes a substrate, an IC layer, and preferably three magnetic field sensors coupled to the IC layer. A nickel-iron magnetic field concentrator is also provided.Type: GrantFiled: June 21, 2013Date of Patent: June 3, 2014Assignee: mCube Inc.Inventors: Hong Wan, Xiao (Charles) Yang
-
Patent number: 8736004Abstract: Reading margin is improved in a MTJ designed for MRAM applications by employing a pinned layer with an AP2/Ru/AP1 configuration wherein the AP1 layer is a CoFeB/CoFe composite and by forming a MgO tunnel barrier adjacent to the CoFe AP1 layer by a sequence that involves depositing and oxidizing a first Mg layer with a radical oxidation (ROX) process, depositing and oxidizing a second Mg layer with a ROX method, and depositing a third Mg layer on the oxidized second Mg layer. The third Mg layer becomes oxidized during a subsequent anneal. MTJ performance may be further improved by selecting a composite free layer having a Fe/NiFeHf or CoFe/Fe/NiFeHf configuration where the NiFeHf layer adjoins a capping layer in a bottom spin valve configuration. As a result, read margin is optimized simultaneously with improved MR ratio, a reduction in bit line switching current, and a lower number of shorted bits.Type: GrantFiled: July 15, 2013Date of Patent: May 27, 2014Assignee: Headway Technologies, Inc.Inventors: Wei Cao, Witold Kula, Chyu-Jiuh Torng
-
Patent number: 8729647Abstract: A thermally stable Magnetic Tunnel Junction (MTJ) cell, and a memory device including the same, include a pinned layer having a pinned magnetization direction, a separation layer on the pinned layer, and a free layer on the separation layer and having a variable magnetization direction. The pinned layer and the free layer include a magnetic material having Perpendicular Magnetic Anisotropy (PMA). The free layer may include a central part and a marginal part on a periphery of the central part. The free layer is shaped in the form of a protrusion in which the central part is thicker than the marginal part.Type: GrantFiled: November 20, 2012Date of Patent: May 20, 2014Assignee: Samsung Electronics., Ltd.Inventors: Sung-chul Lee, Kwang-seok Kim, Kee-won Kim, Young-man Jang, Ung-hwan Pi
-
Patent number: 8716818Abstract: According to one embodiment, a magnetoresistive element includes a storage layer having a variable and perpendicular magnetization, a tunnel barrier layer on the storage layer, a reference layer having an invariable and perpendicular magnetization on the tunnel barrier layer, a hard mask layer on the reference layer, and a sidewall spacer layer on sidewalls of the reference layer and the hard mask layer. An in-plane size of the reference layer is smaller than an in-plane size of the storage layer. A difference between the in-plane sizes of the storage layer and the reference layer is 2 nm or less. The sidewall spacer layer includes a material selected from a group of a diamond, DLC, BN, SiC, B4C, Al2O3 and AlN.Type: GrantFiled: March 23, 2012Date of Patent: May 6, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Masatoshi Yoshikawa, Satoshi Seto, Hideaki Harakawa, Jyunichi Ozeki, Tatsuya Kishi, Keiji Hosotani
-
Patent number: 8716817Abstract: According to one embodiment, a magnetic memory element includes a stacked body including first and second stacked units stacked with each other. The first stacked unit includes first and second ferromagnetic layers and a first nonmagnetic layer provided therebetween. The second stacked unit includes third and fourth ferromagnetic layers and a second nonmagnetic layer provided therebetween. Magnetization of the second and third ferromagnetic layers are variable. Magnetizations of the first and fourth ferromagnetic layers are fixed in a direction perpendicular to the layer surfaces. A cross-sectional area of the third ferromagnetic layer is smaller than a cross-sectional area of the first stacked unit when cut along a plane perpendicular to the stacking direction.Type: GrantFiled: March 9, 2012Date of Patent: May 6, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Daisuke Saida, Minoru Amano, Yuichi Ohsawa, Junichi Ito, Hiroaki Yoda
-
Patent number: 8710604Abstract: In accordance with an embodiment, a magnetoresistive element includes a lower electrode, a first magnetic layer on the lower electrode, a first diffusion prevention layer on the first magnetic layer, a first interfacial magnetic layer on the first metal layer, a nonmagnetic layer on the first interfacial magnetic layer, a second interfacial magnetic layer on the nonmagnetic layer, a second diffusion prevention layer on the second interfacial magnetic layer, a second magnetic layer on the second diffusion prevention layer, and an upper electrode layer on the second magnetic layer. The ratio of a crystal-oriented part to the other part in the second interfacial magnetic layer is higher than the ratio of a crystal-oriented part to the other part in the first interfacial magnetic layer.Type: GrantFiled: March 20, 2012Date of Patent: April 29, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Koji Yamakawa, Katsuaki Natori, Daisuke Ikeno, Tadashi Kai
-
Patent number: 8710605Abstract: A magnetic memory according to an embodiment includes: at least one memory cell comprising a magnetoresistive element as a memory element, and first and second electrodes that energize the magnetoresistive element. The magnetoresistive element includes: a first magnetic layer having a variable magnetization direction perpendicular to a film plane; a tunnel barrier layer on the first magnetic layer; and a second magnetic layer on the tunnel barrier layer, and having a fixed magnetization direction perpendicular to the film plane. The first magnetic layer including: a first region; and a second region outside the first region so as to surround the first region, and having a smaller perpendicular magnetic anisotropy energy than that of the first region. The second magnetic layer including: a third region; and a fourth region outside the third region, and having a smaller perpendicular magnetic anisotropy energy than that of the third region.Type: GrantFiled: September 13, 2011Date of Patent: April 29, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Shigeki Takahashi, Yuichi Ohsawa, Junichi Ito, Chikayoshi Kamata, Saori Kashiwada, Minoru Amano, Hiroaki Yoda
-
Patent number: 8704334Abstract: A semiconductor device includes an internal circuit provided on a substrate, a plurality of external terminals connected to the internal circuit, a plurality of wires connecting the internal circuit and the external terminals, and a plurality of inductors communicating with an external device. Each of the inductors is connected to each of the wires. The external terminals are formed in a region not to interrupt communication between the inductors and the external device.Type: GrantFiled: July 19, 2011Date of Patent: April 22, 2014Assignee: Renesas Electronics CorporationInventor: Yasutaka Nakashiba
-
Patent number: 8686524Abstract: A magnetic stack having a ferromagnetic free layer, a metal oxide layer that is antiferromagnetic at a first temperature and non-magnetic at a second temperature higher than the first temperature, a ferromagnetic pinned reference layer, and a non-magnetic spacer layer between the free layer and the reference layer. During a writing process, the metal oxide layer is non-magnetic. For magnetic memory cells, such as magnetic tunnel junction cells, the metal oxide layer provides reduced switching currents.Type: GrantFiled: June 8, 2012Date of Patent: April 1, 2014Assignee: Seagate Technology LLCInventors: Xiaohua Lou, Yuankai Zheng, Wenzhong Zhu, Wei Tian, Zheng Gao
-
Patent number: 8686525Abstract: The invention relates to a magnetic sensor and a magnetic memory which sense magnetic information held by a ferromagnetic body without a current flowing through the ferromagnetic body. The magnetic sensor and magnetic memory use a magnetoresistive effect generated in a current that flows through a metal layer along an interface, on at least the interface side, with a ferromagnetic dielectric layer and said metal layer being joined through said interface.Type: GrantFiled: March 24, 2010Date of Patent: April 1, 2014Assignee: Toroku UniversityInventors: Eiji Saitoh, Hiroyasu Nakayama, Kazuya Harii
-
Publication number: 20140084402Abstract: According to one embodiment, a magnetic memory includes a first magnetoresistive element includes a storage layer with a perpendicular and variable magnetization, a tunnel barrier layer, and a reference layer with a perpendicular and invariable magnetization, and stacked in order thereof in a first direction, and a first shift corrective layer with a perpendicular and invariable magnetization, the first shift corrective layer and the storage layer arranged in a direction intersecting with the first direction. Magnetization directions of the reference layer and the first shift corrective layer are the same.Type: ApplicationFiled: March 15, 2013Publication date: March 27, 2014Applicant: Kabushiki Kaisha ToshibaInventors: Naoharu SHIMOMURA, Eiji Kitagawa, Chikayoshi Kamata, Minoru Amano, Yuichi Ohsawa, Daisuke Saida, Megumi Yakabe, Hiroaki Maekawa
-
Publication number: 20140084403Abstract: An integrated circuit includes a magnetic field sensor and an injection molded magnetic material enclosing at least a portion of the magnetic field sensor.Type: ApplicationFiled: November 30, 2013Publication date: March 27, 2014Applicant: Infineon Technologies AGInventor: Udo AUSSERLECHNER
-
Patent number: 8679906Abstract: In one embodiment, there is an asymmetric multi-gated transistor that has a semiconductor fin with a non-uniform doping profile. A first portion of the fin has a higher doping concentration while a second portion of the fin has a lower doping concentration. In another embodiment, there is an asymmetric multi-gated transistor with gate dielectrics formed on the semiconductor fin that vary in thickness. This asymmetric multi-gated transistor has a thin gate dielectric formed on a first side portion of the semiconductor fin and a thick gate dielectric formed on a second side portion of the fin.Type: GrantFiled: November 4, 2009Date of Patent: March 25, 2014Assignee: International Business Machines CorporationInventor: Kangguo Cheng
-
Patent number: 8674465Abstract: A semiconductor device includes a magnetic tunnel junction (MTJ) storage element configured to be disposed in a common interlayer metal dielectric (IMD) layer with a logic element. Cap layers separate the common IMD layer from a top and bottom IMD layer. Top and bottom electrodes are coupled to the MTJ storage element. Metal connections to the electrodes are formed in the top and bottom IMD layers respectively through vias in the separating cap layers. Alternatively, the separating cap layers are recessed and the bottom electrodes are embedded, such that direct contact to metal connections in the bottom IMD layer is established. Metal connections to the top electrode in the common IMD layer are enabled by isolating the metal connections from the MTJ storage elements with metal islands and isolating caps.Type: GrantFiled: August 5, 2010Date of Patent: March 18, 2014Assignee: QUALCOMM IncorporatedInventors: Xia Li, Xiaochun Zhu, Seung H. Kang
-
Patent number: 8674466Abstract: A toggle MTJ is disclosed that has a SAF free layer with two or more magnetic sub-layers having equal magnetic moments but different anisotropies which is achieved by selecting Ni˜0.8Fe˜0.2 for one sub-layer and CoFeB or the like with a uni-axial anisotropy of 10 to 30 Oe for the higher anisotropy sub-layer. When a field is applied at <10° angle from the easy axis, magnetic vectors for the two sub-layers rotate to form different angles from the easy axis. A method is also described for selectively writing to bits along a word line that is orthogonal to bit line segments and avoids the need to “read first”. A bipolar word line pulse with two opposite pulses separated by a no pulse interval is applied in the absence of a bit line pulse to write a “0”. A bit line pulse opposite the second word line pulse writes a “1”.Type: GrantFiled: May 5, 2008Date of Patent: March 18, 2014Assignee: Headway Technologies, Inc.Inventor: Yimin Guo
-
Publication number: 20140054733Abstract: The present invention discloses a single-chip referenced full-bridge magnetoresistive magnetic-field sensor. The single-chip sensor is a Wheatstone bridge arrangement of magnetoresistive sensing elements and reference elements. The sensing elements and reference elements are formed from either magnetic tunnel junctions or giant magnetoresistive materials. The sensitivity of the reference and sensor elements is controlled through one or a combination of magnetic bias, exchange bias, shielding, or shape anisotropy. Moreover, the bridge output is tuned by setting the ratio of the reference and sensor arm resistance values to a predetermined ratio that optimizes the bridge output for offset and symmetry. The single-chip referenced-bridge magnetic field sensor of the present invention exhibits excellent temperature stability, low offset voltage, and excellent voltage symmetry.Type: ApplicationFiled: April 6, 2012Publication date: February 27, 2014Applicant: Jiangsu Multidimensional Technology Co., Ltd.Inventors: James G. Deak, Insik Jin, Weifeng Shen, Songsheng Xue, Xiaofeng Lei
-
Patent number: 8659103Abstract: According to one embodiment, a magnetoresistive element includes the following configuration. A first magnetic layer has an invariable magnetization. A second magnetic layer has a variable magnetization. A nonmagnetic layer is provided between the first and the second magnetic layers. The first magnetic layer has a structure in which first, second and third magnetic material films and a nonmagnetic material film are stacked. The first magnetic material film is provided in contact with the nonmagnetic layer, the nonmagnetic material film is provided in contact with the first magnetic material film, the second magnetic material film is provided in contact with the nonmagnetic material film, and the third magnetic material film is provided in contact with the second magnetic material film. The second magnetic material film has a Co concentration higher than that of the first magnetic material film.Type: GrantFiled: March 19, 2012Date of Patent: February 25, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Daisuke Watanabe, Katsuya Nishiyama, Toshihiko Nagase, Koji Ueda, Tadashi Kai
-
Patent number: 8659104Abstract: A field-effect magnetic sensor facilitates highly-sensitive magnetic field detection. In accordance with one or more example embodiments, current flow respectively between first and second source/drain terminals and a third source/drain terminal is controlled using inversion layers in separate channel regions for each of the first and second terminals. In response to a magnetic field, a greater amount of current is passed between the third source/drain terminal and one of the first and second source/drain terminals, relative to an amount of current passed between the third source/drain terminal and the other one of the first and second source/drain terminals.Type: GrantFiled: December 21, 2010Date of Patent: February 25, 2014Assignee: NXP B.V.Inventors: Gilberto Curatola, Victor Zieren, Anco Heringa
-
Patent number: 8653615Abstract: A magneto-resistive device having a large output signal as well as a high signal-to-noise ratio is described along with a process for forming it. This improved performance was accomplished by expanding the free layer into a multilayer laminate comprising at least three ferromagnetic layers separated from one another by antiparallel coupling layers. The ferromagnetic layer closest to the transition layer must include CoFeB while the furthermost layer is required to have low Hc as well as a low and negative lambda value. One possibility for the central ferromagnetic layer is NiFe but this is not mandatory.Type: GrantFiled: November 19, 2008Date of Patent: February 18, 2014Assignee: Headway Technologies, Inc.Inventors: Tong Zhao, Hui-Chuan Wang, Yu-Chen Zhou, Min Li, Kunliang Zhang
-
Patent number: 8643130Abstract: A magnetic stack with out of plane magnetisation, the magnetic stack including: a first magnetic layer constituted of one or more materials selected from the following group: cobalt, iron and nickel and magnetic alloys based on the materials; a second layer constituted of a metallic material able to confer to an assembly formed by the first and the second layers a perpendicular anisotropy of interfacial origin when the second layer has a shared interface with the first layer; and a third layer deposited on the first layer, the second layer being deposited on the third layer, the third layer being constituted of a metallic material having a miscibility less than 10% with the material of the first layer.Type: GrantFiled: June 7, 2012Date of Patent: February 4, 2014Assignee: Commissariat a l'energie atomique et aux energies alternativesInventors: Sebastien Bandiera, Bernard Dieny, Bernard Rodmacq
-
Patent number: 8637947Abstract: A memory element includes a layered structure and a negative thermal expansion material layer. The layered structure includes a memory layer, a magnetization-fixed layer, and an intermediate layer. The memory layer has magnetization perpendicular to a film face in which a magnetization direction is changed depending on information, and includes a magnetic layer having a positive magnetostriction constant. The magnetization direction is changed by applying a current in a lamination direction of the layered structure to record the information in the memory layer. The magnetization-fixed layer has magnetization perpendicular to a film face that becomes a base of the information stored in the memory layer. The intermediate layer is formed of a non-magnetic material and is provided between the memory layer and the magnetization-fixed layer.Type: GrantFiled: November 26, 2012Date of Patent: January 28, 2014Assignee: Sony CorporationInventors: Kazutaka Yamane, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Tetsuya Asayama, Hiroyuki Uchida
-
Publication number: 20140021571Abstract: The present invention discloses a design and manufacturing method for a single-chip magnetic sensor bridge. The sensor bridge comprises four magnetoresistive elements. The magnetization of the pinned layer of each of the four magnetoresistive elements is set in the same direction, but the magnetization directions of the free layers of the magnetoresistive elements on adjacent arms of the bridge are set at different angles with respect to the pinned layer magnetization direction. The absolute values of the angles of the magnetization directions of the free layers of all four magnetoresistive elements are the same with respect with their pinning layers. The disclosed magnetic biasing scheme enables the integration of a push-pull Wheatstone bridge magnetic field sensor on a single chip with better performance, lower cost, and easier manufacturability than conventional magnetoresistive sensor designs.Type: ApplicationFiled: April 1, 2012Publication date: January 23, 2014Inventors: Xiaofeng Lei, Insik Jin, James Deak, Weifeng Geza Shen, Mingfeng Liu, Songsheng Xue
-
Patent number: 8629520Abstract: An integrated circuit can have a first substrate supporting a magnetic field sensing element and a second substrate supporting another magnetic field sensing element. The first and second substrates can be arranged in a variety of configurations. Another integrated circuit can have a first magnetic field sensing element and second different magnetic field sensing element disposed on surfaces thereof.Type: GrantFiled: June 2, 2010Date of Patent: January 14, 2014Assignee: Allegro Microsystems, LLCInventors: Michael C. Doogue, William P. Taylor, Vijay Mangtani
-
Patent number: 8629518Abstract: A magnetic tunnel junction (MTJ) etching process uses a sacrifice layer. An MTJ cell structure includes an MTJ stack with a first magnetic layer, a second magnetic layer, and a tunnel barrier layer in between the first magnetic layer and the second magnetic layer, and a sacrifice layer adjacent to the second magnetic layer, where the sacrifice layer protects the second magnetic layer in the MTJ stack from oxidation during an ashing process. The sacrifice layer does not increase a resistance of the MTJ stack. The sacrifice layer can be made of Mg, Cr, V, Mn, Ti, Zr, Zn, or any alloy combination thereof, or any other suitable material. The sacrifice layer can be multi-layered and/or have a thickness ranging from 5 ? to 400 ?. The MTJ cell structure can have a top conducting layer over the sacrifice layer.Type: GrantFiled: July 1, 2010Date of Patent: January 14, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Jen Wang, Ya-Chen Kao, Chun-Jung Lin
-
Patent number: 8629047Abstract: Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched materials.Type: GrantFiled: July 9, 2012Date of Patent: January 14, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Zhiyuan Cheng, Calvin Sheen
-
Publication number: 20130341745Abstract: A light pumping magnetic measurement apparatus configured to suppress an influence on a magnetic field from a heater and facilitate reduction in size and integration of a gas cell when heating the gas cell in order to improve a sensitivity of detection of the magnetic field is provided. This measurement apparatus includes a first glass substrate, a substrate 102 having a thermal conductivity higher than glass, and a second glass substrate laminated in this order.Type: ApplicationFiled: March 14, 2011Publication date: December 26, 2013Applicant: Hitachi, Ltd.Inventors: Seiichi Suzuki, Taro Osabe, Ryuzo Kawabata
-
Publication number: 20130342195Abstract: A vertical Hall device includes a Hall effect region formed in a substrate and a sequence of at least six contacts arranged in or at a surface of the Hall effect region between a first contact and a last contact. The vertical Hall device also includes a first contact interconnection connecting the first contact with a third to the last contact. A vertical Hall device further includes a second contact interconnection connecting a third contact with the last contact. Further embodiments made to a sensing method for sensing a magnetic field parallel to a surface of a substrate.Type: ApplicationFiled: June 22, 2012Publication date: December 26, 2013Applicant: Infineon Technologies AGInventor: Udo Ausserlechner
-
Publication number: 20130342194Abstract: A vertical Hall sensor includes first and second vertical Hall effect regions in a semiconductor substrate, with first and second pluralities of contacts arranged at one side of the first or second vertical Hall effect regions, respectively. The second vertical Hall effect region is connected in series with the first vertical Hall effect region regarding a power supply. The vertical Hall sensor further includes first and second layers adjacent to the first and second vertical Hall effect regions at a side other than a side of the first or second pluralities of contacts. The first and second layers have different doping properties than the first and second vertical Hall effect regions and insulate the first and second vertical Hall effect regions from a bulk of the semiconductor substrate by at least one reverse-biased p-n junction per vertical Hall effect region during an operation of the vertical Hall sensor.Type: ApplicationFiled: June 22, 2012Publication date: December 26, 2013Applicant: Infineon Technologies AGInventors: Mario Motz, Udo Ausserlechner
-
Publication number: 20130334634Abstract: A single-package bridge-type magnetic-field angle sensor comprising one or more pairs of magnetic tunnel junction sensor chips rotated relative to each other by 90 degrees in order to detect two magnetic field components in orthogonal directions respectively is disclosed. The magnetic-field angle sensor may comprise a pair of MTJ full-bridges or half-bridges interconnected with a semiconductor package lead. The magnetic-field angle sensor can be packaged into various low-cost standard semiconductor packages.Type: ApplicationFiled: March 2, 2012Publication date: December 19, 2013Inventors: James Geza Deak, Weifeng Shen, Xiaojun Zhang, Xiaofeng Lei, Insik Jin, Songsheng Xue
-
Patent number: 8604573Abstract: According to one embodiment, a semiconductor memory device includes plural magneto-resistance elements. In the semiconductor memory device, each of the magneto-resistance elements includes: a first magnetic layer formed on a semiconductor substrate, the first magnetic layer having an easy axis of magnetization perpendicular to a film surface thereof; a non-magnetic layer formed on the first magnetic layer; a second magnetic layer formed on the non-magnetic layer, the second magnetic layer having an easy axis of magnetization perpendicular to a film surface thereof; and a sidewall film provided so as to cover a sidewall of each of the magneto-resistance elements with a protective film interposed therebetween, the sidewall film providing a tensile stress to the magneto-resistance element along the easy axis of magnetization.Type: GrantFiled: March 20, 2012Date of Patent: December 10, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Koji Yamakawa, Katsuaki Natori, Daisuke Ikeno, Yasuyuki Sonoda
-
Patent number: 8604569Abstract: A magnetoresistive element includes a first electrode layer, a first fixed layer provided on the first electrode layer and having a fixed magnetization direction, a first intermediate layer provided on the first fixed layer and made of a metal oxide, a free layer provided on the first intermediate layer and having a variable magnetization direction, and a second electrode layer provided on the free layer. At least one of the first electrode layer and the second electrode layer contains a conductive metal oxide.Type: GrantFiled: October 1, 2008Date of Patent: December 10, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Keiji Hosotani, Yoshiaki Asao
-
Patent number: 8592929Abstract: A spin transfer torque magnetic random access memory (STT-MRAM) device includes magnetic tunnel junctions (MTJs) with reduced switching current asymmetry. At least one switching asymmetry balance layer (SABL) near the free layer of the MTJ reduces a first switching current Ic(p-ap) causing the value of the first switching current to be nearly equal to the value of a second switching current Ic(ap-p) without increasing the average switching current of the device. The SABL may be a non-magnetic switching asymmetry balance layer (NM-SABL) and/or a magnetic switching asymmetry balance layer (M-SABL).Type: GrantFiled: January 27, 2012Date of Patent: November 26, 2013Assignee: QUALCOMM IncorporatedInventors: Wei-Chuan Chen, Kangho Lee, Xiaochun Zhu, Seung H. Kang
-
Patent number: 8592930Abstract: A magnetic memory element includes: a first magnetization free layer; a non-magnetic layer; a reference layer; a first magnetization fixed layer group; and a first blocking layer. The first magnetization free layer is composed of ferromagnetic material with perpendicular magnetic anisotropy and includes a first magnetization fixed region, a second magnetization fixed region and a magnetization free region. The non-magnetic layer is provided near the first magnetization free layer. The reference layer is composed of ferromagnetic material and provided on the non-magnetic layer. The first magnetization fixed layer group is provided near the first magnetization fixed region. The first blocking layer is provided being sandwiched between the first magnetization fixed layer group and the first magnetization fixed region or in the first magnetization fixed layer group.Type: GrantFiled: October 21, 2010Date of Patent: November 26, 2013Assignee: NEC CorporationInventors: Shunsuke Fukami, Tetsuhiro Suzuki, Kiyokazu Nagahara, Norikazu Ohshima, Nobuyuki Ishiwata
-
Patent number: 8580583Abstract: A magnetic tunneling junction device and fabrication method is disclosed. In a particular embodiment, the method includes depositing a capping material on a free layer of a magnetic tunneling junction structure to form the capping layer and oxidizing a portion of the capping material to form a layer of oxidized material.Type: GrantFiled: January 13, 2012Date of Patent: November 12, 2013Assignee: QUALCOMM IncorporatedInventors: Kangho Lee, Xiaochun Zhu, Xia Li, Seung H. Kang
-
Publication number: 20130277783Abstract: An integrated circuit can have a first substrate supporting a magnetic field sensing element and a second substrate supporting another magnetic field sensing element. The first and second substrates can be arranged in a variety of configurations. Another integrated circuit can have a first magnetic field sensing element and second different magnetic field sensing element disposed on surfaces thereof.Type: ApplicationFiled: June 14, 2013Publication date: October 24, 2013Inventors: Michael C. Doogue, William P. Taylor, Vijay Mangtani
-
Patent number: 8564083Abstract: The invention relates to a vertical Hall sensor integrated in a semiconductor chip and a method for the production thereof. The vertical Hall sensor has an electrically conductive well of a first conductivity type, which is embedded in an electrically conductive region of a second conductivity type. The electrical contacts are arranged along a straight line on a planar surface of the electrically conductive well. The electrically conductive well is generated by means of high-energy ion implantation and subsequent heating, so that it has a doping profile which either has a maximum which is located at a depth T1 from the planar surface of the electrically conductive well, or is essentially constant up to a depth T2.Type: GrantFiled: March 15, 2012Date of Patent: October 22, 2013Assignees: Melexis Technologies NV, X-Fab Semiconductor Foundries AGInventors: Christian Schott, Peter Hofmann
-
Patent number: 8564082Abstract: A radiation detector of this invention has a curable synthetic resin film covering exposed surfaces of a radiation sensitive semiconductor layer, a carrier selective high resistance film and a common electrode, in which a material allowing no chloride to mix in is used in a manufacturing process of the curable synthetic resin film. This prevents pinholes and voids from being formed by chlorine ions in the carrier selective high resistance film and semiconductor layer. Also a protective film which does not transmit ionic materials may be provided between the exposed surface of the common electrode and the curable synthetic resin film, thereby to prevent the carrier selective high resistance film from being corroded by chlorine ions included in the curable synthetic resin film, and to prevent an increase of dark current flowing through the semiconductor layer.Type: GrantFiled: September 10, 2008Date of Patent: October 22, 2013Assignee: Shimadzu CorporationInventors: Shingo Furui, Toshinori Yoshimuta, Junichi Suzuki, Koji Watadani, Satoru Morita
-
Patent number: 8564080Abstract: A magnetic tunnel junction (MTJ) storage element may comprise a pinned layer stack and a first functional layer. The pinned layer stack is formed of a plurality of layers comprising a bottom pinned layer, a coupling layer, and a top pinned layer. The first functional layer is disposed in the bottom pinned layer or the top pinned layer.Type: GrantFiled: July 16, 2010Date of Patent: October 22, 2013Assignee: QUALCOMM IncorporatedInventors: Wei-Chuan Chen, Seung H. Kang, Xiaochun Zhu, Xia Li
-
Patent number: 8558333Abstract: A method for manipulating domain pinning and reversal in a ferromagnetic material comprises applying an external magnetic field to a uniaxial ferromagnetic material comprising a plurality of magnetic domains, where each domain has an easy axis oriented along a predetermined direction. The external magnetic field is applied transverse to the predetermined direction and at a predetermined temperature. The strength of the magnetic field is varied at the predetermined temperature, thereby isothermally regulating pinning of the domains. A magnetic storage device for controlling domain dynamics includes a magnetic hard disk comprising a uniaxial ferromagnetic material, a magnetic recording head including a first magnet, and a second magnet. The ferromagnetic material includes a plurality of magnetic domains each having an easy axis oriented along a predetermined direction.Type: GrantFiled: July 9, 2010Date of Patent: October 15, 2013Assignees: The University of Chicago, UCL Business PLCInventors: Daniel M. Silevitch, Thomas F. Rosenbaum, Gabriel Aeppli
-
Publication number: 20130264667Abstract: Magnetic field sensors and associated methods of manufacturing the magnetic field sensors include molded structures to encapsulate a magnetic field sensing element and an associated die attach pad of a lead frame and to also encapsulate or form a magnet or a flux concentrator.Type: ApplicationFiled: March 15, 2013Publication date: October 10, 2013Applicant: Allegro Microsystems, Inc.Inventors: Virgil Ararao, Nirmal Sharma, Raymond W. Engel, Jay Gagnon, John B. Sauber, William P. Taylor, Elsa Kam-Lum
-
Patent number: 8546897Abstract: A magnetic memory element includes a memory layer, a reference layer, and a spin-injection layer provided between the memory layer and the reference layer. The reference layer has a structure in which at least two CoPt layers containing 20 atomic % or more and 50 atomic % or less of Pt and having a thickness of 1 nm or more and 5 nm or less are stacked with a Ru layer provided therebetween. The thickness of the Ru layer is 0.45±0.05 nm or 0.9±0.1 nm. In addition, the axis of 3-fold crystal symmetry of the CoPt layers is oriented perpendicularly to the film surface. The reference layer includes a high spin polarization layer of 1.5 nm or less containing Co or Fe as a main component at an interface with the spin-injection layer.Type: GrantFiled: July 29, 2011Date of Patent: October 1, 2013Assignee: Sony CorporationInventors: Hiroyuki Ohmori, Masanori Hosomi, Kazuhiro Bessho, Yutaka Higo, Kazutaka Yamane, Hiroyuki Uchida
-
Publication number: 20130249028Abstract: A method of fabricating a magnetic memory according to an embodiment includes: forming a separation layer on a first substrate; sequentially forming a first ferromagnetic layer, a first nonmagnetic layer, and a second ferromagnetic layer on the separation layer, at least one of the first and the second ferromagnetic layers having a single crystal structure; forming a first conductive bonding layer on the second ferromagnetic layer; forming a second conductive bonding layer on a second substrate, on which a transistor and a wiring are formed, the second conductive bonding layer electrically connecting to the transistor; arranging the first and second substrate so that the first conductive bonding layer and the second conductive bonding layer are opposed to each other, and bonding the first and the second conductive bonding layers to each other; and separating the first substrate from the first ferromagnetic layer by using the separation layer.Type: ApplicationFiled: September 20, 2012Publication date: September 26, 2013Inventors: Chikayoshi KAMATA, Minoru Amano, Tadaomi Daibou, Junichi Ito
-
Publication number: 20130249029Abstract: A magnetic field sensor includes a lead frame, a semiconductor die having a first surface in which a magnetic field sensing element is disposed and a second surface attached to the lead frame, and a non-conductive mold material enclosing the die and at least a portion of the lead frame. The sensor may include a ferromagnetic mold material secured to a portion of the non-conductive mold material. Features include a multi-sloped taper to an inner surface of a non-contiguous central region of the ferromagnetic mold material, a separately formed element disposed in the non-contiguous central region, one or more slots in the lead frame, a molded ferromagnetic suppression device spaced from the non-conductive mold material and enclosing a portion of a lead, a passive device spaced from the non-conductive mold material and coupled to a plurality of leads, and a ferromagnetic bead coupled to a lead.Type: ApplicationFiled: January 24, 2013Publication date: September 26, 2013Applicant: Allegro Microsystems, LLCInventors: Ravi Vig, William P. Taylor, Paul David, P. Karl Scheller, Andreas P. Friedrich
-
Patent number: 8536669Abstract: According to an embodiment of the invention, a magnetic tunnel junction (MTJ) element includes a reference ferromagnetic layer, a storage ferromagnetic layer, and an insulating layer. The storage ferromagnetic layer includes a CoFeB sub-layer coupled to a CoFe sub-layer and/or a NiFe sub-layer through a non-magnetic sub-layer. The insulating layer is disposed between the reference and storage ferromagnetic layers.Type: GrantFiled: January 13, 2009Date of Patent: September 17, 2013Assignee: QUALCOMM IncorporatedInventors: Xiaochun Zhu, Xia Li, Seung H. Kang
-
Patent number: 8536668Abstract: A magnetic layer that includes a seed layer comprising at least tantalum and a free magnetic layer comprising at least iron. The free magnetic layer is grown on top of the seed layer and the free magnetic layer is perpendicularly magnetized. The magnetic layer may be included in a magnetic tunnel junction (MTJ) stack.Type: GrantFiled: August 9, 2012Date of Patent: September 17, 2013Assignee: International Business Machines CorporationInventor: Daniel C. Worledge
-
Patent number: 8530987Abstract: A magnetic memory includes a magnetoresistive element. The magnetoresistive element includes a reference layer having an invariable magnetization direction, a storage layer having a variable magnetization direction, and a spacer layer provided between the reference layer and the storage layer. The storage layer has a multilayered structure including first and second magnetic layers, the second magnetic layer is provided between the first magnetic layer and the spacer layer and has a magnetic anisotropy energy lower than that of the first magnetic layer, and an exchange coupling constant Jex between the first magnetic layer and the second magnetic layer is not more than 5 erg/cm2.Type: GrantFiled: March 28, 2012Date of Patent: September 10, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Hisanori Aikawa, Tadashi Kai, Masahiko Nakayama, Sumio Ikegawa, Naoharu Shimomura, Eiji Kitagawa, Tatsuya Kishi, Jyunichi Ozeki, Hiroaki Yoda, Satoshi Yanagi
-
Publication number: 20130221195Abstract: Apparatus and methods of manufacturing an image sensor and inertial navigation sensors encapsulated within a single package. The single package may encapsulate one integrated circuit die comprising the imaging sensor and the inertial navigation sensors. Alternatively, the single package may encapsulate a plurality of integrated circuit dice comprising the imaging sensor and the inertial navigation sensors.Type: ApplicationFiled: February 29, 2012Publication date: August 29, 2013Applicant: RESEARCH IN MOTION LIMITEDInventor: Marc Adam Kennedy
-
Patent number: 8519498Abstract: A magnetic cell includes a ferromagnetic free layer having a free magnetization orientation direction and a first ferromagnetic pinned reference layer having a first reference magnetization orientation direction that is parallel or anti-parallel to the free magnetization orientation direction. A first oxide barrier layer is between the ferromagnetic free layer and the first ferromagnetic pinned reference layer. The magnetic cell further includes a second ferromagnetic pinned reference layer having a second reference magnetization orientation direction that is orthogonal to the first reference magnetization orientation direction. The ferromagnetic free layer is between the first ferromagnetic pinned reference layer and the second ferromagnetic pinned reference layer.Type: GrantFiled: September 13, 2012Date of Patent: August 27, 2013Assignee: Seagate Technology LLCInventors: Yuankai Zheng, Zheng Gao, Wenzhong Zhu, Wonjoon Jung, Haiwen Xi
-
Patent number: 8518562Abstract: A magnetic storage device stable in write characteristic is provided. A first nonmagnetic film is provided over a recording layer. A first ferromagnetic film is provided over the first nonmagnetic film and has a first magnetization and a first film thickness. A second nonmagnetic film is provided over the first ferromagnetic film. A second ferromagnetic film is provided over the second nonmagnetic film, is coupled in antiparallel with the first ferromagnetic film, and has a second magnetization and a second film thickness. An antiferromagnetic film is provided over the second ferromagnetic film. The sum of the product of the first magnetization and the first film thickness and the product of the second magnetization and the second film thickness is smaller than the product of the magnetization of the recording layer and the film thickness of the recording layer.Type: GrantFiled: November 12, 2009Date of Patent: August 27, 2013Assignee: Renesas Electronics CorporationInventors: Takashi Takenaga, Takeharu Kuroiwa, Hiroshi Takada, Ryoji Matsuda, Yosuke Takeuchi