With Particular Contact Geometry (e.g., Ring Or Grid) Patents (Class 257/457)
  • Patent number: 7834367
    Abstract: A method of making a diode begins by depositing an AlxGa1?xN nucleation layer on a SiC substrate, then depositing an n+ GaN buffer layer, an n? GaN layer, an AlxGa1?xN barrier layer, and an SiO2 dielectric layer. A portion of the dielectric layer is removed and a Schottky metal deposited in the void. The dielectric layer is affixed to the support layer with a metal bonding layer using an Au-Sn utectic wafer bonding process, the substrate is removed using reactive ion etching to expose the n+ layer, selected portions of the n+, n?, and barrier layers are removed to form a mesa diode structure on the dielectric layer over the Schottky metal,; and an ohmic contact is deposited on the n+ layer.
    Type: Grant
    Filed: January 19, 2007
    Date of Patent: November 16, 2010
    Assignee: Cree, Inc.
    Inventors: Primit Parikh, Sten Heikman
  • Patent number: 7820475
    Abstract: In one embodiment, active diffusion junctions of a solar cell are formed by diffusing dopants from dopant sources selectively deposited on the back side of a wafer. The dopant sources may be selectively deposited using a printing method, for example. Multiple dopant sources may be employed to form active diffusion regions of varying doping levels. For example, three or four active diffusion regions may be fabricated to optimize the silicon/dielectric, silicon/metal, or both interfaces of a solar cell. The front side of the wafer may be textured prior to forming the dopant sources using a texturing process that minimizes removal of wafer material. Openings to allow metal gridlines to be connected to the active diffusion junctions may be formed using a self-aligned contact opening etch process to minimize the effects of misalignments.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: October 26, 2010
    Assignee: Sunpower Corporation
    Inventors: Denis De Ceuster, Peter John Cousins, Richard M. Swanson, Jane E. Manning
  • Patent number: 7781672
    Abstract: Photovoltaic modules, as well as related systems, methods and components are disclosed. In some embodiments, a photovoltaic module can include a first photovoltaic cell including an electrode, a second photovoltaic cell including an electrode, and an interconnect. The electrode of the first photovoltaic cell can overlap the electrode of the second photovoltaic cell. The interconnect can electrically connect the electrode of the first photovoltaic cell and the electrode of the second photovoltaic cell. The interconnect can mechanically couple the first and second photovoltaic cells.
    Type: Grant
    Filed: May 23, 2005
    Date of Patent: August 24, 2010
    Assignee: Konarka Technologies, Inc.
    Inventors: Russell Gaudiana, Alan Montello, Edmund Montello
  • Patent number: 7777128
    Abstract: Modules are disclosed. The modules can include a first photovoltaic cell including an electrode; and a second photovoltaic cell including an electrode having a bent end connected to the electrode of the first photovoltaic cell.
    Type: Grant
    Filed: May 23, 2005
    Date of Patent: August 17, 2010
    Assignee: Konarka Technologies, Inc.
    Inventors: Alan Montello, Kevin Oliver, Kethinni G. Chittibabu
  • Patent number: 7772665
    Abstract: A first imaging portion includes a first group of photoelectric conversion elements. A second imaging portion includes a second group of photoelectric conversion elements. The first imaging portion and the second imaging portion are disposed at adjacent positions. An array pattern of the imaging portions is determined so that photoelectric conversion elements detecting all color components needed for reproducing a color image are included by two adjacent lines. Among pairs of adjacent lines, a line of the first imaging portion is paired with a line of the second imaging portion, which is selected so that the combination of color components detected by the photoelectric conversion elements arranged on the line of the first imaging portion differs from the combination of color components detected by the photoelectric conversion elements arranged on the line of the second imaging portion.
    Type: Grant
    Filed: February 20, 2007
    Date of Patent: August 10, 2010
    Assignee: Fujifilm Corporation
    Inventor: Tetsu Wada
  • Patent number: 7723815
    Abstract: A wafer bonded composite structure is provided for matching a coefficient of thermal expansion of a first semiconductor chip to a coefficient of thermal expansion of a second semiconductor chip in order to provide a thermally matched hybridized semiconductor chip assembly. The wafer bonded composite structure includes a first semiconductor chip having a top and a bottom surface. The first semiconductor chip has a coefficient of thermal expansion which is less than the coefficient of thermal expansion of the second semiconductor chip. Preferably, the first semiconductor chip is an readout integrated circuit (ROIC) and the second semiconductor chip is an infrared detector chip. Further, the wafer bonded composite structure also includes a substrate wafer bonded to a bottom surface of the first semiconductor chip to form the wafer bonded composite structure itself.
    Type: Grant
    Filed: July 9, 2004
    Date of Patent: May 25, 2010
    Assignee: Raytheon Company
    Inventors: Jeffrey M Peterson, Eric F Schulte
  • Patent number: 7723206
    Abstract: A photodiode in which increased sensitivity and speed are balanced. The photodiode includes: a semiconductor substrate; a plurality of active regions formed on the substrate by selective epitaxial growth; and a comb electrode provided for each of the plurality of active regions and in communication with each other to electrically connect the active regions together.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: May 25, 2010
    Assignees: FUJIFILM Corporation, Massachusetts Institute of Technology
    Inventors: Yukiya Miyachi, Wojciech P. Giziewicz, Jurgen Michel, Lionel C. Kimerling
  • Patent number: 7714403
    Abstract: An image sensor using a back-illuminated photodiode and a manufacturing method thereof are provided. According to the present invention, since a surface of the back-illuminated photodiode can be stably treated, the back-illuminated photodiode can be formed to have a low dark current, a constant sensitivity of blue light for all photodiodes, and high sensitivity. In addition, it is possible to manufacture an image sensor with high density by employing a three dimensional structure in which a photodiode and a logic circuit are separately formed on different substrates.
    Type: Grant
    Filed: June 14, 2007
    Date of Patent: May 11, 2010
    Assignee: Siliconfile Technologies Inc.
    Inventors: Byoung Su Lee, Jun Ho Won
  • Patent number: 7692258
    Abstract: A photosensitive device for enabling high speed detection of electromagnetic radiation. The device includes recessed electrodes for providing a generally homogeneous electric field in an active region. Carriers generated in the active region are detected using the recessed electrodes.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: April 6, 2010
    Assignee: Intel Corporation
    Inventors: Miriam R. Reshotko, Shaofeng Yu, Bruce A. Block
  • Patent number: 7687873
    Abstract: A photodiode comprises a support substrate, an insulating layer formed over the support substrate, a silicon semiconductor layer formed over the insulating layer and having a device forming area and device isolation areas which surround the device forming area, a device isolation layer formed in the device isolation areas, a P+ diffusion layer formed in the device forming area close to one edge lying inside the device isolation layer by diffusing a P-type impurity in a high concentration, an N+ diffusion layer spaced away from the P+ diffusion layer and formed in the device forming area close to the other edge opposite to the one edge of the device isolation layer by diffusing an N-type impurity in a high concentration, a low concentration diffusion layer formed in the device forming area located between the P+ diffusion layer and the N+ diffusion layer by diffusing an impurity of the same type as either one of the P+ diffusion layer and the N+ diffusion layer in a low concentration, and silicide layers respe
    Type: Grant
    Filed: November 9, 2007
    Date of Patent: March 30, 2010
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Noriyuki Miura
  • Patent number: 7679662
    Abstract: Disclosed herein is a solid-state imaging element which includes a plurality of drive signal inputs, a plurality of bus lines, and a plurality of vertical transfer register electrodes. In the solid-state imaging element, a charge accumulated in light-receiving elements in a pixel region is vertically transferred by the drive signals input to the electrodes. Each of the electrodes has a contact part connected to the second contact and having a width smaller than a width of the electrodes in the pixel region, and a blank region is formed between predetermined adjacent two of the contact parts so that a width of the blank region is larger than a distance between respective two of the contact parts other than the predetermined adjacent two of the contact parts. The first contact is disposed on the blank region.
    Type: Grant
    Filed: November 9, 2006
    Date of Patent: March 16, 2010
    Assignee: Sony Corporation
    Inventors: Sadamu Suizu, Masaaki Takayama
  • Patent number: 7642615
    Abstract: A semiconductor device including a substrate of a first semiconductor type with a pad region and a noise prevention structure in the substrate, on least one side of the pad region. The device further includes the substrate structure, a pad, and a dielectric layer therebetween.
    Type: Grant
    Filed: November 20, 2008
    Date of Patent: January 5, 2010
    Assignee: Airoha Technology Corp.
    Inventors: Sheng-Yow Chen, Dichi Tsai
  • Patent number: 7629663
    Abstract: This invention relates to an MSM type photo-detection device designed to detect incident light and comprising reflecting means (2) superposed on a support (1), to form a first mirror for a Fabry-Pérot type resonant cavity, a layer of material (3) that does not absorb light, an active layer (4) made of a semiconducting material absorbing incident light and a network (5) of polarization electrodes collecting the detected signal. The electrodes network is arranged on the active layer and is composed of parallel conducting strips at a uniform spacing at a period less than the wavelength of incident light, the electrodes network forming a second mirror for the resonant cavity, the optical characteristics of this second mirror being determined by the geometric dimensions of the said conducting strips. The distance separating the first mirror from the second mirror is determined to obtain a Fabry-Pérot type resonance for incident light between these two mirrors.
    Type: Grant
    Filed: July 24, 2003
    Date of Patent: December 8, 2009
    Assignee: Centre National de la Recherche Scientifique
    Inventors: Fabrice Pardo, Stephane Collin, Jean-Luc Pelouard
  • Patent number: 7508573
    Abstract: A structure of an optical switch makes the optical switch capable of receiving broadband signals. And the manufacturing procedure is simplified.
    Type: Grant
    Filed: May 25, 2006
    Date of Patent: March 24, 2009
    Assignee: Atomic Energy Council - Institute of Nuclear Energy Research
    Inventors: Chih-Hung Wu, Kai-Sheng Chang, Hwa-Yuh Shih, Yen-Chang Tzeng
  • Patent number: 7423254
    Abstract: An optical device for sensing an incident optical wave within a wavelength range includes a first array and a second array of electrodes superposed on a substrate, and a sensor connected to the contacts. The arrays are interdigitated. Each array includes its own parameters: contact width, contact thickness, groove width, and a groove dielectric constant. A structure associated with the arrays resonantly couples the incident wave and a local electromagnetic resonance or hybrid mode including at least a surface plasmon cavity mode (CM). For coupling the CM, an aspect ratio of contact thickness to spacing between electrodes is at least 1. A preferred structure for coupling a hybrid mode for high bandwidth and responsivity includes a higher dielectric constant in alternating grooves. The substrate may include silicon, including silicon-on-insulator (SOI). An SOI device having a alternating grooves with a higher dielectric, e.g., silicon oxide, provides 0.25 A/W and 30 GHz bandwidth.
    Type: Grant
    Filed: March 22, 2005
    Date of Patent: September 9, 2008
    Assignee: Research Foundation of the City University of New York
    Inventors: Mark Arend, David Crouse
  • Patent number: 7420215
    Abstract: A transparent conductive film substantially made from In2O3, SnO2 and ZnO, having a molar ratio In/(In+Sn+Zn) of 0.65 to 0.8 and also a molar ratio Sn/Zn of 1 or less: The transparent conductive film has a favorable electric contact property with an electrode or line made from Al or Al alloy film. Further, a semiconductor device having an electrode or line made from the transparent conductive film has high reliability and productivity.
    Type: Grant
    Filed: June 22, 2007
    Date of Patent: September 2, 2008
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazunori Inoue, Nobuaki Ishiga, Kensuke Nagayama, Toru Takeguchi, Kazumasa Kawase
  • Patent number: 7394139
    Abstract: Disclosed herein is an optical modulator module package using a flip-chip mounting technology, in which an optical modulator device is hermetically mounted using the flip-chip mounting technology. The optical modulator device is protected from an external environment, it is easy to transmit an electrical signal to the exterior, and optical characteristics of the optical modulator device are desirably maintained.
    Type: Grant
    Filed: February 3, 2006
    Date of Patent: July 1, 2008
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Heung Woo Park, Yeong Gyu Lee, Suk Kee Hong, Chang Su Park, Ohk Kun Lim
  • Patent number: 7342268
    Abstract: An image sensor and method of fabrication wherein the sensor includes Copper (Cu) metallization levels allowing for incorporation of a thinner interlevel dielectric stack to result in a pixel array exhibiting increased light sensitivity. The image sensor includes structures having a minimum thickness of barrier layer metal that traverses the optical path of each pixel in the sensor array or, that have portions of barrier layer metal selectively removed from the optical paths of each pixel, thereby minimizing reflectance. That is, by implementing various block or single mask methodologies, portions of the barrier layer metal are completely removed at locations of the optical path for each pixel in the array. In a further embodiment, the barrier metal layer may be formed atop the Cu metallization by a self-aligned deposition.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: March 11, 2008
    Assignee: International Business Machines Corporation
    Inventors: James W. Adkisson, Jeffrey P. Gambino, Mark D. Jaffe, Robert K. Leidy, Richard J. Rassel, Anthony K. Stamper
  • Patent number: 7309854
    Abstract: An opto-electronic device comprising a plurality of photo-detectors, each said photo-detector comprises a plurality of optical detection segments which are connected in parallel, the optical detection segments of said plurality of optical-detectors are interposed so that an optical detection segment of a photo-detector is intermediate optical detection segments of another photo-detector and an optical detection segment of that another photo-detector is intermediate optical detection segments of said photo-detector.
    Type: Grant
    Filed: October 11, 2005
    Date of Patent: December 18, 2007
    Assignee: Hong Kong Applied Science and Technology Research Institute Co. Ltd.
    Inventor: Torsten Wipiejewski
  • Patent number: 7259377
    Abstract: A photodetector for X-ray applications includes a photodiode at each pixel location that is gated to reduce leakage of charge from the photodiode. A gate layer may be disposed around the entire peripheral edge of the detector, and maintained at a common potential with a contact layer, or at a different potential. A passivation or dielectric layer separates the gate layer from the photodiode. Leakage around the edge of the diode that can result from extended exposure to radiation is reduced by the gate layer.
    Type: Grant
    Filed: December 15, 2005
    Date of Patent: August 21, 2007
    Assignee: General Electric Company
    Inventors: Scott Stephen Zelakiewicz, Snezana Bogdanovich, Aaron Judy Couture, Douglas Albagli, William Andrew Hennessy
  • Patent number: 7233046
    Abstract: A semiconductor device and fabrication method thereof restrains an amplified current between input voltage Vin and ground voltage Vss, and first and second n-wells are biased into internal voltage sources, whereby the current-voltage characteristic of the input pad becomes stabilized during an open/short checkup of a semiconductor device. The semiconductor device includes a semiconductor substrate having a plurality of device isolation regions, first and second n-wells horizontally spaced from either of the plurality of device isolation regions, a p-channel transistor formed in the second n-well, an input protection transistor horizontally spaced from the first n-well and the device isolation region, on a symmetrical portion by the first n-well to the second n-well, and a guard ring formed between the first n-well and the input protection transistor.
    Type: Grant
    Filed: April 4, 2006
    Date of Patent: June 19, 2007
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Chang Soo Lee
  • Patent number: 7230272
    Abstract: An active matrix substrate of the present invention includes a TFT and a substrate. The TFT formed on a substrate includes, when viewed in a normal direction of the substrate: a first region in which a gate electrode overlaps a source electrode via a semiconductor layer; a second region in which the gate electrode overlaps a drain electrode via the semiconductor layer; and a third region in which the semiconductor layer overlaps neither the gate electrode, source electrode, nor the drain electrode. The third region includes a portion adjoining the source electrode lying outside the first region and/or a portion adjoining the drain electrode lying outside the second region. The gate electrode includes: a main body, which includes a portion constituting the first region and the second region; and a protrusion from the main body.
    Type: Grant
    Filed: April 26, 2005
    Date of Patent: June 12, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Ryoki Itoh, Yuhko Hashimoto, Kenji Enda, Masanori Takeuchi
  • Patent number: 7199437
    Abstract: A method for embedding optical band gap (OBG) devices in a ceramic substrate (100). The method includes the step (320) of pre-forming an OBG structure (105). The OBG structure can be a micro optical electromechanical systems (MOEMS) device. Further, the OBG structure can be preformed from indium phosphide and/or indium gallium arsenide. The method also includes the step (325) of coating the OBG structure with a surface binding material (230). The surface binding material can be comprised of calcium and hexane. The ratio of the calcium to hexane can be from about 1% to 2%. At a next step (330), the OBG structure can be inserted into the ceramic substrate. A pre-fire step (335) and a sintering step (340) then can be performed on the substrate.
    Type: Grant
    Filed: January 20, 2004
    Date of Patent: April 3, 2007
    Assignee: Harris Corporation
    Inventor: Randy T. Pike
  • Patent number: 7187050
    Abstract: A cubic element of photonic crystal is integrally formed on the surface of a photo-detection element, and a portion of the photonic crystal cubic element is irradiated with ultraviolet rays thereby to change the refractive index of the portion of the cubic element that has been irradiated with ultraviolet rays. Alternatively, by causing globular particles having different refractive indices to eject on the surface of the photo-detection element from an ink-jet apparatus having a nozzle provided with a temperature control part by controlling temperature of the nozzle to form a laminate of globular particle layers having different refractive indices, a photonic crystal lens is integrally formed on the surface of the photo-detection element.
    Type: Grant
    Filed: October 5, 2004
    Date of Patent: March 6, 2007
    Assignee: Japan Aviation Electronics Industry Limited
    Inventors: Akiko Suzuki, Akinobu Sato
  • Patent number: 7176542
    Abstract: A photo-EMF detector including a shield to prevent a portion of the detector from illumination. The shield prevents the generation of unwanted noise-currents, thus increasing the performance of the photo-EMF detector.
    Type: Grant
    Filed: April 22, 2004
    Date of Patent: February 13, 2007
    Inventors: Gilmore J. Dunning, Marko Sokolich, Deborah Vogel, David M. Pepper
  • Patent number: 7151302
    Abstract: A semiconductor device includes a memory array having a plurality of non-volatile memory cells. Each non-volatile memory cell of the plurality of non-volatile memory cells has a gate stack. The gate stack includes a control gate and a discrete charge storage layer such as a floating gate. A dummy stack ring is formed around the memory array. An insulating layer is formed over the memory array. The dummy stack ring has a composition and height substantially the same as a composition and height of the gate stack to insure that a CMP of the insulating layer is uniform across the memory array.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: December 19, 2006
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Gowrishankar L. Chindalore
  • Patent number: 7145211
    Abstract: In mixed-component, mixed-signal, semiconductor devices, selective seal ring isolation from the substrate and its electrical potential is provided in order to segregate noise sensitive circuitry from electrical noise generated by electrically noisy circuitry. Appropriate predetermined sections of such a mixed use chip are isolated from the substrate through a non-ohmic contact with the substrate without compromising reliability of the chip's isolation from scribe region contamination.
    Type: Grant
    Filed: July 13, 2004
    Date of Patent: December 5, 2006
    Assignee: Micrel, Incorporated
    Inventors: Shekar Mallikarjunaswamy, Martin Alter
  • Patent number: 7135750
    Abstract: A photodiode array includes a first photodiode and at least a second photodiode. The first photodiode includes a first active area, a first anti-reflective coating area, and a first residual polysilicon ring. The first anti-reflective coating area and the first residual polysilicon ring are formed asymmetrically over the first active area. The second photodiode includes a second active area, a second anti-reflective coating area, and a second residual polysilicon ring. The second anti-reflective coating area and the second residual polysilicon ring are formed asymmetrically over the second active area. The first anti-reflective coating area is formed over a region of the first active region adjacent to the second photodiode, and the second anti-reflective coating area is formed over a region of the second active region adjacent to the first photodiode.
    Type: Grant
    Filed: June 2, 2004
    Date of Patent: November 14, 2006
    Assignee: Polar Semiconductor, Inc.
    Inventors: John C. Beckman, Noel P. Hoilien
  • Patent number: 7084471
    Abstract: A photosensitive device for enabling high speed detection of electromagnetic radiation. The device includes recessed electrodes for providing a generally homogeneous electric field in an active region. Carriers generated in the active region are detected using the recessed electrodes.
    Type: Grant
    Filed: May 4, 2005
    Date of Patent: August 1, 2006
    Assignee: Intel Corporation
    Inventors: Miriam R. Reshotko, Shaofeng Yu, Bruce A. Block
  • Patent number: 7045872
    Abstract: An object of the present invention is to provide a highly sensitive semiconductor light receiving device wherein the efficiency of light convergence into the light receiving region has been increased. The semiconductor light receiving device includes a light receiving region formed on a semiconductor substrate, and an electrode formed in a peripheral portion of the light receiving region on the semiconductor substrate for transferring a charge generated through photoelectric conversion in the light receiving region to the outside of the light receiving region, wherein a part of or the entirety of the peripheral portion of the electrode is processed so as to recede toward the center of the electrode as the electrode is away from the semiconductor substrate. In addition, two types of etching of isotropic etching and anisotropic etching are used at the time of the pattern formation of the electrode at least once, respectively.
    Type: Grant
    Filed: April 6, 2004
    Date of Patent: May 16, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Hiroshi Yamauchi
  • Patent number: 7038288
    Abstract: This invention relates to a novel optoelectronic chip with one or more optoelectronic devices, such as photodiodes, fabricated on a front side of a semiconductor wafer and contacts on a backside of the semiconductor wafer. The backside contacts can be contact bumps, which allow the optoelectronic chip to achieve the benefits of flip chip packaging without flipping the optoelectronic chip upside down with respect to a chip carrier. In an optical communication system, a photodiode chip can be backside bumped to a chip carrier or an electronic chip, allowing front side illumination of the photodiode chip. Front side illumination offers many benefits, including improved fiber alignment, reduced manufacturing time, and overall cost reduction.
    Type: Grant
    Filed: September 23, 2003
    Date of Patent: May 2, 2006
    Assignee: Microsemi Corporation
    Inventors: Jay Jie Lai, Truc Q. Vu, Gary B. Warren
  • Patent number: 7023017
    Abstract: A thin film transistor substrate of horizontal electric field type includes: a gate line and a first common line formed on a substrate to be in parallel to each other; a data line crossing the gate line and the first common line with a gate insulating film therebetween to define a pixel area; a second common line crossing the first common line having the gate insulating film therebetween; a thin film transistor connected to the gate line and the data line; a common electrode extending from the second common line in said pixel area; a pixel electrode that is parallel to the common electrode and the second common line; a protective film for covering the thin film transistor; a gate pad having a lower gate pad electrode connected to an upper gate pad electrode through a first contact hole; a common pad having a lower common pad electrode connected to an upper common pad electrode through a second contact hole; and a data pad having a lower data pad electrode connected to an upper data pad electrode provided with
    Type: Grant
    Filed: November 2, 2004
    Date of Patent: April 4, 2006
    Assignee: LG. Philips LCD Co., LTD
    Inventors: Byung Chul Ahn, Oh Nam Kwon, Heung Lyul Cho
  • Patent number: 7015560
    Abstract: A light-receiving device, a method for manufacturing the same, and an optoelectronic integrated circuit including the same are provided. The light-receiving device includes a substrate; an intrinsic region formed on the substrate; a first region formed to a shallow depth in the intrinsic region; and a second region formed to a deep depth in the intrinsic region and distanced from the first region, wherein the first and second regions are doped with different conductivity types. The light-receiving device can shorten the transit time of holes with slow mobility. Therefore, no response delay occurs, and thus, a high response speed can be accomplished.
    Type: Grant
    Filed: February 18, 2004
    Date of Patent: March 21, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-young Kim, Byoung-lyong Choi, Eun-kyung Lee
  • Patent number: 7012314
    Abstract: A method of making a semiconductor device having a predetermined epitaxial region, such as an active region, with reduced defect density includes the steps of: (a) forming a dielectric cladding region on a major surface of a single crystal body of a first material; (b) forming a first opening that extends to a first depth into the cladding region; (c) forming a smaller second opening, within the first opening, that extends to a second depth greater than the first depth and that exposes an underlying portion of the major surface of the single crystal body; (d) epitaxially growing regions of a second semiconductor material in each of the openings and on the top of the cladding region; (e) controlling the dimensions of the second opening so that defects are confined to the epitaxial regions grown within the second opening and on top of the cladding region, a first predetermined region being located within the first opening and being essentially free of defects; (D planarizing the top of the device to remove all
    Type: Grant
    Filed: June 3, 2003
    Date of Patent: March 14, 2006
    Assignee: Agere Systems Inc.
    Inventors: Jeffrey Devin Bude, Malcolm Carroll, Clifford Alan King
  • Patent number: 6980748
    Abstract: A synchronized optical clocking signal is provided to a plurality of optical receivers by providing a layer of a high absorption coefficient material, such as SiGe or Ge, on a front surface of a low absorption coefficient substrate, such as silicon. Diodes are formed in the germanium containing layer for receiving an optical signal and converting the optical signal into an electrical signal. An optical clocking signal is shined on the back surface of the silicon substrate. The light has a wavelength long enough so that it penetrates through the silicon substrate to the germanium containing layer. The wavelength is short enough so that the light is absorbed in the germanium containing layer and converted to the electrical clocking signal used for neighboring devices and circuits. The germanium concentration is graded so that minority carriers are quickly swept across junctions of the diodes and collected.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: December 27, 2005
    Assignee: International Business Machines Corporation
    Inventor: James M. Leas
  • Patent number: 6953949
    Abstract: An electro-optical device according to the present invention includes, above a substrate, pixel electrodes, thin film transistors connected to the pixel electrodes, an upper light shielding film to cover the upper side of the channel regions of the thin film transistors, and a lower light shielding film to cover the lower side of the channel regions of the thin film transistors. Each of the upper light shielding film and the lower light shielding film has projecting portions to define corner cuts in an opening region of each pixel, in the intersection regions where data lines and scanning lines intersect each other. Both projecting portions are connected to each other through contact holes. The channel region of the thin film transistors are disposed in the intersection regions.
    Type: Grant
    Filed: May 20, 2003
    Date of Patent: October 11, 2005
    Assignee: Seiko Epson Corporation
    Inventor: Masao Murade
  • Patent number: 6934658
    Abstract: Disclosed is an apparatus incorporating hardware based logic and a predetermined default list of software affecting responses to be taken in connection with temperatures sensed by thermal sensors checking the temperature of portions of computer logic. At the time application software is loaded, the software can modify the default response list. The list of responses to be taken and the over temperature conditions at which they are to be activated are stored in hardware directly accessible by hardware based thermal sensor monitoring logic for direct control of the hardware. The control can alter conditions such as clock frequency, stopping use of application software, interrupting OS functionality, removing power from components and so forth.
    Type: Grant
    Filed: March 27, 2003
    Date of Patent: August 23, 2005
    Assignee: International Business Machines Corporation
    Inventors: Joachim Gerhard Clabes, Lawrence Joseph Powell, Jr., Daniel Lawrence Stasiak, Michael Fan Wang
  • Patent number: 6924541
    Abstract: A semiconductor photodetection device includes a semiconductor structure including an optical absorption layer having a photo-incidence surface on a first side thereof, a dielectric reflecting layer formed on a second side of the semiconductor structure opposite to the first side, a contact electrode surrounding the dielectric reflecting layer and contacting with the semiconductor structure, and a close contact electrode covering the dielectric reflecting layer and contacting with the contact electrode and the dielectric reflecting layer, wherein the close contact electrode adheres to the dielectric reflecting layer more strongly than to the contact electrode.
    Type: Grant
    Filed: December 16, 2003
    Date of Patent: August 2, 2005
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Yoshihiro Yoneda, Ikuo Hanawa
  • Patent number: 6897482
    Abstract: A transistor has a source electrode and a drain electrode formed with a predetermined interval secured in between on a semiconductor layer formed to perspectively overlap a gate electrode. The source and drain electrodes are each longer in their lengthwise direction than in their widthwise direction. The source electrode has a recessed portion formed therein to allow the tip portion of the drain electrode in. The semiconductor layer protrudes out of the gate electrode to form a portion that does not overlap the gate electrode but overlaps the source electrode and a portion that does not overlap the gate electrode but overlaps the drain electrode. Thus, the protruding portion that overlaps the source electrode and the protruding portion that overlaps the drain electrode are separated from each other by the gate electrode so as to be independent of each other.
    Type: Grant
    Filed: October 9, 2001
    Date of Patent: May 24, 2005
    Assignees: Sanyo Electric Co., Ltd., Tottori Sanyo Electric Co., Ltd.
    Inventors: Satoshi Morita, Osamu Kobayashi, Kohei Oda
  • Patent number: 6879014
    Abstract: Materials suitable for fabricating optical monitors include amorphous, polycrystalline and microcrystalline materials. Semitransparent photodetector materials may be based on silicon or silicon and germanium alloys. Conductors for connecting to and contacting the photodetector may be made from various transparent oxides, including zinc oxide, tin oxide and indium tin oxide. Optical monitor structures based on PIN diodes take advantage of the materials disclosed. Various contact, lineout, substrate and interconnect structures optimize the monitors for integration with various light sources, including vertical cavity surface emitting laser (VCSEL) arrays. Complete integrated structures include a light source, optical monitor and either a package or waveguide into which light is directed.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: April 12, 2005
    Assignee: Aegis Semiconductor, Inc.
    Inventors: Sigurd Wagner, Matthias Wagner, Eugene Y. Ma, Adam M. Payne
  • Patent number: 6846984
    Abstract: A solar cell with buried contacts in recesses (7) on a first surface (2). On a lateral face (4), a metal layer (12) is produced. The metal layer (12) extends into a lateral zone (9) of a second surface (3) opposite the first surface (2). The metal layer serves as a first electrode (14). On the second surface (3) a second electrode (15), electrically separate from the first electrode (14), is produced so that the solar cell is provided with a back connection.
    Type: Grant
    Filed: April 21, 2001
    Date of Patent: January 25, 2005
    Assignee: Universitat Konstanz
    Inventors: Peter Fath, Wolfgang Jooss
  • Patent number: 6828545
    Abstract: A hybrid microelectronic array structure is fabricated from a readout integrated circuit array of microelectronic integrated circuits and a supported array of supported islands. The supported islands include one or more supported elements, with a respective supported element for each of the readout integrated circuits. The supported array is made by depositing the first semiconductor region onto a supported substrate and depositing the second semiconductor region onto the first semiconductor region, and defining supported islands as electrically isolated segments. On each supported element, a first interconnect is formed to the first semiconductor region and a second interconnect is formed to the second semiconductor region.
    Type: Grant
    Filed: May 15, 2001
    Date of Patent: December 7, 2004
    Assignee: Raytheon Company
    Inventors: William J. Hamilton, Jr., Eli E. Gordon, Ronald W. Berry
  • Patent number: 6803513
    Abstract: A photovoltaic module includes at least a first and a second photovoltaic cell each having a substrate electrode, a top electrode and a photovoltaic semiconductor body disposed therebetween in electrical communication with the substrate electrode and the top electrode. Each cell includes a plurality of current collecting grid wires disposed atop the top electrode in electrical contact therewith. The grid wires of the first cell are in electrical communication with a current collecting bus bar and the grid wires of the second cell extend onto the first cell so as to establish an unbroken current path therebetween. The grid wires of the second cell may establish electrical communication with the substrate electrode of the first cell, in which case a series connection therebetween is established. Alternatively, the grid wires of the second cell may establish electrical communication with the top electrode of the first cell so as to create a parallel electrical connection therebetween.
    Type: Grant
    Filed: August 20, 2002
    Date of Patent: October 12, 2004
    Assignee: United Solar Systems Corporation
    Inventors: Kevin Beernink, Eric Akkashian
  • Publication number: 20040188793
    Abstract: An opto-electronic device configured as a photodetector has a capacitor and/or resistor monolithically formed on a surface of the photodetector. The capacitor capacitively couples the AC ground of the photodetector to the bias terminal of the photodetector. The on chip capacitor design eliminates the inductance of external circuit traces between the power supply and an external capacitor. The resistor forces the AC return current of the photodetector through the AC ground in preference to the typical (DC bias terminal) path. Combinations of capacitors and resistors are particularly effective in reducing crosstalk among adjacent detectors in arrays.
    Type: Application
    Filed: April 1, 2004
    Publication date: September 30, 2004
    Inventors: John Hart Lindemann, Michael Thomas Dudek, David Galt
  • Patent number: 6794725
    Abstract: A hybrid structure or device is provided wherein carried on a single substrate is at least one micro-spring interconnect having an elastic material that is initially fixed to a surface of the substrate, an anchor portion which is fixed to the substrate surface and a free portion. The spring contact is self-assembling in that as the free portion is released it moves out of the plane of the substrate. Also integrated on the substrate is a sensor having an active layer and contacts. The substrate and sensor may be formed of materials which are somewhat partially transparent to light at certain infrared wavelengths. The integrated sensor/spring contact configuration may be used in an imaging system to sense output from a light source which is used for image formation. The light source may be a laser array, LED array or other appropriate light source. The sensor is appropriately sized to sense all or some part of light from the light source.
    Type: Grant
    Filed: December 21, 1999
    Date of Patent: September 21, 2004
    Assignee: Xerox Corporation
    Inventors: Francesco Lemmi, Christopher L. Chua, Ping Mei, JengPing Lu, David K. Fork, Harry J. McIntyre
  • Publication number: 20040169247
    Abstract: A plurality of N-type diffusion layers (105, 108) are formed a specified distance apart on a P-type semiconductor layer (102). A P-type leak prevention layer (109) formed between at least N-type diffusion layers (105, 108) prevents leaking between the diffusion layers (105, 108). A dielectric film (115) is formed in at least a light incident area on a P-type semiconductor layer (102) including the diffusion layers (105, 108) and the leak prevention layer (109). Accordingly, provided are a split type light receiving element positively functioning as a split type light receiving element even when charge is accumulated in the dielectric film and having a uniform sensitivity throughout the entire area on a light receiving surface, and a circuit-built-in light receiving element and an optical disk device using the split type light receiving element.
    Type: Application
    Filed: January 12, 2004
    Publication date: September 2, 2004
    Inventors: Tatsuya Morioka, Shigeki Hayashida, Yoshihiko Tani, Isamu Ohkubo
  • Patent number: 6781211
    Abstract: Disclosed is a photodiode with improved light-receiving efficiency and coupling effect with an optical fiber, whose capacitance may be decreased. The inventive photodiode includes a substrate; a buffer layer and a light-absorbing layer laminated in sequence on the substrate; an epitaxial layer formed on the upper surface of the light absorbing layer and having an active region with a surface in a convex lens shape so that it has greater surface area and more effective light-receiving area than an active region defined in a two-dimensional plane, the active region further having a convex surface can harvest light with its convex-lens characteristics; a dielectric layer formed on the upper surface of the epitaxial layer; a first metal electrode formed on an upper surface of the dielectric layer; and, a second metal electrode formed on an under surface of the substrate.
    Type: Grant
    Filed: January 17, 2003
    Date of Patent: August 24, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hwa-Young Kang, Jung-Kee Lee
  • Patent number: 6780750
    Abstract: Disclosed is a photodiode having a p-type electrode of a mushroom shape. The p-type electrode is formed in a mushroom shape, so that the contact area faced by the spreading region of a dopant for the photodiode and the electrode can be minimized and the capacitance of the photodiode can be reduced. Further, the p-type electrode is configured to have a broader width in its upper end, thus allowing the wire bonding to be performed easily.
    Type: Grant
    Filed: September 3, 2003
    Date of Patent: August 24, 2004
    Assignee: Samsung Electronics Co. Ltd.
    Inventor: Seung-Kee Yang
  • Patent number: 6777263
    Abstract: A method for forming a wafer package includes forming a die structure, wherein the die structure includes a first wafer, a device mounted on the first wafer, a second wafer mounted atop the first wafer with a first seal ring around the device and a second seal ring around a via contact. The method further includes forming a trench in the second wafer around the first seal ring, filling the trench and the via contact with a sealing agent, patterning a topside of the second wafer to removed the excessive sealing agent and to expose a contact pad of the via contact, and singulating a die around the first seal ring.
    Type: Grant
    Filed: August 21, 2003
    Date of Patent: August 17, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Qing Gan, Richard C. Ruby, Frank S. Geefay, Andrew T. Barfknecht
  • Patent number: 6756651
    Abstract: A novel photodetector CMOS-compatible photodetector is disclosed in which photo-generation of carriers (electrons) is carried out in the metal of the electrodes, rather than as electron-hole pairs in the semiconductor on which the metal electrodes are deposited. The novel photo detector comprises a silicon or other semiconductor substrate material characterized by an electron energy bandgap, and a pair of metal electrodes disposed upon a surface of the silicon to define therebetween a border area of the surface. One of the two electrodes being exposed to the incident radiation and covering an area of said surface which is larger than the aforesaid border area, the aforesaid metal of the electrodes being characterized by a Fermi level which is within said electron energy bandgap.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: June 29, 2004
    Assignee: International Business Machines Corporation
    Inventors: Ferenc M. Bozso, Fenton Read McFeely, John Jacob Yurkas