With Particular Contact Geometry (e.g., Ring Or Grid) Patents (Class 257/457)
  • Patent number: 6747331
    Abstract: An electronic packaging structure and method of forming thereof wherein the structure is constituted of a modular arrangement which reduces stresses generated in a chip, underfill, and ball grid array connection with a flexible substrate in the form of an organic material, which stresses may result in potential delamination due to thermally-induced warpage between the components of the modular arrangement.
    Type: Grant
    Filed: July 17, 2002
    Date of Patent: June 8, 2004
    Assignee: International Business Machines Corporation
    Inventors: William Infantolino, Li Li, Steven G. Rosser, Sanjeev Balwant Sathe
  • Publication number: 20040089907
    Abstract: A radiation detector of the type, which by means of electric signals indicates the position of an irradiated point (11) on a detector surface (10) of the detector. The detector comprises a semiconductor wafer (1) comprising at least two barrier layers (2, 3), which are arranged in such manner that when applying an electric bias across the layers, one layer is reversely biased and the other is forwardly biased, the extension of the reversely biased barrier layer substantially coinciding with the detector surface. The detector further comprises at least two conductive layers (2b, 3b, 2, 3) provided with at least one current collecting electrode (4, 5; 6,7), the conductive layers being arranged so as to allow a transistor amplification between the forwardly and reversely biased layer by means of charge currents generated by the radiation in the irradiated point and separated by the reversely biased barrier layer.
    Type: Application
    Filed: June 16, 2003
    Publication date: May 13, 2004
    Inventor: Lars Lindholm
  • Patent number: 6724062
    Abstract: A semiconductor energy detector as disclosed herein is arranged so that an aluminum wiring pattern is formed on the front side of transfer electrodes of a CCD vertical shift register, which pattern includes meander-shaped auxiliary wirings for performing auxiliary application/supplement and additional wirings for performing auxiliary supplement of transfer voltages in a way independent of the auxiliary wirings with respective ones of such wirings being connected to corresponding transfer electrodes to thereby avoid a problem as to lead resistivities at those transfer electrodes made of polycrystalline silicon, thus achieving the intended charge transfer at high speeds with high efficiency.
    Type: Grant
    Filed: June 22, 2001
    Date of Patent: April 20, 2004
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Hiroshi Akahori, Hisanori Suzuki, Kazuhisa Miyaguchi, Masaharu Muramatsu, Koei Yamamoto
  • Patent number: 6713832
    Abstract: Device for photodetection with a vertical metal semiconductor microresonator and procedure for the manufacture of this device. According to the invention, in order to detect an incident light, at least one element is formed over an insulating layer (2) that does not absorb this light, including a semiconductor material (6) and at least two electrodes (4) holding the element, with the element and electrode unit being suitable for absorbing this light and designed to incease the light intensity with respect to the incident light, in particular by making a surface plasmon mode resonate between the unit interfaces with the layer and the propagation medium for the incident light, with the resonance of this mode taking place in teh interface between the element and atleast one of the electrodes, with this mode being excited by the component of the magnetic field of the light, parallel to the electrodes. Application for optical telecommunications.
    Type: Grant
    Filed: July 15, 2002
    Date of Patent: March 30, 2004
    Assignee: Centre National de la Recherche Scientifique
    Inventors: Fabrice Pardo, Stéphane Collin, Roland Teissier, Jean-Luc Pelouard
  • Patent number: 6696739
    Abstract: A pn junction solar cell includes a pn junction structure including a p-type and a n-type semiconducting layer, a front contact electrode formed on the front surface of the pn junction structure through a contact pattern having a constant width, and a rear contact electrode formed on a rear surface of the pn structure. The front contact electrode is reduced in its width as it goes away from a terminal.
    Type: Grant
    Filed: December 31, 2001
    Date of Patent: February 24, 2004
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Eun-Joo Lee, Dong-Seop Kim, Soo-Hong Lee
  • Patent number: 6657230
    Abstract: An electro-optical device such as an active-matrix-driven liquid crystal device is improved to suppress undesirable effects of dents and steps that appear on pixel electrode surfaces due to presence of contact holes that interconnect a semiconductor layer and pixel electrodes through the intermediary of a conductive layer. The liquid crystal device has a TFT array substrate carrying a TFT, data lines, scanning lines, capacitance lines and pixel electrodes. The pixels and TFTs are electrically connected via contact holes through the intermediary of barrier layers. At least each contact hole is formed in a non-aperture region at a position symmetrical with respect to two adjacent data lines.
    Type: Grant
    Filed: July 21, 2000
    Date of Patent: December 2, 2003
    Assignee: Seiko Epson Corporation
    Inventor: Masao Murade
  • Patent number: 6649951
    Abstract: In order to reduce the capacitance of a light-receiving element, the present invention provides a light-receiving element comprises a first semiconductor region of the first conductivity type, a second semiconductor region of the second conductivity type, provided on the first semiconductor region, a third semiconductor region of the first conductivity type, provided between the second semiconductor region and an insulating film and an electrode region of the second conductivity type, provided in the second semiconductor region where the third semiconductor region is absent on and above the second semiconductor region, and connected to an anode or cathode electrode consisting of a conductor.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: November 18, 2003
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiraku Kozuka, Toru Koizumi, Koji Sawada
  • Patent number: 6649993
    Abstract: An active pixel sensor having a transparent conductor that directly contacts a conductive element in an interconnection structure to electrically connect the transparent conductor to a pixel sensor bias voltage is provided. The active pixel sensor includes a semiconductor substrate, the interconnection layer, which is formed over the substrate, and a pixel interconnection layer formed over the interconnection layer. Photo sensors that include a pixel electrode, an I-layer, and may include a P-layer are formed over the pixel interconnection layer. The transparent conductor is formed over the photo sensors and the conductive element exposed on the surface of the interconnection layer.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: November 18, 2003
    Assignee: Agilent Technologies, Inc.
    Inventor: Jeremy A. Theil
  • Patent number: 6639143
    Abstract: A solar cell using a ferroelectric material(s) is provided with a ferroelectric layer at the front surface or the rear surface thereof, or at the front and the rear surfaces thereof. The ferroelectric layer is formed with a ferroelectric material such as BaTiO3, BST((Ba,Sr)TiO3), PZT((Pb,Zr)TiO3) and SBT(SrBi2Ta2O7).
    Type: Grant
    Filed: May 15, 2002
    Date of Patent: October 28, 2003
    Assignee: Samsung SDI Co. Ltd.
    Inventors: Jeong Kim, Dong-Seop Kim, Soo-Hong Lee
  • Patent number: 6632029
    Abstract: The present invention provides a method and apparatus for packaging high frequency electrical and/or electro-optical components. The present invention provides a package which may be surface mounted on a board with other electrical components. The shielding provided by the package minimizes electromagnetic interference with other electrical components on the board. The package includes a controlled impedance I/O interface for coupling with the electrical and/or electro-optical component(s) in the package. The package interface may also include a differential I/O capability to further control electromagnetic fields generated at the interface. Additionally, the package may include an optical link provided by one or more optical fibers extending from the package.
    Type: Grant
    Filed: April 20, 2000
    Date of Patent: October 14, 2003
    Assignee: New Focus, Inc.
    Inventors: Robert S. Williamson, III, Robert A. Marsland
  • Patent number: 6627914
    Abstract: An MR/FIR light detector is disclosed herein that has extraordinarily high degree of sensitivity and a high speed of response. The detector includes an MR/FIR light introducing section (1) for guiding an incident MR/FIR light (2), a semiconductor substrate (14) formed with a single-electron transistor (14) for controlling electric current passing through a semiconductor quantum dot (12) formed therein, and a BOTAI antenna (6, 6a, 6b, 6c) for concentrating the MW/FIR light (2) into a small special zone of sub-micron size occupied by the semiconductor quantum dot (12) in the single-electron transistor (14). The quantum dot (12) forming a two-dimensional electron system absorbs the electromagnetic wave concentrated efficiently, and retains an excitation state created therein for 10 nanoseconds or more, thus permitting electrons of as many as one millions in number or more to be transferred with respect to a single photon absorbed.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: September 30, 2003
    Assignee: Japan Science and Technology Corporation
    Inventors: Susumu Komiyama, Astafiev Oleg, Antonov Vladimir, Hiroshi Hirai, Takeshi Kutsuwa
  • Patent number: 6573445
    Abstract: Method for applying a metallization in accordance with a pattern of a system of mutually connected electrical conductors for transporting electrical charge carriers on at least one of the outer surfaces of a photovoltaic element, wherein the conductors display a determined series resistance and cover a part of the at least one surface in accordance a determined degree of covering, which method comprises the steps of (i) providing said photovoltaic element, at least one of the outer surfaces of which is adapted for applying of a metallization thereto, and (ii) applying a metallization in accordance with a determined pattern on the relevant surface, wherein the metallization, is applied in the second step (ii) in accordance with an optimized pattern, the geometry of which is defined such that the electrical power of this element is maximal as a function of this geometry, and photovoltaic element provided with a metallization applied according to this method.
    Type: Grant
    Filed: August 9, 2001
    Date of Patent: June 3, 2003
    Assignee: Stichting Energieonderzoek Centrum Nederland
    Inventor: Antonius R. Burgers
  • Patent number: 6559531
    Abstract: An integrated circuit device includes first and second arrays of semiconductor dice. Each array of dice is arranged in face-to-face relation to the other array of dice, thus forming a lower layer of dice and an upper layer of dice. The layers are aligned so that each upper layer die straddles two or more of the lower layer dice, thus defining overlap regions. In the overlap regions, signal pads of one layer are aligned with corresponding signal pads of the other layer. The two layers are spaced apart, thus creating a capacitance-based communication path between the upper and lower layers via the signal paths.
    Type: Grant
    Filed: October 14, 1999
    Date of Patent: May 6, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: Ivan E. Sutherland
  • Patent number: 6525347
    Abstract: A filter layer and a buffer layer are sequentially laminated on a first principal face of a semiconductor substrate, and an island-shaped light absorption layer and a window layer are laminated on top of the buffer layer. A diffusion region in which p-type impurities have been diffused is formed in the window layer. An n-side electrode and a p-side electrode are formed on the buffer layer and the diffusion region, respectively. A light incidence portion is formed on the buffer layer where the light absorption layer has not been formed.
    Type: Grant
    Filed: March 12, 2002
    Date of Patent: February 25, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Kenichi Matsuda
  • Patent number: 6479744
    Abstract: In a photovoltaic device module comprising a plurality of photovoltaic devices connected electrically through a metal member, an insulating member is so provided as to avoid contact between an edge portion of the photovoltaic device and the metal member. This can provide a photovoltaic device module which is inexpensive, easy to operate and highly reliable.
    Type: Grant
    Filed: September 27, 2000
    Date of Patent: November 12, 2002
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koji Tsuzuki, Tsutomu Murakami, Yoshifumi Takeyama, Koichi Shimizu
  • Publication number: 20020158297
    Abstract: A conventional dye-sensitized solar cell is a wet cell employing an electrolyte such as an iodine solution or the like, it is necessary to seal the solar cell with a sealing compound or the like in order to contain the iodine solution therein. Therefore, there are many problems in that, for example, leakage of electrolyte solution occurs when the sealing is broken. Furthermore, when only a flat-shaped titanium electrode is used, current and voltage of practically required levels can not be secured because the absorption area of solar rays is small. The solar cell of the present invention, employing a porous titanium dioxide semiconductor, is characterized in that the titanium dioxide semiconductor is held between a pair of electrodes so that the titanium dioxide semiconductor and at least one of the electrodes form a rectification barrier.
    Type: Application
    Filed: November 6, 2001
    Publication date: October 31, 2002
    Inventors: Yuji Fujimori, Suwa-Shi, Tsutomu Miyamoto, Shiojiri-shi
  • Publication number: 20020096732
    Abstract: A semiconductor device mainly comprises a chip disposed on the upper surface of a substrate. The upper surface of the substrate is provided with a ground ring, a power ring, and a plurality of conductive traces arranged at the periphery of the ground ring and the power ring. The semiconductor device comprises at least a surface-mountable device connected across the ground ring and the power ring. The semiconductor device of the present invention is characterized by having at least a bonding wire formed across the surface-mountable device. The bonding wire is connected between one of the bonding pads of the chip and the power ring wherein at least one downward depression is formed in a lengthen portion at a top of the bonding wire.
    Type: Application
    Filed: March 11, 2002
    Publication date: July 25, 2002
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Sheng-Tsung Liu, Francisco C. Cruz
  • Patent number: 6420643
    Abstract: A polycrystalline film of silicon including silicon grains having an aspect ratio, d/t, of more than 1:1, wherein “d” is the grain diameter and “t” is the grain thickness. The polycrystalline film of silicon can be used to form an electronic device, such as a monolithically integrated solar cell having ohmic contacts formed on opposed surfaces or on the same surface of the film. A plurality of solar cells can be monolithically integrated to provide a solar cell module that includes an electrically insulating substrate and at least two solar cells disposed on the substrate in physical isolation from one another. Methods for manufacturing the film, solar cell and solar cell module are also disclosed. The simplified structure and method allow for substantial cost reduction on a mass-production scale, at least in part due to the high aspect ratio silicon grains in the film.
    Type: Grant
    Filed: February 2, 2001
    Date of Patent: July 16, 2002
    Assignee: AstroPower, Inc.
    Inventors: David H. Ford, Allen M. Barnett, Robert B. Hall, James A. Rand
  • Patent number: 6396115
    Abstract: A detector layer for an optics module includes at least one diode having at least one sloped sidewall. At least one isolation region may be formed adjacent to the at least one sloped sidewall to isolate the at least one diode. Conducting material is disposed on at least a portion of the top surface of the diode. An insulating material is disposed on at least a portion of the diode and extends to the conducting material. A metal is disposed on at least a portion of the insulating material and at least a portion of the conducting material such that the metal is coupled to the conducting material.
    Type: Grant
    Filed: May 21, 1999
    Date of Patent: May 28, 2002
    Assignee: Seagate Technology LLC
    Inventors: Edward C. Gage, Ronald E. Gerber, George R. Gray, Steve C. Dohmeier, James E. Durnin, Daniel E. Glumac, Tim Gardner, Jill D. Berger, John H. Jerman, John F. Heanue, Ghamin A. Al-Jumaily
  • Patent number: 6384459
    Abstract: A photo-detecting device includes: a semiconductor substrate; a multilayer structure formed on the semiconductor substrate; an island-like photo-detecting region formed in at least a portion of the multilayer structure, the island-like photo-detecting region having a central portion; and a light-shielding mask formed on the semiconductor substrate so as to shield from light a portion of the island-like photo-detecting region at least excluding the central portion. The light-shielding mask comprises an upper metal film and a lower metal film, and the upper metal film and the lower metal film are at least partially isolated by an insulative film, the upper metal film and the lower metal film having different patterns.
    Type: Grant
    Filed: November 18, 1999
    Date of Patent: May 7, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Kenichi Matsuda
  • Patent number: 6364541
    Abstract: An optical receiver may include a photodector defined on a multilayer semiconductor structure. A first electrode may be formed by at least two substantially concentric conductive rings electrically coupled to one another and to a portion of a first layer of the multilayer semiconductor structure. A second electrode may be coupled to a second layer of the multilayer semiconductor structure and configured to transfer current generated by the photodetector in response to optical emissions. A method of fabricating such an optical receiver is also disclosed.
    Type: Grant
    Filed: May 1, 2000
    Date of Patent: April 2, 2002
    Assignee: New Focus, Inc.
    Inventors: Michael P. Nesnidal, Robert A. Marsland, Robert S. Williamson, III
  • Publication number: 20020011639
    Abstract: A semiconductor imaging device is disclosed. The device includes a substrate having at least first and second surfaces opposing each other, and a circuit layer. The substrate is doped to exhibit a first conductivity type. The substrate includes a conducting layer, a region, and a plurality of doped regions. The conducting layer includes a first type dopants incorporated near the first surface. The region includes a heavily doped area within the substrate near the second surface. The plurality of doped regions includes a second type dopants formed on the second surface. The circuit layer is formed over the second surface to provide gate contacts to and readout circuits for the plurality of doped regions. The readout circuit provides readout of optical signals from pixels.
    Type: Application
    Filed: April 5, 2001
    Publication date: January 31, 2002
    Inventors: Lars S. Carlson, Shulai Zhao, Richard Wilson
  • Patent number: 6342721
    Abstract: A photo-EMF detector for the collection of photons includes a substrate formed of a photorefractive semiconductor and a plurality of interlaced electrode pairs disposed over the substrate. Each electrode pair includes two parallel electrodes defining an active area therebetween for the collection of photons. One electrode of each pair is disposed between an adjacent pair of electrodes and proximate one electrode of the adjacent pair, light from striking a substrate surface between proximate electrodes and outputs from each of the plurality of interlaced electrode pairs are collected.
    Type: Grant
    Filed: June 10, 1999
    Date of Patent: January 29, 2002
    Assignee: Hughes Electronics Corporation
    Inventors: David Douglas Nolte, John Anthony Coy, Marvin B. Klein, G. David Bacher, Meng P. Chiao, Gilmore Joseph Dunning, Kenneth Bacher, David M. Pepper
  • Patent number: 6303968
    Abstract: An ohmic electrode for electrically connecting a shielding metal film and a window layer is provided to a semiconductor light-receiving element in which stray light is controlled by the shielding metal film. In this semiconductor light-receiving element, the ohmic electrode is disposed such that it encircles a p+ diffusion region while kept in contact with the window layer on a substrate. Crack propagation from the edgewise region into the ohmic electrode is thereby impeded.
    Type: Grant
    Filed: January 24, 2000
    Date of Patent: October 16, 2001
    Assignee: Oki Electric Industry, Co., Ltd.
    Inventor: Takanobu Kobayashi
  • Patent number: 6288325
    Abstract: High performance photovoltaic modules are produced with improved interconnects by a special process. Advantageously, the photovoltaic modules have a dual layer back (rear) contact and a front contact with at least one layer. The front contact and the inner layer of the back contact can comprise a transparent conductive oxide. The outer layer of the back contact can comprise a metal or metal oxide. The front contact can also have a dielectric layer. In one form, the dual layer back contact comprises a zinc oxide inner layer and an aluminum outer layer and the front contact comprises a tin oxide inner layer and a silicon dioxide dielectric outer layer. One or more amorphous silicon-containing thin film semiconductors can be deposited between the front and back contacts. The contacts can be positioned between a substrate and an optional superstrate.
    Type: Grant
    Filed: May 4, 2000
    Date of Patent: September 11, 2001
    Assignee: BP Corporation North America Inc.
    Inventors: Kai W. Jansen, Nagi Maley
  • Patent number: 6252260
    Abstract: An electrode structure of an HIP infrared detector. A HIP infrared comprises a p-type silicon substrate which has an exposed guard ring, an exposed region of the silicon substrate encompassed by the guard ring, and a silicon oxide layer covering a part of the guard ring and the silicon substrate. On the silicon substrate, a photosensitive alloy layer comprises an amorphous photosensitive alloy layer on the silicon oxide layer, and a single crystalline photosensitive alloy layer on both the part of the silicon substrate encompassed by the guard ring and the guard ring. An electrode to electrically connects the silicon substrate via the photosensitive alloy layer. Moreover, the HIP infrared further comprises a p+ Ohmic contact in the silicon substrate and another electrode to contact with the p+ Ohmic contact.
    Type: Grant
    Filed: June 26, 1998
    Date of Patent: June 26, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Peiyi Chen, Peixin Qian, Ruizhong Wang
  • Patent number: 6232589
    Abstract: A new method of forming a photogate structure called a “Charge Snare Device” (CSD) uses only a single layer of polysilicon where prior art methods used two or more layers for constructing the gate nodes. Typical CCD structures utilize three layers of polysilicon and CID structures utilize two layers of polysilicon and neither of the prior art structures are suitable for standard sub micron processes. The new CSD device allows biasing of the photogate to the full potential that the process will allow for greater full well for a given pixel size and therefore an improved signal to noise ratio. Charge transfer between the collection site and the sense site isn't controlled as in all previous devices, rather the collection site is completely enclosed by the sense site, effectively snaring all collected photon generated charge as it diffuses and drifts to the sense site. The new photogate structure is suitable for passive pixels, Active Pixel Sensors (APS) or Active Column Sensors (ACS).
    Type: Grant
    Filed: January 19, 1999
    Date of Patent: May 15, 2001
    Assignee: Photon Vision Systems
    Inventors: Matthew A. Pace, Jeffrey J. Zamowski
  • Patent number: 6184457
    Abstract: In a photovoltaic device module comprising a plurality of photovoltaic devices connected electrically through a metal member, an insulating member is so provided as to avoid contact between an edge portion of the photovoltaic device and the metal member. This can provide a photovoltaic device module which is inexpensive, easy to operate and highly reliable.
    Type: Grant
    Filed: December 15, 1998
    Date of Patent: February 6, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koji Tsuzuki, Tsutomu Murakami, Yoshifumi Takeyama, Koichi Shimizu
  • Patent number: 6160277
    Abstract: A method of forming a field effect transistor relative to a semiconductor substrate, where the transistor has a gate which defines a resultant lateral expense of semiconductive material therebeneath for provision of a transistor channel region, includes a) providing a conductive gate layer over a semiconductor substrate; b) patterning the conductive gate layer into a first gate block, the first gate block having a first lateral expanse which is greater than the resultant lateral expanse; c) providing an insulating dielectric layer over the first gate block; d) providing a patterned layer of photoresist over the first gate block and the insulating dielectric layer, the patterned photoresist comprising a photoresist block positioned over and within the first lateral expanse of the first gate block; e) with the patterned photoresist in place, etching the insulating dielectric layer selectively relative to the first gate block; f) after etching the insulating dielectric layer and with the patterned photoresist in
    Type: Grant
    Filed: March 19, 1999
    Date of Patent: December 12, 2000
    Assignee: Micron Technology, Inc.
    Inventor: Kirk Prall
  • Patent number: 6157072
    Abstract: The invention relates to an image sensor for use in the facsimile device, image reader, digital scanner and the like. In this image sensor, the photodiodes and blocking diodes formed on an insulating board are insulated by a transparent interlayer insulating film and are connected in series and opposite polarity by coupling electrodes through contact holes in the transparent interlayer insulating film. This image sensor features a high reading speed and a low dark output noise.
    Type: Grant
    Filed: April 8, 1997
    Date of Patent: December 5, 2000
    Assignee: Kanegafuchi Chemical Industry Co., Ltd.
    Inventors: Takehisa Nakayama, Tadashi Obayashi, Yoichi Hosokawa, Kenji Kobayashi, Satoru Murakami, Tomoyoshi Zenki
  • Patent number: 6150701
    Abstract: A semiconductor device and fabrication method thereof restrains an amplified current between input voltage Vin and ground voltage Vss, and first and second n-wells are biased into internal voltage sources, whereby the current-voltage characteristic of the input pad becomes stabilized during an open/short checkup of a semiconductor device. The semiconductor device includes a semiconductor substrate having a plurality of device isolation regions, first and second n-wells horizontally spaced from either of the plurality of device isolation regions, a p-channel transistor formed in the second n-well, an input protection transistor horizontally spaced from the first n-well and the device isolation region, on a symmetrical portion by the first n-well to the second n-well, and a guard ring formed between the first n-well and the input protection transistor.
    Type: Grant
    Filed: April 8, 1998
    Date of Patent: November 21, 2000
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Chang Soo Lee
  • Patent number: 6121667
    Abstract: A photo diode is provided, which can polarize incident light before the light is sensed by the light-sensitive area of the photo diode so that the photo diode is capable of detecting the intensity of the light that is polarized in a specific direction. The photo diode includes a light-sensitive structure which can be a conventional photo diode, and at least one conductive grating formed over the light-sensitive structure, with the conductive grating having a plurality of substantially parallel and equally spaced conductive strips formed from a conductive material. The conductive grating can attenuate the intensity of the light that is polarized in parallel to the conductive grating before the light is sensed by the light-sensitive structure, thereby allowing only those components that are polarized in the direction perpendicular to the conductive grating to pass therethrough. The photo diode is therefore capable of detecting the intensity of the light that is polarized in a specific direction.
    Type: Grant
    Filed: July 28, 1998
    Date of Patent: September 19, 2000
    Assignee: United Microelectronics Corp.
    Inventor: Jia-Sheng Lee
  • Patent number: 6081017
    Abstract: A self-biased solar cell and a module adopting the solar cell. The self-biased solar cell includes a semiconductor substrate of first conductivity type, a semiconductor layer of second conductivity type disposed adjacent to the first surface of the semiconductor substrate, at least one more first electrodes formed adjacent to the semiconductor layer; at least one more dielectric layers formed on the second surface of the semiconductor substrate, at least one or more second electodes formed on the second surface of the semiconductor substrate, the second electodes being disposed adjacent to the dielectric layers, and at least one or more voltage applying electrode formed on the dielectric layers. Therefore, recombination loss of the carriers according to the formation of a back surface field is comparatively decreased, and open voltage and quantum efficiency at a long wavelength are increased.
    Type: Grant
    Filed: May 28, 1998
    Date of Patent: June 27, 2000
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-seop Kim, Il-whan Ji, Soo-hong Lee
  • Patent number: 6072115
    Abstract: A jacket material of electrical conductive leads for electrically connecting solar cell modules to each other is comprised of a polyvinyl chloride type resin containing either one of a polyester type plasticizer, a phosphoric acid ester type plasticizer, a fatty acid ester type plasticizer, and an epoxy type plasticizer, whereby the solar cell modules have excellent performance stability with less deterioration of the electrical conductive leads even when the electrical conductive leads are kept in contact with a base member such as an organic waterproof sheet over a long period.
    Type: Grant
    Filed: December 29, 1998
    Date of Patent: June 6, 2000
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yuji Inoue, Ichiro Kataoka, Fumitaka Toyomura, Satoru Shiomi, Makoto Sasaoka
  • Patent number: 6043517
    Abstract: A photodetector which can be operated in two wavelength ranges and is comprised of two detectors (A, B) arranged one on top of the other. A Si Schottky diode forms detector A which absorbs light in a region .lambda.<0.9 .mu.m. Longer-waved light (1 .mu.m<.lambda.<2 .mu.m) is absorbed in detector B which is comprised of an Si/SiGe pn-diode. To increase the efficiency, detector B is made with an integrated resonator. A further increase of the efficiency of the photodetector is accomplished through the mounting of a Bragg reflector on the absorbing layer of detector B.
    Type: Grant
    Filed: April 6, 1998
    Date of Patent: March 28, 2000
    Assignee: Daimler-Benz AG
    Inventors: Hartmut Presting, Ulf Konig, Andreas Gruhle
  • Patent number: 6013871
    Abstract: A method of creating a photovoltaic device for the conversion of light to electrical current comprises the steps of: (a) providing a layer of glue on a substrate; (b) laying down one or more elements of silicon doped with varying amounts of boron and phosphorous on the glue; (c) applying electro-conductive paint and/or metal strips between the silicon elements, wherein the electro-conductive paint includes materials such as nickel, silver, copper, etc.; (d) applying electro-conductive paint and/or metal strips to form two final electrical connectors to the photovoltaic device; (e) sealing the device from air and moisture with coating of clear acrylic lacquer or other material.
    Type: Grant
    Filed: March 5, 1998
    Date of Patent: January 11, 2000
    Inventor: Lawrence F. Curtin
  • Patent number: 5982011
    Abstract: A photodiode structure augmented with active area photosensitive regions is used for detecting impinging radiation. The photodiode includes a semiconductor base layer doped with impurities of a first carrier type, a field oxide layer disposed upon the base layer with an opening formed therethrough, a plurality of auxiliary oxide layers wherein each is separately disposed upon the base layer, and a semiconductor diffusion layer doped with impurities of a second carrier type arranged upon the base layer and in contact with the oxide layers. When the photodiode is electrically energized, a plurality of integral photosensitive regions is created within the depletion region to facilitate the detection of impinging radiation at an increased quantum efficiency.
    Type: Grant
    Filed: November 24, 1997
    Date of Patent: November 9, 1999
    Assignee: STMicroelectronics, Inc.
    Inventors: Alexander Kalnitsky, Marco Sabatini
  • Patent number: 5973260
    Abstract: The present invention discloses a converging type solar cell element able to restrain recombination of carriers and inflow of carriers into an embankment section and improve photoelectric conversion efficiency. A p.sup.+ diffusion layer 16 is formed on the surface of a sunlight receiving section 10 which is formed on a silicon substrate 12 comprising a p-type silicon. An energy gradient arises between the p.sup.+ diffusion layer 16 and the silicon substrate 12. Therefore, free electrons, which are minority carriers among the carriers generated in the silicon substrate 12 resulting from irradiation of sunlight to the sunlight receiving section 10, can be prevented from migrating to the surface side of the silicon substrate 12. Further, recombination of free electrons which may arise due to lattice defects of the surface can also be prevented. Still further, the p.sup.+ diffusion layer 16 may also be formed on a back surface side of the embankment section 14 which surrounds the sunlight receiving section 10.
    Type: Grant
    Filed: October 8, 1997
    Date of Patent: October 26, 1999
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Kyoichi Tange, Tomonori Nagashima
  • Patent number: 5945698
    Abstract: A field effect transistor relative to a semiconductor substrate, where the transistor has a gate which defines a resultant lateral expanse of semiconductive material therebeneath for provision of a transistor channel region, includes a) providing a conductive gate layer over a semiconductor substrate; b) patterning the conductive gate layer into a first gate block, the first gate block having a first lateral expanse which is greater than the resultant lateral expanse; c) providing an insulating dielectric layer over the first gate block; d) providing a patterned layer of photoresist over the first gate block and the insulating dielectric layer, the patterned photoresist comprising a photoresist block positioned over and within the first lateral expanse of the first gate block; e) with the patterned photoresist in place, etching the insulating dielectric layer selectively relative to the first gate block; f) after etching the insulating dielectric layer and with the patterned photoresist in place, etching the
    Type: Grant
    Filed: July 1, 1997
    Date of Patent: August 31, 1999
    Assignee: Micron Technology, Inc.
    Inventor: Kirk Prall
  • Patent number: 5917228
    Abstract: The present invention relates to a schottky-barrier diode capable of decreasing a leakage current due to damage generated on inner walls of trenches, and securing a large operation region for itself. In the device, an N.sup.- -type epitaxial layer is formed on a N.sup.+ -type silicon substrate. In a predetermined region in the epitaxial layer, a P.sup.+ -type base diffusion layer having high impurity concentration is formed. Trenches are formed through from the surface of the base diffusion layer to the epitaxial layer. In each of the trenches, an N.sup.- -type selective epitaxial growth region is formed. A schottky metal is formed on a surface comprising the surfaces of the base diffusion layer, which includes the selective epitaxial growth regions, and the epitaxial layer. Surface regions as the surfaces of the selective epitaxial growth regions filling the trenches function as diode operation regions.
    Type: Grant
    Filed: February 13, 1997
    Date of Patent: June 29, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Noboru Matsuda, Yoshiro Baba
  • Patent number: 5866935
    Abstract: A method and apparatus to analyze the aerial image of an optical system using a subwavelength slit. A slit configuration yields a higher signal-to-noise ratio than that achievable with a round aperture. The slit also allows the polarization of the aerial image to be analyzed. In an alternative embodiment a tunneling slit is used. The tunneling slit comprises an optically transparent ridge-like structure mounted to a substrate, the combined structure covered by a thin, planar metal film.
    Type: Grant
    Filed: November 25, 1996
    Date of Patent: February 2, 1999
    Assignee: Nikon Precision, Inc.
    Inventor: Michael R. Sogard
  • Patent number: 5838054
    Abstract: Contact pads for providing external electrical connection to components on a radiation imager having a photosensor array include a body of the material utilized for fabrication of the photosensors with an indium tin oxide (ITO) top layer disposed over the photosensor material to provide a contact region. A metal contact surface can also be disposed over the ITO. A barrier dielectric material is further disposed over portions of the contact pad.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: November 17, 1998
    Assignee: General Electric Company
    Inventors: Robert Forrest Kwasnick, Brian William Giambattista, George Edward Possin, Jianqiang Liu
  • Patent number: 5804836
    Abstract: A smart array comprised an array of polymer grid triodes arrayed with a common polymer grid. In a preferred embodiment it is embodied as a conducting polymer device which provides local gain adjustment for video display such that the entire sensor dynamic range available, typically more than 16 bits in the infrared detector case, can be utilized locally to solve the intra-scene contrast problem. The array of polymer grid triodes with common grid can be utilized to process the image in analog form directly on the focal plane. Alternatively, the array of polymer grid triodes with common grid can be utilized to process the image after analog to digital conversion and integrated directly into the display.
    Type: Grant
    Filed: August 6, 1997
    Date of Patent: September 8, 1998
    Assignee: Uniax Corporation
    Inventors: Alan J. Heeger, David Heeger, John D. Langan
  • Patent number: 5780915
    Abstract: A semiconductor device having a spiral electrode pattern and fabrication method thereof. The device includes an undoped semiconductor substrate, a first and a second probing pads formed on the substrate, and a pair of electrode fingers extending spirally toward a concentric center from the respective first and second probing pads and interdigitated with each other. The method includes the steps of, patterning an insulation layer on a semiconductor substrate in a spiral structure, depositing a metal layer on the substrate including the insulation layer but excluding the sides of the insulation layer, and etching the insulation layer using a wet etching technique.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: July 14, 1998
    Assignee: LG Semicon Co., Ltd.
    Inventor: Seung-Ho Lee
  • Patent number: 5777390
    Abstract: An improved metal-semiconductor-metal (MSM) photodiode, specifically a new high responsivity AND high bandwidth photodetector, resulting in a high gain-bandwidth product is disclosed. The disclosed device is an MSM photodiode in which the anode and cathode are made of different materials of differing opacity and possibly including different electrode dimensions as well. Using an opaque anode and a transparent cathode reduces surface reflections off the opaque electrodes allowing more light to be absorbed within the active semiconductor region. However, it concurrently keeps the transit distance for the slower moving holes to a minimum. Thus, the long tail in the impulse response due to hole collection is minimized, resulting in increased bandwidth.
    Type: Grant
    Filed: October 10, 1995
    Date of Patent: July 7, 1998
    Assignee: The University of Delaware
    Inventors: Paul R. Berger, Wei Gao
  • Patent number: 5663576
    Abstract: A photoelectric conversion element having an improved 8 characteristic is constructed of an insulation film and a photoelectric conversion film formed as islands. These films are stacked successively on a shield film formed on a transparent insulating substrate. Electrodes that connect the islands of the photoelectric conversion film together are formed at prescribed intervals and in prescribed widths so that each of the electrodes covers the upper surface of a different end portion of the photoelectric conversion film. A low resistance film is provided between the photoelectric conversion film and each of the electrodes.
    Type: Grant
    Filed: September 1, 1995
    Date of Patent: September 2, 1997
    Assignee: NEC Corporation
    Inventor: Kousaku Shimizu
  • Patent number: 5631490
    Abstract: MSM-photodetectors are produced using implanted n-type Si and interdigitated electrodes deposited on the implanted surface. The implantation process decreases the carrier lifetime by several orders of magnitude. By implanting silicon with fluorine or oxygen, the bandwidth is increased relatively to unimplanted MSM photodetectors. Exemplary implanted photodetectors exhibited 3-dB bandwidths which were faster by an order of magnitude compared to their unimplanted counterparts. The detectors are thus compatible with multi-gigabit per second operation and monolithic integration with silicon electronics.
    Type: Grant
    Filed: January 11, 1995
    Date of Patent: May 20, 1997
    Assignee: Lucent Technologies Inc.
    Inventors: Niloy K. Dutta, Dale C. Jacobson, Doyle T. Nichols
  • Patent number: 5620904
    Abstract: Methods for forming a wraparound electrical contact on a solar cell require minimal labor and result in high device yields at low cost. A decal having a patterned electrically conductive material is disposed on a first surface of the solar cell. The decal may be a liquid-transfer or heat-transfer decal. A portion of the decal is wrapped around at least one edge of the solar cell for contacting a second surface of the solar cell. The decal is processed to remove organic matter and form an ohmic contact.
    Type: Grant
    Filed: March 15, 1996
    Date of Patent: April 15, 1997
    Assignee: Evergreen Solar, Inc.
    Inventor: Jack I. Hanoka
  • Patent number: 5581108
    Abstract: Disclosed is an optical switch device for totally reflecting an incident light therein in accordance with a change in refractive index occurring owing to current application, which is manufactured by the steps of: sequentially forming an optical waveguide layer, an n-InP clad layer and an n-InGaAs cap layer on a main surface of an n-InP substrate using an epitaxial growing; selectively etching the n-InGaAs cap layer to form an opening tapered downward; diffusing an impurity into the n-InP clad layer through the opening and into the n-InGaAs cap layer to a predetermined depth from a surface thereof so as to form a first impurity diffused region in the n-InP clad layer under the opening and to form a second impurity diffused region along the surface of the n-InGaAs cap layer; etching the layers on the optical waveguide layer using a mask to form a ridge-shaped waveguide; and forming electrodes on the n-InGaAs cap layer and an exposed surface of the n-InP clad layer and on a surface which is opposite to the main
    Type: Grant
    Filed: September 7, 1994
    Date of Patent: December 3, 1996
    Assignee: Electronics & Telecommunications Research Institute
    Inventors: Hong-Man Kim, Kwang-Ryong Oh, Ki-Sung Park, Chong-Dae Park
  • Patent number: 5552607
    Abstract: An imager array data line repair structure for use in high performance imager arrays includes a first and a second plurality of address lines that are disposed in respective layers with an intermediate layer having at least one insulative material disposed therebetween. The imager device further includes at least one integral address line repair segment that is disposed in the same layer as the first address lines and that is electrically isolated from the first address lines; the integral address line repair segment is disposed so as to underlie a repair portion of the second address line, with the intermediate layer disposed therebetween, and has a width substantially the same as the overlying second address line.
    Type: Grant
    Filed: June 21, 1995
    Date of Patent: September 3, 1996
    Assignee: General Electric Company
    Inventors: Roger S. Salisbury, Ching-Yeu Wei, Robert F. Kwasnick