Abstract: The image sensor includes a substrate; a wiring structure formed on a front side of the substrate and including a plurality of wiring layers and a plurality of insulating films; a first well formed within the substrate and having a first conductivity type; and a first metal wiring layer directly contacting a backside of the substrate and configured to apply a first well bias to the first well.

Abstract: The present invention provides methods of forming metal oxide semiconductor nanostructures and, in particular, zinc oxide (ZnO) semiconductor nanostructures, possessing high surface area, plant-like morphologies on a variety of substrates. Optoelectronic devices, such as photovoltaic cells, incorporating the nanostructures are also provided.

Abstract: A solid-state image pickup device includes: a silicon layer; a pixel portion formed in the silicon layer for processing and outputting signal charges obtained by carrying out photoelectric conversion for incident lights; an alignment mark formed in a periphery of the pixel portion and in the silicon layer; and a contact portion through which a first electrode within a wiring layer formed on a first surface of the silicon layer, and a second electrode formed on a second surface opposite to the first surface of the silicon layer through an insulating film are connected, wherein the alignment mark and the contact portion are formed from conductive layers made of the same conductive material and formed within respective holes each extending completely through the silicon layer through respective insulating layers made of the same material.

Abstract: A solid-state imaging device includes: a peripheral circuit element formed on a semiconductor substrate having an image sensing area where an image sensing element that captures an image of an object is provided and a peripheral area located on the periphery of the image sensing area, the peripheral circuit element being in the peripheral area; a plurality of insulation films formed to cover at least the peripheral circuit element; and a contact plug formed in a contact hole through the plurality of insulation films and above the peripheral circuit element in such a manner that the contact plug is electrically connected to the peripheral circuit element; the plurality of insulation films including a first insulation film, and a second insulation film formed to cover the first insulation film, the contact hole being formed by etching the second insulation film so as to remove a portion thereof where the contact hole is to be formed, and then etching the first insulation film so as to remove a portion thereof w

Abstract: An optoelectronic module having an optoelectronic device with a contact conductor and a connection carrier with a connection area. The contact conductor is electrically conductively and/or thermally conductively connected to the connection area. A local, delimited heating region is formed on the contact conductor or the connection carrier has a cutout, which is at least partly covered by the contact conductor. A method which enables simplified and reliable production of an optoelectronic module is also described.

Abstract: An optoelectronic device comprises a photodetector feature, an interfacial layer disposed above at least a portion of the photodetector feature, and a vertical contact disposed on at least a portion of the interfacial layer. The photodetector feature comprises germanium and is operative to convert a light signal into an electrical signal. The interfacial layer comprises nickel. Finally, the vertical contact is operative to transmit the electrical signal from the photodetector feature.

Abstract: Disclosed are an image sensor and a method for manufacturing the same. The image sensor includes a substrate provided with a transistor circuit, first and second interconnections separated from each other on the substrate, a first conductive-type conductive layer formed at side surfaces of the first interconnection, a second conductive-type conductive layer formed at side surfaces of the second interconnection, and an intrinsic layer formed between the first and second conductive-type conductive layers thereby forming a P-I-N structure.

Abstract: A resin-sealed semiconductor device includes a metal frame, an electronic substrate, an adhesive agent, a molded resin, and a bonding agent. The electronic substrate includes a first surface having a circuit element wiring part, a second surface facing the metal frame, and a side surface arranged approximately perpendicularly to the first surface and the second surface. The adhesive agent is disposed between the metal frame and the second surface to cover the second surface and a portion of the side surface adjacent to the second surface. The molded resin covers the metal frame and the electronic substrate, and holds the other portion of the side surface adjacent to the first surface. The bonding agent is disposed between the circuit element wiring part and the molded resin so that the molded resin holds the circuit element wiring part through the bonding agent.

Abstract: There is provide a divided exposure technology capable of restraining deterioration in the performance of a solid-state image sensor. A photoresist is formed over a semiconductor substrate and subjected to divided exposure. A dividing line for divided exposure is located at least over a region of a semiconductor substrate in which an active region in which a pixel is to be formed is defined. The photoresist is then developed and patterned. By utilizing the patterned photoresist, an element isolation structure for defining the active region in the semiconductor substrate is formed in the semiconductor substrate.

Abstract: Wirebonds are formed to couple an opto-electronic device chip having two or more opto-electronic devices to a signal processing chip. Two or more mutually adjacent wirebond groups, each corresponding to one of the opto-electronic devices, are formed. For example, each wirebond group can include a first wirebond coupling a P-terminal of the opto-electronic device of the wirebond group to the signal processing chip, a second wirebond coupling an N-terminal of the opto-electronic device of the wirebond group to the signal processing chip, and a third wirebond coupling the opto-electronic device chip to the signal processing chip.

Abstract: A semiconductor device is provided which comprises a substrate (501) having a plurality of bond pads (503) disposed thereon. Each bond pad has a major axis and a minor axis in a direction parallel to the substrate, and the ratio of the major axis to the minor axis increases with the distance of a bond pad from the center of the substrate.

Abstract: The present invention provides systems, devices and methods for fabricating miniature low-power light sensors. With the present invention, a light sensitive component, such as a diode, is fabricated on the front side of a silicon wafer. Connectivity from the front side of the wafer to the back side of the wafer is provided by a through silicon via. Solder bumps are then placed on the back side of the wafer to provide coupling to a printed circuit board. The techniques described in the present invention may also be applied to other types of semiconductor devices, such as light-emitting diodes, image sensors, pressure sensors, and flow sensors.

Abstract: To reduce white spots by optimizing an impurity concentration of a p-type impurity doped region of a well contact, a size of a contact portion, a position of an n-type region serving as a photoelectric converter, and so on. In a solid state image pickup device in which a semiconductor substrate 11 includes a pixel region where a plurality of pixels are arranged, each pixel including a photoelectric converter 21, and a pixel well 12 shared by the respective pixels, a well contact 14 supplying a reference voltage to the pixel well 12 includes: an electrode 15 supplying a reference voltage; a p-type impurity doped region 16 placed in a surface of the pixel well 12; and a contact portion 17 placed in the p-type impurity doped region 16 so as to be connected to the electrode 15 and having a higher concentration than the p-type impurity doped region 16. The p-type impurity doped region 16 is doped with at least a p-type impurity, with an impurity concentration of 1×1019 cm?3 or less.

Abstract: A method of manufacturing a solid-state image pickup device according to an embodiment includes forming first and second holes in a semiconductor substrate, forming insulating films on surfaces of the first and second holes, forming a contact and an alignment mark by embedding a conducting material in the first and second holes, forming a photodiode in the semiconductor substrate, forming a wiring layer including a connecting part for connecting to the contact and a wiring for connecting to the connecting part, bonding a supporting substrate on the wiring layer, exposing the contact and the alignment mark on the surface of the semiconductor substrate by reducing the semiconductor substrate in thickness, and forming a filter and a lens on the photodiode based on the alignment mark.

Abstract: A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation rate of wiring is larger than in other regions, slits are formed in the wiring to control the wiring occupation rate. In the respective wirings layers, the shapes, sizes and intervals of wirings below the respective electrode pads are made similar or equal to one another.

Abstract: An image sensor includes a semiconductor substrate having a pixel region and a peripheral circuit region. An interlayer dielectric layer has metal wirings and a pad formed over the semiconductor substrate. A lower electrode is selectively formed over the metal wirings. A photo diode is formed over the interlayer dielectric layer of the pixel region. An upper electrode formed over the photo diode. Therefore, a vertical integration of the transistor and the photodiode may approach a fill factor to 100%, and provide higher sensitivity, implement more complicated circuitry without reducing sensitivity in each unit pixel, improve the reliability of the image sensor by preventing crosstalk, etc., between the pixels, and improve light sensitivity by increasing the surface area of the photo diode in the unit pixel.

Abstract: A reflowable camera module has a set of solder joints formed on a bottom surface of the camera module that provide electrical signal and power connections between the camera module and a printed circuit substrate. The solder joints are susceptible to failure caused by shear forces, particularly in corner regions. Additional localized mechanical supports are provided to protect those solder joints carrying power and electrical signals for the camera module. The localized mechanical supports are formed outside of a region containing the solder joints carrying power and electrical signals. The localized mechanical supports may include dummy solder joints formed in corner regions and/or dummy leads used to support the camera module. Solder joint reliability is enhanced without requiring the use of an underfill encapsulant.

Abstract: A thin film solar cell includes: a transparent conductive film arranged on a translucent insulating substrate; first and second separation trenches orthogonal to each other on the translucent insulating substrate and separating the transparent conductive film; and a first opening trench parallel to the first separation trench and second opening trenches parallel to said second separation trench, orthogonal to each other on the translucent insulating substrate; wherein solar cells formed on the translucent insulating substrate are arranged at adjacent positions with said first opening trench positioned therebetween and at adjacent positions with said second opening trench positioned therebetween; pairs of said solar cells adjacent to each other with said first opening trench positioned therebetween are electrically connected, and among pairs of solar cells positioned adjacent to each other with the second opening trench in between, some are electrically connected to each other, and others are electrically insu

Abstract: It is an object of the present invention to manufacture, with high yield, a semiconductor device in which an element that has a layer containing an organic compound is provided over a flexible substrate. A method for manufacturing a semiconductor device includes: forming a separation layer over a substrate; forming an element-formed layer over the separation layer by forming an inorganic compound layer, a first conductive layer, and a layer containing an organic compound and forming a second conductive layer which is in contact with the layer containing an organic compound and the inorganic compound layer; and separating the separation layer and the element-formed layer from each other after pasting a first flexible substrate over the second conductive layer.

Abstract: A first semiconductor chip and a second semiconductor chip which form a stack are mounted on a module substrate by deflecting a center position of the semiconductor chips from the module substrate. In the side where the distance from the edge of the deflected semiconductor chip to the edge of a module substrate is shorter, the electrode pad on the first semiconductor chip and the electrode pad on the second semiconductor chip are directly connected with a wire. In the side where the distance from the edge of the deflected semiconductor chip to the edge of a module substrate is longer, the electrode pad on the first semiconductor chip and the electrode pad on the second semiconductor chip are combined with the corresponding bonding lead on the module substrate with a wire.

Abstract: The present invention is a photodiode detector array for use in computerized tomography (CT) and non-CT applications. Specifically, the present invention is a high-density photodiode arrays, with low dark current, low capacitance, high signal to noise ratio, high speed, and low crosstalk that can be fabricated on relatively large substrate wafers. More specifically the photodiode array of the present invention is fabricated such that the PN-junctions are located on both the front side and back side surfaces of the array, and wherein the front side PN-junction is in electrical communication with the back side PN-junction. Still more specifically, the present invention is a photodiode array awing PN-junctions that are electrically connected from the front to back surfaces and which can be operated in a fully depleted mode at low reverse bias.

Abstract: A low profile, 1 or 2 die design, surface mount high power microelectronic package with coefficient of expansion (CTE) matched materials such as Silicon die to Molybdenum conductor (bond pads). The CTE matching of the materials in the package enables the device to withstand repeated, extreme temperature range cycling without failing or cracking. The package can be used for transient voltage suppression (TVS), Schottky diode, rectifier diode, or high voltage diodes, among other uses. The use of a heat sink metal conductor that has a very high modulus of elasticity allows for a very thin wall plastic locking to be utilized in order to minimize the footprint of the package.

Abstract: A photoelectric conversion device includes an intrinsic semiconductor layer, a first conductive type semiconductor layer disposed on a first side of the intrinsic semiconductor layer, and a second conductive type semiconductor layer disposed on a second side of the intrinsic semiconductor layer opposite the first side. The intrinsic semiconductor layer includes an amorphous semiconductor layer and a crystalline semiconductor layer including a plurality of crystals. A diameter of a crystal of the plurality of crystals is equal to or less than approximately 100 angstroms.

Abstract: Double mold opto-coupler and method for manufacture. A first subassembly is formed that includes a light detector. The first subassembly is molded with a first mold material to form a molded first subassembly. A light source is attached to the molded first sub-assembly to form a second sub-assembly. The second sub-assembly is molded with a second mold material to form a final assembly with predetermined dimensions.

Abstract: A method of bonding aluminum (Al) electrodes formed on two semiconductor substrates at a low temperature that does not affect circuits formed on the two semiconductor substrates is provided. The method includes: (a) forming aluminum (Al) electrodes on the two semiconductor substrates, respectively, and depositing a metal alloy that comprises aluminum (Al) and copper (Cu) onto the aluminum (Al) electrodes; (b) arranging the aluminum (Al) electrodes of the two semiconductor substrates to face with each other; and (c) heating the aluminum (Al) electrodes at a temperature lower than the melting point of the deposited metal alloy, and applying a specific pressure onto the two semiconductor substrates. Accordingly, bonding can be carried out at a temperature lower than the melting point of an Al0.83Cu0.17 alloy without having an effect on circuits formed on two semiconductor substrates, and can be selectively carried out at regions where pressure is applied.

Abstract: A partition-wall structure having a concave portion corresponding to a pattern formed by a functional liquid, including: a first concave portion provided corresponding to a first pattern; a second concave portion provided corresponding to a second pattern that is coupled to the first pattern and whose width is smaller than a width of the first pattern; and a convex portion provided in the first pattern.

Abstract: Provided are an image sensor and a method for manufacturing the same. The image sensor comprises a semiconductor substrate, an interconnection and an interlayer dielectric, a lower electrode layer, an image sensing device, a first via hole, a barrier pattern, a second via hole, and a metal contact. The semiconductor substrate comprises a readout circuitry. The interconnection and the interlayer dielectric are formed on the semiconductor substrate. The lower electrode layer is disposed over the interlayer dielectric. The image sensing device is disposed on the lower electrode layer. The first via hole is formed through the image sensing device. The barrier pattern is formed on a sidewall of the first via hole. The second via hole is formed through the lower electrode layer and the interlayer dielectric under the first via hole. The metal contact is formed in the first and second via holes.

Abstract: The invention discloses a packaging structure and packaging method. The packaging structure includes a solder bump, a pad located on a front side of a chip, and an intermediate metal layer which connects the solder bump and the pad, wherein a through hole passing from a back side of the chip to the pad is provided on the chip, and the intermediate metal layer is connected to the pad within the through hole. In the packaging structure, a through hole is formed on the back side of the chip to expose the pad on the front side of the chip and the intermediate metal layer is connected to the pad within the through hole. This provides a relatively large contacting area therebetween. The connection thus formed is more reliable and stable, compared with the prior art structure.

Abstract: A method for forming a metal interconnection in an image sensor includes forming a first interlayer dielectric (ILD) layer having a contact plug over a substrate, forming a diffusion barrier layer over the first ILD layer, performing a forming gas annealing, forming a second ILD layer over the diffusion barrier layer, etching the second ILD layer and the diffusion barrier layer to form a trench, forming a conductive layer to fill the trench, and planarizing the conductive layer to form a metal interconnection electrically connected to the contact plug

Abstract: A semiconductor radiation detector crystal is patterned by using a Q-switched laser to selectively remove material from a surface of said semiconductor radiation detector crystal, thus producing a groove in said surface that penetrates deeper than the thickness of a diffused layer on said surface.

Abstract: A semiconductor chip constituting an image pickup device is provided on a substrate and includes a connection terminal and an image pickup portion. A lens sheet having a lens portion is provided on the semiconductor chip. A groove is formed in at least the substrate to expose the connection terminal. A conductor pattern is formed in the groove and has one end electrically connected to the connection terminal.

Abstract: An optoelectronic semiconductor device includes a substrate, a semiconductor system having an active layer formed on the substrate and an electrode structure formed on the semiconductor system, wherein the layout of the electrode structure having at least a first conductivity type contact zone or a first conductivity type bonding pad, a second conductivity type bonding pad, a first conductivity type extension electrode, and a second conductivity type extension electrode wherein the first conductivity type extension electrode and the second conductivity type extension electrode have three-dimensional crossover, and partial of the first conductivity type extension electrode and the first conductivity type contact zone or the first conductivity type bonding pad are on the opposite sides of the active layer.

Abstract: A wafer bonded composite structure is provided for matching a coefficient of thermal expansion of a first semiconductor chip to a coefficient of thermal expansion of a second semiconductor chip in order to provide a thermally matched hybridized semiconductor chip assembly. The wafer bonded composite structure includes a first semiconductor chip having a top and a bottom surface. The first semiconductor chip has a coefficient of thermal expansion which is less than the coefficient of thermal expansion of the second semiconductor chip. Preferably, the first semiconductor chip is an readout integrated circuit (ROIC) and the second semiconductor chip is an infrared detector chip. Further, the wafer bonded composite structure also includes a substrate wafer bonded to a bottom surface of the first semiconductor chip to form the wafer bonded composite structure itself.

Abstract: An integrated circuit connection is describe that includes a first, securing member and a second, connection member. The first member, in an embodiment, is a spike that has a portion of its body fixed in a layer of an integrated circuit structure and extends outwardly from the integrated circuit structure. The second material is adapted to form a mechanical connection to a further electrical device. The second material (e.g., solder), is held by the first member to the integrated circuit structure. The first member increases the strength of the connection and assists in controlling the collapse of second member to form the mechanical connection to another circuit. The connection is formed by coating the integrated circuit structure with a patterned resist and etching the layer beneath the resist. A first member material (e.g., metal) is deposited. The resist is removed. The collapsible material is fixed to the first member.

Abstract: A semiconductor chip that has a photodiode formed on it, a semiconductor device including the semiconductor chip, and manufacturing methods thereof. A second semiconductor region 11 is formed in light-receiving region R of first semiconductor region 10. First bumps 12 are formed outside light-receiving region R. Second bump 13 is formed in a ring-shape around light-receiving region R between region R and first bumps 12. Semiconductor chip T is assembled on assembly substrate S, and resin layer 30 is formed between chip T and substrate S in the region outside of said light-receiving region R.

Abstract: A solid state imaging device includes: a plurality of photoelectric conversion portions formed in a substrate in a matrix arrangement to convert light incident on light receiving portions into electricity; a plurality of vertical transfer registers for reading charges out of the photoelectric conversion portions and transferring the charges in the column direction; and a plurality of shunt interconnections formed above the vertical transfer electrodes in one-to-one correspondence with the columns of the photoelectric conversion portions to supply drive pulses to the corresponding vertical transfer electrodes. Each of the vertical transfer registers includes a vertical transfer channel formed in the substrate in one-to-one correspondence with a column of the photoelectric conversion portions and a plurality of vertical transfer electrodes formed above the vertical transfer channel.

Abstract: An image sensor and a method for manufacturing an image sensor. An image sensor may include a readout circuitry which may be formed on and/or over a first substrate. An image sensor may include an interlayer dielectric layer formed on and/or over a first substrate. An image sensor may include a metal line formed on and/or over an interlayer dielectric layer, and may include a top plug. An image sensor may include an image sensing device formed on and/or over a top plug. An image sensor may include a first conductive type ion implantation area formed on and/or over an area of an image sensing device corresponding to a top plug. Methods of manufacturing an image sensor are disclosed.

Abstract: Methods and arrangements to attach a QFN to a PCB, systems which include a QFN attached to a PCB, and apparatuses for controlling the deposit of solder upon a PCB are disclosed. Embodiments include transformations, code, state machines or other logic to calculate a total area for the QFN IO pads. Embodiments may then determine a total area for the regions of solder applied to the PCB thermal pad to which the QFN thermal pad may be connected in dependence upon the calculated total area for the QFN IO pads. In some embodiments, the total area of the solder regions applied to the PCB thermal pad is approximately equal to the calculated total area for the QFN IO pads. In many embodiments, the number of regions of solder and the shape of the regions of solder is determined.

Abstract: The present invention provides a transflective liquid crystal display device having at least one switching element having at least a drain electrode, a first passivation layer formed over the switching element with the first passivation layer defining a drain contact hole exposing a first portion the drain electrode, a transparent pixel electrode contacting the drain electrode through the drain contact hole and defining a contact opening that exposes a second portion of the drain electrode, the contact opening being defined in a portion of the transparent pixel electrode in the drain contact hole, and a reflective pixel electrode contacting the transparent pixel electrode in the drain contact hole and contacting the drain electrode through the contact opening.

Abstract: The present invention is directed toward a detector structure, detector arrays, a method of detecting incident radiation, and a method of manufacturing the detectors. The present invention comprises several embodiments that provide for reduced radiation damage susceptibility, decreased affects of cross-talk, and increased flexibility in application. In one embodiment, the present invention comprises a plurality of front side illuminated photodiodes, optionally organized in the form of an array, with both the anode and cathode contact pads on the back side. The front side illuminated, back side contact photodiodes have superior performance characteristics, including less radiation damage, less crosstalk using a suction diode, and reliance on reasonably thin wafers. Another advantage of the photodiodes of the present invention is that high density with high bandwidth applications can be effectuated.

Abstract: An image sensor and manufacturing method thereof are provided. The image sensor includes a readout circuitry, an electrical junction region, an interconnection, and an image sensing device. The readout circuitry can be disposed at a first substrate, and the electrical junction region can be electrically connected to the readout circuitry at the first substrate. The interconnection can be disposed in an interlayer dielectric on the first substrate and electrically connected to the electrical junction region. The image sensing device can include a first conductive type layer and a second conductive type layer on the interconnection.

Abstract: Disclosed are an image sensor and a method for manufacturing the same. The image sensor can include a readout circuitry on a first substrate; an interlayer dielectric layer including at least one metal and contact plug electrically connected to the readout circuitry; and an image sensing device formed on a second substrate, bonded to the interlayer dielectric layer, and provided with a first conductive type conduction layer and a second conductive type conduction layer. An uppermost contact plug in the interlayer dielectric layer has a wall structure extending from an uppermost metal in the interlayer dielectric layer. The top surface of the uppermost contact plug makes contact with the image sensing device and is connected to an image sensing device and an uppermost metal of an adjacent pixel.

Abstract: An image sensor has a plurality of pixels each with a photoelectric conversion element and a detection transistor the threshold voltage of which fluctuates in accordance with electrical charge generated in the photoelectric conversion element. The image sensor includes a second conductivity type shield region and a first conductivity type photoelectric conversion region; a first conductivity type well region linked to the photoelectric conversion region; a ring-like gate electrode; a second conductivity type source region at the inside of the ring-like gate electrode; a second conductivity type drain region. The image sensor further includes a potential pocket region that is formed in the well region below the ring-like gate electrode and accumulates the electrical charge, wherein the width of the gate electrode is formed narrower in the part adjacent to the photoelectric conversion region than in other parts.

Abstract: Disclosed herein is a solid-state imaging element which includes a plurality of drive signal inputs, a plurality of bus lines, and a plurality of vertical transfer register electrodes. In the solid-state imaging element, a charge accumulated in light-receiving elements in a pixel region is vertically transferred by the drive signals input to the electrodes. Each of the electrodes has a contact part connected to the second contact and having a width smaller than a width of the electrodes in the pixel region, and a blank region is formed between predetermined adjacent two of the contact parts so that a width of the blank region is larger than a distance between respective two of the contact parts other than the predetermined adjacent two of the contact parts. The first contact is disposed on the blank region.

Abstract: Embodiments provide an image sensor. The image sensor includes readout circuitry, an interlayer dielectric, an interconnection, and an image sensing device. The interconnection includes a lower barrier metal and a nitride barrier formed under the lower barrier metal. A contact plug electrically connecting the lower barrier metal to a lower interconnect is formed passing through the nitride barrier.

Abstract: Assemblies involving integrated circuit dies (e.g. packaged integrated circuits) and packaged dies electrically connected to circuit boards at times mechanically fail at conducting pads used for electrical interconnection. Such failure is mitigated by underlying appropriate pads with a compliant region having specific characteristics.

Abstract: A semiconductor apparatus includes, a semiconductor substrate having first and second main surfaces and a thought hole connecting the first and second main surfaces; a first insulation layer arranged on the first main surface, and having an opening corresponding to the thought hole; a first conductive layer arranged on the first insulation layer, and covering the thought hole; a second insulation layer arranged on an inner wall of the thought hole and the second surface; a second conductive layer arranged in the thought hole and on the second insulation layer, the second conductive layer contacting the first conductive layer; and a filling member arranged on the second conductive layer in the through hole, and having a gap between the second conductive layer on the first main surface side.

Abstract: The present invention provides a semiconductor device exhibiting an improved reliability. A semiconductor device comprises a semiconductor chip having an electrode on a surface thereof and a mounting substrate, and the electrode (aluminum electrode) of the semiconductor chip is coupled to the mounting substrate through a bump (solder bump 104). A plurality of diffusion barrier films (UBM 112) for preventing a diffusion of a material composing the bump is provided between the electrode and the bump, and the diffusion barrier film is formed to have a plurality of divided portions via spacings therebetween.

Abstract: The present disclosure provide a microelectronic device. The microelectronic device includes a sensing element formed in the semiconductor substrate; a trench isolation feature formed in the semiconductor substrate; a bonding pad formed at least partially in the trench isolation feature; and interconnect features formed over the sensing element and the trench isolation feature, being coupled to the sensing element and the bonding pad, and isolated from each other by interlayer dielectric.

Abstract: An image sensor having greatly improved physical and electrical bonding forces between a photodiode and a substrate, and a manufacturing method thereof. The image sensor includes a semiconductor substrate and readout circuitry, a dielectric layer on the semiconductor substrate, a metal line in the dielectric layer, electrically connected with the readout circuitry, an image sensing device including first and second impurity regions on the dielectric layer, a via hole through the dielectric layer and the image sensing device, a hard mask in the via hole, and a lower electrode in the via hole to connect the first impurity region with the metal line.