Abstract: A thin film transistor array substrate for a digital X-ray detector device includes a p+ type semiconductor layer and a p? type semiconductor layer having different impurity concentrations are disposed above an intrinsic semiconductor layer of the PIN diode and an n+ type semiconductor layer and an n? type semiconductor layer having different impurity concentrations are disposed below the intrinsic semiconductor layer of the PIN diode to minimize ejection of holes by the p? type semiconductor layer and minimize ejection of electros by the n? type semiconductor layer, thereby minimizing occurrence of leakage current of the PIN diode.

Abstract: An infrared solid state imaging device includes: a first PN junction diode has a first shortest length that is a shortest length from a first junction surface to a second junction surface; a PN junction diode has a second shortest length that is a shortest length from the second junction surface to a third junction surface, the second shortest length being different from the first shortest length; an insulating film serving as an element isolation region which establishes electrical isolation between a first region of the first PN junction diode and a fourth region of the second PN junction diode, and so on; and a metal wire provided on a second region of the first PN junction diode and a third region of the second PN junction diode, wherein the first PN junction diode and the second PN junction diode are connected in series.

Abstract: Low noise silicon-germanium (SiGe) image sensor. In one embodiment, an image sensor includes a plurality of pixels arranged in rows and columns of a pixel array disposed in a semiconductor substrate. The photodiodes of an individual pixel are configured to receive an incoming light through an illuminated surface of the semiconductor substrate. The semiconductor substrate includes a first layer of semiconductor material having silicon (Si); and a second layer of semiconductor material having silicon germanium (Si1-xGex). A concentration x of Ge changes gradually through at least a portion of thickness of the second layer. Each photodiode includes a first doped region extending through the first layer of semiconductor material and the second layer of semiconductor material; and a second doped region extending through the first layer of semiconductor material and the second layer of semiconductor material.

Abstract: A ray detector and a ray detection panel. The ray detector includes a base substrate, a thin film transistor, a scintillator, and a photodetector; the scintillator is located on aside of the photodetector that is away from the base substrate; the photodetector includes: a first conductive structure; a semiconductor layer; a second conductive structure; a first dielectric layer; and a second dielectric layer, the second conductive structure is electrically connected with source electrode; the thin film transistor is located between the base substrate and the photodetector; and an orthographic projection of the thin film transistor on the base substrate at least partially falls into an orthographic projection of the photodetector on the base substrate.

Abstract: The semiconductor photodetector device comprises a substrate of semiconductor material of a first type of electric conductivity, an epitaxial layer of an opposite second type of electric conductivity, a further epitaxial layer of the first type of electric conductivity and photodetectors. The epitaxial layer functions as a shielding layer for charge carriers (e?, h+ generated by radiation that is incident from a rear side opposite the photodetectors.

Abstract: The present disclosure describes a fin-like field-effect transistor (FinFET). The device includes one or more fin structures over a substrate, each with source/drain (S/D) features and a high-k/metal gate (HK/MG). A first HK/MG in a first gate region wraps over an upper portion of a first fin structure, the first fin structure including an epitaxial silicon (Si) layer as its upper portion and an epitaxial growth silicon germanium (SiGe), with a silicon germanium oxide (SiGeO) feature at its outer layer, as its middle portion, and the substrate as its bottom portion. A second HK/MG in a second gate region, wraps over an upper portion of a second fin structure, the second fin structure including an epitaxial SiGe layer as its upper portion, an epitaxial Si layer as it upper middle portion, an epitaxial SiGe layer as its lower middle portion, and the substrate as its bottom portion.

Abstract: High speed optoelectronic devices and associated methods are provided. In one aspect, for example, a high speed optoelectronic device can include a silicon material having an incident light surface, a first doped region and a second doped region forming a semiconductive junction in the silicon material, and a textured region coupled to the silicon material and positioned to interact with electromagnetic radiation. The optoelectronic device has a response time of from about 1 picosecond to about 5 nanoseconds and a responsivity of greater than or equal to about 0.4 A/W for electromagnetic radiation having at least one wavelength from about 800 nm to about 1200 nm.

Abstract: A photo-detector includes a detection region for collecting minority carriers in a substrate, first and second field generating regions generating a majority carrier current to move the minority carriers towards the detection region, and a blocking region spaced apart from the detection region to block a leakage current. The photo-detector includes a ground region spaced apart from the detection region, and the blocking region is disposed between the detection region and the ground region.

Abstract: Provided are a solid-state imaging element, which suppresses occurrence of a dark current and a white spot and even suppresses occurrence of a residual image, and a manufacturing method for the solid-state imaging element. A solid-state imaging element (1) is provided with: a gate electrode (4) above a substrate (2); a charge storage region (5) formed at a position inside the substrate (2) and apart from a top surface (2a) of the substrate (2); a read region (6) formed at a position inside the substrate (2) and on the opposite side to the charge storage region (5) with the gate electrode (4) interposed therebetween; a channel region (7, 8) formed inside the substrate (2) and immediately below the gate electrode (4); and a shield region (9) and an intermediate region (10) formed inside the substrate (2) and between the top surface (2a) of the substrate (2) and the charge storage region (5).

Abstract: This invention relates to field photodiodes based on PN junctions that suffer from dark current leakage. An NBL is added to prove a second PN junction with the anode. The second PN junction is reversed biased in order to remove dark current leakage. The present solution requires no additional masks or thin films steps relative to a conventional CMOS process flow.

Abstract: A method of quantum efficiency (QE) photovoltaic measurement is provided that includes coupling measurement electronics to a p-n junction of a Cell Under Test (CUT) that are capable of measuring a pulsed DC photocurrent. The measurement electronics output a response by the CUT to turning on and turning off the pulsed DC photocurrent that are digitized and analyzed for the magnitude that is representative of a conversion efficiency of the CUT to a wavelength of the DC photocurrent, where a measured decay time represents the p-n junction or the minority carrier lifetime. The CUT is exposed to the pulsed DC photocurrent, where signatures of the response to turning off and on to the pulsed DC photocurrent overlap, where a combined amplitude of the response is proportional to an efficiency of a production of photocarriers, where a value of a spectral response at a wavelength is determined.

Abstract: A method for manufacturing a photoelectric conversion device, comprising: a first step of forming a buffer layer on a light absorption layer containing a group I-III-VI compound or a group I-II-IV-VI compound; and a second step of bringing a surface of the buffer layer into contact with a first solution containing sulfide ions or hydrogen sulfide ions.

Abstract: An imaging device is provided at a lower manufacturing cost. In a light-receiving portion of an imaging device which includes the light-receiving portion, a first transistor connected to the light-receiving portion, and a peripheral circuit, a comb-like n-type semiconductor and a comb-like p-type semiconductor are arranged so as to engage with each other in a plan view. Further, the light-receiving portion and the first transistor overlap with each other. The peripheral circuit includes a second transistor and a third transistor. Further, the second transistor and the third transistor include semiconductor layers having different bandgaps. Further, one of the semiconductor layers of the second transistor and the third transistor has the same bandgap as a semiconductor layer of the first transistor.

Abstract: A semiconductor device which includes an oxide semiconductor layer, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, a gate insulating layer covering the oxide semiconductor layer, the source electrode, and the drain electrode, and a gate electrode over the gate insulating layer is provided. The thickness of the oxide semiconductor layer is greater than or equal to 1 nm and less than or equal to 10 nm. The gate insulating layer satisfies a relation where ?r/d is greater than or equal to 0.08 (nm?1) and less than or equal to 7.9 (nm?1) when the relative permittivity of a material used for the gate insulating layer is ?r and the thickness of the gate insulating layer is d. The distance between the source electrode and the drain electrode is greater than or equal to 10 nm and less than or equal to 1 ?m.

Abstract: A photodiode includes a first-type substrate. A second-type doped well and a second-type doped region are formed in the first-type substrate. An isolation region is formed to enclose the peripheral side of the second-type doped well, and separated from the second-type doped well. The second-type doped region is formed in the second-type doped well and extends from the surface of the second-type doped well. A protective layer covers the first-type substrate. A contact conductor including a contact layer and a conductive strip penetrates through the protective layer. The contact layer is formed on the bottom end of the conductive strip and in contact with the second-type doped region to make an electrical connection.

Abstract: A radiation conversion device such as a photovoltaic cell, a photodiode or a semiconductor radiation detection device, includes a semiconductor portion with first compensation zones of a first conductivity type and a base portion that separates the first compensation zones from each other. The first compensations zones are arranged in pillar structures. Each pillar structure includes spatially separated first compensation zones and extends in a vertical direction with respect to a main surface of the semiconductor portion. Between neighboring ones of the pillar structures the base portion includes second compensation zones of a second conductivity type, which is complementary to the first conductivity type. The radiation conversion device combines high radiation hardness with cost effective manufacturing.

Abstract: Solar cells and methods for their manufacture are disclosed. An example solar cell may comprise a substrate comprising a p-type base layer and an n-type selective emitter layer formed over the p-type base layer. The n-type selective emitter layer may comprise one or more first doped regions comprising implanted dopant and one or more second doped regions comprising diffused dopant. The one or more first doped regions may be more heavily doped than the one or more second doped regions. A p-n junction may be formed at the interface of the base layer and the selective emitter layer, such that the p-n junction and the selective emitter layer are both formed during a single anneal cycle.

Abstract: The present invention provides an ultra-violet light sensing device. The ultra-violet light sensing device includes a first conductivity type substrate, a second conductivity type region, and a first conductivity type high density region. The first conductivity type substrate includes a light incident surface. The second conductivity type region is disposed in the first conductivity type substrate and adjacent to the light incident surface. The first conductivity type high density region is disposed under the second conductivity type region. The present invention also provides another ultra-violet light sensing device, which further includes a first conductivity type high density shallow region which is sandwiched between the light incident surface and the second conductivity type region. Manufacturing methods for these ultra-violet light sensing devices are also disclosed in the present invention.

Abstract: A method is provided for forming a dopant profile based on a surface of a wafer-like semiconductor component with phosphorus as a dopant. The method includes the steps of applying a phosphorus dopant source onto the surface, forming a first dopant profile with the dopant source that is present on the surface, removing the dopant source, and forming a second dopant profile that has a greater depth in comparison to the first dopant profile. In order to form an optimized dopant profile, the dopant source is removed after forming the first dopant profile, and precipitates that are crystallized selectively on or in the surface from the precipitates SixPy and SixPyOz are removed.

Abstract: The present invention is directed toward a dual junction photodiode semiconductor devices with improved wavelength sensitivity. The photodiode employs a high quality n-type layer with relatively lower doping concentration and enables high minority carrier lifetime and high quantum efficiency with improved responsivity at multiple wavelengths. In one embodiment, the photodiode comprises a semiconductor substrate of a first conductivity type, a first impurity region of a second conductivity type formed epitaxially in the semiconductor substrate, a second impurity region of the first conductivity type shallowly formed in the epitaxially formed first impurity region, a first PN junction formed between the epitaxially formed first impurity region and the second impurity region, a second PN junction formed between the semiconductor substrate and the epitaxially formed first impurity region, and at least one passivated V-groove etched into the epitaxially formed first impurity region and the semiconductor substrate.

Abstract: A radiation conversion device such as a photovoltaic cell, a photodiode or a semiconductor radiation detection device, includes a semiconductor portion with first compensation zones of a first conductivity type and a base portion that separates the first compensation zones from each other. The first compensations zones are arranged in pillar structures. Each pillar structure includes spatially separated first compensation zones and extends in a vertical direction with respect to a main surface of the semiconductor portion. Between neighboring ones of the pillar structures the base portion includes second compensation zones of a second conductivity type, which is complementary to the first conductivity type. The radiation conversion device combines high radiation hardness with cost effective manufacturing.

Abstract: A semiconductor device includes: a P-type semiconductor substrate; a first P-type semiconductor layer formed on the P-type semiconductor substrate; a second P-type semiconductor layer formed on the first P-type semiconductor layer and having a lower P-type impurity concentration than the first P-type semiconductor layer; an N-type semiconductor layer, which will form a cathode region, formed on the second P-type semiconductor layer; a first P-type diffusion layer formed by diffusing a P-type impurity in a partial region of the second P-type semiconductor layer; a second P-type diffusion layer formed by diffusing a P-type impurity in the second P-type semiconductor layer so as to be present adjacently beneath the first P-type diffusion layer at a lower P-type impurity concentration than the first P-type diffusion layer; and a photodiode formed in such a manner that the N-type semiconductor layer and the first P-type diffusion layer are isolated from each other.

Abstract: Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.

Abstract: A photoelectric conversion portion, a charge holding portion, a transfer portion, and a sense node are formed in a P-type well. The charge holding portion is configured to include an N-type semiconductor region, which is a first semiconductor region holding charges in a portion different from the photoelectric conversion portion. A P-type semiconductor region having a higher concentration than the P-type well is disposed under the N-type semiconductor region.

Abstract: A solid-state image pickup device includes a photoelectric conversion portion, a charge holding portion configured to include a first-conductivity-type first semiconductor region, and a transfer portion configured to include a transfer gate electrode that controls a potential between the charge holding portion and a sense node. The charge holding portion includes a control electrode. A second-conductivity-type second semiconductor region is disposed on a surface of a semiconductor region between the control electrode and the transfer gate electrode. A first-conductivity-type third semiconductor region is disposed under the second semiconductor region. The third semiconductor region is disposed at a deeper position than the first semiconductor region.

Abstract: A semiconductor device includes: a P-type semiconductor substrate; a first P-type semiconductor layer formed on the P-type semiconductor substrate; a second P-type semiconductor layer formed on the first P-type semiconductor layer and having a lower P-type impurity concentration than the first P-type semiconductor layer; an N-type semiconductor layer, which will form a cathode region, formed on the second P-type semiconductor layer; a first P-type diffusion layer formed by diffusing a P-type impurity in a partial region of the second P-type semiconductor layer; a second P-type diffusion layer formed by diffusing a P-type impurity in the second P-type semiconductor layer so as to be present adjacently beneath the first P-type diffusion layer at a lower P-type impurity concentration than the first P-type diffusion layer; and a photodiode formed in such a manner that the N-type semiconductor layer and the first P-type diffusion layer are isolated from each other.

Abstract: A nitride-based semiconductor light-emitting element LE1 or LD1 has: a gallium nitride substrate 11 having a principal surface 11a which makes an angle ?, in the range 40° to 50° or in the range more than 90° to 130°, with the reference plane Sc perpendicular to the reference axis Cx extending in the c axis direction; an n-type gallium nitride-based semiconductor layer 13; a second gallium nitride-based semiconductor layer 17; and a light-emitting layer 15 including a plurality of well layers of InGaN and a plurality of barrier layers 23 of a GaN-based semiconductor, wherein the direction of piezoelectric polarization of the plurality of well layers 21 is the direction from the n-type gallium nitride-based semiconductor layer 13 toward the second gallium nitride-based semiconductor layer 17.

Abstract: Optically sensitive devices include a device comprising a first contact and a second contact, each having a work function, and an optically sensitive material between the first contact and the second contact. The optically sensitive material comprises a p-type semiconductor, and the optically sensitive material has a work function. Circuitry applies a bias voltage between the first contact and the second contact. The optically sensitive material has an electron lifetime that is greater than the electron transit time from the first contact to the second contact when the bias is applied between the first contact and the second contact. The first contact provides injection of electrons and blocking the extraction of holes. The interface between the first contact and the optically sensitive material provides a surface recombination velocity less than 1 cm/s.

Abstract: A photodetector is formed from a body of semiconductor material substantially surrounded by dielectric surfaces. A passivation process is applied to at least one surface to reduce the rate of carrier generation and recombination on that surface. Photocurrent is read out from at least one electrical contact, which is formed on a doped region whose surface lies entirely on a passivated surface. Unwanted leakage current from un-passivated surfaces is reduced through one of the following methods: (a) The un-passivated surface is separated from the photo-collecting contact by at least two junctions; (b) The un-passivated surface is doped to a very high level, at least equal to the conduction band or valence band density of states of the semiconductor; (c) An accumulation or inversion layer is formed on the un-passivated surface by the application of an electric field.

Abstract: The present disclosure relates to photodetectors with high efficiency of light detection, and may be used in a wide field of applications, which employ the detection of very weak and fast optical signals, such as industrial and medical tomography, life science, nuclear, particle, and/or astroparticle physics etc. A highly efficient CMOS-technology compatible Silicon Photoelectric Multiplier may comprise a substrate and a buried layer applied within the substrate. The multiplier may comprise cells with silicon strip-like quenching resistors, made by CMOS-technology, located on top of the substrate and under an insulating layer for respective cells, and separating elements may be disposed between the cells.

Abstract: Silicon wafer processing system, apparatus and method of doping silicon wafers with hot concentrated acid dopant compositions for forming p-n junction and back contact layers during processing into PV solar cells. Highly concentrated acid dopant is atomized with pressurized gas and heated in the range of 80-200° C., then introduced into a concentrated acid vapor processing chamber to apply vapor over 1.5-6 min to wafers moving horizontally on a multi-lane conveyor system through the processing chamber. The wafers are dried and forwarded to a diffusion furnace. An optional UV pre-treatment assembly pre-conditions the wafers with UV radiation prior to dopant application, and doped wafers may be post-treated in a UV treatment module before being fired. The wafers may be cooled in the processing chamber. Post-firing, the wafers exhibit excellent sheet resistance in the 60-95?/sq range, and are highly uniform across the wafers and wafer-to-wafer.

Abstract: A pickup device according to the present invention includes a photoelectric conversion portion, a charge holding portion configured to include a first semiconductor region, and a transfer portion configured to include a transfer gate electrode that controls a potential between the charge holding portion and a sense node. A second semiconductor region is disposed on a surface of a semiconductor region between the control electrode and the transfer gate electrode. A third semiconductor region is disposed below the second semiconductor region. An impurity concentration of the third semiconductor region is higher than the impurity concentration of the first semiconductor region.

Abstract: Methods are described for forming CIGS absorber layers in TFPV devices with graded compositions and graded band gaps. Methods are described for utilizing Ag to increase the band gap at the front surface of the absorber layer. Methods are described for utilizing Al to increase the band gap at the front surface of the absorber layer. Methods are described for utilizing at least one of Na, Mg, K, or Ca to increase the band gap at the front surface of the absorber layer.

Abstract: The present invention is directed to a position sensing detector made of a photodiode having a semi insulating substrate layer; a buffered layer that is formed directly atop the semi-insulating substrate layer, an absorption layer that is formed directly atop the buffered layer substrate layer, a cap layer that is formed directly atop the absorption layer, a plurality of cathode electrodes electrically coupled to the buffered layer or directly to the cap layer, and at least one anode electrode electrically coupled to a p-type region in the cap layer. The position sensing detector has a photo-response non-uniformity of less than 2% and a position detection error of less than 10 ?m across the active area.

Abstract: A method includes: forming a transfer gate on a semiconductor substrate; forming a first ion implantation region on a first side of the transfer gate; forming a second ion implantation region on the first side of the transfer gate such that the second ion implantation region encloses the first ion implantation region; forming a third ion implantation region along a surface of the semiconductor substrate; and forming a floating diffusion region at a second side of the transfer gate.

Abstract: An optical device includes a first region and an isolating layer which are each provided in a semiconductor substrate. The first region configures a photoelectric converter and includes at least an impurity of a first conductivity type. The isolating layer is configured to inhibit passage of electrons. The isolating layer includes a second region which is below the first region and which includes an impurity of a second conductivity type, a third region which surrounds the first region in plan-view thereof and which includes an impurity of the second conductivity type, and a fourth region which surrounds the second region in plan-view thereof and which is connected to the third region. The fourth region is greater in width than a connecting part of the third region which connects the third region to the fourth region.

Abstract: Pixels, imagers and related fabrication methods are described. The described methods result in cross-talk reduction in imagers and related devices by generating depletion regions. The devices can also be used with electronic circuits for imaging applications.

Abstract: A nitride-based semiconductor light-emitting element LE1 or LD1 has: a gallium nitride substrate 11 having a principal surface 11a which makes an angle ?, in the range 40° to 50° or in the range more than 90° to 130°, with the reference plane Sc perpendicular to the reference axis Cx extending in the c axis direction; an n-type gallium nitride-based semiconductor layer 13; a second gallium nitride-based semiconductor layer 17; and a light-emitting layer 15 including a plurality of well layers of InGaN and a plurality of barrier layers 23 of a GaN-based semiconductor, wherein the direction of piezoelectric polarization of the plurality of well layers 21 is the direction from the n-type gallium nitride-based semiconductor layer 13 toward the second gallium nitride-based semiconductor layer 17.

Abstract: A uni-travelling carrier photodiode includes an absorption region of p-type doped material. The photodiode further includes a first collector layer and second collector layer wherein the absorption region is located between the first collector layer and the second collector layer.

Abstract: Provided is an image sensor device. The image sensor device includes a substrate having a front side and a back side. The image sensor also includes a radiation-detection device that is formed in the substrate. The radiation-detection device is operable to detect a radiation wave that enters the substrate through the back side. The image sensor further includes a recrystallized silicon layer. The recrystalized silicon layer is formed on the back side of the substrate. The recrystalized silicon layer has different photoluminescence intensity than the substrate.

Abstract: The invention relates to a method for fabricating a semiconductor substrate by providing a silicon on insulator type substrate that includes a base, an insulating layer and a first semiconductor layer, doping the first semiconductor layer to thereby obtain a modified first semiconductor layer, and providing a second semiconductor layer with a different dopant concentration than the modified first semiconductor layer over or on the modified first semiconductor layer. With this method, an improved dopant concentration profile can be achieved through the various layers which makes the substrates in particular more suitable for various optoelectronic applications.

Abstract: The present invention, in a photoelectric conversion device in which a pixel including a photoelectric conversion device for converting a light into a signal charge and a peripheral circuit including a circuit for processing the signal charge outside a pixel region in which the pixel are disposed on the same substrate, comprising: a first semiconductor region of a first conductivity type for forming the photoelectric region, the first semiconductor region being formed in a second semiconductor region of a second conductivity type; and a third semiconductor region of the first conductivity type and a fourth semiconductor region of the second conductivity type for forming the peripheral circuit, the third and fourth semiconductor regions being formed in the second semiconductor region; wherein in that the impurity concentration of the first semiconductor region is higher than the impurity concentration of the third semiconductor region.

Abstract: Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.

Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.

Abstract: A system and method for reducing cross-talk between photosensitive diodes is provided. In an embodiment an isolation region comprising a first concentration of dopants is located between the photosensitive diodes. The photosensitive diodes have a second concentration of dopants that is less than the first concentration of dopants, which helps to prevent diffusion from the photosensitive diodes to form a potential path for undesired cross-talk between the photosensitive diodes.

Abstract: An image sensor includes a substrate formed of a material having a light absorption coefficient higher than that of silicon, and a photoelectric conversion element formed on the substrate for photoelectrically converting incident light.

Abstract: The present disclosure relates to photodetectors with high efficiency of light detection, and may be used in a wide field of applications, which employ the detection of very weak and fast optical signals, such as industrial and medical tomography, life science, nuclear, particle, and/or astroparticle physics etc. A highly efficient CMOS-technology compatible Silicon Photoelectric Multiplier may comprise a substrate and a buried layer applied within the substrate. The multiplier may comprise cells with silicon strip-like quenching resistors, made by CMOS-technology, located on top of the substrate and under an insulating layer for respective cells, and separating elements may be disposed between the cells.

Abstract: In a rear surface incidence type CMOS image sensor having a wiring layer 720 on a first surface (front surface) of an epitaxial substrate 710 in which a photodiode, a reading circuit (an n-type region 750 and an n+ type region 760) and the like are disposed, and a light receiving plane in a second surface (rear surface), the photodiode and a P-type well region 740 on the periphery of the photodiode are disposed in a layer structure that does not reach the rear surface (light receiving surface) of the substrate, and an electric field is formed within the substrate 710 to properly lead electrons entering from the rear surface (light receiving surface) of the substrate to the photodiode. The electric field is realized by providing a concentration gradient in a direction of depth of the epitaxial substrate 710. Alternatively, the electric field can be realized by providing a rear-surface electrode 810 or 840 for sending a current.

Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.

Abstract: A method for processing a thin-film absorber material with enhanced photovoltaic efficiency includes forming a barrier layer on a soda lime glass substrate followed by formation of a stack structure of precursor layers. The method further includes subjecting the soda-lime glass substrate with the stack structure to a thermal treatment process with at least H2Se gas species at a temperature above 400° C. to cause formation of an absorber material. By positioning the substrates close together, during the process sodium from an adjoining substrate in the furnace also is incorporated into the absorber layer.