Temperature Patents (Class 257/467)
  • Patent number: 8723287
    Abstract: An object of the present invention is to provide a thermal airflow sensor that prevents moisture absorption by a silicon oxide film formed closest to a surface (formed to be located on an uppermost portion), and that reduces a measuring error. In order to attain the foregoing object, the thermal airflow sensor according to the present invention applies an ion implantation to a silicon oxide film 4, formed closest to a surface (formed to be located on an uppermost portion), by using an atom or molecule selected from at least any one of silicon, oxygen, and an inert element such as argon or nitrogen, in order to increase a concentration of an atom contained in the silicon oxide film 4 more than that before the ion implantation.
    Type: Grant
    Filed: July 6, 2011
    Date of Patent: May 13, 2014
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Norio Ishitsuka, Rintaro Minamitani, Keiji Hanzawa
  • Publication number: 20140124890
    Abstract: According to an exemplary implementation, a semiconductor package includes a multi-phase power inverter having power switches and situated on a leadframe of the semiconductor package. The semiconductor package further includes a temperature sensor situated on the leadframe, where the temperature sensor is configured to generate a sensed temperature of the power switches. The semiconductor package also includes a driver circuit configured to drive the power switches of the multi-phase power inverter responsive to the sensed temperature. The temperature sensor can be on a common IC with the driver circuit. Furthermore, the semiconductor package can include an over-temperature protection circuit configured to provide over-temperature protection to the multi-phase power inverter using the sensed temperature.
    Type: Application
    Filed: January 10, 2014
    Publication date: May 8, 2014
    Applicant: International Rectifier Corporation
    Inventors: Dean Fernando, Roel Barbosa, Toshio Takahashi
  • Publication number: 20140119405
    Abstract: A die temperature measurement system (300) includes an external test environment setup (352) and an integrated circuit (302). The external test environment setup (352) includes means to force and accurately measure electrical variables. The integrated circuit (302) includes a bipolar transistor (325); a selectable switch (340) for selecting from plurality of integrated resistances (342, 344) to be coupled in series between a base (322) of the bipolar transistor and a first input (362); and a selectable-gain current mirror (310) with a gain, a programmable current-mirror output coupled to the collector (326) of the bipolar transistor. The bipolar transistor and optional diodes (335) are sequentially biased with a set of proportional collector current levels. For each bias condition, the temperature-dependent voltage produced by the structure is extracted and stored. Die temperature is obtained through algebraic manipulation (450) of this data. Parasitic resistance and I/O pad leakage effects are canceled.
    Type: Application
    Filed: October 30, 2012
    Publication date: May 1, 2014
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventor: Freescale Semiconductor, Inc.
  • Patent number: 8710615
    Abstract: According to an embodiment, a semiconductor device includes a semiconductor substrate and an amorphous semi-insulating layer on the semiconductor substrate.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: April 29, 2014
    Assignee: Infineon Technologies AG
    Inventor: Gerhard Schmidt
  • Patent number: 8704327
    Abstract: An integrated circuit, comprising a capacitive device having a thermally variable capacitive value and comprising a thermally deformable assembly disposed within an enclosure, and comprising an electrically-conducting fixed body and a beam held at least two different locations by at least two arms rigidly attached to edges of the enclosure, the beam and the arms being metal and disposed within the first metallization level. A part of the said thermally deformable assembly may form a first electrode of the capacitive device and a part of the said fixed body may form a second electrode of the capacitive device. The thermally deformable assembly has a plurality of configurations corresponding respectively to various temperatures of the said assembly and resulting in a plurality of distances separating the two electrodes and various capacitive values in the capacitive device corresponding to the plurality of distances.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: April 22, 2014
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Christian Rivero, Pascal Fornara, Antonio di-Giacomo
  • Patent number: 8696199
    Abstract: A temperature sensor circuit and system providing accurate digital temperature readings using a local or remote temperature diode. In one set of embodiments a change in diode junction voltage (?VBE) proportional to the temperature of the diode is captured and provided to an analog to digital converter (ADC), which may perform required signal conditioning functions on ?VBE, and provide a digital output corresponding to the temperature of the diode. DC components of errors in the measured temperature that may result from EMI noise modulating the junction voltage (VBE) may be minimized through the use of a front-end sample-and-hold circuit coupled between the diode and the ADC, in combination with a shunt capacitor coupled across the diode junction. The sample-and-hold-circuit may sample VBE at a frequency that provides sufficient settling time for each VBE sample, and provide corresponding stable ?VBE samples to the ADC at the ADC operating frequency.
    Type: Grant
    Filed: September 16, 2008
    Date of Patent: April 15, 2014
    Assignee: Standard Microsystems Corporation
    Inventors: Robert St. Pierre, Scott C. McLeod
  • Patent number: 8692247
    Abstract: An integrated circuit comprising a mechanical device for electrical switching comprising a first assembly being thermally deformable and having a beam held at at least two different locations by at least two arms, the beam and the arms being metal and disposed within the same metallization level, and further comprising at least one electrically conducting body. The first assembly has a first configuration at a first temperature and a second configuration at a second temperature different from the first temperature. The beam is out of contact with the electrically conducting body in one configuration in contact with the body in the other configuration. The beam establishes or breaks an electrical link passing through the said at least one electrically conducting body and through the said beam in the different configurations.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: April 8, 2014
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Pascal Fornara, Christian Rivero, Antonio di-Giacomo
  • Patent number: 8692348
    Abstract: An infrared detector 1 having a bolometer element 11 and a reference element 21 is provided with a bolometer thin film 22 supported on a surface of a substrate 10while spaced apart from the surface of the substrate 10, a metal film 23 for heat dissipation formed on a surface of the bolometer thin film 22 via an insulating film 31, wherein the surface of the bolometer thin film 22 faces the substrate 10, and a plurality of metal columns 25 connected thermally with the metal film 23 for heat dissipation and the substrate 10. Since heat generated from a photodetecting portion 22aby infrared rays is efficiently dissipated to the substrate 10 via the insulating film 31, the metal film 23 for heat dissipation, the metal columns 25, and a metal film 24 for heat dissipation on the side of the substrate, only temperature variation caused by variation in use environment can be measured accurately, and downsizing can be achieved while reducing the influence of temperature variation in use environment.
    Type: Grant
    Filed: March 16, 2009
    Date of Patent: April 8, 2014
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Jun Suzuki, Fumikazu Ojima, Ryusuke Kitaura
  • Patent number: 8692349
    Abstract: An example embodiment relates to a semiconductor device including a semiconductor package in which a semiconductor chip is mounted on the package substrate. The semiconductor package may include a temperature measurement device and a temperature control circuit. The temperature measurement device may measure a temperature of the semiconductor package. The temperature control circuit may change an operation speed of the semiconductor package on the basis of the temperature of the semiconductor package measured by the temperature measurement device.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: April 8, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae Choon Kim, Eunseok Cho, Mi-Na Choi, Kyoungsei Choi, Heejung Hwang, Seran Bae
  • Publication number: 20140091423
    Abstract: A thermal diode for a photosensor of a thermal imaging camera includes a semiconductor substrate having a surface and two doped structures set apart from each other on the surface. Furthermore, a device is provided for influencing a current between the first and the second structure, in order to reduce a current density in an area near to the surface and to increase it in an area far from the surface. In addition, a topology having an even absorption layer is proposed. The measures proposed have the aim of realizing a low-noise diode for thermal applications.
    Type: Application
    Filed: September 19, 2013
    Publication date: April 3, 2014
    Applicant: Robert Bosch GmbH
    Inventors: Volkmar SENZ, Michael Krueger
  • Publication number: 20140092939
    Abstract: Some embodiments of the present disclosure relate to a stacked integrated chip structure having a thermal sensor that detects a temperature of one or a plurality of integrated chips. In some embodiments, the stacked integrated chip structure has a main integrated chip and a secondary integrated chip located on an interposer wafer. The main integrated chip has a reference voltage source that generates a bias current. The secondary integrated chip has a second thermal diode that receives the bias current and based thereupon generates a second thermal sensed voltage and a second reference voltage that is proportional to a temperature of the secondary integrated chip. A digital thermal sensor within the main integrated chip determines a temperature of the secondary integrated chip based upon as comparison of the second thermal sensed voltage and the reference voltage.
    Type: Application
    Filed: October 1, 2012
    Publication date: April 3, 2014
    Inventors: Ching-Ho Chang, Jui-Cheng Huang, Yung-Chow Peng
  • Publication number: 20140091422
    Abstract: A device and a method of forming the same are disclosed. The device comprises a substrate and a thin film. The substrate is characterized by a first coefficient of thermal expansion. The thin film is attached to a surface of the substrate, and is characterized by a second coefficient of thermal expansion. The thin film includes first and second layers in states of compression, and a third layer in a state of tension, the third layer being positioned between the first and second layers. The thin film is in a net state of tension within a temperature range.
    Type: Application
    Filed: September 28, 2012
    Publication date: April 3, 2014
    Applicant: Agilent Technologies, Inc.
    Inventor: Phillip W. Barth
  • Patent number: 8686277
    Abstract: A method for fabricating a microelectronic assembly including a built-in TEC, a microelectronic assembly including a built-in TEC, and a system including the microelectronic assembly. The method includes providing a microelectronic device, and fabricating the TEC directly onto the microelectronic device such that there is no mounting material between the TEC and the microelectronic device.
    Type: Grant
    Filed: December 27, 2004
    Date of Patent: April 1, 2014
    Assignee: Intel Corporation
    Inventors: Mohammad M. Farahani, Gregory Chrysler, Kris Frutschy
  • Publication number: 20140070355
    Abstract: An electronic device may include a temperature sensing semiconductor substrate, that may include a thermal sensor at an upper surface thereof, and a cooling semiconductor substrate having an upper surface coupled to a lower surface of the temperature sensing semiconductor substrate. The cooling semiconductor substrate may include a Peltier cooler. At least one of the temperature sensing semiconductor substrate and the cooling semiconductor substrate may have a cavity therein beneath the thermopile and aligned therewith.
    Type: Application
    Filed: September 13, 2012
    Publication date: March 13, 2014
    Applicant: STMicroelectronics Asia Pacific PTE LTD (Singapore)
    Inventor: PraveenKumar Radhakrishnan
  • Patent number: 8669635
    Abstract: An electrically conductive composite material that includes an electrically conductive polymer, and at least one metal nanoparticle coated with a protective agent, wherein said protective agent includes a compound having a first part that has at least part of the molecular backbone of said electrically conductive polymer and a second part that interacts with said at least one metal nanoparticle.
    Type: Grant
    Filed: July 22, 2013
    Date of Patent: March 11, 2014
    Assignee: 3M Innovative Properties Company
    Inventors: Yuji Hiroshige, Hideki Minami, Norihisa Watanabe, Jun Fujita
  • Publication number: 20140061845
    Abstract: In one embodiment, a MEMS sensor includes a mirror and an absorber spaced apart from the mirror, the absorber including a plurality of spaced apart conductive legs defining a tortuous path across an area directly above the mirror.
    Type: Application
    Filed: August 26, 2013
    Publication date: March 6, 2014
    Applicant: Robert Bosch GmbH
    Inventors: Fabian Purkl, Gary Yama, Ando Feyh
  • Publication number: 20140036953
    Abstract: Disclosed are a temperature sensor device using a thermopile, the total number n of thermocouples thereon can be increased without greatly increasing the internal resistance of the thermopile r, providing high output level and high S/N ratio, a highly sensitive radiation thermometer using the device, and production method of the device using organic material for thin films to form the thermopile. These provide a standardized inexpensive multi-layered thin film thermopile, a radiation thermometer with high sensitivity, and production method of these devices. The temperature sensor device is a device wherein a thermopile which is formed on a thin film thermally isolated from a substrate is place in a temperature sensing part, and the thin film is formed as a multi-layered thin film, a layered thermopile is formed on each layered thin film, the substrate functioning as a heat sink which is one junction of the reference temperature of the thermopile.
    Type: Application
    Filed: April 26, 2011
    Publication date: February 6, 2014
    Applicants: HME CO., LTD.
    Inventors: Mitsuteru Kimura, Nobuo Tanaka, Hironori Shimobayashi
  • Patent number: 8637981
    Abstract: According to an exemplary embodiment, a dual compartment semiconductor package includes a conductive clip having first and second compartments. The first compartment is electrically and mechanically connected to a top surface of the first die. The second compartment electrically and mechanically connected to a top surface of a second die. The dual compartment semiconductor package also includes a groove formed between the first and second compartments, the groove preventing contact between the first and second dies. The dual compartment package electrically connects the top surface of the first die to the top surface of the second die. The first die can include an insulated-gate bipolar transistor (IGBT) and the second die can include a diode. A temperature sensor can be situated adjacent to, over, or within the groove for measuring a temperature of the dual compartment semiconductor package.
    Type: Grant
    Filed: March 30, 2011
    Date of Patent: January 28, 2014
    Assignee: International Rectifier Corporation
    Inventor: Henning M. Hauenstein
  • Publication number: 20140021576
    Abstract: A miniature thermoelectric energy harvester and a fabrication method thereof Annular grooves are fabricated on a low-resistivity silicon substrate to define silicon thermoelectric columns, an insulating layer is fabricated on the annular grooves, a thermoelectric material is filled in the annular grooves to form annular thermoelectric columns, and then metal wirings, passivation layers and supporting substrates are fabricated, thereby completing the fabrication process. The silicon thermoelectric column using a silicon base material simplifies the fabrication process. The fabrication of the thermocouple structure is one thin-film deposition process, which simplifies the process. The use of silicon as a component of the thermocouple has a high Seebeck coefficient. The use of vertical thermocouples improves the stability. Since the thermocouple structure is bonded to the upper supporting substrate and lower supporting substrate by wafer-level bonding, the fabrication efficiency is improved.
    Type: Application
    Filed: April 6, 2012
    Publication date: January 23, 2014
    Applicant: SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY, CHINESE ACADAMY
    Inventors: Dehui Xu, Bin Xiong, Yuelin Wang
  • Publication number: 20140015088
    Abstract: A three-dimensional integrated structure is formed from a first integrated circuit with a first cavity filled with a first conductive material and a second integrated circuit with a second cavity filled with a second conductive material, the second cavity facing the first cavity. The filled first cavity forms a first element and the filled second cavity forms a second element, the first and second elements separated from each other by a cavity. The first and second conductive materials have different thermal expansion coefficients. A contact detection circuit is electrically connected to the filled first and second cavities, and is operable to sense electrical contact between the first and second conductive materials in response to a change in temperature.
    Type: Application
    Filed: July 3, 2013
    Publication date: January 16, 2014
    Inventor: Laurent-Luc Chapelon
  • Publication number: 20140015089
    Abstract: The sensor is made on a semiconductor substrate covered with an electrically insulating layer. The electrically insulating layer separates a thermocouple from the substrate. It includes a first portion presenting a first value of capacitance per unit area and a second portion presenting a second value of capacitance per unit area, which is lower than the first value. The sensor includes first and second output terminals connected to the thermocouple. The first output terminal includes a first capacitor having a first electrode formed by a first leg made of an electrically conducting material. The second electrode of the capacitor is formed by a part of the substrate facing said first leg and separated from the first electrode by the first portion of the electrically insulating layer. The first leg connects the thermocouple while overlapping the second portion of the electrically insulating layer.
    Type: Application
    Filed: March 15, 2012
    Publication date: January 16, 2014
    Applicants: ST-ERICSSON SA, COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Guillaume Savelli, Denis Cottin
  • Patent number: 8618603
    Abstract: A nonvolatile semiconductor memory device includes: a semiconductor member; a memory film provided on a surface of the semiconductor member and being capable of storing charge; and a plurality of control gate electrodes provided on the memory film, spaced from each other, and arranged along a direction parallel to the surface. Average dielectric constant of a material interposed between one of the control gate electrodes and a portion of the semiconductor member located immediately below the control gate electrode adjacent to the one control gate electrode is lower than average dielectric constant of a material interposed between the one control gate electrode and a portion of the semiconductor member located immediately below the one control gate electrode.
    Type: Grant
    Filed: July 11, 2012
    Date of Patent: December 31, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshio Ozawa, Fumiki Aiso
  • Publication number: 20130334646
    Abstract: A thermal sensor for use in an IC device is formed of a plurality of metal resistor units connected in series where each of the plurality of metal resistor units are formed on different wiring layers of the IC device connected by via segments and the metal resistor units are in a superimposed alignment with each other forming a stack.
    Type: Application
    Filed: June 18, 2012
    Publication date: December 19, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Chung-Hui CHEN
  • Publication number: 20130328153
    Abstract: An electronic-component mounting structure includes an electronic component which includes a metal substrate, a semiconductor ceramic layer located on the metal substrate, a pair of split electrodes located on the semiconductor ceramic layer, and plating films located on the split electrodes and the metal substrate, and a mounting body on which lands to be connected to the respective split electrodes of the electronic component are provided. The position of a peripheral end portion of each land to be connected to the corresponding split electrode is located farther inside than the position of a peripheral end portion of the split electrode. In addition, a plane area of the land is smaller than that of the split electrode.
    Type: Application
    Filed: August 14, 2013
    Publication date: December 12, 2013
    Applicant: Murata Manufacturing Co., Ltd.
    Inventor: Tadamasa MIURA
  • Publication number: 20130328154
    Abstract: A thermistor includes a metal substrate, a semiconductor ceramic layer on the metal substrate, and a pair of split electrodes on the semiconductor layer. The semiconductor ceramic layer is formed by a solid-phase method. The metal substrate includes ceramic particles and is not interrupted in the direction of thickness by the ceramic particles or a pillar defined by a chain of the ceramic particles. Preferably, the metal substrate and the ceramic layer of the thermistor have a thickness of about 10 ?m to about 80 ?m and about 1 ?m to about 10 ?m, respectively.
    Type: Application
    Filed: August 14, 2013
    Publication date: December 12, 2013
    Applicant: Murata Manufacturing Co., Ltd
    Inventor: Tadamasa MIURA
  • Patent number: 8604867
    Abstract: An energy harvesting integrated circuit (IC) includes electrical connectors, each having a portion of a first material and a portion of a second material. The first and the second materials have a thermoelectric potential. The IC includes a trace of the first material coupled to the first material of each electrical connector, and a trace of the second material coupled to the second material of each electrical connector and the first trace. A portion of the second trace extends away from a portion of the first trace. The IC has charge storing elements coupled to the first and/or second traces. The first material and the second material are heated to create an electron flow from a thermal gradient between a first zone of the heated first and second materials and a second zone of the first and the second materials away from the first zone.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: December 10, 2013
    Assignee: QUALCOMM Incorporated
    Inventor: Henry L. Sanchez
  • Publication number: 20130320480
    Abstract: A semiconductor device comprises an integrated circuit (IC) die having a top side and a back side. The circuit substrate includes a heat source circuit, a heat sensitive circuit, a package substrate coupled to the top side of the circuit substrate, and a plurality of thermally conductive through-silicon vias (TSVs) formed from the back side of the circuit substrate to near but not through the top side of the circuit substrate.
    Type: Application
    Filed: May 31, 2012
    Publication date: December 5, 2013
    Inventors: Michael B. Mcshane, Kevin J. Hess, Perry H. Pelley, Tab A. Stephens
  • Publication number: 20130320481
    Abstract: A method of manufacturing a thermal sensor array comprises: (a) providing a first wafer comprising an integrated circuit; (b) providing a second wafer comprising a carrier substrate, a thermally sensitive layer, a first electrode and a second electrode; (c) applying a polymer to a bonding surface of at least one of the first wafer and the second wafer; (d) contacting the first wafer and the second wafer for a period of time and at a temperature and pressure sufficient to create a bond; (e) removing the carrier substrate; and (f) patterning and etching the thermally sensitive layer, the first electrode and the second electrode to create an array of pixels, wherein the first wafer and the second wafer are bonded without the need for fine alignment of the wafers.
    Type: Application
    Filed: May 22, 2013
    Publication date: December 5, 2013
    Applicant: Bridge Semiconductor Corporation
    Inventors: Howard Beratan, S.S.N. Bharadwaja, Robert J. Morris,, Jr.
  • Publication number: 20130313674
    Abstract: To provide a thermal electromagnetic wave detection element, a method for producing a thermal electromagnetic wave detection element, a thermal electromagnetic wave detection device, and an electrical apparatus, which are highly reliable and make it possible to prevent damage or deformation in the vicinity of the corner parts of a void, a thermal electromagnetic wave detection element includes: a semiconductor substrate; a support member provided on the semiconductor substrate; a detection unit that is provided on the support member and is able to extract from a pair of electrodes an electrical signal corresponding to a received amount of electromagnetic waves; and a pair of electrically conductive vias that perforate through the semiconductor substrate and are electrically connected to the pair of electrodes, a void that opens on the support member side being provided between the pair of vias of the semiconductor substrate.
    Type: Application
    Filed: May 24, 2013
    Publication date: November 28, 2013
    Inventor: Takafumi NODA
  • Publication number: 20130313675
    Abstract: Provided is a compact thermal type flowmeter that can perform a partial thermal treatment on a sensor element portion without affecting other elements and can improve the reliability of a sensor element while improving the sensitivity of the sensor element. A thermal type flowmeter includes a hollow portion which is formed in a semiconductor substrate, a thin film portion which is formed by insulating films provided to cover the hollow portion and, a heating resistor body and a temperature-measuring resistor body which are formed between the insulating films. In a method for manufacturing the thermal type flowmeter, a thermal treatment is performed to grow a crystal grain size of the heating resistor body and a crystal grain size of the temperature-measuring resistor body by heating the thin film portion after forming the thin film portion.
    Type: Application
    Filed: March 2, 2011
    Publication date: November 28, 2013
    Applicant: HITACHI Automotive Systems ,Ltd.
    Inventors: Hiroshi Nakano, Masahiro Matsumoto, Satoshi Asano, Keiji Hanzawa
  • Patent number: 8592937
    Abstract: A pyroelectric detector includes a substrate, a support member and a pyroelectric detection element, which includes a capacitor, first and second reducing gas barrier layers, an insulating layer, a plug and a second electrode wiring layer. The first reducing gas barrier layer covers at least a second electrode and a pyroelectric body of the capacitor, and has a first opening that overlaps the second electrode in plan view. The insulating layer covers at least the first reducing gas barrier layer, and has a second opening that overlaps the first opening in plan view. The plug is disposed in the first and second openings and connected to the second electrode. The second electrode wiring layer is formed on the insulating layer and connected to the plug. The second reducing gas barrier layer is formed on the insulating layer and the second electrode wiring layer and covers at least the plug.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: November 26, 2013
    Assignee: Seiko Epson Corporation
    Inventor: Takafumi Noda
  • Patent number: 8587083
    Abstract: A sensor for detecting intensity of radiation such as of infrared radiation includes an ROIC substrate (9) and a resistance element (1) arranged at a distance of the surface of the ROIC substrate. The resistance element comprises one more semiconducting layers such as a silicon semiconducting layer and a semiconducting layer of a silicon-germanium alloy forming a heterojunction. The semiconducting layer or layers can be doped with one or more impurity dopants, the doping level or levels selected so that the layer retains the basic crystallographic properties of the respective material such as those of monosilicon or a monocrystalline silicon-germanium alloy. The impurity dopants are selected from the elements in groups IE, IV, and V, in particular among boron, aluminium, indium, arsenic, phosphorous, antimony, germanium, carbon and tin. The doping can be abrupt so that there is an interior layer inside said semiconducting layer or layers having a significantly higher doping level.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: November 19, 2013
    Inventor: Gunnar Malm
  • Patent number: 8587224
    Abstract: Provided are a variable field effect transistor (FET) designed to suppress a reduction of current between a source and a drain due to heat while decreasing a temperature of the FET, and an electrical and electronic apparatus including the variable gate FET. The variable gate FET includes a FET and a gate control device that is attached to a surface or a heat-generating portion of the FET and is connected to a gate terminal of the FET so as to vary a voltage of the gate terminal. A channel current between the source and drain is controlled by the gate control device that varies the voltage of the gate terminal when the temperature of the FET increases above a predetermined temperature.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: November 19, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hyun-Tak Kim, Bongjun Kim
  • Publication number: 20130292789
    Abstract: A thermal absorption structure of a radiation thermal detector element may include an optically transitioning material configured such that optical conductivity of the thermal absorption structure is temperature sensitive and such that the detector element absorbs radiation less efficiently as its temperature increases, thus reducing its ultimate maximum temperature.
    Type: Application
    Filed: June 28, 2013
    Publication date: November 7, 2013
    Inventor: Howard Beratan
  • Publication number: 20130287062
    Abstract: A moisture sensor arrangement including a plate-like semiconductor substrate and an integrated signal processing component disposed on a first side of the semiconductor substrate. The moisture sensor arrangement including a capacitive moisture sensor connected electrically conductively to the integrated signal processing component, wherein the capacitive moisture sensor is disposed on either the first side or a second side of the semiconductor substrate that is opposite the first side of the semiconductor substrate. In addition, the plate-like semiconductor substrate includes 1) plated through-holes, by way of which elements on the first side and the second side of the semiconductor substrate are electrically connectable to one another; and 2) a temperature sensor integrated with the integrated signal processing component.
    Type: Application
    Filed: April 23, 2013
    Publication date: October 31, 2013
    Applicant: E+E Elektronik Ges.m.b.H
    Inventors: Elmar Mayer, Georg Niessner, Joachim Runck
  • Patent number: 8569808
    Abstract: A semiconductor device with temperature control system. Embodiments of the device may include a MEMS chip including a first heater with a dedicated first temperature control loop and a CMOS chip including a second heater with a dedicated second temperature control loop. Each control loop may have a dedicated temperature sensor for controlling the thermal output of each heater. The first heater and sensor are disposed proximate to a MEMS device in the MEMS chip for direct heating thereof. The temperature of the MEMS chip and CMOS chip are independently controllable of each other via the temperature control loops.
    Type: Grant
    Filed: April 6, 2012
    Date of Patent: October 29, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tung-Tsun Chen, Chia-Hua Chu, Chung-Hsien Lin, Jui-Cheng Huang
  • Patent number: 8563903
    Abstract: Provided are a method and circuit for controlling heat generation of a power transistor, in which the power transistor can be protected by preventing heat generation of the power transistor by using a metal-insulator transition (MIT) device that can function as a fuse and can be semi-permanently used.
    Type: Grant
    Filed: November 11, 2008
    Date of Patent: October 22, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hyun-Tak Kim, Yong-Wook Lee, Bong-Jun Kim, Sun-Jin Yun
  • Patent number: 8563844
    Abstract: Embodiments of a thin-film heterostructure thermoelectric material and methods of fabrication thereof are disclosed. In general, the thermoelectric material is formed in a Group IIa and IV-VI materials system. The thermoelectric material includes an epitaxial heterostructure and exhibits high heat pumping and figure-of-merit performance in terms of Seebeck coefficient, electrical conductivity, and thermal conductivity over broad temperature ranges through appropriate engineering and judicious optimization of the epitaxial heterostructure.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: October 22, 2013
    Assignees: Phononic Devices, Inc., Board of Regents of the University of Oklahoma
    Inventors: Allen L. Gray, Robert Joseph Therrien, Patrick John McCann
  • Patent number: 8564103
    Abstract: In order to protect IMD layers, particularly low-k dielectrics, a protection film is formed on the sidewall of an opening in the IMD layers prior to etching a trench in the underlying silicon substrate. After etching the trench, such as through a TMAH wet etch, at least part of the protection film can be removed. The protection film can be removed in an anisotropic etch process such that a portion of the protection film remains as a sidewall spacer on the sidewall of the opening within the IMD layers.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: October 22, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Bin-Yuan Hung, Sung-Hui Huang, Wen Ting Tsai, Dian-Hau Chen, Ching Wei Hsieh
  • Patent number: 8564129
    Abstract: Embodiments of a low resistivity contact to a semiconductor structure are disclosed. In one embodiment, a semiconductor structure includes a semiconductor layer, a semiconductor contact layer having a low bandgap on a surface of the semiconductor layer, and an electrode on a surface of the semiconductor contact layer opposite the semiconductor layer. The bandgap of the semiconductor contact layer is in a range of and including 0 to 0.2 electron-volts (eV), more preferably in a range of and including 0 to 0.1 eV, even more preferably in a range of and including 0 to 0.05 eV. Preferably, the semiconductor layer is p-type. In one particular embodiment, the semiconductor contact layer and the electrode form an ohmic contact to the p-type semiconductor layer and, as a result of the low bandgap of the semiconductor contact layer, the ohmic contact has a resistivity that is less than 1×10?6 ohms·cm2.
    Type: Grant
    Filed: August 3, 2012
    Date of Patent: October 22, 2013
    Assignee: Phononic Devices, Inc.
    Inventors: Robert Joseph Therrien, Jason D. Reed, Jaime A. Rumsey, Allen L. Gray
  • Patent number: 8564096
    Abstract: Methods and apparatus according to various aspects of the present invention may operate in conjunction with a resistor formed of a lightly-doped P-type region formed in a portion of a lightly-doped N-type semiconductor well extending on a lightly-doped P-type semiconductor substrate, the well being laterally delimited by a P-type wall extending down to the substrate, the portion of the well being delimited, vertically, by a heavily-doped N-type area at the limit between the well and the substrate and, horizontally, by a heavily-doped N-type wall. A diode may be placed between a terminal of the resistor and the heavily-doped N-type wall, the cathode of the diode being connected to said terminal.
    Type: Grant
    Filed: July 4, 2008
    Date of Patent: October 22, 2013
    Assignee: STMicroelectronics SA
    Inventors: Serge Pontarollo, Dominique Berger
  • Publication number: 20130264610
    Abstract: A semiconductor device with temperature control system. Embodiments of the device may include a MEMS chip including a first heater with a dedicated first temperature control loop and a CMOS chip including a second heater with a dedicated second temperature control loop. Each control loop may have a dedicated temperature sensor for controlling the thermal output of each heater. The first heater and sensor are disposed proximate to a MEMS device in the MEMS chip for direct heating thereof. The temperature of the MEMS chip and CMOS chip are independently controllable of each other via the temperature control loops.
    Type: Application
    Filed: April 6, 2012
    Publication date: October 10, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tung-Tsun CHEN, Chia-Hua CHU, Chung-Hsien LIN, Jui-Cheng HUANG
  • Publication number: 20130256825
    Abstract: An integrated circuit and a method of making the same. The integrated circuit includes a semiconductor substrate having a major surface. The integrated circuit also includes a thermal conductivity based gas sensor having an electrically resistive sensor element located on the major surface for exposure to a gas to be sensed. The integrated circuit further includes a barrier located on the major surface for inhibiting a flow of the gas across the sensor element.
    Type: Application
    Filed: March 28, 2013
    Publication date: October 3, 2013
    Applicant: NXP B.V.
    Inventors: Aurelie HUMBERT, Roel DAAMEN, Viet Hoang NGUYEN
  • Patent number: 8546904
    Abstract: To provide an integrated circuit with functionality under environment with temperature lower than a working condition, the integrated circuit is designed to include a heating element incorporated with signal pins on a carrier, such as a lead frame, that supports a chip die and controlled by a heating control unit to increase temperature of the chip die. The heating control unit provides voltage for the heating element when a detecting unit detects that the temperature of the chip die falls below a predetermined temperature and a power control unit provide operation power for the chip die when the temperature of the chip die detected by the detecting unit reaches or falls above the predetermined temperature.
    Type: Grant
    Filed: July 11, 2011
    Date of Patent: October 1, 2013
    Assignee: Transcend Information, Inc.
    Inventors: Hsieh-Chun Chen, Tsang-Yi Chen
  • Patent number: 8546903
    Abstract: There has been very little (if any) attention to address contamination diffusion within an integrated circuit (IC) because there are very few applications where a protective overcoat will be penetrated as part of the manufacturing process. Here, a sealing ring is provided that address this problem. Preferably, the sealing ring uses the combination of electrically conductive barrier rings and the tortuous migration path to allow an electronic device (i.e., thermopile), where a protective overcoat is penetrated during manufacture, to communicate with external devices while being isolated to prevent contamination.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: October 1, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Walter Meinel, Kalin V. Lazarov
  • Publication number: 20130234270
    Abstract: In one embodiment, a method of forming a semiconductor device includes providing a substrate, forming a sacrificial layer above the substrate layer, forming a first trench in the sacrificial layer, forming a first sidewall layer with a thickness of less than about 50 nm on a first sidewall of the first trench using atomic layer deposition (ALD), and removing the sacrificial layer.
    Type: Application
    Filed: March 8, 2012
    Publication date: September 12, 2013
    Applicant: ROBERT BOSCH GMBH
    Inventors: Gary Yama, Fabian Purkl, Matthieu Liger, Matthias Illing
  • Publication number: 20130228890
    Abstract: Method of manufacturing sinterable electrical components for jointly sintering with active components, the components in planar shape being provided with at least one planar lower face meant for sintering, and an electrical contact area on the face opposite to the sintering face being available in the form of a metallic contact face, whose upper side is contactable by means of a commonly known method of the group: wire bonding or soldering or sintering or pressure contacting, the component being a temperature sensor, whose lower face is provided with a sinterable metallisation on a ceramic body, said ceramic body having two electrical contact faces for continued electrical connection.
    Type: Application
    Filed: October 28, 2011
    Publication date: September 5, 2013
    Inventor: Ronald Eisele
  • Publication number: 20130221475
    Abstract: Provided is a resistive element which has excellent inrush current resistance, and can suppress heat generation in a steady state. The resistive element has an element main body of a semiconductor ceramic in which the main constituent has a structure of R11-xR2xBaMn2O6 in which 0.05?x?1.0 when R1 is Nd and R2 is at least one of Sm, Eu and Gd; 0.05?x?0.8 when R1 is Nd and R2 is at least one of Tb, Dy, Ho, Er, and Y; 0?x?0.4 when R1 is at least one of Sm, Eu, and Gd and R2 is at least one of Tb, Dy, Ho, and Y; and 0?x?1.0 when R1 is at least one of Sm, Eu, and Gd and R2 is at least one of Sm, Eu, and Gd, but the Sm, Eu, and/or Gd in R1 is different from that in R2.
    Type: Application
    Filed: April 4, 2013
    Publication date: August 29, 2013
    Applicant: Murata Manufacturin Co., Ltd.
    Inventor: Murata Manufacturing Co., Ltd.
  • Patent number: 8519505
    Abstract: An electrically conductive composite material that includes an electrically conductive polymer, and at least one metal nanoparticle coated with a protective agent, wherein said protective agent includes a compound having a first part that has at least part of the molecular backbone of said electrically conductive polymer and a second part that interacts with said at least one metal nanoparticle.
    Type: Grant
    Filed: October 19, 2009
    Date of Patent: August 27, 2013
    Assignee: 3M Innovative Properties Company
    Inventors: Yuji Hiroshige, Hidekl Minami, Norihisa Watanabe, Jun Fujita
  • Patent number: 8513042
    Abstract: A method of forming an electromechanical transducer device comprises forming on a fixed structure a movable structure and an actuating structure of the electromechanical transducer device, wherein the movable structure is arranged in operation of the electromechanical transducer device to be movable in relation to the fixed structure in response to actuation of the actuating structure. The method further comprises providing a stress trimming layer on at least part of the movable structure, after providing the stress trimming layer, releasing the movable structure from the fixed structure to provide a released electromechanical transducer device, and after releasing the movable structure changing stress in the stress trimming layer of the released electromechanical transducer device such that the movable structure is deflected a predetermined amount relative to the fixed structure when the electromechanical transducer device is in an off state.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: August 20, 2013
    Assignees: Freescale Semiconductor, Inc., Commissariat à l'Energie Atomique et aux Energies Alternatives (CEA)
    Inventors: Francois Perruchot, Lianjun Liu, Sergio Pacheco, Emmanuel Defay, Patrice Rey