Abstract: A microelectronic assembly in which a semiconductor device structure is directionally positioned on an off-axis substrate. In an illustrative implementation, a laser diode is oriented on a GaN substrate wherein the GaN substrate includes a GaN (0001) surface off-cut from the <0001> direction predominantly towards either the <11 20> or the <1 100> family of directions. For a <11 20> off-cut substrate, a laser diode cavity may be oriented along the <1 100> direction parallel to lattice surface steps of the substrate in order to have a cleaved laser facet that is orthogonal to the surface lattice steps. For a <1 100> off-cut substrate, the laser diode cavity may be oriented along the <1 100> direction orthogonal to lattice surface steps of the substrate in order to provide a cleaved laser facet that is aligned with the surface lattice steps.

Abstract: The disclosure relates to a method for growing an element III nitride, wherein the growth is carried out on a substrate made of a material capable of maintaining the same crystalline structure from the element III nitride growth temperature to room temperature, the substrate being an M-V—O4 alloy, where M denotes a transition metal or a Group III element, and where V denotes N, P, S, or Sb, or an (Si-IV)O2 alloy, where IV denotes a Group IV element other than silicon. The disclosure also relates to the structures and components obtained after the implementation of the method.

Abstract: A Group-III nitride semiconductor substrate having a flat surface with a dangling bond density of higher than 14.0 nm?2 is produced by cleaning the surface having a dangling bond density of higher than 14.0 nm?2 with a cleaning agent containing an ammonium salt.

Abstract: The present invention is a nitride semiconductor device including an n-type gallium nitride single crystal substrate, an epitaxially grown nitride film on the substrate, and electrodes deposited on a top and a bottom of the substrate. In order to produce the substrate, oxygen is doped into a gallium nitride crystal by preparing a C-plane gallium nitride seed crystal or a three-rotationally symmetric plane foreign material seed crystal, supplying material gases including gallium, nitrogen and oxygen to the C-plane gallium nitride seed crystal or the three-rotationally symmetric foreign seed crystal, growing a faceted C-plane gallium nitride bulk crystal having facets of non-C-planes on the seed crystal, maintaining the facets on the C-plane gallium nitride bulk crystal, and eliminating the seed crystal from the bulk crystal.

Abstract: In a semiconductor device, a YAG substrate is formed as a single-crystal substrate of any of surface orientations (100), (110), and (111). In the fabrication of the semiconductor device, a TMAl gas is first fed onto the YAG substrate so as to form a nucleation layer made of aluminum, which is a group-III element. Then, an NH3 gas is fed onto the nucleation layer. This turns the surface of the nucleation layer into a group-V element and then forms a group-III-V compound layer of AlN. Then, a mixed gas of TMAl gas and NH3 gas is fed onto the group-III-V compound layer so as to form another group-III-V compound layer. Finally, a group-III nitride semiconductor layer is crystal-grown on the group-III compound layer.

Abstract: A group III nitride semiconductor optical device includes: a substrate comprising a group III nitride semiconductor; a first group-III nitride semiconductor region on a primary surface of the substrate; a second group-III nitride semiconductor region on the primary surface of the substrate; and an active layer between the first group-III nitride semiconductor region and the second group-III nitride semiconductor region. The primary surface of the substrate tilts at a tilt angle in the range of 63 degrees to smaller than 80 degrees toward the m-axis of the group III nitride semiconductor from a plane perpendicular to a reference axis extending along the c-axis of the group III nitride semiconductor. The first group-III nitride semiconductor region, the active layer, and the second group-III nitride semiconductor region are arranged in the direction of the normal axis to the primary surface of the substrate. The active layer is configured to produce light having a wavelength in the range of 580 nm to 800 nm.

Abstract: The nitride semiconductor material according to the present invention includes a group III nitride semiconductor and a group IV nitride formed on the group III nitride semiconductor, where an interface between the group III nitride semiconductor and the group IV nitride has a regular atomic arrangement. Moreover, an arrangement of nitrogen atoms of the group IV nitride in the interface and an arrangement of group III atoms of the group III nitride semiconductor in the interface may be substantially identical.

Abstract: A boule formed by high rate vapor phase growth of Group III-V nitride boules (ingots) on native nitride seeds, from which wafers may be derived for fabrication of microelectronic device structures. The boule is of microelectronic device quality, e.g., having a transverse dimension greater than 1 centimeter, a length greater than 1 millimeter, and a top surface defect density of less than 107 defects cm?2. The Group III-V nitride boule may be formed by growing a Group III-V nitride material on a corresponding native Group III-V nitride seed crystal by vapor phase epitaxy at a growth rate above 20 micrometers per hour. Nuclear transmutation doping may be applied to an (Al,Ga,In)N article comprises a boule, wafer, or epitaxial layer.

Abstract: A nitride semiconductor substrate having a main surface serving as a semipolar plane and provided with a chamfered portion capable of effectively preventing cracking and chipping, a semiconductor device fabricated using the nitride semiconductor substrate, and a method for manufacturing the nitride semiconductor substrate and the semiconductor device are provided. The nitride semiconductor substrate includes a main surface inclined at an angle of 71° or more and 79° or less with respect to the (0001) plane toward the [1-100] direction or inclined at an angle of 71° or more and 79° or less with respect to the (000-1) plane toward the [?1100] direction; and a chamfered portion located at an edge of an outer periphery of the main surface. The chamfered portion is inclined at an angle ?1 or ?2 of 5° or more and 45° or less with respect to adjacent one of the main surface and a backside surface on a side opposite to the main surface.

Abstract: Nanowhiskers are grown in a non-preferential growth direction by regulation of nucleation conditions to inhibit growth in a preferential direction. In a preferred implementation, <001> III-V semiconductor nanowhiskers are grown on an (001) III-V semiconductor substrate surface by effectively inhibiting growth in the preferential <111>B direction. As one example, <001> InP nano-wires were grown by metal-organic vapor phase epitaxy directly on (001) InP substrates. Characterization by scanning electron microscopy and transmission electron microscopy revealed wires with nearly square cross sections and a perfect zincblende crystalline structure that is free of stacking faults.

Abstract: Disclosed is a group-III nitride-based light emitting diode. The group-III nitride-based light emitting diode includes a substrate, an n-type nitride-based cladding layer formed on the substrate, a nitride-based active layer formed on the n-type nitride-based cladding layer, a p-type nitride-based cladding layer formed on the nitride-based active layer, and a p-type multi-layered ohmic contact layer formed on the p-type nitride-based cladding layer and including thermally decomposed nitride. The thermally decomposed nitride is obtained by combining nitrogen (N) with at least one metal component selected from the group consisting of nickel (Ni), copper (Cu), zinc (Zn), indium (In) and tin (Sn). An ohmic contact characteristic is enhanced at the interfacial surface of the p-type nitride-based cladding layer of the group-III nitride-based light emitting device, thereby improving the current-voltage characteristics.

Abstract: A compound semiconductor substrate which inhibits the generation of a crack or a warp and is preferable for a normally-off type high breakdown voltage device, arranged that a multilayer buffer layer 2 in which AlxGa1-xN single crystal layers (0.6?X?1.0) 21 containing carbon from 1×1018 atoms/cm3 to 1×1021 atoms/cm3 and AlyGa1-yN single crystal layers (0.1?y?0.5) 22 containing carbon from 1×1017 atoms/cm3 to 1×1021 atoms/cm3 are alternately and repeatedly stacked in order, and a nitride active layer 3 provided with an electron transport layer 31 having a carbon concentration of 5×1017 atoms/cm3 or less and an electron supply layer 32 are deposited on a Si single crystal substrate 1 in order. The carbon concentrations of the AlxGa1-xN single crystal layers 21 and that of the AlyGa1-yN single crystal layers 22 respectively decrease from the substrate 1 side towards the above-mentioned active layer 3 side. In this way, the compound semiconductor substrate is produced.

Abstract: Affords AlxGa(1-x)As (0?x?1) substrates epitaxial wafers for infrared LEDs, infrared LEDs, methods of manufacturing AlxGa(1-x)As substrates, methods of manufacturing epitaxial wafers for infrared LEDs, and methods of manufacturing infrared LEDs, whereby a high level of transmissivity is maintained, and through which, in the fabrication of semiconductor devices, the devices prove to have superior light output characteristics. An AlxGa(1-x)As substrate (10a) as disclosed is an AlxGa(1-x)As substrate (10a) furnished with an AlxGa(1-x)As layer (11) having a major surface (11a) and, on the reverse side from the major surface (11a), a rear face (11b), and is characterized in that in the AlxGa(1-x)As layer (11), the amount fraction x of Al in the rear face (11b) is greater the amount fraction x of Al in the major surface (11a). The AlxGa(1-x)As substrate (10a) may additionally be provided with a GaAs substrate (13), contacting the rear face (11b) of the AlxGa(1-x)As layer (11).

Abstract: The present invention relates to a method for growing a non-polar m-plane epitaxial layer on a single crystal oxide substrate, which comprises the following steps: providing a single crystal oxide with a perovskite structure; using a plane of the single crystal oxide as a substrate; and forming an m-plane epitaxial layer of wurtzite semiconductors on the plane of the single crystal oxide by a vapor deposition process. The present invention also provides an epitaxial layer having an m-plane obtained according to the aforementioned method.

Abstract: Hetero-epitaxial semiconductor materials comprising cubic crystalline semiconductor alloys grown on the basal plane of trigonal and hexagonal substrates, in which misfit dislocations are reduced by approximate lattice matching of the cubic crystal structure to underlying trigonal or hexagonal substrate structure, enabling the development of alloyed semiconductor layers of greater thickness, resulting in a new class of semiconductor materials and corresponding devices, including improved hetero-bipolar and high-electron mobility transistors, and high-mobility thermoelectric devices.

Abstract: Proposed is a III-V-semiconductor-containing epitaxial substrate comprising at least one layer of porous III-V semiconductor material, together with a corresponding production method. Also specified is a component, particularly an LED, produced on the proposed epitaxial substrate, and a corresponding production method.

Abstract: A method of fabricating a device layer structure includes providing a III-nitride semiconductor layer which is bonded to a bonding substrate. A device layer structure is formed on a nitrogen polar surface of the III-nitride semiconductor layer. The device layer structure includes an indium gallium nitride layer with a metal polar surface adjacent to the nitrogen polar surface of the III-nitride semiconductor layer.

Abstract: A field effect transistor (FET) with high withstand voltage and high performance is realized by designing a buffer layer structure appropriately to reduce a leakage current to 1×10?9 A or less when a low voltage is applied. An epitaxial wafer for a field effect transistor comprising a buffer layer 2, an active layer, and a contact layer on a semi-insulating substrate 1 from the bottom, and the buffer layer 2 includes a plurality of layers, and a p-type buffer layer composed of p-type AlxGa1-xAs (0.3?x?1) is provided as a bottom layer (undermost layer) 2a. A Nd product of a film thickness of the p-type buffer layer and a p-type carrier concentration of the p-type buffer layer is within a range from 1×1010 to 1×1012/cm2.

Abstract: A III-N device is described with a III-N material layer, an insulator layer on a surface of the III-N material layer, an etch stop layer on an opposite side of the insulator layer from the III-N material layer, and an electrode defining layer on an opposite side of the etch stop layer from the etch stop layer from the insulator layer. A recess is formed in the electrode defining layer. An electrode is formed in the recess. The insulator can have a precisely controlled thickness, particularly between the electrode and III-N material layer.

Abstract: Provided is an epitaxial substrate capable of achieving a semiconductor device that has excellent ohmic contact characteristics as well as satisfactory device characteristics. On a base substrate, a channel layer formed of a first group III nitride that contains at least Al and Ga and has a composition of Inx1Aly1Gaz1N (x1+y1+z1=1) is formed. On the channel layer, a barrier layer formed of a second group III nitride that contains at least In and Al and has a composition of Inx2Aly2Gaz2N (x2+y2+z2=1) is formed such that an In composition ratio of a near-surface portion is larger than an In composition ratio of a portion other than the near-surface portion.

Abstract: Si(1-v-w-x)CwAlxNv crystals in a mixed crystal state are formed. A method for manufacturing an easily processable Si(1-v-w-x)CwAlxNv substrate, a method for manufacturing an epitaxial wafer, a Si(1-v-w-x)CwAlxNv substrate, and an epitaxial wafer are provided. A method for manufacturing a Si(1-v-w-x)CwAlxNv substrate 10a includes the following steps. First, a Si substrate 11 is prepared. A Si(1-v-w-x)CwAlxNv layer 12 (0<v<1, 0<w<1, 0<x<1, and 0<v+w+x<1) is then grown on the Si substrate 11 by a pulsed laser deposition method.

Abstract: Affords AlxGa(1-x)As (0?x?1) substrates, epitaxial wafers for infrared LEDs, infrared LEDs, methods of manufacturing AlxGa(1-x)As substrates, methods of manufacturing epitaxial wafers for infrared LEDs, and methods of manufacturing infrared LEDs, whereby a high level of transmissivity is maintained, and through which, in the fabrication of semiconductor devices, the devices prove to have superior characteristics. An AlxGa(1-x)As substrate (10a) of the present invention is an AlxGa(1-x)As substrate (10a) furnished with an AlxGa(1-x)As layer (11) having a major surface (11a) and, on the reverse side from the major surface (11a), a rear face (11b), and is characterized in that in the AlxGa(1-x)As layer (11), the amount fraction x of Al in the rear face (11b) is greater than the amount fraction x of Al in the major surface (11a). In addition, the AlxGa(1-x)As substrate (10a) is further furnished with a GaAs substrate (13), contacting the rear face (11b) of the AlxGa(1-x)As layer (11).

Abstract: A nitride semiconductor chip allows enhancement of luminous efficacy. The nitride semiconductor laser chip (nitride semiconductor chip) has a GaN substrate, which has a principal growth plane, and an active layer, which is formed on the principal growth plane of the GaN substrate and which has a quantum well structure including a well layer and a barrier layer. The principal growth plane is a plane having an off angle in the a-axis direction relative to the m plane. The barrier layer is formed of AlGaN, which is a nitride semiconductor containing Al.

Abstract: To suppress adverse affect caused by dopant in a conductive semiconductor layer in a GaN-based device having a structure in which the conductive semiconductor layer is inserted between a substrate and an active layer. In an HEMT device 10, n-GaN (n-type GaN wafer) is used as a substrate 11. A p-type GaN layer (conductive semiconductor layer) 12 is formed on the substrate 11 for the purpose of reducing a leak current and suppressing current collapse, etc. A non-doped AlN layer (semi-insulating semiconductor layer) 13 is formed on the p-type GaN layer 12, and a channel layer (active layer) 14 formed of semi-insulating GaN and an electron supply layer (active layer) 15 formed of n-AlGaN are sequentially formed by the MBE method, MOVPE method, or the like.

Abstract: A process for fabricating a composite structure for epitaxy, including at least one crystalline growth seed layer of semiconductor material on a support substrate, with the support substrate and the crystalline growth seed layer each having, on the periphery of their bonding face, a chamfer or an edge rounding zone. The process includes at least one step of wafer bonding the crystalline growth seed layer directly onto the support substrate and at least one step of thinning the crystalline growth seed layer. After thinning, the crystalline growth seed layer has a diameter identical to its initial diameter.

Abstract: A nitride-based semiconductor light-emitting device 100 includes: a GaN substrate 10 with an m-plane surface 12; a semiconductor multilayer structure 20 provided on the m-plane surface 12 of the GaN substrate 10; and an electrode 30 provided on the semiconductor multilayer structure 20. The electrode 30 includes a Zn layer 32 and an Ag layer 34 provided on the Zn layer 32. The Zn layer 32 is in contact with a surface of a p-type semiconductor region of the semiconductor multilayer structure 20.

Abstract: A semiconductor device includes an undoped GaN layer (13), an undoped AlGaN layer (14), and a p-type GaN layer (15). In the p-type GaN layer (15), highly resistive regions (15a) are selectively formed. Resistance of the highly resistive regions (15a) can be increased by introducing a transition metal, for example, titanium.

Abstract: A nitride-based semiconductor light-emitting device 100 includes: a GaN substrate 10 with an m-plane surface 12; a semiconductor multilayer structure 20 provided on the m-plane surface 12 of the GaN substrate 10; and an electrode 30 provided on the semiconductor multilayer structure 20. The electrode 30 includes an Mg layer 32 and an Ag layer 34 provided on the Mg layer 32. The Mg layer 32 is in contact with a surface of a p-type semiconductor region of the semiconductor multilayer structure 20.

Abstract: In one aspect, a method includes fabricating a gallium nitride (GaN) layer with a first diamond layer having a first thermal conductivity and a second diamond layer having a second thermal conductivity greater than the first thermal conductivity. The fabricating includes using a microwave plasma chemical vapor deposition (CVD) process to deposit the second diamond layer onto the first diamond layer.

Abstract: A nitride-based semiconductor light-emitting device 100 includes a GaN substrate 10, of which the principal surface is an m-plane 12, a semiconductor multilayer structure 20 that has been formed on the m-plane 12 of the GaN-based substrate 10, and an electrode 30 arranged on the semiconductor multilayer structure 20. The electrode 30 includes an Mg alloy layer 32 which is formed of Mg and a metal selected from a group consisting of Pt, Mo, and Pd. The Mg alloy layer 32 is in contact with a surface of a p-type semiconductor region of the semiconductor multilayer structure 20.

Abstract: There are provided a Si(1-v-w-x)CwAlxNv substrate that achieves high crystallinity and low costs, an epitaxial wafer, and manufacturing methods thereof. A method for manufacturing a Si(1-v-w-x)CwAlxNv substrate according to the present invention includes the steps of preparing a different type of substrate 11 and growing a Si(1-v-w-xCwAlxNv layer having a main surface on the different type of substrate 11. The component ratio x+v at the main surface of the Si(1-v-w-x)CwAlxNv layer is 0<x+v<1. The component ratio x+v increases or decreases monotonically from the interface between the Si(1-v-w-x)CwAlxNv layer and the different type of substrate 11 to the main surface of the Si(1-v-w-x)CwAlxNv layer. The component ratio x+v at the interface between the Si(1-v-w-x)CwAlxNv layer and the different type of substrate 11 is closer to that of the material of the different type of substrate 11 than the component ratio x+v at the main surface of the Si(1-v-w-x)CwAlxNv layer.

Abstract: A group III nitride substrate in one embodiment has a surface layer. The surface layer contains 3 at. % to 25 at. % of carbon and 5×1010 atoms/cm2 to 200×1010 atoms/cm2 of a p-type metal element. The group III nitride substrate has a stable surface.

Abstract: A method of making a nitride semiconductor laser comprises forming a first InGaN film for an active layer on a gallium nitride based semiconductor region, and the first InGaN film has a first thickness. In the formation of the first InGaN film, a first gallium raw material, a first indium raw material, and a first nitrogen raw material are supplied to a reactor to deposit a first InGaN for forming the first InGaN film at a first temperature, and the first InGaN has a thickness thinner than the first thickness. Next, the first InGaN is heat-treated at a second temperature lower than the first temperature in the reactor, while supplying a second indium raw material and a second nitrogen raw material to the reactor. Then, after the heat treatment, a second InGaN is deposited at least once to form the first InGaN film.

Abstract: In one aspect, a method includes fabricating a gallium nitride (GaN) layer with a first diamond layer having a first thermal conductivity and a second diamond layer having a second thermal conductivity greater than the first thermal conductivity. The fabricating includes using a microwave plasma chemical vapor deposition (CVD) process to deposit the second diamond layer onto the first diamond layer.

Abstract: Provided is a semiconductor substrate and a method for manufacturing the same. The semiconductor substrate includes a substrate, a discontinuously formed hemispheric metal layer on the substrate, and a semiconductor layer on the hemispheric metal layer. A plurality of voids on the interface of the substrate and discontinuous hemisphere are formed to absorb or relax the stain of interface. Accordingly, even if a subsequent layer is relatively thickly formed on the substrate, substrate bow or warpage can be minimized.

Abstract: A link portion between a first electrode and a second electrode includes a semiconductor link portion and a metal semiconductor alloy link portion comprising a first metal semiconductor alloy. An electrical pulse converts the entirety of the link portion into a second metal semiconductor alloy having a lower concentration of metal than the first metal semiconductor alloy. Due to the stoichiometric differences between the first and second metal semiconductor alloys, the link portion has a higher resistance after programming than prior to programming. The shift in electrical resistance well controlled, which is advantageously employed to as a programmable precision resistor.

Abstract: The present invention is a method for producing a laminated body, comprising the steps of: (1) preparing a base substrate having a surface formed of a single crystal which is different from the material constituting the Al-based group-III nitride single crystal layer to be formed; (2) forming an Al-based group-III nitride single crystal layer having a thickness of 10 nm to 1.5 ?m on the single crystal surface of the prepared base substrate; (3) forming on the Al-based group-III nitride single crystal layer a non-single crystal layer being 100 times or more thicker than the Al-based group-III nitride single crystal layer without breaking the previously-obtained Al-based group-III nitride single crystal layer; and (4) removing the base substrate.

Abstract: There is provided a method of producing a nitride-based compound semiconductor device that suppresses the adhesion of foreign matters including impurity, fine particles and the like on a surface of a compound semiconductor. The method of producing a nitride-based compound semiconductor device in accordance with the present invention includes the steps of: preparing a nitride-based compound semiconductor (or a substrate preparation step); and cleaning. In the step of cleaning, the nitride-based compound semiconductor is cleaned with a cleaning liquid having a pH of 7.1 or higher ultrasonically.

Abstract: An epitaxial growth process for producing a thick III-N layer, wherein III denotes at least one element of group III of the periodic table of elements, is disclosed, wherein a thick III-N layer is deposited above a foreign substrate. The epitaxial growth process preferably is carried out by HVPE. The substrate can also be a template comprising the foreign substrate and at least one thin III-N intermediate layer. The surface quality is improved by providing a slight intentional misorientation of the substrate, and/or a reduction of the N/III ratio and/or the reactor pressure towards the end of the epitaxial growth process. Substrates and semiconductor devices with such improved III-N layers are also disclosed.

Abstract: A method of manufacturing a group III nitride semiconductor substrate includes the growth step of epitaxially growing a first group III nitride semiconductor layer on an underlying substrate, and the process step of forming a first group III nitride semiconductor substrate by cutting and/or surface-polishing the first group III nitride semiconductor layer. In the growth step, at least one element selected from the group consisting of C, Mg, Fe, Be, Zn, V, and Sb is added as an impurity element by at least 1×1017 cm?3 to the first group III nitride semiconductor layer. A group III nitride semiconductor substrate having controlled resistivity and low dislocation density and a manufacturing method thereof can thus be provided.

Abstract: A semiconductor laser (a first semiconductor optical device) and an optical modulator (a second semiconductor optical device) are integrated on the same n-type InP substrate. The semiconductor laser butt-joined to the optical modulator. Each of the semiconductor laser and the optical modulator has a Be-doped p-type InGaAs contact layer. The p-type InGaAs contact layers have a Be-doping concentration of 7×1018 cm?3 or more, and a thickness of 300 nm or less.

Abstract: A method of growing a group III nitride crystal grows a group III nitride crystal from a solution in which an alkaline metal, a group III metal and nitrogen are dissolved, and includes, in the solution, a material which increases solubility of the nitrogen into the solution.

Abstract: A group III nitride crystal substrate is provided in which, in connection with plane spacing of arbitrary specific parallel crystal lattice planes of the group III nitride crystal substrate obtained from X-ray diffraction measurement performed with variation of X-ray penetration depth from a main surface of the crystal substrate while X-ray diffraction conditions of the specific parallel crystal lattice planes of the crystal substrate are satisfied, a uniform distortion at a surface layer of the crystal substrate represented by a value of |d1?d2|/d2 obtained from a plane spacing d1 at the X-ray penetration depth of 0.3 ?m and a plane spacing d2 at the X-ray penetration depth of 5 ?m is equal to or lower than 1.9×10?3, and the main surface has a plane orientation inclined in the <10-10> direction at an angle equal to or greater than 10° and equal to or smaller than 80° with respect to one of (0001) and (000-1) planes of the crystal substrate.

Abstract: A method of fabricating an optoelectronic device, comprising growing an active layer of the device on an oblique surface of a suitable material, wherein the oblique surface comprises a facetted surface. The present invention also discloses a method of fabricating the facetted surfaces. One fabrication process comprises growing an epitaxial layer on a suitable material, etching the epitaxial layer through a mask to form the facets having a specific crystal orientation, and depositing one or more active layers on the facets. Another method comprises growing a layer of material using a lateral overgrowth technique to produce a facetted surface, and depositing one or more active layers on the facetted surfaces. The facetted surfaces are typically semipolar planes.

Abstract: Provided is a semiconductor wafer having decreased interface state density at the semiconductor-insulator interface, a method of manufacturing this semiconductor wafer, and a semiconductor device. Provided is a semiconductor wafer comprising a group 3-5 compound semiconductor layer containing arsenic; and an insulating layer that is an oxide, a nitride, or an oxynitride, wherein arsenic oxides are not detected between the semiconductor layer and the insulating layer. This semiconductor wafer may be such that, when using X-ray photoelectron spectroscopy to observe photoelectron intensity of an element existing between the semiconductor layer and the insulating layer, an oxide peak caused by oxidized arsenic is not detected on a higher bonding energy side of an element peak caused by the arsenic.

Abstract: Affords epitaxial substrates for vertical gallium nitride semiconductor devices that have a structure in which a gallium nitride film of n-type having a desired low carrier concentration can be provided on a gallium nitride substrate of n type. A gallium nitride epitaxial film (65) is provided on a gallium nitride substrate (63). A layer region (67) is provided in the gallium nitride substrate (63) and the gallium nitride epitaxial film (65). An interface between the gallium nitride substrate (43) and the gallium nitride epitaxial film (65) is positioned in the layer region (67). In the layer region (67), a peak value of donor impurity along an axis from the gallium nitride substrate (63) to the gallium nitride epitaxial film (65) is 1×1018 cm?3 or more. The donor impurity is at least either silicon or germanium.

Abstract: A nitride semiconductor wafer is planar-processed by grinding a bottom surface of the wafer, etching the bottom surface by, e.g., KOH for removing a bottom process-induced degradation layer, chamfering by a rubber whetstone bonded with 100 wt %-60 wt % #3000-#600 diamond granules and 0 wt %-40 wt % oxide granules, grinding and polishing a top surface of the wafer, etching the top surface for eliminating a top process-induced degradation layer and maintaining a 0.5 ?m-10 ?m thick edge process-induced degradation layer.

Abstract: A group III nitride semiconductor free-standing substrate includes an as-grown surface, more than half of a region of the as-grown surface including a single crystal plane. The single crystal plane includes an off-angle inclined in an m-axis or a-axis direction from a C-plane with a group III polarity, or in a c-axis or a-axis direction from an M-plane.

Abstract: Dislocation removal from a group III-V film grown on a semiconductor substrate is generally described. In one example, an apparatus includes a semiconductor substrate, a buffer film including a group III-V semiconductor material epitaxially coupled to the semiconductor substrate wherein the buffer film includes material melted by laser pulse irradiation and recrystallized to substantially remove dislocations or defects from the buffer film, and a first semiconductor film epitaxially grown on the buffer film wherein a lattice mismatch exists between the semiconductor substrate and the first semiconductor film.

Abstract: A process for fabricating a multilayer structure is provided as well as the structure itself. In accordance with one embodiment, the process includes growing a growth layer on a silicon substrate by epitaxial growth, forming at least one pattern from the growth layer, depositing an oxide layer on the silicon substrate, transferring a silicon active layer onto the oxide layer, forming a cavity in the silicon active layer oxide layer above the pattern, and growing a III-V material in the cavity.