Abstract: A semiconductor device of an embodiment includes: a semiconductor layer made of p-type nitride semiconductor; an oxide layer formed on the semiconductor layer, the oxide layer being made of a polycrystalline nickel oxide, and the oxide layer having a thickness of 3 nm or less; and a metal layer formed on the oxide layer.

Abstract: Systems and methods for preparing freestanding films using laser-assisted chemical etch (LACE), and freestanding films formed using same, are provided. In accordance with one aspect a substrate has a surface and a portion defining an isotropically defined cavity; and a substantially continuous film is disposed at the substrate surface and spans the isotropically defined cavity. In accordance with another aspect, a substrate has a surface and a portion defining an isotropically defined cavity; and a film is disposed at the substrate surface and spans the isotropically defined cavity, the film including at least one of hafnium oxide (HfO2), diamond-like carbon, graphene, and silicon carbide (SiC) of a predetermined phase. In accordance with still another aspect, a substrate has a surface and a portion defining an isotropically defined cavity; and a multi-layer film is disposed at the substrate surface and spans the isotropically defined cavity.

Abstract: The present invention includes a first step of forming a nitride semiconductor layer by metal organic chemical vapor deposition by using a first carrier gas containing a nitrogen carrier gas and a hydrogen carrier gas of a flow quantity larger than that of the nitrogen carrier gas to thereby supply a raw material containing Mg and a Group V raw material containing N, and a second step of lowering a temperature by using a second carrier gas to which a material containing N is added, and hence solves the problems encountered in the art.

Abstract: A nitride semiconductor wafer is planar-processed by grinding a bottom surface of the wafer, etching the bottom surface by, e.g., KOH for removing a bottom process-induced degradation layer, chamfering by a rubber whetstone bonded with 100 wt %-60 wt % #3000-#600 diamond granules and 0 wt %-40 wt % oxide granules, grinding and polishing a top surface of the wafer, etching the top surface for eliminating a top process-induced degradation layer and maintaining a 0.5 ?m-10 ?m thick edge process-induced degradation layer.

Abstract: A semiconductor device exhibiting enhanced carrier mobility within a channel region of the semiconductor device is disclosed. The semiconductor device includes a gate stack having first and second sidewall spacers, where the gate stack is implemented above the channel region of the semiconductor device. The semiconductor device further includes first and second trenches formed adjacent to the gate stack, where the first and second trenches are conically shaped to be wider at a top portion of each trench as compared to a width of each trench below the top portion of each trench. The semiconductor device further includes strained silicon alloy formed within the first and second trenches, where a stress force exerted on the channel region of the semiconductor device is maximized at a surface of the semiconductor device below the gate stack.

Abstract: A barrier layer, hafnium oxide layer, between a III-V semiconductor layer and an lanthanum oxide layer is used to prevent interaction between the III-V semiconductor layer and the lanthanum oxide layer. Meanwhile, the high dielectric constant of the lanthanum oxide can be used to increase the capacitance of the semiconductor device.

Abstract: The present invention discloses structures to increase carrier mobility using engineered substrate technologies for a solid state device. Structures employing rare-earth compounds enable heteroepitaxy of different semiconductor materials of different orientations.

Abstract: A method for growing reduced defect density planar gallium nitride (GaN) films is disclosed. The method includes the steps of (a) growing at least one silicon nitride (SiNx) nanomask layer over a GaN template, and (b) growing a thickness of a GaN film on top of the SiNx nanomask layer.

Abstract: A gallium nitride-based semiconductor device includes a composite substrate and a gallium nitride layer. The composite substrate includes a silicon substrate and a filler. The silicon substrate includes a first surface and a second surface opposite to the first surface, and the first surface defines a number of grooves therein. The filler is filled into the number of grooves on the first surface of the silicon substrate. A thermal expansion coefficient of the filler is bigger than that of the silicon substrate. The gallium nitride layer is formed on the second surface of the silicon substrate.

Abstract: To provide a group-III nitride semiconductor freestanding substrate, with carrier concentration of a peripheral part of a n-type group-III nitride semiconductor freestanding substrate set to be lower than the carrier concentration inside of the peripheral part. In this freestanding substrate, preferably value ?? obtained by dividing a difference between a maximum value of the carrier concentration and a minimum value of the carrier concentration in a surface of the freestanding substrate by the maximum value of the carrier concentration is greater than 0.05, and the carrier concentration in any place in the surface of the freestanding substrate exceeds 5.0×1017 cm?3.

Abstract: To grow a gallium nitride crystal, a seed-crystal substrate is first immersed in a melt mixture containing gallium and sodium. Then, a gallium nitride crystal is grown on the seed-crystal substrate under heating the melt mixture in a pressurized atmosphere containing nitrogen gas and not containing oxygen. At this time, the gallium nitride crystal is grown on the seed-crystal substrate under a first stirring condition of stirring the melt mixture, the first stirring condition being set for providing a rough growth surface, and the gallium nitride crystal is subsequently grown on the seed-crystal substrate under a second stirring condition of stirring the melt mixture, the second stirring condition being set for providing a smooth growth surface.

Abstract: A method for manufacturing a Group III nitride semiconductor of the present invention, comprising a sputtering step for disposing a substrate and a target in a chamber and forming a Mg-doped Group III nitride semiconductor on the substrate by a reactive sputtering method, wherein the sputtering step includes respective substeps of: a film formation step for forming a semiconductor thin film while doping with Mg; and a plasma treatment step for applying an inert gas plasma treatment to the semiconductor thin film that has been formed in the film formation step, and the Group III nitride semiconductor is formed by laminating the semiconductor thin film through alternate repetitions of the film formation step and the plasma treatment step.

Abstract: A semiconductor chip (1) comprises a p-doped region (I) having a cladding layer (18) and a contact layer (21) between which a first interlayer (19) and a second interlayer (20) are arranged. A concentration of a first material component (B) within the first and the second interlayer (19, 20) changes in such a way that the band gap varies in a range lying between the band gap of the cladding layer (18) and the band gap of the contact layer (21). A method for producing a semiconductor chip of this type is also disclosed.

Abstract: The present invention provides a two-terminal infrared detector capable of detecting a plurality of bands, such as three bands, over the visible and short-wave infrared bands. Detection of three colors enables one to construct composite imagery that provide significantly added contract in comparison to typical grayscale images. In some variations, the device includes multiple absorber and barrier layers that consist of distinct engineered semiconductor alloys which are closely lattice matched to InP.

Abstract: A process for obtaining a hybrid substrate that includes at least one active layer of Group III/N material for applications in the field of electronics, optics, photovoltaics or optoelectronics. The method includes selecting a source substrate of Group III/N material having a hexagonal single crystal crystallographic structure; carrying out an implantation of He+ helium ions into the source substrate through an implantation face which lies in a plane approximately parallel with the “c” crystallographic axis of the material, at an implantation dose equal to or greater than 1×1016 He+/cm2 and 1×1017 He+/cm2, to form therein a number of nanocavities defining a weakened zone which delimits the active layer; and transferring the active layer by applying an overall energy budget capable of causing detachment of the layer from the source substrate, wherein the budget also causes the nanocavities to grow into cavities.

Abstract: A nitride compound semiconductor element according to the present invention is a nitride compound semiconductor element including a substrate 1 having an upper face and a lower face and a semiconductor multilayer structure 40 supported by the upper face of the substrate 1, such that the substrate 1 and the semiconductor multilayer structure 40 have at least two cleavage planes. At least one cleavage inducing member 3 which is in contact with either one of the two cleavage planes is provided, and a size of the cleavage inducing member 3 along a direction parallel to the cleavage plane is smaller than a size of the upper face of the substrate 1 along the direction parallel to the cleavage plane.

Abstract: A device includes a semiconductor substrate, and insulation regions in the semiconductor substrate. Opposite sidewalls of the insulation regions have a spacing between about 70 nm and about 300 nm. A III-V compound semiconductor region is formed between the opposite sidewalls of the insulation regions.

Abstract: A light emitter includes a first mirror that is an epitaxially grown metal mirror, a second mirror, and an active region that is epitaxially grown such that the active region is positioned at or close to, at least, one antinode between the first mirror and the second mirror.

Abstract: Disclosed are a semiconductor device, a light emitting device, and a method of manufacturing the same. The semiconductor device includes a substrate, a plurality of rods aligned on the substrate, a metal layer disposed on the substrate between the rods, and a semiconductor layer disposed on and between the rods. Electrical and optical characteristics of the semiconductor device are improved due to the metal layer.

Abstract: Provided are methods for making a device or device component by providing a multilayer structure having a plurality of functional layers and a plurality of release layers and releasing the functional layers from the multilayer structure by separating one or more of the release layers to generate a plurality of transferable structures. The transferable structures are printed onto a device substrate or device component supported by a device substrate. The methods and systems provide means for making high-quality and low-cost photovoltaic devices, transferable semiconductor structures, (opto-)electronic devices and device components.

Abstract: The present invention provides a method for producing a semiconductor substrate, the method including reacting nitrogen (N) with gallium (Ga), aluminum (Al), or indium (In), which are group III elements, in a flux mixture containing a plurality of metal elements selected from among alkali metals and alkaline earth metals, to thereby grow a group III nitride based compound semiconductor crystal. The group III nitride based compound semiconductor crystal is grown while the flux mixture and the group III element are mixed under stirring. At least a portion of a base substrate on which the group III nitride based compound semiconductor crystal is grown is formed of a flux-soluble material, and the flux-soluble material is dissolved in the flux mixture, at a temperature near the growth temperature of the group III nitride based compound semiconductor crystal, during the course of growth of the semiconductor crystal.

Abstract: A method for fabricating a high quality freestanding nonpolar and semipolar nitride substrate with increased surface area, comprising stacking multiple films by growing the films one on top of each other with different and non-orthogonal growth directions.

Abstract: A device includes a silicon substrate, and a III-V compound semiconductor region over and contacting the silicon substrate. The III-V compound semiconductor region has a U shaped interface with the silicon substrate, with radii of the U shaped interface being smaller than about 1,000 nm.

Abstract: This disclosure describes a semiconductor device that can be used as a mixer at RF frequencies extending from a few tens of GHz into the THz frequency range. The device is composed of narrow bandgap semiconductors grown by solid source molecular beam epitaxy. The device can comprise a GaSb substrate, a AlSb layer on the GaSb substrate, a In0.69Al0.31As0.41Sb0.59 layer, on the AlSb layer and wherein the In0.69Al0.31As0.41Sb0.59 comprises varying levels of Te doping, a In0.27Ga0.73Sb layer on the In0.69Al0.31As0.41 Sb0.59 layer, wherein the In0.27Ga0.73Sb layer is Be doped, wherein the first section of the In0.69Al0.31As0.41Sb0.59 layer has is Te doped, wherein the second section of the In0.69Al0.31As0.41Sb0.59 layer has a grade in Te concentration, and wherein the third section of the In0.69Al0.31As0.41Sb0.59 layer is Te doped.

Abstract: Technology of making freestanding gallium nitride (GaN) wafers has been matured at length. Gallium nitride is rigid but fragile. Chamfering of a periphery of a GaN wafer is difficult. At present edges are chamfered by a rotary whetstone of gross granules with weak pressure. Minimum roughness of the chamfered edges is still about Ra 10 ?m to Ra 6 ?m. The large edge roughness causes scratches, cracks, splits or breaks in transferring process or wafer process. A wafer of the present invention is bevelled by fixing the wafer to a chuck of a rotor, bringing an edge of the wafer into contact with an elastic whetting material having a soft matrix and granules implanted on the soft matrix, rotating the wafer and feeding the whetting material. Favorably, several times of chamfering edges by changing the whetting materials of smaller granules are given to the wafer. The chamfering can realize small roughness of Ra 10 nm and Ra 5 ?m at edges of wafers.

Abstract: A nitride-based semiconductor light-emitting device 100 includes a GaN substrate 10, of which the principal surface is an m-plane 12, a semiconductor multilayer structure 20 that has been formed on the m-plane 12 of the GaN-based substrate 10, and an electrode 30 arranged on the semiconductor multilayer structure 20. The electrode 30 includes an Mg layer 32, which contacts with the surface of a p-type semiconductor region in the semiconductor multilayer structure 20.

Abstract: A method according to embodiments of the invention includes providing an epitaxial structure comprising a donor layer and a strained layer. The epitaxial structure is treated to cause the strained layer to relax. Relaxation of the strained layer causes an in-plane lattice constant of the donor layer to change.

Abstract: A semiconductor structure is provided. The semiconductor structure includes one or more III-IV material-based semiconductor layers. A tensile-strained Ge layer is formed on the one or more a III-IV material-based semiconductor layers. The tensile-strained Ge layer is produced through lattice-mismatched heteroepitaxy on the one or more a III-IV material-based semiconductor layers.

Abstract: A composite material substrate having patterned structure includes a substrate, a first dielectric layer, a second dielectric layer, and a nitride semiconductor material. Herein, the first dielectric layer is stacked on the substrate, the second dielectric layer is stacked on the first dielectric layer, and the nitride semiconductor material is stacked on the second dielectric layer and is characterized by a plurality of patterns thereon.

Abstract: A group 3-5 nitride semiconductor multilayer substrate (1) and a method for manufacturing such substrate are provided. A semiconductor layer (12) is formed on a base substrate (11), and a mask (13) is formed on the semiconductor layer (12). Then, after forming a group 3-5 nitride semiconductor crystalline layer (14) by selective growing, the group 3-5 nitride semiconductor crystalline layer (14) and the base substrate (11) are separated. The crystallinity of the semiconductor layer (12) is lower than that of the group 3-5 nitride semiconductor crystalline layer (14).

Abstract: A nitride-based semiconductor device includes: a nitride-based semiconductor multilayer structure including a p-type semiconductor region, a surface of the p-type semiconductor region being an m-plane; and an electrode that is arranged on the p-type semiconductor region, wherein the p-type semiconductor region is made of an AlxGayInzN semiconductor (where x+y+z=1, x?0, y?0, and z?0), and the electrode contains Mg, Zn and Ag.

Abstract: A light emitting device is provided. The light emitting device comprises a conductive substrate, a reflection layer, a support layer, an ohmic contact layer, and a light emitting semiconductor layer. The reflection layer is disposed on the conductive substrate. The support layer is disposed partially on the reflection layer. The ohmic contact layer is disposed at the side of the support layer. The light emitting semiconductor layer is disposed on the ohmic contact layer and the support layer.

Abstract: A nitride semiconductor device includes a first nitride semiconductor layer formed on a substrate, a defect induced layer formed on the first nitride semiconductor layer, and a second nitride semiconductor layer formed on the defect induced layer, contacting the defect induced layer, and having an opening through which the defect induced layer is exposed. The defect induced layer has a higher crystal defect density than those of the first and second nitride semiconductor layers.

Abstract: Affords methods of manufacturing bulk III-nitride crystals whereby at least the surface dislocation density is low globally. The present III-nitride crystal manufacturing method includes: a step of preparing an undersubstrate (1) containing a III-nitride seed crystal, the III-nitride seed crystal having a matrix (1s), and inversion domains (1t) in which the polarity in the <0001> directions is inverted with respect to the matrix (1s); and a step of growing a III-nitride crystal (10) onto the matrix (1s) and inversion domains (it) of the undersubstrate (1) by a liquid-phase technique; and is characterized in that a first region (10s), being where the growth rate of III-nitride crystal (10) growing onto the matrix (1s) is greater, covers second regions (10t), being where the growth rate of III-nitride crystal (10) growing onto the inversion domains (1t) is lesser.

Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.

Abstract: A GaAs semiconductor substrate includes a main surface (10m) having an inclined angle of 6° to 16° with respect to a (100) plane (10a), and a concentration of chlorine atoms on the main surface (10m) is not more than 1×1013 cm?2. Further, a method of manufacturing a GaAs semiconductor substrate includes a polishing step of polishing a GaAs semiconductor wafer, a first cleaning step of cleaning the polished GaAs semiconductor wafer, an inspection step of inspecting a thickness and a main surface flatness of the GaAs semiconductor wafer subjected to the first cleaning, and a second cleaning step of cleaning the inspected GaAs semiconductor wafer with one of an acid other than hydrochloric acid and an alkali.

Abstract: An object of the present invention is to provide a Group III nitride semiconductor epitaxial substrate, i.e., an AlxGa1-xN (0?x?1) epitaxial substrate succeeding in reducing the generation of cracking or dislocation, and enhancing the crystal quality. More specifically, an object of the present invention is to provide an AlxGa1-xN (0<x?1) epitaxial substrate useful for a light-emitting device in the ultraviolet or deep ultraviolet region. The inventive Group III nitride semiconductor epitaxial substrate comprises a base and an AlxGa1-xN (0?x?1) layer stacked on the base, wherein a layer allowing a crystal having ?C polarity and a crystal having +C polarity to coexist is present on the base side of the AlxGa1-xN (0?x?1) layer.

Abstract: The non-polar or semi-polar Nitride film is grown using Metal Organic Vapor Phase Epitaxy over a substrate. The in-situ grown seed layer comprising Magnesium and Nitrogen is deposited prior to the Nitride film growth. The said seed layer enhances the crystal growth of the Nitride material and makes it suitable for electronics and optoelectronics applications. The use of non-polar and/or semi-polar epitaxial films of the Nitride materials allows avoiding the unwanted effects related to polarization fields and associated interface and surface charges, thus significantly improving the semiconductor device performance and efficiency. In addition, the said seed layer is also easily destroyable by physical or chemical stress, including the ability to dissolve in water or acid, which makes the substrate removal process available and easy.

Abstract: Disclosed herein is a nitride based semiconductor device. The nitride based semiconductor device includes: a base substrate; an epitaxial growth layer disposed on the base substrate and having a defect generated due to lattice disparity with the base substrate; a leakage current barrier covering the epitaxial growth layer while filling the defect; and an electrode part disposed on the epitaxial growth layer.

Abstract: An object of the present invention is to address the problems described herein and to provide a III-nitride semiconductor epitaxial substrate, a III-nitride semiconductor element, and a III-nitride semiconductor freestanding substrate, which have good crystallinity, not only with AlGaN, GaN, or GaInN, the growth temperature of which is at or below 1050° C., but also with AlxGa1-xN, the growth temperature of which is high and which has a high Al composition, as well as a III-nitride semiconductor growth substrate for fabricating these and a method for efficiently fabricating these. The invention is characterized by being equipped with: a crystal growth substrate, at least the surface portion of which substrate includes a III-nitride semiconductor containing Al; and a single metallic layer formed on the surface portion, the single metallic layer being made from Zr or Hf.

Abstract: A semiconductor-on-insulator hetero-structure and a method for fabricating the semiconductor -on-insulator hetero-structure include a crystalline substrate and a dielectric layer located thereupon having an aperture that exposes the crystalline substrate. The semiconductor-on -insulator hetero-structure and the method for fabricating the semiconductor-on-insulator hetero-structure also include a semiconductor layer of composition different than the crystalline substrate located within the aperture and upon the dielectric layer. A portion of the semiconductor layer located aligned over the aperture includes a defect. A portion of the semiconductor layer located aligned over the dielectric layer does not include a defect. Upon removing the portion of the semiconductor layer located aligned over the aperture a reduced defect semiconductor-on-insulator hetero-structure is formed.

Abstract: In a method of fabricating a semiconductor optical device, a semiconductor region is formed by growing an InP lower film, a active region, an InP upper film and a capping film on a substrate sequentially. Material of the capping film is different from that of InP. Next, a mask is formed on the capping film, and the semiconductor region is etched using the mask to form a semiconductor stripe mesa, which includes an InP lower cladding layer, a active layer, an InP upper cladding layer and a capping layer. The active layer comprises aluminum-based III-V compound. A width of the top surface of the capping layer is greater than that of a width of the bottom surface of the capping layer. A width of the top surface of the InP upper cladding layer is smaller than that of the bottom surface of the InP upper cladding layer. The minimum width of the semiconductor mesa is in the InP upper cladding layer.

Abstract: A nitride-based semiconductor light-emitting device 100 includes a GaN substrate 10, of which the principal surface is an m-plane 12, a semiconductor multilayer structure 20 that has been formed on the m-plane 12 of the GaN-based substrate 10, and an electrode 30 arranged on the semiconductor multilayer structure 20. The electrode 30 includes an Mg alloy layer 32 which is formed of Mg and a metal selected from a group consisting of Pt, Mo, and Pd. The Mg alloy layer 32 is in contact with a surface of a p-type semiconductor region of the semiconductor multilayer structure 20.

Abstract: A nitride semiconductor substrate includes two principal surfaces including an upper surface that is a growth face and a lower surface on its opposite side. An FWHM in a surface layer region at depths of from 0 to 250 nm from the upper surface is narrower than an FWHM in an inner region at depths exceeding 5 ?m from the upper surface, where the FWHMs are obtained by X-ray rocking curve measurement using diffraction off a particular asymmetric plane inclined relative to the upper surface.

Abstract: A nitride-based semiconductor light-emitting device 100 includes: a GaN substrate 10 with an m-plane surface 12; a semiconductor multilayer structure 20 provided on the m-plane surface 12 of the GaN substrate 10; and an electrode 30 provided on the semiconductor multilayer structure 20. The electrode 30 includes a Zn layer 32 and a metal layer 34 provided on the Zn layer 32. The Zn layer 32 is in contact with a surface of a p-type semiconductor region of the semiconductor multilayer structure 20.

Abstract: A method for forming a nitride semiconductor laminated structure includes forming a first layer that is an n-type or i-type first layer composed of a group III nitride semiconductor using an H2 carrier gas; forming a second layer by laminating a p-type second layer composed of a group III nitride semiconductor and containing Mg on the first layer using an H2 carrier gas; and forming a third layer that is an n-type or i-type third layer composed of a group III nitride semiconductor on the second layer using an H2 carrier gas after forming the second layer. A method for manufacturing a nitride semiconductor device includes the method steps for forming the nitride semiconductor laminated structure.

Abstract: The objective of the present invention is to provide a semiconductor device of a hetero-junction field effect transistor that is capable of obtaining a high output and a high breakdown voltage and a manufacturing method of the same. The present invention is a semiconductor device of a hetero-junction field effect transistor provided with an AlxGa1-xN channel layer with a composition ratio of Al being x (0<x<1) formed on a substrate, an AlyGa1-yN barrier layer with a composition of Al being y (0<y?1) formed on the channel layer, and source/drain electrodes and a gate electrode formed on the barrier layer, wherein the composition ratio y is larger than the composition ratio x.

Abstract: A GaAlInP compound semiconductor and a method of producing a GaAlInP compound semiconductor are provided. The apparatus and method comprises a GaAs crystal substrate in a metal organic vapor deposition reactor. Al, Ga, In vapors are prepared by thermally decomposing organometallic compounds. P vapors are prepared by thermally decomposing phosphine gas, Zn vapors are prepared by thermally decomposing an organometallic group IIA or IIB compound. Group VIB vapors are prepared by thermally decomposing a gaseous compound of group VIB. The Al, Ga, In, P, group II, and group VIB vapors grow a GaAlInP crystal doped with group IIA or IIB and group VIB elements on the substrate wherein the group IIA or IIB and group VIB vapors produce a codoped GaAlInP compound semiconductor with a group IIA or IIB element serving as a p-type dopant having low group II atomic diffusion.

Abstract: There is provided a semiconductor device that includes a III-V Group compound semiconductor having a zinc-blende-type crystal structure, an insulating material being in contact with the (111) plane of the III-V Group compound semiconductor, a plane of the III-V Group compound semiconductor equivalent to the (111) plane, or a plane that has an off angle with respect to the (111) plane or the plane equivalent to the (111) plane, and an MIS-type electrode being in contact with the insulating material and including a metal conductive material.

Abstract: A method of manufacturing a semipolar semiconductor crystal comprising a group-III-nitride (III-N), the method comprising: providing a substrate comprising sapphire (Al2O3) having a first surface that intersects c-planes of the sapphire; forming a plurality of trenches in the first surface, each trench having a wall whose surface is substantially parallel to a c-plane of the substrate; epitaxially growing a group-III-nitride (III-N) material in the trenches on the c-plane surfaces of their walls until the material overgrows the trenches to form a second planar surface, substantially parallel to a (20-2l) crystallographic plane of the group-III-nitride, wherein l is an integer.