Abstract: A substrate cleaning apparatus includes a first processing unit configured to supply a first processing liquid for removing a residue adhering to a substrate onto the substrate on which a metal film is exposed at a recess of a pattern; a second processing unit configured to supply, onto the substrate, a second processing liquid for forming a protective film insoluble to the first processing liquid; a third processing unit configured to supply, onto the substrate, a third processing liquid for dissolving the protective film; and a control unit. The control unit performs forming the protective film on the metal film in a state that an upper portion of the pattern is exposed from the protective film; removing the residue adhering to the upper portion of the pattern after the forming of the protective film; and removing the protective film from the substrate after the removing of the residue.

Abstract: A terrestrial vehicle lighting module which includes an electroluminescent source including at least one electroluminescent element, an electronic device designed to control the electroluminescent element, and an interposer electrically connecting the electroluminescent source and the electronic device.

Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a fin disposed over a substrate, a gate structure disposed over a channel region of the fin, such that the gate structure traverses source/drain regions of the fin, a device-level interlayer dielectric (ILD) layer of a multi-layer interconnect structure disposed over the substrate, wherein the device-level ILD layer includes a first dielectric layer, a second dielectric layer disposed over the first dielectric layer, and a third dielectric layer disposed over the second dielectric layer, wherein a material of the third dielectric layer is different than a material of the second dielectric layer and a material of the first dielectric layer. The semiconductor device further comprises a gate contact to the gate structure disposed in the device-level ILD layer and a source/drain contact to the source/drain regions disposed in the device-level ILD layer.

Abstract: Disclosed herein are integrated circuit (IC) package substrates formed with a dielectric bi-layer, and related devices and methods. In some embodiments, an IC package substrate is fabricated by: forming a raised feature on a conductive layer; forming a dielectric bi-layer on the conductive layer, where the dielectric bi-layer includes a first sub-layer having a first material property and a second sub-layer having a second material property, and where the top surface of the second sub-layer is substantially planar with the top surface of the raised feature; and removing the first sub-layer until the second material property is detected to reveal the conductive feature. In some embodiments, an IC package substrate is fabricated by: forming a dielectric bi-layer on a patterned conductive layer, where the first sub-layer is less susceptible to removal than the second sub-layer; forming an opening in the dielectric bi-layer; etching; and forming a via having vertical sidewalls.

Abstract: The present disclosure relates to a display component, a display, manufacturing methods thereof and an electronic device. The display component comprises: a pixel array comprising a plurality of pixel units, two adjacent pixel units are connected by a connecting structure; and the connecting structure is configured to enable a distance between the pixel units to be increased or decreased to a required connection length when the pixel array is bent, and is further configured to transmit a driving signal for driving the pixel units to emit light.

Abstract: An apparatus comprises a structure including an upper insulating material overlying a lower insulating material, a conductive element underlying the lower insulating material, and a conductive material comprising a metal line and a contact. The conductive material extends from an upper surface of the upper insulating material to an upper surface of the conductive element. The structure also comprises a liner material adjacent the metal line. A width of an uppermost surface of the conductive material of the metal line external to the contact is relatively less than a width of an uppermost surface of the conductive material of the contact. Related methods, memory devices, and electronic systems are disclosed.

Abstract: A semiconductor device includes a protective layer, a redistribution pattern, a pad pattern and an insulating polymer layer. The protective layer may be formed on a substrate. The redistribution pattern may be formed on the protective layer. An upper surface of the redistribution may be substantially flat. The pad pattern may be formed directly on the redistribution pattern. An upper surface of the pad pattern may be substantially flat. The insulating polymer layer may be formed on the redistribution pattern and the pad pattern. An upper surface of the insulating polymer layer may be lower than the upper surface of the pad pattern. The semiconductor device may have a high reliability.

Abstract: Metal-to-metal adhesion joints are described as a manner to hold down micro devices to a carrier substrate within the context of a micro device transfer manufacturing process. In accordance with embodiments, the metal-to-metal adhesion joints must be broken in order to pick up the micro devices from a carrier substrate, resulting in micro devices with nubs protruding from bottom contacts of the micro devices. Once integrated, the micro devices are bonded to a receiving substrate, the nubs may be embedded in a metallic joint, or alternatively be diffused within the metallic joint as interstitial metallic material that is embedded within the metallic joint.

Abstract: A pattern formed body, including a cured resin layer 12 having a low surface free energy region a and a high surface free energy region b on a base 11, in which a difference in surface free energy between the low surface free energy region a and the high surface free energy region b is greater than 6 mJ/m2, and the low surface free energy region a and the high surface free energy region b are optically leveled surfaces. Accordingly, an ink is applied on the pattern formed body to easily color code.

Abstract: Disclosed is a touch panel. The touch panel includes a substrate, and an electrode part formed in a mesh shape on the substrate. The electrode part includes a resin layer comprising first and second sub-patterns, and a transparent electrode on the first sub-pattern. A ratio of a width of the first sub-pattern to a width of the second sub-pattern is in a range of 1:0.01 to 1:0.5.

Abstract: The present disclosure provides an array substrate for a display device and a manufacturing method thereof. A transparent electrode pattern (ITO) may be formed between a source/drain metal pattern and a passivation layer located above the source/drain metal pattern, which are formed in a passivation hole area of a non-active area of the array substrate. Accordingly, it may be possible to prevent display failure caused by a delamination phenomenon or peel-off of a material of the passivation layer due to the lack of adhesion strength between a metal layer and the passivation layer in the passivation hole area.

Abstract: A conductive element includes: a base material having a fluorine-containing surface; and a wire disposed on the surface. Detection intensity of fluorine on the base material surface is 96834 cps or more.

Abstract: A thermal interface structure includes a first surface including a surface of a heat generating device, a first surface binding polymer bonded to the first surface, a second surface including a surface of a heat sink, and a second surface binding polymer bonded to the second surface. The first surface binding polymer and the second surface binding polymer cross-link to one another to form a covalently bonded, cross-linked section that creates a thermal interface material that forms a continuous molecular connection between the first surface and the second surface.

Abstract: A package for a light emitting device includes a resin molding and a first lead. The resin molding defines a recess opening at the upper surface of the resin molding. The first lead includes first and second lower exposed surfaces and an upper exposed surface. The first and second lower exposed surfaces are exposed from the resin molding at the lower surface of the resin molding. The first and second lower exposed surfaces are spaced apart from each other with the resin molding being interposed therebetween. The upper exposed surface is exposed from the resin molding at a bottom surface of the recess of the resin molding. In a plan view, the upper exposed surface includes a concave portion in a region corresponding to a region between the first and second lower exposed surfaces, with the concave portion being filled with the resin molding.

Abstract: Methods of forming interconnects. An interconnect opening is formed in a dielectric layer. A first conductor layer composed of a first metal is formed in the interconnect opening. A second conductor layer is formed inside the interconnect opening by displacing the first metal of the first conductor layer and replacing the first metal with a second metal different from the first metal.

Abstract: A catalyst system comprising a combination of: 1) one or more catalyst compounds comprising at least one oxygen linkage, such as a phenoxide transition metal compound; 2) a support comprising an organosilica material, which may be a mesoporous organosilica material; and 3) an optional activator. Useful catalysts include biphenyl phenol catalysts (BPP). The organosilica material may be a polymer of at least one monomer of Formula [Z1OZ2SiCH2]3 (I), where Z1 represents a hydrogen atom, a C1-C4 alkyl group, or a bond to a silicon atom of another monomer and Z2 represents a hydroxyl group, a C1-C4 alkoxy group, a C1-C6 alkyl group, or an oxygen atom bonded to a silicon atom of another monomer. This invention further relates to processes to polymerize olefins comprising contacting one or more olefins with the above catalyst system.

Abstract: In a method for printing an RFID tag on an object, a deposition mask is applied to the surface of an object. With the deposition mask on the surface of the object, RFID materials are deposited on at least one portion of the surface exposed by aperture(s) in the deposition mask. In particular embodiments, RFID tags can be deposited on medical instruments.

Abstract: The present disclosure relates to a display device including a light emitting element display. The present disclosure suggests a flat panel display comprising: a substrate; a driving element disposed on a first surface of the substrate; an organic light emitting diode disposed on a second surface of the substrate; a through-hole penetrating the substrate from the front surface to the rear surface; and a connecting electrode filling the through-hole for linking the driving element to the organic light emitting diode.

Abstract: In a method of manufacturing a semiconductor device, a first insulating interlayer and a sacrificial layer is sequentially formed on a substrate. The sacrificial layer is partially removed to form a first opening exposing an upper surface of the first insulating interlayer. An insulating liner including silicon oxide is conformally formed on the exposed upper surface of the first insulating interlayer and a sidewall of the first opening. At least a portion of the insulating liner on the upper surface of the first insulating interlayer and a portion of the first insulating interlayer thereunder are removed to form a second opening connected to the first opening. A self-forming barrier (SFB) pattern is formed on a sidewall of the second opening and the insulating liner. A wiring structure is formed to fill the first and second openings. After the sacrificial layer is removed, a second insulating interlayer is formed.

Abstract: A re-distribution layer structure is adapted to be disposed on a substrate having a pad and a protective layer which has a first opening exposing a part of the pad. The re-distribution layer structure includes a first and a second patterned insulating layers and a re-distribution layer. The first patterned insulating layer is disposed on the protective layer and includes at least one protrusion and a second opening corresponding to the first opening. The re-distribution layer is disposed on the first patterned insulating layer and includes a pad portion and a wire portion. The pad portion is located on the first patterned insulating layer. The wire portion includes a body and at least one trench caved in the body. The body extends from the pad portion to the pad exposed by the first and the second openings. The body covers the protrusion, and the at least one protrusion extends into the at least one trench. The second patterned insulating layer covers the wire portion and exposes a part of the pad portion.

Abstract: A method of manufacturing a semiconductor device includes loading, into a process chamber, a substrate including a first wiring layer having a first interlayer insulating film, a plurality of copper-containing films formed on the first interlayer insulating film and used as a wiring, an inter-wiring insulating film insulating between the plurality of copper-containing films, and a void formed between the plurality of copper-containing films, and a first diffusion barrier film formed on a portion of an upper surface of the copper-containing films to suppress diffusion of a component of the copper-containing films, and forming a second diffusion barrier film configured to suppress diffusion of a component of the copper-containing films on a surface of another portion, on which the first diffusion barrier film is not formed, in the copper-containing films.

Abstract: A structure comprises a first passivation layer formed over a substrate, a second passivation layer formed over the first passivation layer, wherein the second passivation layer includes a first opening with a first dimension, a bond pad embedded in the first passivation layer and the second passivation layer, a protection layer formed on the second passivation layer comprising a second opening with a second dimension, wherein the second dimension is greater than the first dimension and a connector formed on the bond pad.

Abstract: Embodiments provide a light emitting device including a substrate, a light emitting structure disposed under the substrate, the light emitting structure including a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer, a sub-mount, first and second metal pads disposed on the sub-mount and electrically spaced apart from one another, a one first bump disposed between the first conductive semiconductor layer and the first metal pad and a second bump located between the second conductive semiconductor layer and the second metal pad. A plurality of active areas in which The first semiconductor layer and the active layer are disposed are spaced apart from one another when viewed in plan.

Abstract: A semiconductor device includes a semiconductor chip having a wire and a passivation film formed on the outermost surface with an opening partially exposing the wire. A resin layer is stacked on the semiconductor chip and provided with a through-hole in a position opposed to a portion of the wire facing the opening. A pad is formed on a peripheral portion of the through-hole in the resin layer and in the through-hole so that an external connection terminal is arranged on the surface thereof. The peripheral portion of the resin layer is formed more thickly than the remaining portion of the resin layer other than the peripheral portion.

Abstract: A method for forming a via in an integrated circuit comprises patterning a first opening in a first hardmask, the first hardmask disposed on a first organic self-planarizing polymer (OPL) layer, removing an exposed portion of the first OPL layer to define a cavity, removing an exposed portion of a second hardmask in the cavity, removing an exposed portion of a first dielectric layer disposed under the second hardmask to further define the cavity, removing an exposed portion of a first cap layer in the cavity, removing an exposed portion of a second dielectric layer to further define the cavity, removing an exposed portion of a second cap layer to further define the cavity, removing an exposed portion of a liner layer over a second conductive material in the cavity, and depositing a conductive material in the cavity.

Abstract: An electronic device, such as a thin-film transistor, includes a substrate and a dielectric layer formed from a dielectric composition. The dielectric composition includes a dielectric material, a crosslinking agent, and an infrared absorbing agent. In particular embodiments, the dielectric material comprises a lower-k dielectric material and a higher-k dielectric polymer. When deposited, the lower-k dielectric material and the higher-k dielectric material form separate phases. The infrared absorbing agent allows the dielectric composition to attain a temperature that is significantly greater than the temperature attained by the substrate during curing. This difference in temperature allows the dielectric layer to be cured at relatively high temperatures and/or shorter time periods, permitting the selection of lower-cost substrate materials that would otherwise be deformed by the curing of the dielectric layer.

Abstract: An organic light emitting transistor includes: a first electrode positioned on a substrate; a gate electrode positioned on the first electrode and including an opening formed at a center region; a first auxiliary layer positioned within the opening; an organic emission layer positioned on the first auxiliary layer and the gate electrode; a second auxiliary layer positioned on the organic emission layer; and a second electrode positioned on the second auxiliary layer.

Abstract: A color light-emitting diode using a blue light component to produce red light and green light is disclosed. A blue-light emitting material is provided between a cathode layer and an anode layer for emitting the blue light component. A light re-emitting layer has a first material in a first diode section arranged to produce a red light component in response to the blue light component, and a second material in a second diode section arranged to produce a green light component in response to the blue light component. A transparent material in a third diode section allows part of the blue light component to transmit through. The anode layer is partitioned into three electrode portions separately located in the three diode sections, so that the red, green and blue light components in the diode sections can be separately controlled.

Abstract: An organic light-emitting display apparatus includes a thin film transistor including an active layer, a gate electrode, source and drain electrodes, a first insulating layer between the active layer and the gate electrode, and a second insulating layer between the gate electrode and the source and drain electrodes, a third insulating layer covering the source and drain electrodes, the third insulating layer being an organic insulating layer, a pixel electrode including a semi-transparent metal layer and having an end located in a trench formed around the first insulating layer, a fourth insulating layer including an opening exposing a top surface of the pixel electrode, the fourth insulating layer being an organic insulating layer, an organic light-emitting layer on the pixel electrode, and a counter electrode on the organic light-emitting layer.

Abstract: A field effect transistor (1) including: a semiconducting substrate (2) having two areas doped with electric charge carriers forming a source area (3) and a drain area (4), respectively; a dielectric layer positioned above the semiconducting substrate (2) between the source (3) and the drain (4) and forming the gate dielectric (9) of the field effect transistor (1); a gate (11) consisting of a reference electrode (8) and of a conductive solution (10), the solution (10) being in contact with the gate dielectric (9); and the gate dielectric (9) consists of a layer of lipids (13) in direct contact with the semiconducting layer (2). The invention also relates to a method for manufacturing such a field effect transistor (1) is disclosed.

Abstract: A method for manufacturing a light-emitting device includes a step of forming an etching resistant protection layer on a substrate provided with an organic planarizing layer, a step of forming a plurality of electrodes on the etching resistant protection layer, a step of forming an organic compound layer on the substrate provided with the plurality of electrodes, a step of forming a resist layer on the organic compound layer formed on parts of electrodes among the plurality of electrodes using a photolithographic method, and a step of removing the organic compound layer in a region not covered with the resist layer by dry etching, wherein an entire surface of the organic planarizing layer on the substrate on which steps up to the step of forming the plurality of electrodes have been performed is covered with at least one of the etching resistant protection layer and the electrode.

Abstract: An ink jet process is used to deposit a material layer to a desired thickness. Layout data is converted to per-cell grayscale values, each representing ink volume to be locally delivered. The grayscale values are used to generate a halftone pattern to deliver variable ink volume (and thickness) to the substrate. The halftoning provides for a relatively continuous layer (e.g., without unintended gaps or holes) while providing for variable volume and, thus, contributes to variable ink/material buildup to achieve desired thickness. The ink is jetted as liquid or aerosol that suspends material used to form the material layer, for example, an organic material used to form an encapsulation layer for a flat panel device. The deposited layer is then cured or otherwise finished to complete the process.

Abstract: Provided is a high-luminance, long-life laminated organic electroluminescent element. The organic electroluminescent element has a composition in which a plurality of light-emitting units, including at least one organic light-emitting layer, are laminated between a positive electrode and a negative electrode, and in which a linking layer is held between the respective light-emitting units. The linking layer is formed by laminating, in succession from the positive electrode side, an electron generating/transport section, an intermediate layer, and a hole generating/transport section, which contain at least one metal selected from a group consisting of an alkali metal, alkaline earth metal, rare earth metal, alloy of these metals, and compound of these metals. Preferably the intermediate layer contains an electrical insulating non-semiconductive substance having a specific resistance which is between 1.0×102 ?·cm and 1.0×109 ?·cm.

Abstract: A semiconductor device includes a semiconductor substrate. The semiconductor substrate includes a first surface, a second surface, and a through hole that extends through the semiconductor substrate from the first surface to the second surface. An insulating layer covers the first surface and includes an opening at a location facing the through hole. An insulating film covers an inner wall of the through hole and an inner wall of the opening. A through electrode is formed in the through hole and the opening that are covered by the insulating film. A first connecting terminal is formed integrally with the through electrode to cover one end of the through electrode exposed from the insulating layer. The first connecting terminal has a larger size than the through electrode as viewed from above.

Abstract: A method for at least partially sealing a porous material is provided, comprising forming a sealing layer onto the porous material by applying a sealing compound comprising oligomers wherein the oligomers are formed by ageing a precursor solution comprising cyclic carbon bridged organosilica and/or bridged organosilanes. The method is especially designed for low k dielectric porous materials to be incorporated into semiconductor devices.

Abstract: One or more techniques or systems for forming a pattern during semiconductor fabrication are provided herein. In some embodiments, a photo resist (PR) region is patterned and a spacer region is formed above or surrounding at least a portion of the patterned PR region. Additionally, at least some of the spacer region and the patterned PR region are removed to form one or more spacers. Additionally, a block co-polymer (BCP) is filled between the spacers. In some embodiments, the BCP comprises a first polymer and a second polymer. In some embodiments, the second polymer is removed, thus forming a pattern comprising the first polymer and the spacers. In this manner, a method for forming a pattern during semiconductor fabrication is provided, such that a width of the spacer or the first polymer is controlled.

Abstract: An organic light emitting display device includes a substrate, a light emitting diode disposed on the substrate, and a balance electrode insulated from the light emitting diode and from each of the first and second electrodes. The light emitting diode includes a first electrode, a second electrode facing the first electrode, and an organic light emitting layer disposed between the first electrode and the second electrode. The balance electrode maintains a hole-electron charge balance within the organic light emitting layer by varying the amount of electrons and holes that are injected into the organic light emitting layer from the first and second electrodes by varying an electric potential applied to the balance electrode.

Abstract: Spalling is employed to generate a single crystalline semiconductor layer. Complementary metal oxide semiconductor (CMOS) logic and memory devices are formed on a single crystalline semiconductor substrate prior to spalling. Organic light emitting diode (OLED) driving circuitry, solar cells, sensors, batteries and the like can be formed prior to, or after, spalling. The spalled single crystalline semiconductor layer can be transferred to a substrate. OLED displays can be formed into the spalled single crystalline semiconductor layer to achieve a structure including an OLED display with semiconductor driving circuitry and other functions integrated on the single crystalline semiconductor layer.

Abstract: An organic electroluminescence device includes a first electrode, an organic layer formed on the first electrode and including a light-emitting layer, an intermediate layer formed on the organic layer; and a second electrode formed on the intermediate layer and having a thickness of 6 nm or less.

Abstract: Disclosed herein are stretchable, foldable and optionally printable, processes for making devices and devices such as semiconductors, electronic circuits and components thereof that are capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Strain isolation layers provide good strain isolation to functional device layers. Multilayer devices are constructed to position a neutral mechanical surface coincident or proximate to a functional layer having a material that is susceptible to strain-induced failure. Neutral mechanical surfaces are positioned by one or more layers having a property that is spatially inhomogeneous, such as by patterning any of the layers of the multilayer device.

Abstract: An embodiment of the present invention is a technique to provide a dielectric film material with controllable coefficient of thermal expansion (CTE). A first compound containing a first liquid crystalline component is formed. The first compound is cast into a first film. The first film is oriented in an magnetic or electromagnetic field in a first direction. The first film is cured at a first temperature.

Abstract: A light-emitting device and a lighting device each including a light-emitting element which can recover from a short circuit between a pair of electrodes by itself without adversely affecting the characteristics of the element is provided. An oxide layer is provided so as to be in contact with an electrode of the light-emitting element, whereby, due to heat generated when a short circuit is caused between a pair of electrodes, oxygen in the oxide layer and an electrode material in a short-circuited part are reacted with each other and the electrode material in the short-circuited part can be an insulator. Further, by providing an oxide layer in contact with an electron-injection layer containing an alkaline earth metal, an oxide of the alkaline earth metal can be formed, whereby moisture that enters the insulator formed by an insulation phenomenon in the short-circuited part can be adsorbed and removed.

Abstract: A semiconductor device wafer includes a test structure. The test structure includes a layer of material having an angle-shaped test portion disposed on at least a portion of a surface of the semiconductor wafer. A ruler marking on the surface of the semiconductor wafer proximate the test portion is adapted to facilitate measurement of a change in length of the test portion.

Abstract: A semiconductor device includes a substrate configured with a plurality of conductive traces. The traces are configured to electrically couple to an integrated circuit (IC) die and at least one of the plurality of conductive traces includes first electrically conductive portions in a first electrically conductive layer of the substrate, second electrically conductive portions in a second electrically conductive layer of the substrate, and first electrically conductive connections between the first electrically conductive portions and the second electrically conductive portions. The first and second electrically conductive portions and the first electrically conductive connections form a continuous path along at least a portion of the at least one of the conductive traces. Time delay of conducting a signal along the at least one of the conductive traces is within a specified amount of time of time delay of conducting a signal along another one of the plurality of conductive traces.

Abstract: A switchable electronic device comprises a hole blocking layer and a layer comprising a conductive material between first and second electrodes, wherein the conductivity of the device may be irreversibly switched upon application of a current having a current density of less than or equal to 100 A cm?2 to a conductivity at least 100 times lower than the conductivity of the device before switching. The conductive material is a doped organic material such as doped optionally substituted poly(ethylene dioxythiophene).

Abstract: An organic light-emitting diode includes an anode on a substrate; a first hole transporting layer on the anode; a second hole transporting layer on the first hole transporting layer and corresponding to the red and green pixel areas; a first emitting material pattern of a first thickness on the second hole transporting layer and corresponding to the red pixel area; a second emitting material pattern of a second thickness on the second hole transporting layer and corresponding to the green pixel area; a third emitting material pattern of a third thickness on the first hole transporting layer and corresponding to the blue pixel area; an electron transporting layer on the first, second and third emitting material patterns; and a cathode on the electron transporting layer, wherein the second thickness is less than the first thickness and greater than the third thickness.

Abstract: The positive-type photosensitive resin composition according to the present invention comprises an alkali-soluble resin having a phenolic hydroxyl group, a compound that produces an acid by light, a thermal crosslinking agent, and a silane compound having at least one functional group selected from an epoxy group and a sulfide group.

Abstract: An organic light emitting diode (OLED) display and a method for manufacturing the same are provided. The OLED display includes a substrate, an active layer and a capacitor lower electrode positioned on the substrate, a gate insulating layer positioned on the active layer and the capacitor lower electrode, a gate electrode positioned on the gate insulating layer at a location corresponding to the active layer, a capacitor upper electrode positioned on the gate insulating layer at a location corresponding to the capacitor lower electrode, a first electrode positioned to be separated from the gate electrode and the capacitor upper electrode, an interlayer insulating layer positioned on the gate electrode, the capacitor upper electrode, and the first electrode, a source electrode and a drain electrode positioned on the interlayer insulating layer, and a bank layer positioned on the source and drain electrodes.

Abstract: The present invention relates to electrically active devices (e.g., capacitors, transistors, diodes, floating gate memory cells, etc.) having dielectric, conductor, and/or semiconductor layers with smooth and/or dome-shaped profiles and methods of forming such devices by depositing or printing (e.g., inkjet printing) an ink composition that includes a semiconductor, metal, or dielectric precursor. The smooth and/or dome-shaped cross-sectional profile allows for smooth topological transitions without sharp steps, preventing feature discontinuities during deposition and allowing for more complete step coverage of subsequently deposited structures. The inventive profile allows for both the uniform growth of oxide layers by thermal oxidation, and substantially uniform etching rates of the structures. Such oxide layers may have a uniform thickness and provide substantially complete coverage of the underlying electrically active feature.

Abstract: There has been a problem that difference in refractive index between an opposite substrate or a moisture barrier layer provided thereover, and air is maintained large, and light extraction efficiency is low. Further, there has been a problem that peeling or cracking due to the moisture barrier layer is easily generated, which leads to deteriorate the reliability and lifetime of a light-emitting element. A light-emitting element comprises a pixel electrode, an electroluminescent layer, a transparent electrode, a passivation film, a stress relieving layer, and a low refractive index layer, all of which are stacked sequentially. The stress relieving layer serves to prevent peeling of the passivation film. The low refractive index layer serves to reduce reflectivity of light generated in the electroluminescent layer in emitting to air. Therefore, a light-emitting element with high reliability and long lifetime and a display device using the light-emitting element can be provided.