At Least One Layer Of Organic Material Patents (Class 257/642)
  • Patent number: 8476741
    Abstract: According to one embodiment, a semiconductor device includes: a substrate; an organic insulating film provided on the substrate; an inorganic insulating film formed thinner than the organic insulating film on the organic insulating film; a hollow sealing structure that is formed on the inorganic insulating film, and seals a MEMS element in an inside while ensuring a space between the hollow sealing structure itself and the MEMS element; a through hole formed so as to penetrate the organic insulating film and the inorganic insulating film; and a conductive member that is filled into the through hole, and electrically connects the MEMS element and an electrode formed by being filled into the through hole.
    Type: Grant
    Filed: January 19, 2011
    Date of Patent: July 2, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Susumu Obata, Takahiro Sogou, Yusaku Asano, Takeshi Miyagi
  • Patent number: 8476740
    Abstract: To provide a semiconductor wafer surface protection sheet having good adhesion to irregularities on a patterned surface of a semiconductor wafer and having good peelability after wafer grinding. Specifically, a semiconductor wafer surface protection sheet is provided that includes a base layer having a tensile elasticity at 25° C., E(25), of 1 GPa or more; a resin layer A that satisfies the condition EA(60)/EA(25)<0.1, where EA(25) is a tensile elasticity at 25° C. and EA(60) is a tensile elasticity at 60° C., the EA(60) ranging from 0.005 MPa to 1 MPa; and a resin layer B having a tensile elasticity at 60° C., EB(60), of 1 MPa or more and having a thickness of 0.1 ?m to less than 100 ?m, the EB(60) being larger than the EA(60) of the resin layer A.
    Type: Grant
    Filed: May 31, 2011
    Date of Patent: July 2, 2013
    Assignee: Mitsui Chemicals Tohcello, Inc.
    Inventors: Eiji Hayashishita, Yoshihisa Saimoto, Makoto Kataoka, Katsutoshi Ozaki, Mitsuru Sakai
  • Patent number: 8466456
    Abstract: An organic light-emitting display device and a method of manufacturing the same. The organic light-emitting display device includes a first film formed of an inorganic material, a second film that is formed of an organic material and formed on the first film, and includes a first surface and a second surface facing each other and lateral surfaces at boundaries of the first surface and the second surface, with the first surface contacting the first film, a third film that is formed of an inorganic material and covers the second surface and lateral surfaces of the second film, with a first sealing region contacting the first film being formed at a boundary between the second film and the third film, an organic light-emitting unit that is disposed on the third film to overlap with the second film, and a fourth film that covers the organic light-emitting unit, with a second sealing region contacting the third film being formed at a boundary of the fourth film.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: June 18, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Tae-Woong Kim, Sung-Guk An, Hyung-Sik Kim, Hyung-Woo Koo, Dong-Gun Jin, Sang-Joon Seo
  • Patent number: 8461573
    Abstract: Organic thin film devices that included an organic thin film subjected to a selected dose of a selected energy of ions exhibited a stabilized mobility (?) and threshold voltage (VT), a decrease in contact resistance RC, and an extended operational lifetime that did not degrade after 2000 hours of operation in the air.
    Type: Grant
    Filed: May 6, 2010
    Date of Patent: June 11, 2013
    Assignee: Los Alamos National Security, LLC
    Inventors: Michael Anthony Nastasi, Yongqiang Wang, Beatrice Fraboni, Piero Cosseddu, Annalisa Bonfiglio
  • Patent number: 8445898
    Abstract: The present invention relates to an organic/inorganic hybrid thin film passivation layer comprising an organic polymer passivation layer prepared by a UV/ozone curing process and an inorganic thin film passivation layer for blocking moisture and oxygen transmission of an organic electronic device fabricated on a substrate and improving gas barrier property of a plastic substrate; and a fabrication method thereof. Since the organic/inorganic hybrid thin film passivation layer of the present invention converts the surface polarity of an organic polymer passivation layer into hydrophilic by using the UV/ozone curing process, it can improve the adhesion strength between the passivation layer interfaces, increase the light transmission rate due to surface planarization of the organic polymer passivation layer, and enhance gas barrier property by effectively blocking moisture and oxygen transmission.
    Type: Grant
    Filed: April 20, 2011
    Date of Patent: May 21, 2013
    Assignee: Korea Institute of Science and Technology
    Inventors: Jai Kyeong Kim, Jung Soo Park, June Whan Choi, Dae-Seok Na, Jae-Hyun Lim, Joo-Won Lee
  • Patent number: 8445382
    Abstract: A dual damascene process for forming conductive interconnects on an integrated circuit die. The process includes providing a layer (16) of porous, ultra low-k (ULK) dielectric material in which a via opening (30) is subsequently formed. A thermally degradable polymeric (“porogen”) material (42) is applied to the side wall sidewalls of the opening (30) such that the porogen material penetrates deeply into the porous ULK dielectric material (thereby sealing the pores and increasing the density thereof). Once a conductive material (36) has been provided with the opening (30) and polished back by means of chemical mechanical polishing (CMP), the complete structure is subjected to a curing step to cause the porogen material (44) with the ULK dielectric layer (16) to decompose and evaporate, thereby restoring the porosity (and low-k value) of the dielectric layer (16). Attached are a marked-up copy of the originally filed specification and a clean substitute specification in accordance with 37 C.F.R. §§1.
    Type: Grant
    Filed: March 20, 2006
    Date of Patent: May 21, 2013
    Assignee: NXP B.V.
    Inventor: Willem Frederik Adrianus Besling
  • Patent number: 8436390
    Abstract: There has been a problem that difference in refractive index between an opposite substrate or a moisture barrier layer provided thereover, and air is maintained large, and light extraction efficiency is low. Further, there has been a problem that peeling or cracking due to the moisture barrier layer is easily generated, which leads to deteriorate the reliability and lifetime of a light-emitting element. A light-emitting element comprises a pixel electrode, an electroluminescent layer, a transparent electrode, a passivation film, a stress relieving layer, and a low refractive index layer, all of which are stacked sequentially. The stress relieving layer serves to prevent peeling of the passivation film. The low refractive index layer serves to reduce reflectivity of light generated in the electroluminescent layer in emitting to air. Therefore, a light-emitting element with high reliability and long lifetime and a display device using the light-emitting element can be provided.
    Type: Grant
    Filed: June 7, 2012
    Date of Patent: May 7, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisao Ikeda, Hiroki Ohara, Makoto Hosoba, Junichiro Sakata, Shunichi Ito
  • Patent number: 8431434
    Abstract: Methods for producing p-doped organic semiconductor material with a fullerene derivative having at least one electron-withdrawing substituent covalently attached thereto, and semiconductor compositions prepared thereby are provided. Also provided are electronic devices, such as transistors, solar-cells, illuminating devices, OLEDs and detectors, comprised of these p-doped organic semiconductor materials.
    Type: Grant
    Filed: September 9, 2009
    Date of Patent: April 30, 2013
    Assignee: Technion Research & Development Foundation Limited
    Inventors: Nir Tessler, Olga Solomeshch
  • Patent number: 8426024
    Abstract: Embodiments of the invention include articles comprising a diamond like carbon coating or doped diamond like carbon coating on one or more surfaces of a plastic substrate or a plastic enclosure. Embodiments of the DLC or doped DLC coatings reduce the gas permeation of the coated plastic or thermoplastic to hydrogen or helium compared to the permeability of the plastic alone. The DLC or doped DLC coatings coating provides a surface resistivity of from about 107 to about 1014 ohm/square and have a transmittance that range from about 0% to about 70% less than the transmittance of the underlying plastic substrate in the range of about 300 nm to about 1100 nm. The DLC coated plastic can be used in environmental enclosures for protecting environmentally sensitive substrates such as semiconductor wafers and reticles.
    Type: Grant
    Filed: July 29, 2011
    Date of Patent: April 23, 2013
    Assignee: Entegris, Inc.
    Inventors: Charles W. Extrand, Sung In Moon
  • Patent number: 8415687
    Abstract: An organic light emitting device with improved light emitting efficiency, the organic light emitting device includes a substrate, a first electrode arranged on the substrate, a second electrode arranged to face the first electrode, an organic light-emitting layer arranged between the first electrode and the second electrode, an electron transport layer arranged between the organic light-emitting layer and the second electrode, wherein the electron transport layer includes a multi-layer structure that includes at least one first layer and at least two second layers, wherein ones of said at least one first layer and ones of said at least two second layers are alternately stacked, wherein ones of the at least two second layers are arranged at both opposite ends of the electron transport layer, each of the at least two second layers having a lower electron mobility than that of each of the at least one first layer.
    Type: Grant
    Filed: January 14, 2010
    Date of Patent: April 9, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Mi-Kyung Kim, Min-Seung Chun, Dong-Heon Kim, Kwan-Hee Lee
  • Publication number: 20130075876
    Abstract: A method for at least partially sealing a porous material is provided, comprising forming a sealing layer onto the porous material by applying a sealing compound comprising oligomers wherein the oligomers are formed by ageing a precursor solution comprising cyclic carbon bridged organosilica and/or bridged organosilanes. The method is especially designed for low k dielectric porous materials to be incorporated into semiconductor devices.
    Type: Application
    Filed: September 18, 2012
    Publication date: March 28, 2013
    Applicants: Universiteit Gent, IMEC
    Inventors: IMEC, Universiteit Gent
  • Patent number: 8405193
    Abstract: Organic electronic packages having sealed edges. More specifically, packages having organic electronic devices are provided. A number of sealing mechanisms are provided to hermetically seal the edges of the package to completely protect the organic electronic device from external elements. A sealant may be implemented to completely surround the organic electronic device. Alternatively, edge wraps may be provided to completely surround the organic electronic device.
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: March 26, 2013
    Assignee: General Electric Company
    Inventors: Marc Schaepkens, Anil Duggal, Christian M. Heller
  • Patent number: 8404584
    Abstract: The method of manufacturing the semiconductor device includes forming an insulating film above a semiconductor substrate, forming an opening in the insulating film, forming a conductive film above the insulating film with the opening formed, removing the conductive film above the insulating film to bury the conductive film in the opening, and processing a surface of the insulating film with a silicon compound including Si—N or Si—Cl.
    Type: Grant
    Filed: May 2, 2011
    Date of Patent: March 26, 2013
    Assignee: Fujitsu Limited
    Inventors: Tadahiro Imada, Kouta Yoshikawa
  • Patent number: 8399264
    Abstract: The present disclosure relates to the field of microelectronic substrate fabrication and, more particularly, to alignment inspection for vias formed in the microelectronic substrates. The alignment inspection may be achieved by determining the relative positions of fluorescing and non-fluorescing elements in a microelectronic substrate.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: March 19, 2013
    Assignee: Intel Corporation
    Inventors: Zhihua Zou, Liang Zhang, Sheng Li, Tamil Selvamuniandy
  • Patent number: 8390099
    Abstract: An interconnection substrate including: a first insulating film made of a silicon compound, an adhesion enhancing layer formed on the first insulating film, and a second insulting film made of a silicon compound and formed on the adhesion enhancing layer, wherein the first insulating film and the second insulating film are combined together with a component having a structure represented by General Formula (1) described below: Si—CXHY—Si??General Formula (1) where y is equal to 2x and is an even integer.
    Type: Grant
    Filed: August 24, 2010
    Date of Patent: March 5, 2013
    Assignee: Fujitsu Limited
    Inventors: Shirou Ozaki, Yoshihiro Nakata, Tadahiro Imada, Yasushi Kobayashi
  • Patent number: 8384075
    Abstract: A thin film transistor includes a multi-coaxial silicon nanowire unit including a plurality of coaxial silicon nanowires on a substrate, the multi-coaxial silicon nanowire unit including a central portion and end portions of the central portion; a gate electrode on the central portion; and a source electrode and a drain electrode on the respective end portions, respectively, so as to electrically connect to the multi-coaxial silicon nanowire unit.
    Type: Grant
    Filed: June 13, 2012
    Date of Patent: February 26, 2013
    Assignee: LG Display Co., Ltd.
    Inventors: Gee-Sung Chae, Mi-Kyung Park
  • Patent number: 8384209
    Abstract: To reduce defects of a semiconductor device, such as defects in shape and characteristic due to external stress and electrostatic discharge. To provide a highly reliable semiconductor device. In addition, to increase manufacturing yield of a semiconductor device by reducing the above defects in the manufacturing process. The semiconductor device includes a semiconductor integrated circuit sandwiched by impact resistance layers against external stress and an impact diffusion layer diffusing the impact and a conductive layer covering the semiconductor integrated circuit. With the use of the conductive layer covering the semiconductor integrated circuit, electrostatic breakdown (malfunctions of the circuit or damages of a semiconductor element) due to electrostatic discharge of the semiconductor integrated circuit can be prevented.
    Type: Grant
    Filed: April 24, 2009
    Date of Patent: February 26, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiaki Oikawa, Shingo Eguchi, Shunpei Yamazaki
  • Patent number: 8378226
    Abstract: A wired circuit board includes a conductive pattern, and an insulating layer covering the conductive pattern and having a transmittance of not more than 30% with respect to a wavelength in a range of 600 to 680 nm.
    Type: Grant
    Filed: October 9, 2008
    Date of Patent: February 19, 2013
    Assignee: Nitto Denko Corporation
    Inventors: Makoto Tsunekawa, Kei Nakamura, Takatoshi Sakakura, Yoshihiro Toyoda
  • Patent number: 8368065
    Abstract: There have been problems in that a dedicated apparatus is needed for a conventional method of manufacturing an organic thin film transistor and in that: a little amount of an organic semiconductor film is formed with respect to a usage amount of a material; and most of the used material is discarded. Further, apparatus maintenance such as cleaning of the inside of an apparatus cup or chamber has needed to be frequently carried out in order to remove the contamination resulting from the material that is wastefully discarded. Therefore, a great cost for materials and man-hours for maintenance of apparatus have been required. In the present invention, a uniform organic semiconductor film is formed by forming an aperture between a first substrate for forming the organic semiconductor film and a second substrate used for injection with an insulating film formed at a specific spot and by injecting an organic semiconductor film material into the aperture due to capillarity to the aperture.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: February 5, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiharu Hirakata, Tetsuji Ishitani, Shuji Fukai, Ryota Imahayashi
  • Patent number: 8362559
    Abstract: This invention is generally related to a method of making a molecule-surface interface comprising at least one surface comprising at least one material and at least one organic group wherein the organic group is adjoined to the surface and the method comprises contacting at least one organic group precursor with at least one surface wherein the organic group precursor is capable of reacting with the surface in a manner sufficient to adjoin the organic group and the surface. The present invention is directed to hybrid molecular electronic devices having a molecule-surface interface. Such hybrid molecular electronic devices may advantageously have either a top or bottom gate electrode for modifying a conductivity of the devices.
    Type: Grant
    Filed: April 5, 2010
    Date of Patent: January 29, 2013
    Assignee: William Marsh Rice University
    Inventors: James M. Tour, Michael P. Stewart, Jianli He, Harry F. Pang
  • Patent number: 8357997
    Abstract: According to one embodiment, an organic EL device includes a pixel electrode, an organic layer disposed above the pixel electrode, a counter-electrode disposed above the organic layer, and an oxide layer disposed between the pixel electrode and the organic layer, the oxide layer including a first region formed with a first film thickness over a first area and a second region formed with a second film thickness which is less than the first film thickness, over a second area which is less than the first area.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: January 22, 2013
    Assignee: Japan Display Central Inc.
    Inventor: Hirofumi Kubota
  • Patent number: 8330150
    Abstract: An organic light-emitting display device, which may be configured to prevent moisture or oxygen from penetrating the organic light-emitting display device from the outside is disclosed. An organic light-emitting display device, which is easily applied to a large display device and/or may be easily mass produced is further disclosed. Additionally disclosed is a method of manufacturing an organic light-emitting display device. An organic light-emitting display device may include, for example, a thin-film transistor (TFT) including a gate electrode, an active layer insulated from the gate electrode, source and drain electrodes insulated from the gate electrode and contacting the active layer and an insulating layer disposed between the source and drain electrodes and the active layer; and an organic light-emitting diode electrically connected to the TFT.
    Type: Grant
    Filed: July 1, 2010
    Date of Patent: December 11, 2012
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyun-Joong Chung, Jin-Seong Park, Jong-Han Jeong, Jae-Kyeong Jeong, Yeong-Gon Mo, Min-Kyu Kim, Tae-Kyung Ahn, Hui-Won Yang, Kwang-Suk Kim, Eun-Hyun Kim, Jae-Wook Kang, Jae-Soon Im
  • Patent number: 8324616
    Abstract: An optoelectronic device including a first electrode, an active layer disposed on the first electrode, a second electrode disposed on the active layer, and a self-assembled monolayer interposed between the first electrode and the active layer, interposed between the active layer and the second electrode, or disposed inside the active layer, wherein the self-assembled monolayer includes a first compound and a second compound having different functional groups from each other.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: December 4, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bulliard Xavier, Woong Choi, Jae-Young Choi
  • Patent number: 8314435
    Abstract: An organic light emitting diode display is disclosed. The organic light emitting diode display includes a plurality of subpixels that emit light of at least three colors, the plurality of subpixels each including a first electrode, an organic light emitting layer, and a second electrode. Each of the organic light emitting layers of at least two of the plurality of subpixels includes at least two electron transport layers. The organic light emitting layer of at least one of the plurality of subpixels includes at least one electron transport layer.
    Type: Grant
    Filed: May 13, 2010
    Date of Patent: November 20, 2012
    Assignee: LG Display Co., Ltd.
    Inventor: Sehee Lee
  • Patent number: 8304761
    Abstract: In an organic field effect transistor with an electrical conductor-insulator-semiconductor structure, the semiconductor layer is made of an organic compound, and the insulator layer is made of a polymer obtained through polymerization or copolymerization of 2-cyanoethyl acrylate and/or 2-cyanoethyl methacrylate.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: November 6, 2012
    Assignees: Osaka University, Shin-Etsu Chemical Co., Ltd.
    Inventors: Masateru Taniguchi, Tomoji Kawai, Hideyuki Kawaguchi, Ikuo Fukui
  • Patent number: 8304283
    Abstract: An organic semiconductor material comprising a compound which has a generalized porphyrin skeleton and which has a molecular structure such that the distance from the generalized porphyrin ring plane to the center of each atom forming the generalized porphyrin skeleton, is not more than 1A.
    Type: Grant
    Filed: October 13, 2009
    Date of Patent: November 6, 2012
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Shinji Aramaki, Noboru Ono
  • Patent number: 8293658
    Abstract: Methods and structures relating to the formation of mixed SAMs for preventing undesirable growth or nucleation on exposed surfaces inside a reactor are described. A mixed SAM can be formed on surfaces for which nucleation is not desired by introducing a first SAM precursor having molecules of a first length and a second SAM precursor having molecules of a second length shorter than the first. Examples of exposed surfaces for which a mixed SAM can be provided over include reactor surfaces and select surfaces of integrated circuit structures, such as insulator and dielectric layers.
    Type: Grant
    Filed: February 17, 2010
    Date of Patent: October 23, 2012
    Assignee: ASM America, Inc.
    Inventors: Eric Shero, Mohith Verghese, Anthony Muscat, Shawn Miller
  • Patent number: 8288767
    Abstract: A method for forming a thin-film transistor (TFT) includes providing a substrate, forming a first patterned conducting layer on the substrate, forming an organic dielectric layer on the first patterned conducting layer and the substrate, forming a seeding layer on the organic dielectric layer, using the seeding layer as a crystal growing base to form an inorganic semiconductor layer on the seeding layer, and forming a second patterned conducting layer on the inorganic semiconductor layer.
    Type: Grant
    Filed: January 4, 2010
    Date of Patent: October 16, 2012
    Assignee: National Taiwan University
    Inventors: Ching-Fuh Lin, Chun-Yu Lee
  • Patent number: 8288764
    Abstract: An organic electronic device which has stable physical properties and which allows easy production is provided. The organic electronic device has a conductive path including fine particles, a first organic semiconductor molecule which has a first conductive type and binds at least two of the fine particles together, and a second organic semiconductor molecule which has a second conductive type and is captured in a state of noncovalent bond in a molecule recognition site that exists among the fine particles.
    Type: Grant
    Filed: February 16, 2010
    Date of Patent: October 16, 2012
    Assignee: Sony Corporation
    Inventors: Choi Myung-Seok, Ryoichi Yasuda
  • Patent number: 8269309
    Abstract: In order to improve the reliability of a semiconductor device having a fuse formed by a Damascene technique, a barrier insulating film and an inter-layer insulating film are deposited over a fourth-layer wiring and a fuse. The barrier insulating film is an insulating film for preventing the diffusion of Cu and composed of a SiCN film deposited by plasma CVD like the underlying barrier insulating film. The thickness of the barrier insulating film covering the fuse is larger than the thickness of the underlying barrier insulating film so as to improve the moisture resistance of the fuse.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: September 18, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Katsuhiko Hotta, Kyoko Sasahara, Taichi Hayamizu, Yuichi Kawano
  • Publication number: 20120205787
    Abstract: An antireflective coating that contains at least two polymer components and comprises chromophore moieties and transparent moieties is provided. The antireflective coating is useful for providing a single-layer composite graded antireflective coating formed beneath a photoresist layer.
    Type: Application
    Filed: March 19, 2012
    Publication date: August 16, 2012
    Applicant: International Business Machines Corporation
    Inventors: Dario L. Goldfarb, Libor Vyklick, Sean D. Burns, David R. Medeiros, Daniel P. Sanders, Robert D. Allen
  • Patent number: 8242487
    Abstract: There is provided an anode for an organic electronic device. The anode is a conducting inorganic material having an oxidized surface layer. The surface layer is non-conductive and hole-transporting.
    Type: Grant
    Filed: May 18, 2009
    Date of Patent: August 14, 2012
    Assignee: E I du Pont de Nemours and Company
    Inventor: Shiva Prakash
  • Patent number: 8227703
    Abstract: A multilayered circuit board of the present invention has a single-side laminated structure and does not include a core substrate having via-holes formed therethrough and vias for providing electrical connection through the via-holes. The multilayered circuit board includes a plurality of pairs of layers, each pair including a conductor circuit layer and an insulator layer, wherein a glass transition temperature of each insulator layer is 170° C. or higher, a coefficient of thermal expansion at the glass transition temperature or lower of each insulator layer is 35 ppm or less, and a modulus of elasticity of each insulator layer is 5 GPa or more.
    Type: Grant
    Filed: January 17, 2008
    Date of Patent: July 24, 2012
    Assignee: Sumitomo Bakelite Company, Ltd.
    Inventors: Hironori Maruyama, Kensuke Nakamura, Toru Meura, Hiroshi Hirose
  • Patent number: 8222635
    Abstract: An electronic device includes at least a substrate, an area on the substrate which has to be protected against moisture and/or oxygen, at least one contact, and an encapsulation layer system including at least a first inorganic layer. The at least one contact extends from the sealed area to a part of the substrate not sealed by the encapsulation layer system. The contact includes a shunt, which is an interruption bridged by an electrically conductive bridge. The first inorganic layer of the encapsulation system is applied so that it is in direct physical contact with the electrically conductive bridge. The bridge has a structure and shape which can be sealingly covered by the encapsulation layer system and is made from a material through which no moisture and/or oxygen can penetrate.
    Type: Grant
    Filed: March 20, 2007
    Date of Patent: July 17, 2012
    Assignee: OTB Solar B.V.
    Inventors: Bas Jan Emile Van Rens, Ruediger Lange
  • Patent number: 8217385
    Abstract: Disclosed herein are an organic memory device and a method for fabricating the device. The organic memory device may include a first electrode, a second electrode and an organic active layer wherein the organic active layer includes an upper organic material layer formed of an electrically conductive organic material containing heteroatoms and a lower organic material layer formed of an electrically non-conductive organic material containing heteroatoms. Because the organic memory device exhibits improved thermal stability and non-volatility, it may be well suited for use in nonvolatile large-capacity storage units. Flexible electrodes may be used in the organic memory device to fabricate flexible memory devices.
    Type: Grant
    Filed: December 1, 2006
    Date of Patent: July 10, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won Jae Joo, Sang Kyun Lee
  • Patent number: 8198624
    Abstract: An organic light emitting device is disclosed. The organic light emitting device includes a substrate, a display positioned on the substrate, and a dummy pattern positioned at an edge of the display. The display includes a plurality of subpixels each including a first electrode, an emissive unit including at least an organic emissive layer, and a second electrode. The dummy pattern includes a dummy layer including the same formation material as that of at least one of a plurality of layers for forming the emissive unit.
    Type: Grant
    Filed: August 3, 2007
    Date of Patent: June 12, 2012
    Assignee: LG Display Co., Ltd.
    Inventor: Chonghyun Park
  • Patent number: 8188577
    Abstract: The present invention provides a production method of a semiconductor device, involving formation of a flattening layer and easy process for layers formed on a semiconductor layer, and also provides a semiconductor device preferably produced by such a production method. The present invention further provides an exposure apparatus preferably used in such a production method.
    Type: Grant
    Filed: July 14, 2008
    Date of Patent: May 29, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Seiichi Uchida, Hiroyuki Ogawa
  • Patent number: 8187973
    Abstract: A method for manufacturing a semiconductor device which includes: alternately supplying a silicon source and an oxidant to deposit a silicon oxide film on a surface of a semiconductor substrate, wherein the silicon source is supplied under a supply condition where an adsorption amount of molecules of the silicon source on the semiconductor substrate is increased without causing an adsorption saturation of the molecules of the silicon source on the semiconductor substrate, and wherein the oxidant is supplied under a supply condition where impurities remain in the molecules of the silicon source adsorbed on the semiconductor substrate.
    Type: Grant
    Filed: March 16, 2009
    Date of Patent: May 29, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuyuki Sekine, Kazuhei Yoshinaga
  • Patent number: 8188576
    Abstract: A compound for filling small gaps in a semiconductor device, a composition for filling small gaps in a semiconductor device, and a method of fabricating a semiconductor capacitor, the compound including hydrolysates prepared by hydrolysis, in the presence of an acid catalyst, of compounds represented by Formulae 1, 2, and 3: [RO]3Si—[CH2]nR???(1) wherein, in Formula 1, n is an integer from 0 to about 10, and R and R? are each independently a hydrogen atom, a C1-C12 alkyl group, or a C6-C20 aryl group; HOOC[CH2]nR2Si—O—SiR?2[CH2]nCOOH??(2) wherein, in Formula 2, each n is independently an integer from 0 to about 10, and R and R? are each independently a C1-C12 alkyl group or a C6-C20 aryl group; and R3Si—O—X??(3) wherein, in Formula 3, X is R? or SiR?3, and R and R? are each independently a C1-C12 alkyl group or a C6-C20 aryl group, or a polycondensate prepared by polycondensation of the hydrolysates represented by Formulae 1, 2, and 3.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: May 29, 2012
    Assignee: Cheil Industries, Inc.
    Inventors: Sung Jae Lee, Hee Jae Kim, Tae Ho Kim, Sang Geun Yun, Chang Soo Woo
  • Patent number: 8178866
    Abstract: The present invention provides an optoelectronic memory device, the method for manufacturing and evaluating the same. The optoelectronic memory device according to the present invention includes a substrate, an insulation layer, an active layer, source electrode and drain electrode. The substrate includes a gate, and the insulation layer is formed on the substrate. The active layer is formed on the insulation layer, and more particularly, the active layer is formed of a composite material comprising conjugated conductive polymers and quantum dots. Moreover, both of the source and the drain are formed on the insulation layer, and electrically connected to the active layer.
    Type: Grant
    Filed: June 15, 2009
    Date of Patent: May 15, 2012
    Assignee: National Chiao Tung University
    Inventors: Kung-Hwa Wei, Jeng-Tzong Sheu, Chen-Chia Chen, Mao-Yuan Chiu
  • Patent number: 8143706
    Abstract: Embodiments of methods, apparatuses, devices, and/or systems for forming a component having dielectric sub-layers are described.
    Type: Grant
    Filed: July 16, 2007
    Date of Patent: March 27, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Peter Mardilovich, Laura Kramer, Gregory S Herman, Randy Hoffman, David Punsalan
  • Patent number: 8138502
    Abstract: To prevent a point defect and a line defect in forming a light-emitting device, thereby improving the yield. A light-emitting element and a driver circuit of the light-emitting element, which are provided over different substrates, are electrically connected. That is, a light-emitting element and a driver circuit of the light-emitting element are formed over different substrates first, and then electrically connected. By providing a light-emitting element and a driver circuit of the light-emitting element over different substrates, the step of forming the light-emitting element and the step of forming the driver circuit of the light-emitting element can be performed separately. Therefore, degrees of freedom of each step can be increased, and the process can be flexibly changed. Further, steps (irregularities) on the surface for forming the light-emitting element can be reduced than in the conventional technique.
    Type: Grant
    Filed: July 25, 2006
    Date of Patent: March 20, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Osamu Nakamura, Miyuki Higuchi, Yasuko Watanabe, Yasuyuki Arai
  • Patent number: 8138578
    Abstract: A method and system for providing a twin well in a semiconductor device is described. The method and system include providing at least one interference layer and providing a first mask that covers a first portion of the semiconductor device and uncovers a second portion of the semiconductor device. The first and second portions of the semiconductor device are adjacent. The method and system also include implanting a first well in the second portion of the semiconductor device after the first mask is provided. The method and system also include providing a second mask. The interference layer(s) are configured such that energy during a blanket exposure develops the second mask that uncovers the first portion and covers the second portion of the semiconductor device. The method and system also include implanting a second well in the first portion of the semiconductor device after the second mask is provided.
    Type: Grant
    Filed: April 20, 2009
    Date of Patent: March 20, 2012
    Assignee: Atmel Corporation
    Inventors: Gayle W. Miller, Jr., Bryan D. Sendelweck
  • Patent number: 8138580
    Abstract: In order to provide an adhesive composition for electronic components that is excellent in adhesion durability under long-term high temperature conditions, thermal cyclability, and insulation reliability, designed is an adhesive composition for electronic components containing a thermoplastic resin (a), an epoxy resin (b), a hardener (c), and an organopolysiloxane (d), wherein the glass transition temperature (Tg) after curing is ?10° C. to 50° C. and the rate of change of Tg after heat-treating the composition at 175° C. for 1000 hours is 15% or less.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: March 20, 2012
    Assignee: Toray Industries, Inc.
    Inventors: Yukitsuna Konishi, Hirohumi Tsuchiya, Shinsuke Kimura, Yasushi Sawamura
  • Patent number: 8134149
    Abstract: The present invention has an object of providing a light emitting device including an OLED formed on a plastic substrate, which can prevent the degradation due to penetration of moisture or oxygen. On a plastic substrate, a plurality of films for preventing oxygen or moisture from penetrating into an organic light emitting layer in the OLED (hereinafter, referred to as barrier films) and a film having a smaller stress than that of the barrier films (hereinafter, referred to as a stress relaxing film), the film being interposed between the barrier films, are provided. Owing to a laminate structure of a plurality of barrier films, even if a crack occurs in one of the barrier films, the other barrier film(s) can effectively prevent moisture or oxygen from penetrating into the organic light emitting layer. Moreover, the stress relaxing film, which has a smaller stress than that of the barrier films, is interposed between the barrier films, thereby making it possible to reduce a stress of the entire sealing film.
    Type: Grant
    Filed: May 16, 2011
    Date of Patent: March 13, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Mai Akiba
  • Patent number: 8120019
    Abstract: An organic light-emitting element has an anode, a cathode, and a layer including an organic compound between the anode and the cathode. The layer including the organic compound has at least one tetracyano compound represented by at least one of Formula (1) or (2) below. In Formula (1), R1 to R4 are each a hydrogen atom, a halogen atom, a substituted or unsubstituted alkyl group, a substituted or unsubstituted alkoxy group, a substituted or unsubstituted aralkyl group, a substituted or unsubstituted aromatic group, a nitro group, or a cyano group. In Formula (2), n represents an integer of 1 to 2, Mn+ is a metal ion or an onium cation, and R1 to R4 are as defined in formula (1).
    Type: Grant
    Filed: December 15, 2008
    Date of Patent: February 21, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koichi Nakata, Kazunori Ueno, Koichi Suzuki
  • Patent number: 8119533
    Abstract: Provided is a semiconductor device. The device includes a substrate having a photo acid generator (PAG) layer on the substrate. The PAG layer is exposed to radiation. A photoresist layer is formed on the exposed PAG layer. The exposed PAG layer generates an acid. The acid decomposes a portion of the formed photoresist layer. In one embodiment, the PAG layer includes organic BARC. The decomposed portion of the photoresist layer may be used as a masking element.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: February 21, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: George Liu, Kuei Shun Chen, Vencent Chang, Shang-Wen Chang
  • Patent number: 8114785
    Abstract: Electrical structures and devices may be formed and include an organic passivating layer that is chemically bonded to a silicon-containing semiconductor material to improve the electrical properties of electrical devices. In different embodiments, the organic passivating layer may remain within finished devices to reduce dangling bonds, improve carrier lifetimes, decrease surface recombination velocities, increase electronic efficiencies, or the like. In other embodiments, the organic passivating layer may be used as a protective sacrificial layer and reduce contact resistance or reduce resistance of doped regions. The organic passivation layer may be formed without the need for high-temperature processing.
    Type: Grant
    Filed: July 20, 2009
    Date of Patent: February 14, 2012
    Assignee: California Institute of Technology
    Inventors: Nathan S. Lewis, William J. Royea
  • Patent number: 8106385
    Abstract: Disclosed is materials design for prolonging the duration of the low relative dielectric constant of an organic siloxane film having a low relative dielectric constant. Specifically, in an organic siloxane film having a relative dielectric constant of not more than 2.1, the elemental ratio of carbon to silicon in the film is set to not less than 0.10 and not more than 0.55.
    Type: Grant
    Filed: June 17, 2005
    Date of Patent: January 31, 2012
    Assignee: Hitachi Chemical Co., Ltd.
    Inventors: Daisuke Ryuzaki, Hiroshi Fukuda
  • Patent number: 8097932
    Abstract: A method for fabricating a SiCOH dielectric material comprising Si, C, O and H atoms from a single organosilicon precursor with a built-in organic porogen is provided. The single organosilicon precursor with a built-in organic porogen is selected from silane (SiH4) derivatives having the molecular formula SiRR1R2R3, disiloxane derivatives having the molecular formula R4R5R6—Si—O—Si—R7R8R9, and trisiloxane derivatives having the molecular formula R10R11R12—Si—O—Si—R13R14—O—Si—R15R16R17 where R and R1-17 may or may not be identical and are selected from H, alkyl, alkoxy, epoxy, phenyl, vinyl, allyl, alkenyl or alkynyl groups that may be linear, branched, cyclic, polycyclic and may be functionalized with oxygen, nitrogen or fluorine containing substituents. In addition to the method, the present application also provides SiCOH dielectrics made from the inventive method as well as electronic structures that contain the same.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: January 17, 2012
    Assignee: International Business Machines Corporation
    Inventors: Son Van Nguyen, Stephen McConnell Gates, Deborah A. Neumayer, Alfred Grill