At Least One Layer Of Organic Material Patents (Class 257/642)
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Publication number: 20120001304Abstract: There are provided a semiconductor device and a semiconductor device manufacturing method capable of preventing electrical leakage while suppressing increase of wiring resistance and deterioration of productivity. The semiconductor device manufacturing method for forming on a substrate a semiconductor device having a porous low-k film serving as an interlayer insulating film. Further, the semiconductor device manufacturing method includes forming the low-k film on the substrate; etching the low-k film to form a trench or a hole therein; reforming a surface of the low-k film exposed by etching the low-k film by allowing plasma of a nitro compound to act on the exposed surface within the trench or the hole; and filling the trench or the hole with a conductor.Type: ApplicationFiled: June 29, 2011Publication date: January 5, 2012Applicant: TOKYO ELECTRON LIMITEDInventor: Ryuichi Asako
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Patent number: 8089161Abstract: A semiconductor device has a substrate, an insulating interlayer, an interconnect as one example of an electro-conductive pattern, a through-electrode, and a bump as one example of a connection terminal, wherein the insulating interlayer is positioned up above the surface of the substrate, the interconnect is positioned on the surface of the insulating interlayer, the through-electrode extends through the substrate and the insulating interlayer, from the back surface of the former to the surface of the latter, one end of which is connected to the interconnect, and the bump is provided on the back surface side of the substrate, and connected to the other end of the through-electrode.Type: GrantFiled: April 21, 2009Date of Patent: January 3, 2012Assignee: Renesas Electronics CorporationInventor: Masahiro Komuro
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Patent number: 8076681Abstract: A high-efficiency, white organic electroluminescent device has such a structure that its emission layer is obtained by laminating sub-emission layers of red, green, and blue, respectively. The green sub-emission layer contacting a hole transport layer has a delayed fluorescent material, and the red sub-emission layer has a phosphorescent light emitting material.Type: GrantFiled: October 5, 2009Date of Patent: December 13, 2011Assignee: Canon Kabushiki KaishaInventors: Toshifumi Mori, Koichi Suzuki, Akira Tsuboyama, Satoru Shiobara, Kenichi Ikari
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Patent number: 8058711Abstract: A filler for filling a gap includes a hydrogenated polysiloxazane having an oxygen content of about 0.2 to about 3 wt %. A chemical structure of the hydrogenated polysiloxazane includes first, second, and third moieties represented by the following respective Chemical Formulas 1-3: The third moiety is on a terminal end of the hydrogenated polysiloxazane, and an amount of the third moiety is about 15 to about 35% based on a total amount of Si—H bonds in the hydrogenated polysiloxazane.Type: GrantFiled: November 30, 2010Date of Patent: November 15, 2011Assignee: Cheil Industries, Inc.Inventors: Sang-Hak Lim, Hui-Chan Yun, Dong-Il Han, Taek-Soo Kwak, Jin-Hee Bae, Jung-Kang Oh, Sang-Kyun Kim, Jong-Seob Kim
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Patent number: 8053765Abstract: Disclosed is an organic electroluminescent element containing organic layers sandwiched between an anode and a cathode, wherein the organic layers incorporates an emission layer A containing a host compound A and at least two types of emission dopants, and an emission layer B containing a host compound B and at least one type of emission dopant, provided that at least one of the emission dopants contained in the emission layer A is a phosphorescence-emitting material.Type: GrantFiled: November 7, 2006Date of Patent: November 8, 2011Assignee: Konica Minolta Holdings, Inc.Inventors: Aki Tsuji, Hiroshi Kita, Yoshiyuki Suzuri
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Patent number: 8053687Abstract: Provided are a semiconductor device and a touch sensor device. The semiconductor device includes a die including a sense signal generator for sensing a touch signal to generate a sense signal; a conductive die-attach pad attached to the die to generate the touch signal; and a package for packaging the die and the die-attach pad, wherein the die-attach pad generates the touch signal depending on whether a touch object comes into contact with the package. The touch sensor device includes a plurality of semiconductor devices connected in a daisy-chain communication mode, wherein each of the semiconductor devices includes a die including a sense signal generator for sensing a touch signal to generate a sense signal; a conductive die-attach pad attached to the die to generate the touch signal; and a package for packaging the die and the die-attach pad, wherein the die-attach pad generates the touch signal depending on whether a touch object is brought into contact with the package.Type: GrantFiled: May 28, 2007Date of Patent: November 8, 2011Assignee: Atlab Inc.Inventors: Duck-Young Jung, Jin-Woo Chung, Bang-Won Lee
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Patent number: 8044505Abstract: A prepreg which can meet a demand for thickness reduction is provided. The prepreg has first and second resin layers having different applications, functions, capabilities, or properties, and allows an amount of a resin composition in each of the first and second resin layers to be set appropriately depending on a circuit wiring portion to be embedded into the second resin layer. Further, a method for manufacturing the above prepreg, and a substrate and a semiconductor device having the prepreg are also provided.Type: GrantFiled: November 30, 2006Date of Patent: October 25, 2011Assignee: Sumitomo Bakelite Company LimitedInventors: Takeshi Hosomi, Maroshi Yuasa, Kazuya Hamaya, Takayuki Baba
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Publication number: 20110254142Abstract: A stacked structure for patterning a material layer to form an opening pattern with a predetermined opening width in the layer is provided. The stacked structure includes an underlayer, a silicon rich organic layer, and a photoresist layer. The underlayer is on the material layer. The silicon rich organic layer is between the underlayer and the photoresist layer. The thickness of the photoresist layer is smaller than that of the underlayer and larger than two times of the thickness of the silicon rich organic layer. The thickness of the underlayer is smaller than three times of the predetermined opening width.Type: ApplicationFiled: June 24, 2011Publication date: October 20, 2011Inventors: Meng-Jun Wang, Yi-Hsing Chen, Jiunn-Hsiung Liao, Min-Chieh Yang, Chuan-Kai Wang
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Patent number: 8035202Abstract: A semiconductor chip of the present invention has a wiring substrate and a chip part. The wiring substrate has an insulating resin layer having a first major surface and a second major surface, and a first wiring layer disposed on the insulating resin layer on the second major surface side. The chip part has a projection electrode on the bottom surface. The insulating resin layer holds the chip part such that the bottom and side surfaces of the chip part are in contact with the insulating resin layer, and the top surface of the chip part is exposed on the insulating layer on the first major surface side. The projection electrode of the chip part is connected with the first wiring layer.Type: GrantFiled: July 6, 2009Date of Patent: October 11, 2011Assignee: NEC CorporationInventors: Shinji Watanabe, Yukio Yamaguchi
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Patent number: 8017937Abstract: The invention relates to a semiconductor component having a metal-insulator structure (MIS) which contains as basic components a substrate, a layer made of an organic semiconductor material and a dielectric layer as insulator. The substrate and/or the dielectric layer made of an inorganic-organic hybrid polymer is chosen from these basic components. In addition, the invention relates to a method for the production of semiconductor components of this type and also to the use of inorganic-organic hybrid polymers for the production of semiconductor components.Type: GrantFiled: October 21, 2005Date of Patent: September 13, 2011Assignees: Fraunhofer-Gesellschaft zur Foerderung der Angewandten Forschung E.V., Joanneum Research ForSchungsgesellschaft MBHInventors: Ruth Houbertz-Krauss, Angelika Schmitt, Gerhard Domann, Michael Popall, Barbara Stadlober, Ursula Haas, Anja Haase
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Patent number: 8012586Abstract: Embodiments of the invention include articles comprising a diamond like carbon coating or doped diamond like carbon coating on one or more surfaces of a plastic substrate or a plastic enclosure. Embodiments of the DLC or doped DLC coatings reduce the gas permeation of the coated plastic or thermoplastic to hydrogen or helium compared to the permeability of the plastic alone. The DLC or doped DLC coatings coating provides a surface resistivity of from about 107 to about 1014 ohm/square and have a transmittance that range from about 0% to about 70% less than the transmittance of the underlying plastic substrate in the range of about 300 nm to about 1100 nm. The DLC coated plastic can be used in environmental enclosures for protecting environmentally sensitive substrates such as semiconductor wafers and reticles.Type: GrantFiled: June 14, 2007Date of Patent: September 6, 2011Assignee: Entegris, Inc.Inventors: Charles W. Extrand, Sung In Moon
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Patent number: 8003976Abstract: An organic light-light conversion device excellent in device characteristics, comprising a light sensing unit having a layer including a photo-conductive organic semiconductor developing a photo-current multiplication phenomenon by light irradiation, and a light emitting unit having a layer including an electroluminescent organic semiconductor emitting light by current injection, characterized in that at least one of the photo-conductive organic semiconductor and an electroluminescent organic semiconductor is polymer semiconductor. An imaging intensifier consisting of a plurality of arranged above organic light-light conversion devices. An optical sensor provided with a means of measuring and outputting voltages applied to the above organic light-light conversion device and to the opposite ends of a layer including the electroluminescent organic semiconductor.Type: GrantFiled: December 16, 2004Date of Patent: August 23, 2011Assignee: Sumitomo Chemical Company, LimitedInventors: Kenichi Nakayama, Masaaki Yokoyama, Masato Ueda
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Patent number: 7998875Abstract: A method of treating a nanoporous low-k dielectric material formed on a semiconductor substrate is provided. The low-k dielectric material has etched openings with an etch damaged region containing silanol groups on exterior surfaces of the etched openings and on interior surfaces of interconnected pores. First, the low-k dielectric material is contacted with a vapor phase catalyst in an amount effective to form hydrogen bonds between the catalyst and the silanol groups in the etch damaged region, forming a catalytic intermediary.Type: GrantFiled: December 8, 2008Date of Patent: August 16, 2011Assignee: Lam Research CorporationInventor: James DeYoung
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Patent number: 7999355Abstract: The present invention is a process for spin-on deposition of a silicon dioxide-containing film under oxidative conditions for gap-filling in high aspect ratio features for shallow trench isolation used in memory and logic circuit-containing semiconductor substrates, such as silicon wafers having one or more integrated circuit structures contained thereon, comprising the steps of: providing a semiconductor substrate having high aspect ratio features; contacting the semiconductor substrate with a liquid formulation comprising a low molecular weight aminosilane; forming a film by spreading the liquid formulation over the semiconductor substrate; heating the film at elevated temperatures under oxidative conditions. Compositions for this process are also set forth.Type: GrantFiled: June 26, 2009Date of Patent: August 16, 2011Assignee: Air Products and Chemicals, Inc.Inventors: Scott Jeffrey Weigel, Mark Leonard O'Neill, Bing Han, Hansong Cheng, Manchao Xiao, Chia-Chien Lee
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Patent number: 7985967Abstract: There have been problems in that a dedicated apparatus is needed for a conventional method of manufacturing an organic thin film transistor and in that: a little amount of an organic semiconductor film is formed with respect to a usage amount of a material; and most of the used material is discarded. Further, apparatus maintenance such as cleaning of the inside of an apparatus cup or chamber has needed to be frequently carried out in order to remove the contamination resulting from the material that is wastefully discarded. Therefore, a great cost for materials and man-hours for maintenance of apparatus have been required. In the present invention, a uniform organic semiconductor film is formed by forming an aperture between a first substrate for forming the organic semiconductor film and a second substrate used for injection with an insulating film formed at a specific spot and by injecting an organic semiconductor film material into the aperture due to capillarity to the aperture.Type: GrantFiled: October 26, 2009Date of Patent: July 26, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshiharu Hirakata, Tetsuji Ishitani, Shuji Fukai, Ryota Imahayashi
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Patent number: 7981773Abstract: Systems and methodologies are provided for forming a diode component integral with a memory cell to facilitate programming arrays of memory cells created therefrom. Such a diode component can be part of a PN junction of memory cell having a passive and active layer with asymmetric semiconducting properties. Such an arrangement reduces a number of transistor-type voltage controls and associated power consumption, while enabling individual memory cell programming as part of a passive array. Moreover, the system provides for an efficient placement of memory cells on a wafer surface, and increases an amount of die space available for circuit design.Type: GrantFiled: May 22, 2009Date of Patent: July 19, 2011Assignee: Spansion LLCInventors: Juri H. Krieger, Stuart Spitzer
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Patent number: 7977771Abstract: The semiconductor device according to the present invention includes: a semiconductor chip including a wire and a passivation film formed on the outermost surface with an opening partially exposing the wire; a resin layer stacked on the semiconductor chip and provided with a through-hole in a position opposed to a portion of the wire facing the opening; and a pad formed on a peripheral portion of the through-hole in the resin layer and in the through-hole so that an external connection terminal is arranged on the surface thereof. The peripheral portion of the resin layer is formed more thickly than the remaining portion of the resin layer other than the peripheral portion.Type: GrantFiled: July 2, 2009Date of Patent: July 12, 2011Assignee: Rohm Co., Ltd.Inventor: Shingo Higuchi
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Patent number: 7968873Abstract: The present invention relates to an organic light emitting device and a manufacturing method thereof. The organic light emitting device according to an exemplary embodiment of the present invention includes a first thin film transistor disposed on a substrate, an organic layer disposed on the first thin film transistor, a pixel electrode disposed on the organic layer and connected to the first thin film transistor, a partition disposed on the pixel electrode and the organic layer, and an organic emission layer disposed on the pixel electrode and contacting the partition. The partition has an organic layer exposing hole that exposes a portion of the organic layer and an opening that exposes a portion of the pixel electrode.Type: GrantFiled: December 8, 2008Date of Patent: June 28, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-Pil Lee, Chang-Woong Chu, Jin-Koo Chung, Chang-Mo Park
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Patent number: 7968966Abstract: In order to improve the reliability of a semiconductor device having a fuse formed by a Damascene technique, a barrier insulating film and an inter-layer insulating film are deposited over a fourth-layer wiring and a fuse. The barrier insulating film is an insulating film for preventing the diffusion of Cu and composed of a SiCN film deposited by plasma CVD like the underlying barrier insulating film. The thickness of the barrier insulating film covering the fuse is larger than the thickness of the underlying barrier insulating film so as to improve the moisture resistance of the fuse.Type: GrantFiled: September 21, 2009Date of Patent: June 28, 2011Assignee: Renesas Electronics CorporationInventors: Katsuhiko Hotta, Kyoko Sasahara, Taichi Hayamizu, Yuichi Kawano
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Patent number: 7968187Abstract: A composite is provided, comprising a substrate and a film on the substrate. The film has an RMS surface roughness of 25 nm to 500 nm, a film coverage of 25% to 60%, a surface energy of less than 70 dyne/cm; and a durability of 10 to 5000 microNewtons. Depending on the particular environment in which the film is to be used, a durability of 10 to 500 microNewtons may be preferred. A film thickness 3 to 100 times the RMS surface roughness of the film is preferred.Type: GrantFiled: September 12, 2008Date of Patent: June 28, 2011Assignee: Integrated Surface TechnologiesInventors: Jeff Chinn, W. Robert Ashurst, Adam Anderson
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Patent number: 7960718Abstract: Fabrication of thin-film transistor devices on polymer substrate films that is low-temperature and fully compatible with polymer substrate materials. The process produces micron-sized gate length structures that can be fabricated using inkjet and other standard printing techniques. The process is based on microcrack technology developed for surface conduction emitter configurations for field emission devices.Type: GrantFiled: July 2, 2007Date of Patent: June 14, 2011Assignee: Applied Nanotech Holdings, Inc.Inventors: Richard Lee Fink, Zvi Yaniv
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Patent number: 7960717Abstract: An electronic device includes a substrate, a first organic electronic component overlying the substrate, wherein, from a plan view, the first organic electronic component defines a perimeter of a first pixel area, and at least one post structure, wherein the at least one post structure lies within the perimeter of the first pixel area. The electronic device can also include a confinement structure overlying the substrate and having a first opening, wherein from a plan view, the first opening has a perimeter that substantially corresponds to a perimeter of the first organic electronic component.Type: GrantFiled: December 22, 2006Date of Patent: June 14, 2011Assignee: E.I. du Pont de Nemours and CompanyInventor: Ian D. Parker
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Patent number: 7956349Abstract: By introducing new concepts into a structure of a conventional organic semiconductor element and without using a conventional ultra thin film, an organic semiconductor element is provided which is more reliable and has higher yield. Further, efficiency is improved particularly in a photoelectronic device using an organic semiconductor. Between an anode and a cathode, there is provided an organic structure including alternately laminated organic thin film layer (functional organic thin film layer) realizing various functions by making an SCLC flow, and a conductive thin film layer (ohmic conductive thin film layer) imbued with a dark conductivity by doping it with an acceptor and a donor, or by the like method.Type: GrantFiled: December 4, 2002Date of Patent: June 7, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Tetsuo Tsutsui, Hiroko Yamazaki, Satoshi Seo
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Patent number: 7951729Abstract: A passivating coupling material for, on the one hand, passivating a dielectric layer in a semiconductor device, and on the other hand, for permitting or at least promoting liquid phase metal deposition thereon in a subsequent process step. In a particular example, the dielectric layer may be a porous material having a desirably decreased dielectric constant k, and the passivating coupling material provides steric shielding groups that substantially block the adsorption and uptake of ambient moisture into the porous dielectric layer. The passivating coupling materials also provides metal nucleation sides for promoting the deposition of a metal thereon in liquid phase, in comparison with metal deposition without the presence of the passivating coupling material. The use of a liquid phase metal deposition process facilitates the subsequent manufacture of the semiconductor device.Type: GrantFiled: February 12, 2010Date of Patent: May 31, 2011Assignee: NXP B.V.Inventors: Janos Farkas, Srdjan Kordic, Cindy Goldberg
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Patent number: 7947518Abstract: This invention discloses that photolithography can be made compatible with the production of electronic devices containing sensitive materials, if the sensitive materials are over-coated with an ultra-thin layer of non-reactive materials (e.g. inorganic oxides) before undergoing photolithographic patterning. This protecting layer isolates the sensitive materials from solvents and etching reactants used in photolithographic patterning, and does not need to be removed from the sensitive materials after patterning is completed. This invention enables photolithography to be applied to the production of electronic devices containing sensitive materials, facilitating the development of commercially viable production processes for these devices.Type: GrantFiled: July 30, 2007Date of Patent: May 24, 2011Assignee: National Taiwan UniversityInventors: Feng-Yu Tsai, Syue-Jhao Jhuo
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Patent number: 7932585Abstract: At least one film composite is laminated on a surface of at least one electrical component. The film composite includes at least one electrically-conducting plastic film with at least one electrically conducting conductor. The electrically-conducting plastic film has a high-ohmic resistance. This method may be used in planar large-surface electrical contacting technology for the production of modules with power semiconductors, where an electrical contacting of the components is achieved by the plastic films. A low lateral electrical conductivity is achieved, such that an electrical charging of the plastic films required for the contacting technology is prevented on operation of the component or the module.Type: GrantFiled: July 10, 2006Date of Patent: April 26, 2011Assignee: Siemens AktiengesellschaftInventors: Laurence Amigues, Michael Kaspar, Herbert Schwarzbauer
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Patent number: 7928510Abstract: It is an object of the present invention to provide a manufacturing method of a semiconductor device where a semiconductor element is prevented from being damaged and throughput speed thereof is improved, even in a case of thinning or removing a supporting substrate after forming the semiconductor element over the supporting substrate.Type: GrantFiled: September 18, 2006Date of Patent: April 19, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Ryosuke Watanabe
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Patent number: 7928537Abstract: A functional device having, on a substrate, a pair of electrodes, a functional layer which is sandwiched between the electrodes and has an output that varies in accordance with an applied electric current, and a terminal arranged to apply an electric current to at least one of the electrodes, wherein an insulator is arranged between the electrodes and the density of the insulator decreases as the distance from the terminal increases, or wherein at least one of the electrodes has a notch section, and the ratio of the area of the notch section to the area of the electrode decreases as the distance from the terminal increases. This is an improved functional device which is excellent in production suitability and gives a uniform in-plane output, and can be rendered, in particular, an organic electroluminescence device.Type: GrantFiled: March 28, 2007Date of Patent: April 19, 2011Assignee: Fujifilm CorporationInventors: Toshiro Takahashi, Kazuo Hakamata
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Patent number: 7923820Abstract: A porous dielectric element is produced by forming a first dielectric and a second dielectric. The second dielectric is dispersed in the first dielectric. The second dielectric is then removed from the second dielectric by using a chemical dissolution. The removal of the second dielectric from the first dielectric leaves pores in the first dielectric. The pores, which are filled with air, improve the overall dielectric constant of the resulting dielectric element.Type: GrantFiled: April 22, 2010Date of Patent: April 12, 2011Assignee: STMicroelectronics S.A.Inventors: Simon Jeannot, Laurent Favennec
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Patent number: 7910674Abstract: Methods for the addition polymerization of cycloolefins using a cationic Group 10 metal complex and a weakly coordinating anion of the formula: [(R?)zM(L?)x(L?)y]b[WCA]d wherein [(R?)zM(L?)x(L?)y] is a cation complex where M represents a Group 10 transition metal; R? represents an anionic hydrocarbyl containing ligand; L? represents a Group 15 neutral electron donor ligand; L? represents a labile neutral electron donor ligand; x is 1 or 2; and y is 0, 1, 2, or 3; and z is 0 or 1, wherein the sum of x, y, and z is 4; and [WCA] represents a weakly coordinating counteranion complex; and b and d are numbers representing the number of times the cation complex and weakly coordinating counteranion complex are taken to balance the electronic charge on the overall catalyst complex.Type: GrantFiled: June 18, 2003Date of Patent: March 22, 2011Assignee: Promerus, LLCInventors: Larry Funderburk Rhodes, Andrew Bell, Ramakrishna Ravikiran, John C. Fondran, Saikumar Jayaraman, Brian Leslie Goodall, Richard A. Mimna, John-Henry Lipian
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Patent number: 7902086Abstract: Improving memory retention properties of a polymer memory cell are disclosed. The methods include providing a semiconducting polymer layer containing at least one organic semiconductor and at least one of a carrier ion oxidation preventer and an electrode oxidation preventer. The oxidation preventers may contain at least one of 1) an oxygen scavenger, 2) a polymer with oxidizable side-chain groups which can be preferentially oxidized over the carrier ions/electrodes, and 3) an oxidizable molecule that can be preferentially oxidized over the carrier ions/electrodes.Type: GrantFiled: December 8, 2006Date of Patent: March 8, 2011Assignee: Spansion LLCInventors: Swaroop Kaza, David Gaun, Michael A. Van Buskirk
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Patent number: 7902641Abstract: The present invention relates to a semiconductor device. The semiconductor device includes a fluorocarbon film formed on a substrate and a film containing metal formed on the fluorocarbon film, wherein the content amount of fluorine atom on the fluorocarbon film, which contacts the film containing metal, is in a predetermined range.Type: GrantFiled: July 24, 2008Date of Patent: March 8, 2011Assignee: Tokyo Electron LimitedInventor: Yoshiyuki Kikuchi
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Patent number: 7897517Abstract: A method for depositing one or more materials on a substrate, such as for example, a semiconductor substrate that includes providing the substrate; applying a polymer film to at least a portion of a surface of the substrate; and exposing the semiconductor substrate to a supercritical fluid containing at least one reactant for a time sufficient for the supercritical fluid to swell the polymer and for the at least one reactant to penetrate the polymer film. The reactant is reacted to cause the deposition of the material on at least a portion of the substrate. The substrate is removed from the supercritical fluid, and the polymer film is removed. The process permits the precise deposition of materials without the need for removal of excess material using chemical, physical, or a combination of chemical and physical removal techniques.Type: GrantFiled: July 31, 2009Date of Patent: March 1, 2011Assignee: Micron Technology, Inc.Inventors: Chien M. Wai, Hiroyuki Ohde, Steve Kramer
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Patent number: 7884357Abstract: An organic electronic device which has stable physical properties and which allows easy production is provided. The organic electronic device has a conductive path including fine particles, a first organic semiconductor molecule which has a first conductive type and binds at least two of the fine particles together, and a second organic semiconductor molecule which has a second conductive type and is captured in a state of noncovalent bond in a molecule recognition site that exists among the fine particles.Type: GrantFiled: May 9, 2007Date of Patent: February 8, 2011Assignee: Sony CorporationInventors: Choi Myung-Seok, Ryoichi Yasuda
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Patent number: 7884355Abstract: A transistor including a semiconductive layer; and a gate dielectric layer comprising an insulating polymer, characterised in that the insulating polymer is crosslinked and comprises one or more units having a low cohesive-energy-density and one or more crosslinking groups and the insulating polymer includes substantially no residual —OH leaving groups.Type: GrantFiled: May 12, 2004Date of Patent: February 8, 2011Assignee: Cambridge Enterprise LtdInventors: Lay-Lay Chua, Peter Kian-Hoon Ho, Henning Sirringhaus, Richard Henry Friend
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Patent number: 7883986Abstract: This invention includes methods of forming trench isolation. In one implementation, isolation trenches are provided within a semiconductor substrate. A liquid is deposited and solidified within the isolation trenches to form a solidified dielectric within the isolation trenches. The dielectric comprises carbon and silicon, and can be considered as having an elevationally outer portion and an elevationally inner portion within the isolation trenches. At least one of carbon removal from and/or oxidation of the outer portion of the solidified dielectric occurs. After such, the dielectric outer portion is etched selective to and effective to expose the dielectric inner portion. After the etching, dielectric material is deposited over the dielectric inner portion to within the isolation trenches.Type: GrantFiled: October 1, 2009Date of Patent: February 8, 2011Assignee: Micron Technology, Inc.Inventor: Li Li
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Patent number: 7880165Abstract: Provided is a molecular electronic device including an electrode including a conductive polymer electrode layer. The molecular electronic device includes a first electrode; a funtional molecular active layer, self-assembled on the first electrode, including an electroactive functional group having a cyclic compound; and a second electrode disposed on the functional molecular active layer. The second electrode includes a conductive polymer electrode layer contacting with the functional molecular active layer and a metal electrode layer disposed on the conductive polymer electrode layer. The conductive polymer electrode layer of the second electrode prevents damage to the functional molecular active layer, thereby preventing a short circuit in an ultra-thin molecular electronic device.Type: GrantFiled: July 12, 2007Date of Patent: February 1, 2011Assignee: Electronics and Telecommunications Research InstituteInventors: Hyoyoung Lee, Junghyun Lee, Ja Ryong Koo, Mi Hee Jung
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Patent number: 7879739Abstract: Embodiments of the invention provide a method to form a high-k dielectric layer on a group III-V substrate with substantially no oxide of the group III-V substrate between the substrate and high-k dielectric layer. Oxide may be removed from the substrate. An organometallic compound may form a capping layer on the substrate from which the oxide was removed. The high-k dielectric layer may then be formed, resulting in a thin transition layer between the substrate and high-k dielectric layer and substantially no oxide of the group III-V substrate between the substrate and high-k dielectric layer.Type: GrantFiled: May 9, 2006Date of Patent: February 1, 2011Assignee: Intel CorporationInventors: Willy Rachmady, James Blackwell, Suman Datta, Jack T. Kavalieros, Mantu K. Hudait
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Patent number: 7872333Abstract: A layer system is described including a silicon layer and a passivation layer which is applied at least regionally to the silicon layer's surface, the passivation layer having a first, at least largely inorganic partial layer and a second partial layer, the second partial layer being made of an organic compound including silicon or containing such a material. In particular, the second partial layer is structured in the form of a “self-assembled monolayer.” Furthermore, a method is described for creating a passivation layer on a silicon layer, a first, inorganic partial layer being created on the silicon layer and a second partial layer, containing an organic compound including silicon or being made thereof, being created at least in certain areas on the first partial layer. Both partial layers form the passivation layer. The described layer system or the described method is particularly suited for creating self-supporting structures in silicon.Type: GrantFiled: May 6, 2003Date of Patent: January 18, 2011Assignee: Robert Bosch GmbHInventors: Franz Laermer, Lutz Mueller, Winfried Bernhard
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Patent number: 7863745Abstract: A semiconductor device, including a semiconductor substrate where a plurality of functional elements is formed; and a multilayer interconnection layer provided over the semiconductor substrate, the multilayer interconnection layer including a wiring layer mutually connecting the plural functional elements and including an interlayer insulation layer, wherein a region where the wiring layer is formed is surrounded by a groove forming part, the groove forming part piercing the multilayer interconnection layer; and the groove forming part is filled with an organic insulation material.Type: GrantFiled: November 13, 2006Date of Patent: January 4, 2011Assignee: Fujitsu Semiconductor LimitedInventors: Ryuji Nomoto, Hirohisa Matsuki
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Patent number: 7858974Abstract: An organic light-emitting display panel having a storage capacitor comprised of a storage electrode overlapping a power line with a first gate-insulating layer disposed therebetween, wherein the storage capacitor includes a groove portion formed on a lateral side of the power line overlapping the storage electrode so that the overlapping area of the power line and the storage electrode is kept constant, and a method of manufacturing the same.Type: GrantFiled: February 28, 2008Date of Patent: December 28, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Young Soo Yoon, Joon Chul Goh, Beohm Rock Choi
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Patent number: 7848095Abstract: In a structure of mounting an electronic device into a housing according to the present invention, the electronic device has the following structure. First and second storage devices are connected to respective connecting parts provided on a substrate. Convex portions provided on a first supporting member are fitted from above into a gap between the first storage device and the substrate and a gap between the second storage device and the substrate, respectively. Convex portions provided on a second supporting member are fitted from below into the gap between the first storage device and the substrate and the gap between the second storage device and the substrate, respectively. The electronic device into which the first and second supporting members are fitted is inserted into the housing from an opening thereof, and fixed within the housing by the housing and a cover.Type: GrantFiled: March 3, 2009Date of Patent: December 7, 2010Assignee: Buffalo Inc.Inventors: Tomoaki Kouyama, Jun Matsui
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Patent number: 7838870Abstract: By introducing new concepts into a structure of a conventional organic semiconductor element and without using a conventional ultra thin film, an organic semiconductor element is provided which is more reliable and has higher yield. Further, efficiency is improved particularly in a photoelectronic device using an organic semiconductor. Between an anode and a cathode, there is provided an organic structure including alternately laminated organic thin film layer (functional organic thin film layer) realizing various functions by making an SCLC flow, and a conductive thin film layer (ohmic conductive thin film layer) imbued with a dark conductivity by doping it with an acceptor and a donor, or by the like method.Type: GrantFiled: December 4, 2002Date of Patent: November 23, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Tetsuo Tsutsui, Hiroko Yamazaki, Satoshi Seo
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Patent number: 7830013Abstract: The present invention aims at providing: a material for forming an adhesion reinforcing layer which can reinforce the adhesion between a low dielectric constant film, especially a low dielectric constant film containing an inorganic material, and other members; an adhesion reinforcing layer formed by the said material and exhibits superior adhesion; a fast and highly reliable semiconductor device having the adhesion reinforcing layer; and a manufacturing method thereof. The material for forming an adhesion reinforcing layer contains at least any one of organoalkoxysilane having a basic functional group, a basic additive and organoalkoxysilane. The adhesion reinforcing layer is formed by the said material. The manufacturing method of a semiconductor device includes a process for forming a low dielectric constant film and, at least before or after the process for forming a low dielectric constant film, a process for forming an adhesion reinforcing layer with the said material.Type: GrantFiled: April 3, 2006Date of Patent: November 9, 2010Assignee: Fujitsu LimitedInventors: Junichi Kon, Ei Yano, Yoshihiro Nakata, Tadahiro Imada
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Patent number: 7829967Abstract: The present invention relates to a resin for optical-semiconductor-element encapsulation containing a polyimide which is produced by imidizing a polyimide precursor obtained by subjecting 5-norbornene-2,3-dicarboxylic anhydride or maleic anhydride, an aliphatic tetracarboxylic dianhydride, and an aliphatic diamine compound to a condensation polymerization reaction. The resin of the invention has excellent heat resistance and excellent light-transmitting properties. In addition, the present invention also relates to an optical semiconductor device containing an optical semiconductor element encapsulated with the resin.Type: GrantFiled: October 28, 2008Date of Patent: November 9, 2010Assignee: Nitto Denko CorporationInventor: Hiroyuki Katayama
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Patent number: 7825403Abstract: A circuit board includes: a substrate; source and drain electrodes formed on the substrate; an organic semiconductor layer formed on the source and drain electrodes; a gate insulating layer formed on the organic semiconductor layer; and a gate electrode formed on the gate insulating layer, wherein: the substrate includes a first part, a second part, and a third part interposed between the first and second parts and a thickness of the first part or a thickness of the second part is greater than that of the third part; the source electrode is formed on the first part; the drain electrode is formed on the second part; a part of the organic semiconductor layer is formed on the third part; and a thickness of the gate insulating layer disposed on the first and second parts is smaller than that of the gate insulating layer disposed on the third part.Type: GrantFiled: March 19, 2007Date of Patent: November 2, 2010Assignee: Seiko Epson CorporationInventor: Takashi Aoki
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Patent number: 7816676Abstract: Hermetically sealed packages having organic electronic devices are presented. A number of sealing mechanisms are provided to hermetically seal the package to protect the organic electronic device from environmental elements. A metal alloy sealant layer is employed proximate to the organic electronic device. Alternatively, a metal alloy sealant layer in combination with primer layer may also be implemented. Further, superstrates and edge wraps may be provided to completely surround the organic electronic device.Type: GrantFiled: April 3, 2008Date of Patent: October 19, 2010Assignee: General Electric CompanyInventors: Donald Franklin Fourst, William Francis Nealon
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Patent number: 7816171Abstract: Dielectric materials comprising release agents are described. Also described are a process for improving the processability of dielectric materials during hot embossing, substrates prepared by hot embossing, and integrated-circuit packages comprising the improved substrate.Type: GrantFiled: October 3, 2007Date of Patent: October 19, 2010Assignee: Intel CorporationInventors: Paul A. Koning, James C. Matayabas, Jr.
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Patent number: 7803719Abstract: A material for passivating a dielectric layer in a semiconductor device has a molecular structure permitting or at least promoting liquid phase metal deposition thereon in a subsequent process step. The contemplated material may be constituted by multiple organic components. A semiconductor device including a layer of the passivating coupling material, and a method of manufacturing such a semiconductor device are also contemplated.Type: GrantFiled: February 24, 2006Date of Patent: September 28, 2010Assignee: Freescale Semiconductor, Inc.Inventors: Janos Farkas, Maria Luisa Calvo-Munoz, Srdjan Kordic
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Patent number: RE42514Abstract: An extreme low-k (ELK) dielectric film scheme for advanced interconnects includes an upper ELK dielectric layer and a lower ELK dielectric with different refractive indexes. The refractive index of the upper ELK dielectric layer is greater than the refractive index of the lower ELK dielectric layer.Type: GrantFiled: November 10, 2010Date of Patent: July 5, 2011Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Fang-Wen Tsai, Kuan-Chen Wang, Keng-Chu Lin, Chih-Lung Lin, Shwang-Ming Jeng